Preparation method of semiconductor structure and semiconductor structure

Abstract

The invention provides a preparation method of a semiconductor structure and the semiconductor structure, and the method comprises the steps: providing a first substrate which comprises a first substrate, and a first two-dimensional semiconductor layer and a first insulating layer which are sequentially stacked on the first substrate, and providing a second substrate, the second substrate comprises a second substrate, a second two-dimensional semiconductor layer and a second insulating layer, the second two-dimensional semiconductor layer and the second insulating layer are sequentially stacked on the second substrate, the second substrate is inverted, the second insulating layer in the second substrate is bonded with the first insulating layer in the first substrate, the second substrate is removed, and the second insulating layer and the second two-dimensional semiconductor layer located on the first substrate are reserved. In the transferring and stacking process of the two-dimensional semiconductor film, the second substrate and the second insulating layer serve as rigid supporting layers, damage to the material structure of the second two-dimensional semiconductor layer can be avoided, in addition, organic solvents are not adopted when the substrate is removed, and organic pollution is avoided.

Description

Technical Field

[0001] This invention relates to the field of semiconductors, and in particular to a method for preparing a semiconductor structure and the semiconductor structure thereof. Background Technology

[0002] As Moore's Law continues to evolve, the miniaturization of transistor planar dimensions has approached the limits of both physics and technology. Three-dimensional vertical stacking has become a core direction for continuing the miniaturization of integrated circuits and increasing integration density. Two-dimensional semiconductors, with their atomic-level thickness, excellent carrier mobility, and good interface compatibility, provide an important material basis for three-dimensional vertical stacking.

[0003] However, traditional thin film transfer methods based on flexible support materials are prone to introducing organic contamination and causing material structure damage during the stacking of two-dimensional semiconductor thin films. These problems directly affect the integrity and quality of two-dimensional semiconductor thin films and seriously restrict the development of three-dimensional stacking technology for two-dimensional semiconductor thin films.

[0004] It should be noted that the above introduction to the technical background is only for the purpose of providing a clear and complete explanation of the technical solutions of this application and facilitating understanding by those skilled in the art. It should not be assumed that these technical solutions are known to those skilled in the art simply because they have been described in the background section of this application. Summary of the Invention

[0005] In view of the shortcomings of the prior art described above, the purpose of this invention is to provide a method for preparing a semiconductor structure and a semiconductor structure, so as to solve the problem that the thin film transfer scheme based on flexible support material in the prior art is prone to introducing organic pollution and causing material damage.

[0006] To achieve the above and other related objectives, the present invention provides a method for preparing a semiconductor structure, comprising:

[0007] A first substrate is provided, the first substrate comprising a first substrate and a first two-dimensional semiconductor layer and a first insulating layer sequentially stacked on the first substrate;

[0008] A second substrate is provided, the second substrate comprising a second substrate and a second two-dimensional semiconductor layer and a second insulating layer sequentially stacked on the second substrate;

[0009] The second substrate is inverted so that the second insulating layer in the second substrate is bonded to the first insulating layer in the first substrate;

[0010] Remove the second substrate, leaving the second insulating layer and the second two-dimensional semiconductor layer located on the first substrate.

[0011] In one embodiment, the method for fabricating the semiconductor structure further includes:

[0012] Repeat the steps of depositing a bonding insulating layer on the previous two-dimensional semiconductor layer, providing the Nth substrate, bonding the Nth insulating layer of the Nth substrate to the bonding insulating layer, and removing the third substrate, until the number of stacked layers of the Nth two-dimensional semiconductor layer, the Nth insulating layer, and the bonding insulating layer on the first substrate reaches the target number of layers.

[0013] Wherein, N is greater than or equal to three; the Nth substrate includes an Nth substrate and an Nth two-dimensional semiconductor layer and a third insulating layer sequentially stacked on the Nth substrate.

[0014] In one embodiment, providing the first substrate includes:

[0015] Provide the first substrate;

[0016] The first two-dimensional semiconductor layer is formed on the first substrate using a deposition process;

[0017] The first insulating layer is formed on the first two-dimensional semiconductor layer.

[0018] In one embodiment, providing the second substrate includes:

[0019] Provide the second substrate;

[0020] The second two-dimensional semiconductor layer is formed on the second substrate using a deposition process;

[0021] The second insulating layer is formed on the second two-dimensional semiconductor layer.

[0022] In one embodiment, removing the second substrate includes:

[0023] The second substrate is removed using a wet process.

[0024] In one embodiment, the wet process for removing the second substrate includes:

[0025] The second substrate is removed using a tetramethylammonium hydroxide solution or a hydrofluoric acid solution.

[0026] Secondly, this application also provides a semiconductor structure, comprising:

[0027] First substrate;

[0028] A first two-dimensional semiconductor layer is located on the first substrate;

[0029] A first insulating layer is located on the first two-dimensional semiconductor layer;

[0030] The second insulating layer is located on the first insulating layer and is bonded to the first insulating layer;

[0031] The second two-dimensional semiconductor layer is located on the second insulating layer.

[0032] In one embodiment, the semiconductor structure further includes:

[0033] A bonding insulating layer, an Nth insulating layer, and an Nth two-dimensional semiconductor layer are stacked sequentially on the previous two-dimensional semiconductor layer;

[0034] Where N is greater than or equal to three.

[0035] In one embodiment, the materials of the first two-dimensional semiconductor layer and the second two-dimensional semiconductor layer may include molybdenum disulfide, molybdenum ditelluride, tungsten ditelluride, tungsten diselenide, tungsten disulfide, molybdenum diselenide, tin disulfide, germanium diarsenide, bismuth tritelluride, germanium selenide, germanium distide, antimony ditelluride, tin sulfide, titanium trisulfide, hexagonal boron nitride, graphene, and black phosphorus.

[0036] In one embodiment, the thickness of the first insulating layer and the second insulating layer is 0.1 micrometer to 1 micrometer.

[0037] As described above, the method for preparing the semiconductor structure and the semiconductor structure of the present invention have the following beneficial effects:

[0038] The semiconductor structure fabrication method and semiconductor structure of the present invention include: providing a first substrate, the first substrate including a first substrate and a first two-dimensional semiconductor layer and a first insulating layer sequentially stacked on the first substrate; providing a second substrate, the second substrate including a second substrate and a second two-dimensional semiconductor layer and a second insulating layer sequentially stacked on the second substrate; inverting the second substrate to bond the second insulating layer in the second substrate to the first insulating layer in the first substrate; removing the second substrate, retaining the second insulating layer and the second two-dimensional semiconductor layer located on the first substrate. This application achieves the stacking of two-dimensional semiconductor thin films by inverting the second substrate, bonding the first insulating layer and the second insulating layer, and then removing the second substrate. During the transfer and stacking of the two-dimensional semiconductor thin films, the second substrate and the second insulating layer act as rigid support layers, which can prevent damage to the material structure of the second two-dimensional semiconductor layer. Furthermore, the removal of the substrate does not use organic solvents, thus avoiding the introduction of organic pollution. Simultaneously, a three-dimensional vertically stacked structure including the first two-dimensional semiconductor layer, the first insulating layer, the second insulating layer, and the second two-dimensional semiconductor layer is directly formed, simplifying the process. Attached Figure Description

[0039] The accompanying drawings, which form part of this specification, are used to provide a further understanding of the embodiments of this application and to illustrate the implementation of this application, together with the textual description, to explain the principles of this application. Obviously, the drawings described below are merely some embodiments of this application.

[0040] Figure 1 This is a schematic flowchart of a method for fabricating a semiconductor structure provided in one embodiment of this application;

[0041] Figures 2-5 This is a schematic diagram of the structure obtained by the method for preparing the semiconductor structure provided in one embodiment of this application;

[0042] Figures 6-7 This is a schematic diagram of a semiconductor structure provided in one embodiment of this application;

[0043] Figure 8 This is a schematic flowchart of a method for fabricating a semiconductor structure provided in another embodiment of this application;

[0044] Figure 9 This is a schematic flowchart of a method for fabricating a semiconductor structure provided in another embodiment of this application. Detailed Implementation

[0045] The following specific examples illustrate the implementation of the present invention. Those skilled in the art can easily understand other advantages and effects of the present invention from the content disclosed in this specification. The present invention can also be implemented or applied through other different specific embodiments, and various details in this specification can also be modified or changed based on different viewpoints and applications without departing from the spirit of the present invention.

[0046] It should be emphasized that the term "including / comprises" as used herein refers to the presence of a feature, whole, step, or component, but does not exclude the presence or addition of one or more other features, wholes, steps, or components.

[0047] Features described and / or illustrated for one embodiment may be used in the same or similar manner in one or more other embodiments, combined with features in other embodiments, or substituted for features in other embodiments.

[0048] In the detailed description of embodiments of the present invention, for ease of explanation, the cross-sectional views illustrating the device structure may be partially enlarged and not to scale. Furthermore, the schematic diagrams are merely examples and should not limit the scope of protection of the present invention. In actual fabrication, the three-dimensional spatial dimensions of length, width, and depth should be included.

[0049] For ease of description, spatial relation terms such as “below,” “under,” “lower than,” “below,” “above,” and “upper” may be used herein to describe the relationship between one element or feature shown in the accompanying drawings and other elements or features. It will be understood that these spatial relation terms are intended to include directions other than those depicted in the drawings for devices in use or operation. Furthermore, when a layer is referred to as being “between” two layers, it may be the only layer between the two layers, or there may be one or more layers in between.

[0050] In the context of this application, the structure described above the first feature may include embodiments in which the first and second features are formed in direct contact, or embodiments in which additional features are formed between the first and second features, such that the first and second features may not be in direct contact.

[0051] It should be noted that the illustrations provided in this embodiment are only schematic representations of the basic concept of the present invention. Therefore, the illustrations only show the components related to the present invention and are not drawn according to the actual number, shape and size of the components in the actual implementation. In the actual implementation, the form, quantity and proportion of each component can be arbitrarily changed, and the layout of the components may also be more complex.

[0052] Please refer to Figure 1 ,as well as Figures 2-5 This application provides a method for preparing a semiconductor structure, characterized by comprising: steps S102-S108.

[0053] Step S102: Provide a first substrate, the first substrate including a first substrate 11 and a first two-dimensional semiconductor layer 21 and a first insulating layer 31 sequentially stacked on the first substrate 11.

[0054] Step S104: Provide a second substrate, the second substrate including a second substrate 13 and a second two-dimensional semiconductor layer 23 and a second insulating layer 33 sequentially stacked on the second substrate 13.

[0055] As an example, the materials of the first substrate 11 and the second substrate 13 may include, but are not limited to, sapphire, Si substrates with SiO2 grown on their surface, Si substrates with Al2O3 grown on their surface, glass substrates, quartz substrates, and silicon substrates. Furthermore, the materials of the first substrate 11 and the second substrate 13 may be the same or different. The sizes of the first substrate 11 and the second substrate 13 include, but are not limited to, wafers of 2 inches, 4 inches, 6 inches, 8 inches, 12 inches, etc., and diced grains with fixed shapes (such as 1 cm square substrates). The materials and sizes of the first substrate 11 and the second substrate 13 should not limit the scope of this application.

[0056] As an example, the materials of the first insulating layer 31 and the second insulating layer 33 may include one or more of the following: alumina, silicon dioxide, zirconium dioxide, titanium dioxide, lanthanum trioxide, organosilicon carbon, silicon carbon, hexagonal boron nitride, silicon nitride, silicon oxynitrogen, benzocyclobutene, parylene, and polyimide. Furthermore, the materials of the first insulating layer 31 and the second insulating layer 33 may be the same or different. The materials of the first insulating layer 31 and the second insulating layer 33 should not limit the scope of this application.

[0057] As an example, the first two-dimensional semiconductor layer 21 and the second two-dimensional semiconductor layer 23 can be formed by stacking one layer of two-dimensional semiconductor material, two or more layers of two-dimensional semiconductor material. The first two-dimensional semiconductor layer 21 and the second two-dimensional semiconductor layer 23 can be made of homogeneous two-dimensional semiconductor material, heterogeneous two-dimensional semiconductor material, or a combination of homogeneous two-dimensional semiconductor material and heterogeneous two-dimensional semiconductor material.

[0058] Step S106: Invert the second substrate so that the second insulating layer 33 in the second substrate is bonded to the first insulating layer 31 in the first substrate.

[0059] As an example, the first substrate and the second substrate can be aligned and placed in a bonding machine, and a thermoforming bonding process can be used to covalently bond the first insulating layer 31 and the second insulating layer 33. Specifically, the alignment accuracy of the first substrate and the second substrate is 1 micrometer. For example, the alignment accuracy of the first substrate and the second substrate includes 0.2 micrometers, 0.4 micrometers, 0.6 micrometers, 0.8 micrometers, 1 micrometer, etc.

[0060] Step S108: Remove the second substrate 13, and retain the second insulating layer 33 and the second two-dimensional semiconductor layer 23 located on the first substrate.

[0061] As an example, the second substrate 13 can be removed using either a wet etching process or a dry etching process, while avoiding damage to the second insulating layer 33, the second two-dimensional semiconductor 23, and the first substrate.

[0062] In the above embodiments, the method for fabricating the semiconductor structure includes: providing a first substrate, the first substrate including a first substrate and a first two-dimensional semiconductor layer and a first insulating layer sequentially stacked on the first substrate; providing a second substrate, the second substrate including a second substrate and a second two-dimensional semiconductor layer and a second insulating layer sequentially stacked on the second substrate; inverting the second substrate to bond the second insulating layer in the second substrate to the first insulating layer in the first substrate; removing the second substrate, retaining the second insulating layer and the second two-dimensional semiconductor layer located on the first substrate. This application achieves the stacking of two-dimensional semiconductor thin films by inverting the second substrate, bonding the first insulating layer and the second insulating layer, and then removing the second substrate. During the transfer and stacking of the two-dimensional semiconductor thin films, the second substrate and the second insulating layer act as rigid support layers, which can prevent damage to the material structure of the second two-dimensional semiconductor layer. Furthermore, the removal of the substrate does not use organic solvents, thus avoiding the introduction of organic pollution. Simultaneously, a three-dimensional vertically stacked structure including the first two-dimensional semiconductor layer, the first insulating layer, the second insulating layer, and the second two-dimensional semiconductor layer is directly formed, simplifying the process.

[0063] In some embodiments, the steps of depositing a bonding insulating layer on the previous two-dimensional semiconductor layer, providing an Nth substrate, bonding the Nth insulating layer of the Nth substrate to the bonding insulating layer, and removing the third substrate are repeated until the number of stacked layers of the Nth two-dimensional semiconductor layer, the Nth insulating layer, and the bonding insulating layer on the first substrate reaches a target number of layers; wherein N is greater than or equal to three; the Nth substrate includes an Nth substrate and an Nth two-dimensional semiconductor layer and a third insulating layer sequentially stacked on the Nth substrate.

[0064] In this context, the preceding two-dimensional semiconductor layer is the layer located below the Nth two-dimensional semiconductor layer. For example, when N equals three, the preceding two-dimensional semiconductor layer is the second two-dimensional semiconductor layer; when N equals four, the preceding two-dimensional semiconductor layer is the third two-dimensional semiconductor layer. For an example, please refer to [reference needed]. Figure 6 and Figure 7 A bonding insulating layer 40 can be deposited on the second two-dimensional semiconductor layer 23 to provide a third substrate. The third insulating layer 15 of the third substrate is bonded to the bonding insulating layer 40. The third substrate 35 is removed, leaving the bonding insulating layer 40, the third insulating layer 15, and the third two-dimensional semiconductor layer 25 located on the second two-dimensional semiconductor layer 23. Alternatively, a fourth substrate, a fifth substrate, a sixth substrate, etc., can be provided to form a three-dimensional stacked structure including four, five, or six two-dimensional semiconductor thin films.

[0065] As an example, the first two-dimensional semiconductor layer, the second two-dimensional semiconductor layer, and the Nth two-dimensional semiconductor layer are used to fabricate functional devices, and the first insulating layer, the second insulating layer, and the Nth insulating layer are used to isolate adjacent functional devices. The two-dimensional semiconductor layers can be electrically connected to each other through vias.

[0066] As an example, the material for the bonding insulating layer may include one or more of the following: alumina, silicon dioxide, zirconium dioxide, titanium dioxide, lanthanum trioxide, organosilicon carbon, silicon carbon, hexagonal boron nitride, silicon nitride, silicon oxynitrogen, benzocyclobutene, parylene, and polyimide.

[0067] In some embodiments, please refer to Figure 8 Step S102, providing a first substrate, includes: steps S802-S806.

[0068] Step S302: Provide a first substrate.

[0069] Step S304: A first two-dimensional semiconductor layer is formed on the first substrate using a deposition process.

[0070] As an example, a first two-dimensional semiconductor layer can be formed on a first substrate using chemical vapor deposition, physical vapor deposition, or atomic layer deposition methods, avoiding organic contaminants caused by micromechanical lift-off, ion intercalation lift-off, or ultrasonic lift-off methods.

[0071] Step S306: Form a first insulating layer on the first two-dimensional semiconductor layer.

[0072] As an example, a first insulating layer can be formed on a first two-dimensional semiconductor layer using chemical vapor deposition, physical vapor deposition, or atomic layer deposition. This application does not impose specific limitations on the formation process of the first insulating layer.

[0073] In some embodiments, please refer to Figure 9 Step S104, providing a second substrate, includes: steps S902-S906.

[0074] Step S902: Provide a second substrate.

[0075] Step S904: A second two-dimensional semiconductor layer is formed on the second substrate using a deposition process.

[0076] As an example, a second two-dimensional semiconductor layer can be formed on a second substrate using chemical vapor deposition, physical vapor deposition, or atomic layer deposition methods, avoiding organic contaminants caused by micromechanical lift-off, ion intercalation lift-off, or ultrasonic lift-off methods.

[0077] Step S906: Form a second insulating layer on the second two-dimensional semiconductor layer.

[0078] As an example, a second insulating layer can be formed on a second two-dimensional semiconductor layer using chemical vapor deposition, physical vapor deposition, or atomic layer deposition. This application does not impose specific limitations on the formation process of the second insulating layer.

[0079] In some embodiments, step S108, removing the second substrate, includes the step of removing the second substrate using a wet process.

[0080] As an example, the wet process for removing the second substrate includes the step of removing the second substrate using a tetramethylammonium hydroxide solution or a hydrofluoric acid solution.

[0081] In the above embodiments, by using tetramethylammonium hydroxide solution or hydrofluoric acid solution to remove the second substrate, damage to the two-dimensional semiconductor layer can be avoided, thereby ensuring the integrity of the two-dimensional semiconductor layer material structure and preventing the presence of organic contaminant residues.

[0082] In some embodiments, step S108, removing the second substrate, includes the step of removing the second substrate using a dry etching process.

[0083] As an example, the removal of the second substrate using a dry etching process includes: using a plasma deep silicon etching method with endpoint monitoring to remove the second substrate using SF6 gas. In some embodiments, this application also provides a semiconductor structure, fabricated using the semiconductor structure fabrication method described in any one of the embodiments of this application, comprising: a first substrate, a first two-dimensional semiconductor layer, a first insulating layer, a second insulating layer, and a second two-dimensional semiconductor layer; the first two-dimensional semiconductor layer is located on the first substrate; the first insulating layer is located on the first two-dimensional semiconductor layer; the second insulating layer is located on the first insulating layer and bonded to the first insulating layer; and the second two-dimensional semiconductor layer is located on the second insulating layer.

[0084] In the above embodiments, by making the semiconductor structure include a first substrate, a first two-dimensional semiconductor layer, a first insulating layer, a second insulating layer, and a second two-dimensional conductor layer, a three-dimensional stacked structure of the two-dimensional semiconductor layer is formed, which enhances the integration of the two-dimensional semiconductor.

[0085] In some embodiments, the semiconductor structure further includes: a bonding insulating layer, an Nth insulating layer, and an Nth two-dimensional semiconductor layer sequentially stacked on the preceding two-dimensional semiconductor layer; wherein N is greater than or equal to three.

[0086] As an example, when N equals three, the semiconductor structure includes a bonding insulating layer, a third insulating layer, and a third two-dimensional semiconductor layer stacked sequentially on a second two-dimensional semiconductor layer; when N equals four, the semiconductor structure includes a bonding insulating layer, a third insulating layer, a third two-dimensional semiconductor layer, a bonding insulating layer, a fourth insulating layer, and a fourth two-dimensional semiconductor layer stacked sequentially on a second two-dimensional semiconductor layer.

[0087] In some embodiments, the materials of the first two-dimensional semiconductor layer and the second two-dimensional semiconductor layer may include molybdenum disulfide, molybdenum ditelluride, tungsten ditelluride, tungsten diselenide, tungsten disulfide, molybdenum diselenide, tin disulfide, germanium diarsenide, bismuth tritelluride, germanium selenide, germanium distide, antimony ditelluride, tin sulfide, titanium trisulfide, hexagonal boron nitride, graphene, and black phosphorus.

[0088] In some embodiments, the thickness of the first insulating layer and the second insulating layer is 0.1 micrometer to 1 micrometer.

[0089] In some embodiments, the first substrate includes a silicon wafer and a silicon dioxide layer on the surface of the silicon wafer, the thickness of which is 100 nm-500 nm. A first two-dimensional semiconductor layer is located on the side of the first substrate containing silicon dioxide.

[0090] As an example, the thickness of the silicon dioxide layer is 100nm, 200nm, 300nm, 400nm, 500nm, etc.

[0091] In summary, the semiconductor structure fabrication method and semiconductor structure of the present invention include: providing a first substrate, the first substrate including a first substrate and a first two-dimensional semiconductor layer and a first insulating layer sequentially stacked on the first substrate; providing a second substrate, the second substrate including a second substrate and a second two-dimensional semiconductor layer and a second insulating layer sequentially stacked on the second substrate; inverting the second substrate to bond the second insulating layer in the second substrate to the first insulating layer in the first substrate; removing the second substrate, retaining the second insulating layer and the second two-dimensional semiconductor layer located on the first substrate. This application achieves the stacking of two-dimensional semiconductor thin films by inverting the second substrate, bonding the first and second insulating layers, and then removing the second substrate. During the transfer and stacking of the two-dimensional semiconductor thin films, the second substrate and the second insulating layer act as rigid support layers, which can prevent material structural damage to the second two-dimensional semiconductor layer. Furthermore, the removal of the substrate does not use organic solvents, avoiding the introduction of organic pollution. Simultaneously, a three-dimensional vertically stacked structure including the first two-dimensional semiconductor layer, the first insulating layer, the second insulating layer, and the second two-dimensional semiconductor layer is directly formed, resulting in a simple process. Therefore, the present invention effectively overcomes the various shortcomings of the prior art and has high industrial applicability.

[0092] The above embodiments are merely illustrative of the principles and effects of the present invention and are not intended to limit the invention. Any person skilled in the art can modify or alter the above embodiments without departing from the spirit and scope of the present invention. Therefore, all equivalent modifications or alterations made by those skilled in the art without departing from the spirit and technical concept disclosed in the present invention should still be covered by the claims of the present invention.

Claims

1. A method for fabricating a semiconductor structure, characterized in that, include: A first substrate is provided, the first substrate comprising a first substrate and a first two-dimensional semiconductor layer and a first insulating layer sequentially stacked on the first substrate; A second substrate is provided, the second substrate comprising a second substrate and a second two-dimensional semiconductor layer and a second insulating layer sequentially stacked on the second substrate; The second substrate is inverted so that the second insulating layer in the second substrate is bonded to the first insulating layer in the first substrate; Remove the second substrate, leaving the second insulating layer and the second two-dimensional semiconductor layer located on the first substrate.

2. The method for preparing a semiconductor structure according to claim 1, characterized in that, After removing the second substrate and retaining the second insulating layer and the second two-dimensional semiconductor layer located on the first substrate, the method for fabricating the semiconductor structure further includes: Repeat the steps of depositing a bonding insulating layer on the previous two-dimensional semiconductor layer, providing the Nth substrate, bonding the Nth insulating layer of the Nth substrate to the bonding insulating layer, and removing the third substrate, until the number of stacked layers of the Nth two-dimensional semiconductor layer, the Nth insulating layer, and the bonding insulating layer on the first substrate reaches the target number of layers. Wherein, N is greater than or equal to three; the Nth substrate includes an Nth substrate and an Nth two-dimensional semiconductor layer and a third insulating layer sequentially stacked on the Nth substrate.

3. The method for preparing a semiconductor structure according to claim 1, characterized in that, The provision of the first substrate includes: Provide the first substrate; The first two-dimensional semiconductor layer is formed on the first substrate using a deposition process; The first insulating layer is formed on the first two-dimensional semiconductor layer.

4. The method for preparing a semiconductor structure according to claim 1, characterized in that, The provision of the second substrate includes: Provide the second substrate; The second two-dimensional semiconductor layer is formed on the second substrate using a deposition process; The second insulating layer is formed on the second two-dimensional semiconductor layer.

5. The method for preparing a semiconductor structure according to claim 1, characterized in that, The removal of the second substrate includes: The second substrate is removed using a wet process.

6. The method for preparing a semiconductor structure according to claim 5, characterized in that, The wet process for removing the second substrate includes: The second substrate is removed using a tetramethylammonium hydroxide solution or a hydrofluoric acid solution.

7. A semiconductor structure, characterized in that, include: First substrate; A first two-dimensional semiconductor layer is located on the first substrate; A first insulating layer is located on the first two-dimensional semiconductor layer; The second insulating layer is located on the first insulating layer and is bonded to the first insulating layer; The second two-dimensional semiconductor layer is located on the second insulating layer.

8. The semiconductor structure according to claim 7, characterized in that, The semiconductor structure also includes: A bonding insulating layer, an Nth insulating layer, and an Nth two-dimensional semiconductor layer are stacked sequentially on the previous two-dimensional semiconductor layer; Where N is greater than or equal to three.

9. The semiconductor structure according to claim 7, characterized in that, The materials of the first two-dimensional semiconductor layer and the second two-dimensional semiconductor layer may include molybdenum disulfide, molybdenum ditelluride, tungsten ditelluride, tungsten diselenide, tungsten disulfide, molybdenum diselenide, tin disulfide, germanium diarsenide, bismuth tritelluride, germanium selenide, germanium distide, antimony ditelluride, tin sulfide, titanium trisulfide, hexagonal boron nitride, graphene, and black phosphorus.

10. The semiconductor structure according to claim 7, characterized in that, The thickness of the first insulating layer and the second insulating layer is 0.1 micrometer to 1 micrometer.

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