High-power power supply dynamic load detection system and method
By introducing a transient load simulation module, a steady-state energy throughput module, and a bidirectional energy buffer module into the high-power power supply testing system, combined with the rate of change feedforward and thermal-frequency adaptive adjustment of the central control module, the voltage fluctuation and energy buffering problems of traditional electronic loads during dynamic response are solved, achieving the testing requirements of high dynamics, high precision, and high energy efficiency.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2026-02-04
- Publication Date
- 2026-03-10
AI Technical Summary
Traditional high-power electronic loads suffer from bus voltage fluctuations, lack of active energy buffering mechanisms, and lack of coordination in thermal management strategies during dynamic response. This makes the system prone to impacting the power grid or causing shutdowns under extreme current change rate conditions, making it difficult to meet the testing requirements for high dynamics and high energy efficiency.
The system employs a combined architecture consisting of a transient load simulation module, a steady-state energy throughput module, a bidirectional energy buffer module, and a central control module. Through rate-of-change feedforward control and thermal-frequency adaptive adjustment, it achieves active energy regulation and high-precision response. Combined with complementary filters for frequency domain decoupling, it ensures stable operation of the system under high dynamic conditions.
It achieves dual decoupling of energy and signal, namely microsecond-level high dynamic response and stable feedback from the grid side, thereby improving the thermal stability and long-term operational reliability of the system, while taking into account both high precision and energy saving.
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Figure CN121633904A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of power electronics testing technology, specifically to a dynamic load detection system and method for high-power power supplies. Background Technology
[0002] With the rapid development of new energy vehicles, fuel cells, energy storage power stations, and aerospace power supply systems, the output characteristic testing of high-power switching power supplies (such as those ranging from tens of kilowatts to megawatts) has become particularly important. In these tests, electronic loads are the core equipment for simulating real-world power consumption conditions and verifying the dynamic performance of the power supply.
[0003] Traditional electronic loads are mainly divided into two categories: energy-consuming (linear / switching) and regenerative. Energy-consuming electronic loads (usually using power transistors operating in the linear region) have extremely high dynamic response speeds (kHz or even MHz bandwidth), capable of accurately simulating rapid current steps. However, they convert all electrical energy into heat, resulting in significant energy waste and a bulky cooling system, making it difficult to achieve high power. Regenerative electronic loads use grid-connected inverter technology to feed electrical energy back to the grid, solving the energy-saving and heat dissipation problems. However, limited by grid current quality (THD) requirements and the presence of LCL filters, their control bandwidth is usually low (typically within a few hundred hertz), making it difficult to respond to the rapid transient testing requirements of the power supply under test.
[0004] To balance high dynamics and high energy efficiency, existing technical solutions are beginning to explore hybrid electronic load architectures, which involve connecting a linear load module and a feedback module in parallel on the DC bus. The basic control idea is to use the linear module to respond to high-frequency current and the feedback module to recover low-frequency / DC energy.
[0005] However, in practical high-power applications, this traditional hybrid architecture still has the following significant technical drawbacks: The "time lag" in dynamic response causes bus voltage fluctuations: linear modules respond extremely quickly (microseconds), while feedback modules respond more slowly (milliseconds). During high-current transient loading (e.g., a sudden jump from 0 to 500A), the linear module instantly draws energy from the DC bus, while the upstream feedback module (or rectifier) cannot establish current in time, causing a momentary drop in the intermediate DC bus voltage, potentially triggering undervoltage protection. Conversely, during sudden unloading, the feedback module cannot reduce its feedback amount in time, causing a momentary surge in bus voltage. Current solutions typically rely on passive support from bus capacitors or PID feedback regulation, a "post-event adjustment" mechanism that cannot fundamentally eliminate the risk of bus oscillation caused by this dynamic lag.
[0006] Lack of proactive energy buffering mechanisms: Existing systems typically connect the linear stage and the feedback stage directly to the same bus. This "hard-connection" approach lacks a flexible energy buffer pool. Under extreme current rate of change conditions, instantaneous power throughput depends entirely on the capacitance and grid's capacity, which can easily impact the grid or cause the system to shut down due to DC bus overvoltage / undervoltage, limiting the system's transient testing capabilities.
[0007] The thermal management and control strategies lack a linkage mechanism (i.e., there is no thermal-frequency adaptive adjustment): In mixed loads, linear modules are the main heat source. Existing shunt control strategies typically only use a fixed shunt cutoff frequency, without incorporating the real-time temperature of the power devices as a control parameter. This inflexible control method cannot dynamically adjust the load distribution based on the thermal state of the devices. When the device junction temperature is too high, the system cannot automatically derate or adjust the frequency, easily leading to shutdowns or test interruptions. Summary of the Invention
[0008] To achieve the above objectives, the present invention provides a high-power power supply dynamic load detection system, comprising: A test access port is used to connect to the high-power power supply under test; a transient load simulation module is connected in parallel with the test access port and configured to respond to the high-frequency and transient components in the load current command; a steady-state energy throughput module is connected in parallel with the test access port and configured to respond to the low-frequency and DC components in the load current command; the steady-state energy throughput module has a built-in DC transmission link; a bidirectional energy buffer module is connected to the DC transmission link of the steady-state energy throughput module and is used to regulate energy fluctuations on the DC transmission link; a central control module establishes signal connections with the transient load simulation module, the steady-state energy throughput module, and the bidirectional energy buffer module respectively; the central control module is equipped with a rate of change feedforward unit for real-time monitoring of the rate of change of the load current command; when the absolute value of the rate of change exceeds a preset dynamic threshold, the central control module directly generates a feedforward control signal based on the rate of change of the load current command and sends it to the bidirectional energy buffer module to trigger active energy throughput before the voltage of the DC transmission link fluctuates, so as to compensate for the dynamic response lag of the steady-state energy throughput module.
[0009] Furthermore, the transient load simulation module includes multiple parallel power semiconductor device arrays and non-inductive sampling resistors connected in series with the power semiconductor device arrays; the power semiconductor device arrays operate in the linear amplification region to dissipate transient energy by adjusting the on-resistance; the central control module is also equipped with a virtual junction temperature estimation unit, which is used to collect the terminal voltage and branch current of the power semiconductor device array to calculate the instantaneous power loss, and estimate the virtual junction temperature of the power semiconductor device array in real time by combining a preset transient thermal impedance model; the central control module performs nonlinear compensation on the gate drive signal of the power semiconductor device array based on the virtual junction temperature to offset the influence of temperature drift on the accuracy of the load current.
[0010] Furthermore, the steady-state energy throughput module includes a cascaded first bidirectional conversion unit and a three-phase grid-connected inverter unit; The DC transmission link is a high-voltage DC bus connecting the first bidirectional converter unit and the three-phase grid-connected inverter unit; the input side of the first bidirectional converter unit is connected in parallel to the test access port, and the output side of the three-phase grid-connected inverter unit is connected to the AC grid, which is used to feed back the electrical energy corresponding to the low-frequency component and DC component in the load current command to the AC grid.
[0011] Furthermore, the bidirectional energy buffer module includes a second bidirectional converter unit and a supercapacitor module connected in series; The high-voltage side of the second bidirectional conversion unit is connected to the DC transmission link, and the low-voltage side is connected to the supercapacitor module. The second bidirectional conversion unit is configured to execute the following operating modes in response to the feedforward control signal: when the feedforward control signal indicates that the rate of change of the load current command is positive and exceeds a threshold, the second bidirectional conversion unit is controlled to enter the boost discharge mode to release the energy stored in the supercapacitor module to the DC transmission link; when the feedforward control signal indicates that the rate of change of the load current command is negative and exceeds a threshold, the second bidirectional conversion unit is controlled to enter the buck charging mode to absorb the redundant energy on the DC transmission link to the supercapacitor module.
[0012] Furthermore, the central control module is also equipped with a signal frequency domain decomposition unit and a thermal frequency adaptive adjustment unit; the signal frequency domain decomposition unit is equipped with a complementary filter, which is used to decompose the load current command into a high-frequency command sent to the transient load simulation module and a low-frequency command sent to the steady-state energy throughput module according to the set shunt cutoff frequency. The thermal frequency adaptive adjustment unit is configured to receive real-time thermal state data from the transient load simulation module and dynamically adjust the shunt cutoff frequency of the complementary filter based on the thermal state data; when the thermal state data indicates that the temperature is rising, the shunt cutoff frequency is reduced to reduce the current carrying ratio of the transient load simulation module.
[0013] A dynamic load detection method for a high-power power supply includes the following steps: Step S1: Real-time acquisition of load current commands, and decomposition of the load current commands into high-frequency control commands corresponding to the transient load simulation module and low-frequency control commands corresponding to the steady-state energy throughput module using a complementary filter; Step S2: Sending the high-frequency control commands to the transient load simulation module to control it to operate in the linear amplification region to respond to transient current; sending the low-frequency control commands to the steady-state energy throughput module to control it to establish a feedback current flowing to the grid; Step S3: Synchronously calculating the rate of change of the load current commands, and determining in real time whether the absolute value of the rate of change exceeds a preset dynamic threshold; Step S4: When the absolute value of the rate of change exceeds the dynamic threshold, generating a feedforward control signal and sending it to the bidirectional energy buffer module; controlling the bidirectional energy buffer module to respond to the feedforward control signal, and before the voltage fluctuation of the DC transmission link is triggered, performing an active energy throughput action associated with the polarity of the rate of change to compensate for the dynamic response lag of the steady-state energy throughput module.
[0014] Compared with known public technologies, the technical solution provided by this invention has the following beneficial effects: This invention effectively solves the problem of DC bus voltage fluctuation caused by feedback response lag in traditional hybrid electronic loads under severe transient conditions by introducing a bidirectional energy buffer module on the DC transmission link of the steady-state energy throughput module and combining it with a rate-of-change feedforward control strategy. It achieves dual decoupling of "energy-signal" between microsecond-level high dynamic response and stable feedback from the grid side. At the same time, with the unique thermal-frequency adaptive adjustment mechanism, the system can dynamically adjust the shunt cutoff frequency according to the real-time virtual junction temperature of the transient module. While ensuring high accuracy of load current, it minimizes the thermal stress of linear devices, significantly improves the thermal stability and long-term operational reliability of the system, and thus meets the dual testing requirements of "green energy saving" and "ultimate performance". Attached Figure Description
[0015] Figure 1 This is a schematic diagram of the overall system architecture of the present invention; Figure 2 This is a detailed hardware circuit diagram of the module of the present invention; Figure 3 This is an internal logic block diagram of the central control module of the present invention.
[0016] Figure 4 This is a schematic diagram of the computer device of the present invention. Detailed Implementation
[0017] To enable those skilled in the art to better understand the present invention, the technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings of the embodiments of the present invention. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort should fall within the scope of protection of the present invention.
[0018] It should be noted that the terms "first," "second," etc., in the specification, claims, and accompanying drawings of this invention are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate so that the embodiments of the invention described herein can be implemented in orders other than those illustrated or described herein. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover a non-exclusive inclusion; for example, a process, method, system, product, or apparatus that comprises a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or apparatus.
[0019] The present invention will now be described in further detail with reference to the accompanying drawings: Example: As shown in the figure, this invention provides a dynamic load detection system for high-power power supplies: The system mainly consists of a test access port, a transient load simulation module, a steady-state energy throughput module, a bidirectional energy buffer module, and a central control module.
[0020] In terms of physical connection architecture, the test access port is used to connect the high-power power supply under test (DUT). The transient load simulation module and the steady-state energy throughput module are connected in parallel at both ends of the test access port, thus forming a dual-channel shunt architecture for load current. The transient load simulation module, acting as the fast channel, is responsible for responding to the high-frequency and transient components (e.g., high-frequency ripple above 1kHz and microsecond-level step transitions) in the load current command; the steady-state energy throughput module, acting as the "slow channel" or "main channel," is responsible for responding to the low-frequency and DC components in the load current command and feeding high-power energy back to the grid.
[0021] It is important to note that the steady-state energy throughput module has an internal high-voltage DC transmission link (e.g., an 800VDC-Link bus). The bidirectional energy buffer module is not directly connected to the test port, but is physically connected to this DC transmission link. This unique topology makes the bidirectional energy buffer module an "energy regulation pool" within the system, used to isolate fluctuations at the test end from feedback lag on the grid side.
[0022] In terms of control logic architecture, the central control module (which can adopt a heterogeneous control architecture of DSP+FPGA) establishes bidirectional signal connections with the three power modules mentioned above. The central control module not only performs frequency domain decoupling control based on complementary filtering, but more importantly, it is internally configured with a rate-of-change feedforward unit. This unit monitors the rate of change of load commands in real time. Once a drastic load change is detected, a feedforward control signal is sent to the bidirectional energy buffer module before the physical voltage drops or surges in the DC transmission link, driving it to perform active energy throughput compensation, thereby achieving high dynamic, high precision and thermal stability operation of the entire system.
[0023] The transient load simulation module is connected in parallel with the test access port and is configured to respond to the high-frequency and transient components in the load current command. Furthermore, the transient load simulation module and its thermal compensation mechanism: 1. Hardware circuit architecture: Specifically, the transient load simulation module mainly consists of a power semiconductor device array, a high-bandwidth linear drive circuit, and a series non-inductive sampling resistor.
[0024] Power semiconductor device array: To achieve ultra-fast response, this embodiment preferably uses power MOSFETs (metal-oxide-semiconductor field-effect transistors) with low gate charge and a wide safe operating area as the core power-consuming device. Multiple MOSFETs are connected in parallel to form an array to share the current thermal stress. Unlike traditional PWM circuits that operate in a "switching state", the MOSFET array in this embodiment is controlled to operate in the linear amplification region, which is equivalent to a controlled fast variable resistor.
[0025] Non-inductive sampling resistor: to prevent high voltage sampling. The introduction of parasitic inductance under operating conditions can cause voltage spikes or oscillations. This branch is connected in series with a specially designed non-inductive sampling resistor (e.g., a low-inductance structure made of constantan or manganin alloy). This resistor not only serves as feedback for the current signal but also acts as a current negative feedback element for the linear branch, increasing circuit stability.
[0026] 2. Linear Operating Principle: During operation, the central control module converts the decomposed high-frequency / transient control commands into analog voltage signals via a high-speed DAC (Digital-to-Analog Converter), which are then sent to the high-bandwidth linear drive circuit. The drive circuit adjusts the gate-source voltage of the MOSFET. This allows the on-resistance between the drain and source to change linearly with the command, thereby accurately "reproducing" the high-frequency current waveform required by the command. Since there is no switching action, this process does not generate high-frequency switching noise, ensuring the smoothness and high fidelity of the current waveform.
[0027] 3. Dynamic thermal-impedance compensation based on virtual junction temperature: Due to the significant heat loss generated by power devices operating in the linear region (all unrecovered energy is converted into heat), the threshold voltage of the MOSFET... and transconductance Will vary with the temperature The rise in temperature causes drift (usually manifested as a negative temperature coefficient), resulting in a decrease in current accuracy during long pulse loads (i.e., the "thermal drop" phenomenon).
[0028] To address this industry challenge, this embodiment configures a virtual junction temperature estimation unit in the central control module to execute the following thermal-impedance compensation logic: Step 1: Real-time acquisition of drain-source voltage of MOSFET array and branch current The instantaneous power dissipation is calculated using a multiplier: .
[0029] Step 2: Input the instantaneous power dissipation into a preset transient thermal impedance model. This model typically uses a Cauer network or a Foster network (RC thermal equivalent circuit) to simulate the heat conduction process from the chip junction to the heat sink in the power device. Through integration calculations, the virtual junction temperature inside the chip, which cannot be directly measured, is estimated in real time. .
[0030] In this embodiment, the preset transient thermal impedance model is specifically constructed using a fourth-order Foster thermal network model. Compared to Cauer networks, Foster networks are easier to obtain parameters through experimental curve fitting and are easier to implement in digital controllers. The specific modeling and calculation process is as follows: Based on the transient thermal impedance characteristic curve provided in the power MOSFET device datasheet, the curve was fitted using the least squares method to obtain the parameters of the fourth-order RC network. .
[0031] in Represents thermal resistance. Represents heat capacity and time constant. At this time, transient thermal resistance The time-domain expression is:
[0032] To enable real-time computation in the central control module (DSP), the continuous domain model described above is transformed into discrete difference equations. For each order of the Foster network... The first stage The temperature rises with time The calculation formula is:
[0033] in, The system sampling period is This represents the power loss calculated at the current moment.
[0034] Final virtual junction temperature Add the shell temperature to the sum of the temperature rises at each stage. :
[0035] Using the discretization model described above, the central control module can accurately calculate the junction temperature inside the chip within each control cycle, and the calculation error can be controlled within a certain range. Within.
[0036] Step 3: The central control module stores lookup data of the "temperature-transfer characteristic curve" for this MOSFET model. Based on the estimated virtual junction temperature, the controller queries the corresponding threshold voltage drift in real time and adds a compensation voltage to the original gate drive signal. .
[0037] Example scenario: For instance, when the virtual junction temperature is detected to rise instantly from 25°C to 100°C, the controller predicts that the physical characteristics will cause the current to naturally decrease by 5%. At this time, the corresponding drive voltage is immediately added to the feedforward path to force the current to be maintained at the set value, thereby achieving "zero temperature drift" high-precision control across the entire temperature range.
[0038] In this embodiment, the transient load simulation module serves as the system's "fast lane," with its physical connection port directly connected in parallel to both ends of the test access port. This module is designed to overcome the slow dynamic response of traditional regenerative electronic loads, specifically designed to handle high-frequency components (e.g., ripples above 1kHz) and nanosecond to microsecond-level transient step components (e.g., current rise rate) in load current commands. Up to 2.5A (The jump).
[0039] A steady-state energy throughput module, connected in parallel with the test access port, is configured to respond to the low-frequency component and DC component in the load current command; a DC transmission link is built inside the steady-state energy throughput module; Furthermore, the steady-state energy throughput module and its cascaded feedback architecture: 1. In order to adapt to a wide range of output voltages of the power supply under test (e.g., from 50V to 1000V) and at the same time meet the constant DC side voltage requirements of the grid-connected inverter, the steady-state energy throughput module in this embodiment adopts a "two-stage cascaded" power electronic conversion architecture, specifically including a cascaded first bidirectional conversion unit (DC / DC stage) and a three-phase grid-connected inverter unit (DC / AC stage).
[0040] First bidirectional conversion unit (input stage): The input side of this unit is connected in parallel to the test access port. Since the voltage of the power supply under test (DPUT) varies, this unit typically employs a multi-phase interleaved parallel Buck-Boost circuit or an isolated bidirectional full-bridge (DAB) circuit. Its core function is voltage matching: transforming the unstable output voltage of the DPUT into the stable high voltage required by the downstream circuit. For example, when the DPUT outputs low voltage and high current, this unit operates in Boost mode, boosting the voltage to the DC bus voltage level.
[0041] DC transmission link: The electrical connection point between the first bidirectional converter unit and the three-phase grid-connected inverter unit is defined as the DC transmission link (DC-Link) in this specification. Physically, this link typically consists of an array of high-voltage film capacitors or electrolytic capacitors to smooth high-frequency switching ripple. The voltage of this link (i.e., the DC bus voltage) is typically controlled at a level higher than the peak value of the AC grid line voltage (e.g., for a 380V AC grid, the DC bus voltage is typically stable between 650V and 800V).
[0042] Three-phase grid-connected inverter unit (output stage): This unit connects the DC transmission link to the industrial AC power grid. It typically adopts a three-phase full-bridge topology and is connected in series with an LCL filter circuit. Its control objective is to maintain the basic stability of the DC bus voltage and invert the energy from the DC link into sinusoidal AC power with the same frequency and phase as the grid, achieving unity power factor grid connection.
[0043] 2. The energy flow control logic, under typical electronic load operating mode (energy recovery mode), operates as follows: The central control module sends a low-frequency current command to the first bidirectional conversion unit to control it to accurately absorb the DC / low-frequency current of the power supply under test; the absorbed energy causes the voltage of the DC transmission link to tend to rise; the three-phase grid-connected inverter unit detects the rise in bus voltage and then increases the inverter power to discharge the excess energy into the grid, thereby dynamically maintaining the bus voltage balance.
[0044] 3. Limitations of Dynamic Response Characteristics It should be noted that, in order to ensure grid-connected power quality (low THD), the control loop bandwidth of a three-phase grid-connected inverter unit is typically low (e.g., the voltage loop bandwidth is only tens of hertz); and the large-capacity capacitors on the DC transmission link exhibit an integral effect. This means that when a sudden load change occurs on the input side, the steady-state energy throughput module cannot respond immediately, easily causing a momentary overshoot or drop in the DC bus voltage. This is precisely the technical motivation for introducing a bidirectional energy buffer module on the DC transmission link in this invention.
[0045] In this embodiment, the steady-state energy throughput module constitutes the main power channel of the entire system. Its rated power capacity is usually set to be equivalent to the maximum output power of the power supply under test (e.g., 100kW to MW level). It is mainly responsible for responding to the low-frequency components (e.g. below 100Hz) and DC components in the load current command, and efficiently feeding back the large amount of electrical energy generated during the test to the AC grid to achieve green cycle testing.
[0046] A bidirectional energy buffer module is connected to the DC transmission link of the steady-state energy throughput module and is used to regulate energy fluctuations on the DC transmission link.
[0047] Furthermore, the bidirectional energy buffer module and its active adjustment mechanism: 1. The bidirectional energy buffer module mainly consists of a second bidirectional conversion unit. The bidirectional energy buffer module is mainly composed of series connections.
[0048] Supercapacitor Module (Energy Storage Element): Unlike conventional battery energy storage, supercapacitors are preferred as the energy storage medium. This is because supercapacitors have extremely high power density and a cycle life of millions of cycles, and can withstand frequent charging and discharging of large currents at the millisecond level, perfectly meeting the system's requirements for dynamic response speed (µs to millisecond level).
[0049] A supercapacitor module can be composed of multiple individual capacitors connected in series and parallel, and is equipped with an independent voltage equalization circuit. Its terminal voltage is usually lower than the voltage of the DC transmission link.
[0050] The second bidirectional conversion unit is connected between the DC transmission link and the supercapacitor module to achieve bidirectional energy flow and voltage matching.
[0051] High voltage side: Connected to a DC transmission link (e.g., 800V bus).
[0052] Low voltage side: Connect to the supercapacitor module (e.g., 200V-400V variable voltage).
[0053] Topology selection: A half-bridge bidirectional DC / DC topology or an interleaved parallel bidirectional DC / DC topology is preferred to achieve fast current response.
[0054] 2. To address the physical characteristics of energy flow during high-power power supply testing, the bidirectional energy buffer module (i.e., the supercapacitor energy storage system) is configured with the following two active adjustment modes to resolve voltage fluctuation issues in the DC transmission link: Mode 1: Buck Energy Absorption Mode – Handling sudden positive changes in load current: When the central control module detects a positive step in the load current command (e.g., a sudden jump from 0 to 100% of the rated current), it means that the power supply under test is instantly injecting a large amount of energy into the system. At this time, because the downstream steady-state energy throughput module (grid-connected inverter stage) is limited by the grid-side inductance, its feedback current cannot immediately rise to the corresponding level, causing excess energy to accumulate rapidly on the DC transmission link, triggering a DC bus voltage surge. In response to this condition, the central control module immediately controls the bidirectional energy buffer module to enter Buck charging mode, rapidly transferring the excess energy accumulated on the DC bus to the supercapacitor for storage, thereby restraining the upward trend of the DC bus voltage.
[0055] Mode 2: Boost Discharge Mode – Handling Severe Negative Load Current Unloading When the load current command experiences a negative step change (e.g., a sudden drop from 100% to 0), the power supply under test stops outputting energy. However, at this time, due to the inertia of the current loop, the steady-state energy throughput module (grid-connected inverter stage) continues to maintain a large current feedback to the grid. This causes the energy drawn from the DC transmission link to momentarily exceed the input energy, resulting in a DC bus voltage drop. In response to this situation, the central control module immediately controls the bidirectional energy buffer module to enter Boost discharge mode, rapidly replenishing the current to the DC transmission link using the energy stored in the supercapacitor to support the bus voltage until the grid-connected inverter stage current drops to zero.
[0056] 3. To ensure the continuity of the buffering capacity, the central control module also monitors the state of charge (SOC) of the supercapacitor module in real time. During the steady-state operation interval, the controller will control the second bidirectional converter to fine-tune the current to maintain the SOC of the supercapacitor in the optimal range (e.g., 50%-70%), so as to reserve charging and discharging margin for the next sudden addition or removal operation.
[0057] In this embodiment, the bidirectional energy buffer module is a key innovative component that distinguishes this invention from existing hybrid electronic loads. It is physically connected to the aforementioned DC-Link and acts as a high-dynamic energy regulation pool within the system. Its design aims to solve the problem of lag in the steady-state energy throughput module response, utilizing peak shaving and valley filling principles to isolate high-frequency power fluctuations on the power supply side from low-frequency feedback characteristics on the grid side.
[0058] The central control module establishes signal connections with the transient load simulation module, the steady-state energy throughput module, and the bidirectional energy buffer module, respectively. Furthermore, the central control module and its multi-dimensional decoupling control strategy: 1. In order to balance the real-time calculation of complex algorithms and the parallel output of multiple pulses, the central control module in this embodiment preferably adopts a heterogeneous dual-core architecture of DSP (Digital Signal Processor) + FPGA (Field Programmable Gate Array).
[0059] DSP Unit: Responsible for executing high-level algorithms, including floating-point arithmetic tasks such as load current instruction parsing, thermal model calculation, and frequency adaptive decision-making.
[0060] FPGA unit: responsible for executing low-level high-speed logic, including nanosecond-level feedforward signal generation, multi-channel PWM ripple generation, high-speed AD sampling interface management, and fault protection logic.
[0061] It should be noted that the central control module can also be implemented using a high-performance ARM processor, an industrial control computer (IPC), or an application-specific integrated circuit (ASIC), all of which fall within the scope of protection of this invention.
[0062] Signal frequency domain decomposition logic: The central control module is equipped with a signal frequency domain decomposition unit. This unit receives the user-defined total load current command and decomposes it into two components using a digital complementary filter: High-frequency / transient instructions: Instructions containing frequencies higher than the cutoff frequency. The spectral components are sent to the transient load simulation module.
[0063] Low-frequency / steady-state instructions: Including instructions with frequencies lower than the cutoff frequency. The spectral components are sent to the steady-state energy throughput module.
[0064] To ensure zero phase distortion of the synthesized current, complementary filters are typically designed as phase-shift-free IIR or FIR filters, ensuring that the original command can be perfectly reproduced after the two signals are superimposed in the time domain.
[0065] 3. Thermal-Frequency Adaptive Regulation Mechanism: To address the overheating issue of transient modules under high-power conditions, a thermal-frequency adaptive regulation unit is configured within the central control module. This unit constructs a temperature-frequency negative feedback control loop: Monitoring mechanism: Real-time reading of virtual junction temperature data fed back by the transient load simulation module.
[0066] Adjustment logic: When the virtual junction temperature approaches the safe threshold (e.g., 125°C), the adjustment unit automatically lowers the shunt cutoff frequency of the complementary filter. .
[0067] Lowering the cutoff frequency means transferring more of the intermediate frequency energy originally allocated to the linear branch to the feedback branch. Although this may sacrifice waveform accuracy for a very short time, it effectively limits the temperature rise of linear devices, prevents thermal breakdown, and enables the system to intelligently switch between accuracy-first and safety-first modes.
[0068] The regulating unit does not simply switch the cutoff frequency in a step manner, but rather employs a linear slope regulation strategy based on temperature feedback. The specific control law is as follows: Set the safe junction temperature threshold for linear power devices as follows: For example, 125℃), the limiting junction temperature is (For example, 150℃), the default shunt cutoff frequency of the complementary filter is The minimum maintenance frequency is , The central control module calculates the virtual junction temperature in real time. The cutoff frequency of the current period is dynamically adjusted according to the following functional relationship.
[0069] safe zone The system enters thermal protection derating mode, and the cutoff frequency decreases linearly with increasing temperature to reduce the high-frequency power components borne by the linear module.
[0070]
[0071] Danger Zone Force the cutoff frequency to be locked at the minimum value. Or it may trigger the over-temperature shutdown protection.
[0072] Through the aforementioned continuous adjustment mechanism, the system can maintain a high dynamic response bandwidth while ensuring that the device does not experience thermal breakdown, thus achieving an automatic balance between performance and reliability.
[0073] 4. Rate of Change Feedforward Control Logic: The central control module is equipped with a rate of change feedforward unit to overcome the hysteresis of the traditional voltage loop. Its working logic is as follows: Differential calculation: Real-time discretization and differential calculation of the load current command to obtain the rate of change of current. .
[0074] Threshold determination: The absolute value of the rate of change is compared with a preset dynamic threshold. To prevent noise interference, a comparison lag interval can be set.
[0075] Specifically, the "preset dynamic threshold" is not an arbitrarily set fixed value, but is tuned based on the physical response limit of the current loop of the steady-state energy throughput module. The method for determining this threshold is as follows: First, the closed-loop bandwidth of the current loop of the three-phase grid-connected inverter unit in the steady-state energy throughput module was measured. (e.g., typically 500Hz-1kHz) and their corresponding maximum current ramp-up rate The ramp rate is limited by the inductance of the LCL filter and the DC bus voltage, and its physical limit can be expressed as: ,in This is the DC bus voltage. To ensure the buffer module can intervene before the steady-state module reaches its response limit, a safety factor is introduced to account for the total inductance on the grid side. (The recommended value range is 0.7-0.9, with 0.8 being preferred.) Preset dynamic threshold The calculation is as follows:
[0076] For example: Assume that the maximum current tracking slope of the steady-state energy throughput module in this embodiment is... To ensure system security, a security factor is set. The preset dynamic threshold is... , set as .
[0077] Detailed Explanation of Working Logic: The Central Control Module The sampling frequency is used to perform differential calculations on the load current command to obtain the real-time rate of change.
[0078] If the real-time rate of change If the condition is determined to be normal, only the steady-state energy throughput module is responsible for regulation, while the bidirectional energy buffer module is in standby mode and does not operate, in order to reduce switching losses.
[0079] If the real-time rate of change If the condition is identified as a severe transient condition, the steady-state module will inevitably be unable to respond in time. The central control module immediately (within 1-2 PWM cycles) activates the bidirectional energy buffer module, outputting the corresponding feedforward current based on the difference in the rate of change, to forcibly maintain the DC bus voltage stability.
[0080] Preemptive triggering: Once a drastic load change is detected, the central control module does not wait for the voltage sensor of the DC transmission link to provide feedback on the fluctuation signal, but immediately sends a feedforward action command to the bidirectional energy buffer module.
[0081] In this embodiment, the central control module establishes bidirectional signal connections with the transient load simulation module, the steady-state energy throughput module, and the bidirectional energy buffer module. This module is not only responsible for generating the underlying PWM / linear drive signals, but more importantly, it executes the multi-dimensional feedforward decoupling control algorithm unique to this invention.
[0082] Capacity matching principles for key system modules: To ensure perfect energy-signal decoupling under nominal "severe transient" operating conditions, the rated parameters of each power module in this embodiment must adhere to the following matching relationship: Transient / steady-state power ratio: Peak power of the transient load simulation module (linear stage) Set as the system's rated total power of This ratio can cover the high-frequency power requirements in most dynamic tests, while avoiding excessive heat dissipation costs due to too many linear components.
[0083] Energy buffer capacity calculation: Effective energy storage capacity of bidirectional energy buffer module (supercapacitor) The longest response lag time of the steady-state module must be covered. The response time of the steady-state module is set to... The system's maximum power is Then the supercapacitor capacity The law of conservation of energy must be satisfied:
[0084] in, and This refers to the allowable operating voltage range of the supercapacitor. This is a safety margin factor (taken as 1.5-2.0). This ensures that under the worst full-load sudden change conditions, the supercapacitor has enough "energy throughput space" to completely take over the energy difference during the lag time.
[0085] Current rate of change matching: The design value of the current slew rate of the transient load simulation module should be at least 50 times the maximum current tracking slope of the steady-state energy throughput module (e.g., the linear stage should reach...). Comparison of switching stage This ensures that the frequency band coverage has no dead zones.
[0086] like Figure 4As shown: Computer equipment includes: processor, communication interface, memory and communication bus.
[0087] The processor, communication interface, and memory communicate with each other via a communication bus.
[0088] Communication interface: Used for data transmission and signal interaction with the aforementioned transient load simulation module, steady-state energy throughput module, bidirectional energy buffer module, or external network.
[0089] Memory: Used to store computer programs. Memory may include high-speed random access memory (RAM) and may also include non-volatile memory, such as at least one disk storage device, flash memory, etc.
[0090] Processor: Used to execute programs stored in memory. The processor may be a central processing unit (CPU), an auxiliary processor, or one or more integrated circuits configured to implement embodiments of the present invention.
[0091] Special note: In light of the application scenario of this invention, the processor is preferably a heterogeneous combination of a digital signal processor (DSP) and a field-programmable gate array (FPGA), or a high-performance ARM processor, to meet the nanosecond-level feedforward control requirements.
[0092] In one alternative implementation, the processor performs the following steps by executing a computer program stored in memory: Signal frequency domain decoupling: Load current commands are acquired in real time, and the load current commands are decomposed into high-frequency control commands for the corresponding transient load simulation module and low-frequency control commands for the corresponding steady-state energy throughput module using a complementary filter. Dual-channel parallel drive: The high-frequency control command is sent to the transient load simulation module to control it to operate in the linear amplification region in response to transient current; the low-frequency control command is sent to the steady-state energy throughput module to control it to establish a feedback current flowing to the grid; Rate of change feedforward calculation: Simultaneously calculate the rate of change of the load current command. And in real time determine whether the absolute value of the rate of change exceeds a preset dynamic threshold; Active buffer feedforward compensation: When the absolute value of the rate of change exceeds the dynamic threshold, a feedforward control signal is generated and sent to the bidirectional energy buffer module; the bidirectional energy buffer module is controlled to perform an active energy throughput action associated with the polarity of the rate of change before the voltage fluctuation of the DC transmission link is triggered, so as to compensate for the dynamic response lag of the steady-state energy throughput module.
[0093] This invention also provides a computer-readable storage medium storing a computer program thereon. When executed by a processor, the computer program implements the steps of the high-power power supply dynamic load detection method described above. The computer-readable storage medium may include various media capable of storing program code, such as a USB flash drive, a portable hard drive, a read-only memory (ROM), a random access memory (RAM), a magnetic disk, or an optical disk.
[0094] The above embodiments are only used to illustrate the technical solutions of the present invention, and are not intended to limit it. Although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions will not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present invention.
Claims
1. A high power supply dynamic load detection system, characterized in that, The application relates to a high-power power supply test device. The application relates to a high-power power supply test device. The application relates to a high-power power supply test device. The application relates to a high-power power supply test device. The application relates to a high-power power supply test device. The application relates to a high-power power supply test device. The application relates to a high-power power supply test device.
2. A dynamic load detection system for a high power supply according to claim 1, characterized in that, The application relates to a high-power power supply test device. The application relates to a high-power power supply test device. The application relates to a high-power power supply test device.
3. A dynamic load detection system for a high power supply as defined in claim 2, wherein The application relates to a high-power power supply test device. The application relates to a high-power power supply test device. The application relates to a high-power power supply test device.
4. A dynamic load detection system for a high power supply according to claim 3, wherein, The application relates to a high-power power supply test device. The application relates to a high-power power supply test device. The application relates to a high-power power supply test device. The application relates to a high-power power supply test device. The application relates to a high-power power supply test device. The application relates to a high-power power supply test device. The application relates to a high-power power supply test device. The application relates to a high-power power supply test device. The application relates to a high-power power supply test device. The application relates to a high-power power supply test device. The application relates to a high-power power supply test device. The application relates to a high-power power supply test device. The application relates to a high-power power supply test device. The application relates to a high-power power supply test device. The application relates to a high-power power supply test device. The application relates to a high-power power supply test device. The application relates to a high-power power supply test device. The application relates to a high-power power supply test device. The application relates to a high-power power supply test device. The application relates to a high-power power supply test device. The application relates to a high-power power supply test device. The application relates to a high-power power supply test device. The application relates to a high-power power supply test device. The application relates to a high-power power supply test device. The application relates to a high-power power supply test device. The application relates to a high-power power supply test device. The application relates to a high-power power supply test device. The application relates to a high-power power supply test device. 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The application relates to a high-power power The second bidirectional conversion unit is configured to perform the following action mode in response to the feedforward control signal: when the feedforward control signal indicates that the rate of change of the load current command is positive and exceeds a threshold value, the second bidirectional conversion unit is controlled to enter a boost discharge mode to release the energy stored in the super capacitor module to the DC transmission link; when the feedforward control signal indicates that the rate of change of the load current command is negative and exceeds a threshold value, the second bidirectional conversion unit is controlled to enter a buck charging mode to absorb the redundant energy on the DC transmission link to the super capacitor module.
5. A dynamic load detection system for a high power power supply as defined in claim 4, wherein The central control module is further configured with a signal frequency domain decomposition unit and a thermal frequency adaptive adjustment unit; The signal frequency domain decomposition unit is configured with a complementary filter for decomposing the load current command into a high-frequency command sent to the transient load simulation module and a low-frequency command sent to the steady-state energy throughput module according to a set shunt cutoff frequency; The thermal frequency adaptive adjustment unit is configured to receive real-time thermal state data of the transient load simulation module and dynamically adjust the shunt cutoff frequency of the complementary filter based on the thermal state data; When the thermal state data indicates a temperature rise, the shunt cutoff frequency is reduced to reduce the current bearing proportion of the transient load simulation module.
6. A method for detecting dynamic load of a high-power power supply, characterized in that, The application is applied to the high-power power supply dynamic load detection system of any one of claims 1-5, comprising the following steps: Step S1: Real-time acquisition of load current command, decomposition of load current command into high-frequency control command corresponding to transient load simulation module and low-frequency control command corresponding to steady-state energy throughput module by using complementary filter; Step S2: Send the high-frequency control command to the transient load simulation module to control it to work in the linear amplification zone to respond to transient current; send the low-frequency control command to the steady-state energy throughput module to control it to establish feedback current to the grid; Step S3: Synchronously calculate the rate of change of the load current command and determine whether the absolute value of the rate of change exceeds the preset dynamic threshold value in real time; Step S4: When the absolute value of the rate of change exceeds the dynamic threshold value, generate a feedforward control signal and send it to the bidirectional energy buffer module; control the bidirectional energy buffer module to respond to the feedforward control signal and perform active energy throughput action associated with the polarity of the rate of change before the voltage fluctuation of the DC transmission link is triggered, to compensate for the dynamic response lag of the steady-state energy throughput module.
7. A computer device, comprising: Comprise: Memory, processor and computer program stored on the memory and executable on the processor; The processor implements the dynamic load detection method of a high-power power supply as claimed in claim 6 when executing the computer program.
8. A computer-readable storage medium having stored thereon a computer program, characterized in that, The computer program is executed by the processor to implement the dynamic load detection method of a high-power power supply as claimed in claim 6.
Citation Information
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