A CMOS analog switch system based on temporary compensation unit

Abstract

The application belongs to the technical field of integrated circuits, and particularly relates to a CMOS analog switch system based on a temporary compensation unit, which comprises the following steps: an adaptive gate drive and a sensing unit acquire an electrical sensing signal reflecting the conduction state of a main CMOS analog switch unit in real time; an intelligent control logic unit generates a compensation drive signal according to the sensing signal and / or an external input parameter; and a dynamically reconfigurable temporary compensation unit injects or extracts a dynamically configurable compensation current or voltage into a signal path according to the signal, so as to offset the charge injection effect, correct the nonlinear distortion of the conduction resistance, and dynamically optimize the performance trade-off between the bandwidth, switching speed and linearity. Through the introduction of the intelligent real-time sensing and dynamic compensation mechanism, the application realizes comprehensive adaptive compensation for the inherent defects of the CMOS analog switch, and improves the precision, linearity, speed and stability of the switch system.

Description

Technical Field

[0001] This invention relates to the field of integrated circuit technology, and in particular to a CMOS analog switch system based on a temporary compensation unit. Background Technology

[0002] CMOS analog switches are widely used for signal routing and switching in communication, measurement, and data acquisition systems due to their low cost, high integration, and excellent switching characteristics. However, their performance is limited by several inherent drawbacks:

[0003] Channel charge injection and clock feedthrough: During switching, the transition of the gate control signal injects charge into the signal path through the gate-source / gate-drain parasitic capacitance, causing voltage glitches or steps at the output. This is especially problematic in high-precision sample-and-hold circuits and high-speed signal switching, introducing significant errors. Chinese invention patent application CN116996052A discloses a high-voltage analog switch with a temporary compensation unit. While it proposes temporary compensation for high-voltage switching, the compensation is fixed and passive, targeting only the specific gate-drain capacitance effect of high-voltage LDMOS transistors, and does not address the dynamic errors of ordinary CMOS switches in precise low-frequency or high-speed switching.

[0004] On-resistance nonlinearity and signal-related distortion: The on-resistance (Ron) of a CMOS switch varies nonlinearly with the input signal voltage. This nonlinearity leads to harmonic distortion, especially when processing large-swing analog signals. Chinese invention patent application CN118611647A discloses a CMOS analog switch driver circuit that reduces glitches by optimizing drive timing matching, but it does not solve the fundamental problem of Ron nonlinearity.

[0005] The trade-off between bandwidth and switching speed: To achieve wide bandwidth, the size of the switching transistor needs to be reduced to decrease parasitic capacitance; however, smaller switching transistors lead to higher on-resistance and limited gate drive capability, thus reducing switching speed and potentially exacerbating charge injection. Traditional designs inherently present a trade-off between bandwidth and speed, lacking a dynamic coordination mechanism.

[0006] Lack of compensation for environmental and aging drift: Temperature changes, power supply voltage fluctuations, and long-term device aging can cause drift in key switch parameters (such as threshold voltage and on-resistance), affecting long-term stability and accuracy. Existing switch designs lack the ability to monitor and compensate for these drift factors online in real time.

[0007] Therefore, existing technologies lack an intelligent CMOS analog switch system that can comprehensively address charge injection, on-resistance nonlinearity, speed-bandwidth contradiction, and environmental drift. Summary of the Invention

[0008] This invention proposes a CMOS analog switch system based on a temporary compensation unit, aiming to solve the technical problems of charge injection error, on-resistance nonlinear distortion, and the contradiction between switching speed and bandwidth in the prior art.

[0009] In a first aspect, embodiments of the present invention provide a CMOS analog switching system based on a temporary compensation unit, comprising:

[0010] The main CMOS analog switching unit is composed of at least one pair of complementary NMOS and PMOS transistors connected in parallel. The source and drain of each transistor are connected to the signal input terminal and the output terminal, respectively, for transmitting analog signals.

[0011] An adaptive gate drive and sensing unit is connected to the control terminal and signal path of the main CMOS analog switch unit to provide gate control voltage and acquire electrical sensing signals reflecting the conduction state of the main CMOS analog switch unit in real time.

[0012] The intelligent control logic unit is used to receive the electrical sensing signal and generate the compensation drive signal according to the electrical sensing signal and / or external input parameters.

[0013] A dynamically reconfigurable temporary compensation unit, whose output is coupled to the signal path node of the main CMOS analog switch unit, is used to inject or extract dynamically configurable compensation current or voltage into the signal path according to the received compensation drive signal.

[0014] The technical advantages of the CMOS analog switch system based on a temporary compensation unit disclosed in this invention are: it upgrades the static, passive structure of traditional switches into a dynamic, active intelligent system, providing a basic architecture for the implementation of various specific compensation functions. It achieves comprehensive adaptive compensation for multiple defects, improving the switch's accuracy, linearity, speed, and stability.

[0015] Furthermore, the dynamically reconfigurable temporary compensation unit includes a high-speed digital-to-analog converter or a programmable current source array, and the compensation drive signal is used to control at least the amplitude, polarity, duration, and waveform shape of the compensation current or voltage.

[0016] Furthermore, the intelligent control logic unit is configured to generate a corresponding compensation drive signal during the transient process of the main CMOS analog switch unit being turned off or on, so as to control the dynamically reconfigurable temporary compensation unit to inject a compensation current pulse into the signal path, thereby offsetting the charge injection effect introduced by the gate control signal jump through the parasitic capacitance.

[0017] Furthermore, the adaptive gate drive and sensing unit is configured to measure the on-resistance R of the main CMOS analog switch unit in the on-state in real time. on and the on-resistance R on The electrical sensing signal is provided to the intelligent control logic unit; the intelligent control logic unit determines the on-resistance R based on the electrical sensing signal. on The voltage information of the signal path is used to calculate the nonlinear distortion error and generate a corresponding compensation drive signal to correct the nonlinear distortion in real time.

[0018] Furthermore, the intelligent control logic unit stores multiple sets of compensation parameters corresponding to different performance priority operating modes; the system can respond to mode selection instructions and call the corresponding sets of compensation parameters to generate different compensation drive signals, thereby dynamically optimizing the system's bandwidth, switching speed, or linearity indicators.

[0019] Furthermore, different performance priority operating modes include high linearity mode and high bandwidth mode;

[0020] In the high linearity mode, the intelligent control logic unit preferentially calls the compensation parameter set based on real-time on-resistance sensing and correction;

[0021] In the high bandwidth mode, the intelligent control logic unit prioritizes calling a set of compensation parameters that minimizes parasitic capacitance in the signal path and generates a corresponding compensation drive signal to enable the dynamically reconfigurable temporary compensation unit, thereby offsetting the influence of the on-resistance that may increase due to bandwidth optimization.

[0022] Furthermore, the intelligent control logic unit is configured to execute a compensation control algorithm to generate the compensation drive signal, wherein the compensation control algorithm is a nonlinear prediction compensation algorithm based on a lightweight neural network.

[0023] The intelligent control logic unit integrates a lightweight neural network prediction module for establishing the on-resistance R of the main CMOS analog switch unit. on Input voltage V in Nonlinear mapping model f of temperature T NN :

[0024] ;

[0025] in, For the on-resistance R on The predicted nonlinear offset;

[0026] The intelligent control logic unit is based on the real-time sampled V in With T, using the nonlinear mapping model f NNThe feedforward calculation yields the predicted nonlinear offset. And predict nonlinear offset The on-resistance measured in real time by the adaptive gate drive and sensing unit The final compensation amount C is generated by merging the components as follows:

[0027] ;

[0028] in, The fusion coefficient is... The resistance is an ideal linear on-resistance; the intelligent control logic unit generates the compensation drive signal based on the final compensation amount C.

[0029] Furthermore, the input layer of the lightweight neural network prediction module receives the historical on-resistance data sequence of the main CMOS analog switch unit. As input features, the nonlinear mapping model is then extended to:

[0030] ;

[0031] The intelligent control logic unit is configured to: construct training samples using the adaptive gate drive and the on-resistance continuously measured by the sensing unit in a sliding time window manner, and apply these samples to the nonlinear mapping model f. NN Conduct online incremental learning;

[0032] The optimization objective of the online incremental learning is to minimize the predicted nonlinear offset. The error between the actual offset and the actual offset calculated based on real-time measurements, the actual offset for:

[0033] .

[0034] Furthermore, the intelligent control logic unit is configured to: utilize the predicted nonlinear offset output by the neural network prediction module. Real-time estimation of total harmonic distortion or signal-to-noise ratio performance indicators of the current signal path;

[0035] The intelligent control logic unit compares the performance indicators with preset target thresholds and dynamically adjusts the fusion coefficients. Or other configuration parameters of the dynamically reconfigurable temporary compensation unit.

[0036] Furthermore, the system also includes a temperature sensing module connected to the intelligent control logic unit; the intelligent control logic unit adjusts the reference parameters in the compensation drive signal according to temperature changes to compensate for device parameter drift caused by temperature and aging. Attached Figure Description

[0037] Figure 1 This is a schematic diagram of the overall architecture of a CMOS analog switch system based on a temporary compensation unit, as proposed in an embodiment of the present invention.

[0038] Figure 2 This is a schematic diagram of the transient charge injection compensation process for switch switching provided in an embodiment of the present invention;

[0039] Figure 3 This is a schematic diagram of multi-mode workflow switching provided in an embodiment of the present invention;

[0040] Figure 4 This is a schematic diagram of the intelligent neural network prediction and compensation algorithm provided in an embodiment of the present invention. Detailed Implementation

[0041] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0042] To address the issues mentioned in the background art, such as charge injection error, on-resistance nonlinear distortion, the contradiction between switching speed and bandwidth, and environmental parameter drift, this invention provides a CMOS analog switching system based on a temporary compensation unit to achieve a high-precision, high-linearity, high-speed, and stable analog signal switching system. The overall logic is: system architecture - charge compensation - nonlinear correction - mode switching - neural network prediction - online learning - performance optimization - temperature compensation. (For example...) Figure 1 As shown, the system mainly comprises four core units: a main CMOS analog switch unit, an adaptive gate drive and sensing unit, an intelligent control logic unit, and a dynamically reconfigurable temporary compensation unit. These four units work together to form a closed-loop intelligent compensation system of "sensing-decision-execution." Through this closed-loop architecture of "adaptive sensing-intelligent control-dynamic compensation," the system effectively solves the inherent defects of CMOS analog switches, such as charge injection, on-resistance nonlinearity, and the contradiction between bandwidth and speed. The specific functional principles of each unit are as follows:

[0043] The first unit, the main CMOS analog switching unit, consists of at least one pair of complementary NMOS and PMOS transistors connected in parallel, with the source and drain of each transistor connected to the signal input terminal V. in and output terminal V out This constitutes the basic signal path for transmitting analog signals. This unit is the basic signal path of the system and belongs to existing technology, so it will not be described in detail here.

[0044] The second unit, the adaptive gate drive and sensing unit, is connected to the gate (control terminal) and signal path of the main CMOS analog switch unit (hereinafter referred to as the switch). The adaptive gate drive and sensing unit continuously measures the real-time on-resistance R of the main switch when it is in the on state. on (t).

[0045] This unit comprises two parts: a gate drive module and an on-resistance sensing module, and has a dual function: firstly, to provide an optimized gate control voltage V. g First, it ensures the switch can be turned on and off quickly and reliably. Second, it monitors key electrical parameters of the main CMOS analog switch in real time when it is in the on state, such as calculating the real-time on-resistance R by measuring the voltage difference across the switch and the current flowing through it. on This signal is then output as an electrical sensing signal to the intelligent control logic unit.

[0046] The gate drive module is used to provide an optimized gate control voltage V. g and optional substrate bias voltage V b Its optimization is reflected in:

[0047] (1) Adaptive slew rate control: Based on the operating mode set by the intelligent control logic unit (such as high bandwidth / high linearity) and the estimated load, V is dynamically adjusted. g The rise / fall speed is determined to balance the switching speed with the charge injection effect.

[0048] (2) Substrate bias adaptive adjustment: The body bias voltage of NMOS and PMOS is dynamically adjusted according to the instantaneous level of the input signal Vin in order to flatten the total on-resistance curve of the complementary switch pair over the entire input voltage range.

[0049] (3) Real-time calibration of overdrive voltage: Through the internal detection loop, V is finely adjusted during the switch conduction period. g This ensures that the overdrive voltage remains stable and that the on-resistance is consistent.

[0050] (4) Feedforward gate voltage pre-adjustment: Receives the gate voltage adjustment amount predicted by the intelligent control logic unit based on the neural network model, and adjusts V... g Feedforward compensation is performed to address changes in input voltage or temperature.

[0051] The on-resistance sensing module measures the actual on-resistance R of the main switch in the on state in real time. on or may be with R on Relevant electrical parameters (such as the voltage drop across the switch, V) ds Channel current I ds It is converted into a sensing signal output.

[0052] The third unit, the intelligent control logic unit, receives electrical sensing signals (such as on-resistance R) from the adaptive gate drive and sensing unit. on The system incorporates externally input signal characteristic parameters (such as signal amplitude, frequency, and operating mode commands of the signal path) and environmental monitoring signals (such as temperature T). An internally integrated compensation control algorithm model is used to calculate and generate compensation drive signals sent to the dynamically reconfigurable temporary compensation unit in real time. These compensation drive signals determine the compensation amplitude, polarity, duration, and waveform shape.

[0053] This unit simultaneously acquires the input voltage V of the signal path. in (t). Control logic based on R on (t) and V in (t), combined with the preset ideal linear resistance model R ideal Calculate the result from R on The instantaneous signal distortion error caused by nonlinearity. Subsequently, a corresponding compensation drive signal is generated, instructing the dynamic compensation unit to inject a compensation voltage into the signal path or adjust the compensation current to compensate for the error caused by R. on The nonlinear change in signal voltage drop caused by the change enables real-time correction of signal correlation distortion and improves system linearity.

[0054] like Figure 2 As shown, to eliminate the charge injection effect during switching transients, the system executes the following procedure:

[0055] When the intelligent control logic unit receives a switch state switching command, it first calculates in advance, based on the known main switch size, parasitic capacitance parameters, and gate drive voltage slew rate, the estimated charge Q that will be coupled to the signal path through the parasitic capacitance at the moment of switching. inject Subsequently, simultaneously with the gate control signal switching command or under precise timing alignment, a corresponding compensation drive signal is generated. Based on this signal, the dynamically reconfigurable temporary compensation unit injects a compensation current pulse I into the signal path. comp The charge of this pulse is related to Q. inject The charges are equal but opposite in polarity, thus achieving active cancellation. After the compensation pulse ends, the unit automatically shuts down without affecting the normal operation of the main signal path. This feedforward active charge cancellation can significantly reduce voltage glitches at the switch output.

[0056] The fourth unit, the dynamically reconfigurable temporary compensation unit, is centered around a programmable, small-amplitude, fast-response auxiliary current / charge source. Its output is coupled to a signal path node (e.g., source, drain, or output node) of the main switch. This unit has at least one control input that receives a compensation drive signal from the intelligent control logic unit and, based on this signal, precisely injects or extracts a dynamically configurable compensation current I into or from the signal path. comp or voltage V comp This unit is typically implemented using a high-speed digital-to-analog converter (DAC) or a programmable current source array, and can respond and complete the compensation action in nanoseconds.

[0057] Its output is connected to the signal path node (such as the source, drain, or output node) of the main switch via parallel injection or series cancellation. This unit is activated during the brief transition period of the main switch state switching, providing temporary compensation, and automatically shuts down after the compensation is completed.

[0058] The dynamically reconfigurable temporary compensation unit includes a high-speed, high-precision digital-to-analog converter (DAC) or a programmable current mirror array, whose output serves as a compensation current source. The intelligent control logic unit pre-calculates the amount of charge to be injected at the instants of switch "on" and "off" based on the slew rate of the current switch control signal, the size parameters of the main switch (to calculate parasitic capacitance), and the DC level of the input signal.

[0059] The output of the dynamically reconfigurable temporary compensation unit is typically injected into the signal path node of the main switch (such as the output node V) in a high-impedance parallel connection. out This avoids a load effect on the main signal path during non-compensation periods. Its internal high-speed DAC or programmable current mirror array can generate precise analog compensation amounts based on the compensation drive signal. The intelligent control logic unit pre-calculates the amount of charge injected at the instants of switch "on" and "off" based on the slew rate of the current switch control signal, the size parameters of the main switch (to calculate parasitic capacitance), and the DC level of the input signal.

[0060] Compensation method: Simultaneously with issuing the "off" command, the control compensation unit injects a compensation current pulse (pre-compensation) into the output node, which is of opposite polarity and equal magnitude to the estimated injected charge. At the instant the switch is "on," a reverse compensation pulse is similarly injected to counteract the clock feedthrough effect. The width and amplitude of the compensation pulses are dynamically adjusted by the control logic.

[0061] By actively applying the concept of temporary compensation to the precise timing of switch switching, the passive acceptance is transformed into active cancellation, achieving dynamic, adaptive, and precise cancellation of charge injection errors.

[0062] The entire system comprises four units, which work together to form a closed-loop intelligent compensation system. The adaptive gate drive and sensing unit provides the "eyes," the intelligent control logic unit provides the "brain," and the dynamically reconfigurable temporary compensation unit provides the "hands," together achieving real-time perception and dynamic correction of performance defects in the main switch.

[0063] Furthermore, this invention innovatively combines a dynamically reconfigurable temporary compensation unit with intelligent control logic algorithms (especially lightweight neural network prediction and online learning) to achieve comprehensive, adaptive, and online compensation for multiple defects such as charge injection, on-resistance nonlinearity, bandwidth-speed discrepancies, and temperature drift. Unlike traditional fixed or local optimization schemes, this invention enables a single switching system to dynamically adapt to different application scenarios through multi-mode switching and performance closed-loop optimization, upgrading from passively accepting defects to actively predicting and offsetting them, thereby achieving synergistic improvements in accuracy, linearity, speed, and stability.

[0064] A further approach involves implementing the dynamically reconfigurable temporary compensation unit through a high-speed digital-to-analog converter or a programmable current source array. The hardware utilizes existing technology, while the desired functionality is achieved by embedding software algorithms. Specifically, the compensation drive signal issued by the intelligent control logic unit is a digital or analog control word that precisely specifies the amplitude, polarity (injection or extraction), duration (pulse width), and waveform shape (e.g., rectangular, triangular, or exponentially decaying pulse) of the required compensation current / voltage. For example, for charge injection compensation, a rectangular current pulse with opposite polarity to the injected charge, equal in magnitude, and extremely short duration (synchronized with the gate signal transition edge) might be required. This fine programmability ensures the accuracy and adaptability of the compensation action.

[0065] A further proposed solution involves a compensation process for the charge injection effect, such as... Figure 2 As shown. The specific process is as follows:

[0066] When the intelligent control logic unit receives a switch state switching command (such as from "off" to "on"), it pre-calculates, based on the known main switch size, parasitic capacitance parameters, and the slew rate of the current gate drive voltage, the estimated charge Q that will be coupled to the signal path through the parasitic capacitance at the moment of switching. inject .

[0067] At the same time as issuing the gate control signal switching command, or slightly ahead / lagging, the control logic generates a corresponding compensation drive signal.

[0068] The dynamically reconfigurable temporary compensation unit injects a compensation current pulse I into the signal path based on the signal. comp The integral area (charge) of this pulse is equal to the predicted Q. injectHowever, their polarities are opposite.

[0069] After the compensation pulse ends, the compensation unit automatically shuts down, without affecting the normal operation of the main signal path.

[0070] By configuring intelligent control logic units, active charge cancellation, similar to "fighting fire with fire," significantly weakens or even eliminates voltage spikes or steps generated at the output during switch switching, improving the accuracy of the switch in applications such as sample-and-hold and multiplexing.

[0071] In a further embodiment, the adaptive gate drive and sensing unit is configured to measure the on-resistance R of the main CMOS analog switch unit in the on-state in real time. on and the on-resistance R on The electrical sensing signal is provided to the intelligent control logic unit; the intelligent control logic unit determines the on-resistance R based on the electrical sensing signal. on The voltage information of the signal path is used to calculate the nonlinear distortion error, and a corresponding compensation drive signal is generated to correct the nonlinear distortion in real time. The specific process of the supplementary drive signal used for correction is as follows:

[0072] The adaptive gate drive and sensing unit continuously measures the real-time on-resistance R of the main switch in the on-state. on (t). The intelligent control logic unit simultaneously acquires the input voltage V of the signal path. in (t) or output current information. The control logic is based on R. on (t) and V in (t), combined with the ideal linear resistance model R ideal Calculate the result from R on The instantaneous signal distortion error is caused by nonlinearity. Based on this instantaneous signal distortion error, the control logic generates a compensation drive signal, instructing the dynamic compensation unit to inject a compensation voltage V into the signal path. comp Or adjust the compensation current I comp To offset the effect of R on The signal voltage drop caused by the change. Real-time feedforward or feedback correction of signal correlation distortion is achieved, effectively reducing the total harmonic distortion (THD) of the system and improving the linearity under large signal swing.

[0073] A further advanced approach involves storing multiple preset sets of compensation parameters within the intelligent control logic unit, each configured for different performance optimization objectives. The system can dynamically switch modes in response to externally or internally generated mode selection commands (such as those written via a configuration pin or register).

[0074] High linearity mode: such as Figure 3 As shown in the flowchart, in this mode, the system prioritizes using real-time R...on Closed-loop calibration strategy for sensors. The compensation parameter set mainly adjusts the fusion coefficients. Alternatively, adjust the gain of the correction algorithm to ensure that THD is minimized.

[0075] High bandwidth mode: such as Figure 3 As shown in the flowchart, in this mode, the control logic might first adjust the gate drive strength or main switch bias to minimize parasitic capacitance (e.g., by reducing the drive voltage swing or optimizing transistor size bias). However, this could lead to R... on The R increases. At this point, the system calls another set of parameters, instructing the dynamic compensation unit to provide a small-amplitude constant or signal-varying compensation current to offset the increased R. on The impact on signal attenuation is considered to achieve the best trade-off between bandwidth and signal integrity.

[0076] Two performance priority operating modes enable a single switch system to dynamically adapt to different application scenarios, such as flexibly switching between an audio switch that requires high fidelity and a communication switch that requires high-speed data switching.

[0077] Further solutions, see reference Figure 4 As shown, the intelligent control logic unit is configured to execute a compensation control algorithm to generate the compensation drive signal, wherein the compensation control algorithm is a nonlinear prediction compensation algorithm based on a lightweight neural network.

[0078] Its core idea is: to use neural networks to predict R. on The offset is used to fuse the predicted and measured values, and a compensation signal is generated based on the fusion result. The specific steps include:

[0079] The first step involves a lightweight neural network prediction module integrated into the intelligent control logic unit. During system initialization or operation, this module establishes the on-resistance R through offline or online learning. on With input voltage V in Nonlinear mapping model f between temperature T NN This lightweight neural network prediction module is implemented using on-chip integrated programmable logic or a dedicated microprocessor core. Its network structure is simplified (total number of parameters is less than 200), and the computation latency is in the microsecond range, making it suitable for embedded real-time control.

[0080] The second step is to sample V in real time. in And T, input f NN Model, to obtain R on Predicted nonlinear offset Simultaneously, the adaptive gate drive and the on-resistance measured in real time by the sensing unit... The intelligent control logic performs fusion calculations to obtain the final compensation amount C:

[0081] ;

[0082] in, The fusion coefficient is between (0,1). The resistance is an ideal linear on-resistance; the intelligent control logic unit generates the compensation drive signal based on the final compensation amount C.

[0083] Among them, the nonlinear mapping model f of the lightweight neural network prediction module NN The network structure design is as follows:

[0084] Input layer: 2 neurons (V) in (T); Hidden layer 1: 6 neurons, ReLU activated; Hidden layer 2: 4 neurons, ReLU activated; Output layer: 1 neuron, linearly activated.

[0085] The final compensation amount C is the weighted average of the predicted ideal value and the measured value.

[0086] The third step is to compensate the drive signal S. comp Based on the compensation amount C and the measured value R on_meas Deviation generation:

[0087] ;

[0088] Among them, K p K i These are the proportional coefficient and the integral coefficient.

[0089] This scheme employs a feedforward fast response, with the neural network based on the current V. in T is predicted in real time. Actual measured values ​​ensure long-term accuracy, guaranteeing reliable feedback precision. Adjusting the weights of predictions and measurements allows for greater flexibility in data fusion. The neural network, with only 55 parameters, is well-suited for hardware implementation, making computation highly efficient.

[0090] A further approach is to target the nonlinear mapping model f. NN Online learning and optimization. The input layer of the lightweight neural network prediction module further receives the historical on-resistance data sequence of the main CMOS analog switch unit. As input features, the nonlinear mapping model is then extended to:

[0091] ;

[0092] Where k is usually 3-5, representing the depth of historical memory.

[0093] The network structure is adjusted as follows: the input layer has 2+k neurons; hidden layer 1 has 8 neurons with ReLU activation; hidden layer 2 has 6 neurons with ReLU activation; and the output layer has 1 neuron with linear activation.

[0094] Historical data series:

[0095] ;

[0096] k is the historical depth parameter, representing the number of historical data points used, with a value of k=4. Let be the on-resistance measurement value at the i-th historical moment, i = 1, 2, ..., k.

[0097] Sliding time window: W represents the sliding window size, indicating the number of samples used for training; here, it is set to 16. i The input feature vector for the i-th sample:

[0098] ;

[0099] Let time t i The input voltage value, Let time t i The temperature value. i The target value (actual offset) for the i-th sample: ;

[0100] Let time t i The on-resistance, The ideal linear on-resistance is used (preset constant). The sampling period is within 100 microseconds. Online incremental learning is triggered during system idle periods or when performance metrics continuously deviate from the target. Each trigger uses the latest sliding window data to perform a weight update using gradient descent, with the learning rate set to 1. e-4 Scale. This mechanism enables neural networks to adapt to device aging and slow environmental changes.

[0101] The mean squared error loss term is then: ;in, This is the neural network's prediction output for the i-th sample.

[0102] L2 regularization term: ; is the regularization coefficient, with a value of 0.01. This is the weight parameter vector of the current neural network. The initial weight vector is the baseline weight obtained through offline training.

[0103] Total loss function: ; This is the loss weighting coefficient, with a value of 0.9.

[0104] A further improved solution adds performance monitoring and parameter self-optimization functions to the neural network prediction and fusion compensation architecture.

[0105] Real-time performance estimation: using predicted on-resistance offset This indirectly allows for the calculation of key performance indicators of the signal path, such as total harmonic distortion (THD) or signal-to-speech ratio (SINAD).

[0106] Closed-loop parameter adjustment: The estimated performance indicators are compared with the preset target thresholds to form a closed-loop control and dynamically optimize the fusion coefficients. Alternatively, other parameters of the compensation unit can be used to ensure that the system performance is always maintained within the optimal or acceptable range.

[0107] In a specific scenario, the audio signal path is a 1kHz sine wave with high linearity.

[0108] Initial state: System startup, =0.7, THD target set to -90dB.

[0109] Monitoring cycle: THD is calculated every 10 audio cycles (10ms). est .

[0110] Estimate: Based on the current V in and prediction Sequence, calculate THD est =−85.

[0111] Comparison and Decision: ΔP = −85 − (−90) = 5dB, performance not up to standard. Check prediction error E. pred The results showed that the value was relatively small (the neural network prediction was accurate).

[0112] Adjust execution: Trigger Adjust according to the PI formula The weighting for prediction compensation is increased from 0.7 to 0.75.

[0113] Performance verification: After waiting for several cycles, the THD was re-estimated and dropped to -88dB, indicating the adjustment was effective. Continue fine-tuning until the target is met.

[0114] For example, in scenarios where sudden temperature changes cause performance degradation:

[0115] Triggering condition: The temperature sensor detects a rapid temperature rise ΔT>5℃.

[0116] Performance monitoring: SINAD was subsequently estimated immediately.est It decreased from 82dB to 78dB.

[0117] Adjustment strategy: Sudden temperature changes may cause temporary model inaccuracies (prediction error E). pred (Increase), the system prioritizes decreasing. (For example, if it decreases from 0.7 to 0.6), stability is maintained by relying more on actual test feedback.

[0118] Parallel learning: Simultaneously triggers online incremental learning, allowing the neural network to quickly adapt to new temperature environments.

[0119] Recovery: After the neural network learns and the prediction error decreases, gradually reduce... Revert to the original or better value.

[0120] This solution upgrades the system from "open-loop / feedforward compensation" to "closed-loop / adaptive optimization," enabling the system to perform self-monitoring and self-optimization.

[0121] A further advanced approach involves an integrated temperature sensing module (such as an on-chip bandgap reference or diode temperature sensor) that continuously monitors the ambient temperature T. The intelligent control logic unit uses T as a crucial input parameter, directly applying it to the neural network prediction model, i.e., the nonlinear mapping model f. NN .

[0122] The temperature sensing module is an on-chip integrated MOSFET diode temperature sensor, whose output voltage is proportional to the temperature, and is directly connected to the intelligent control logic unit through an analog-to-digital converter (ADC) interface.

[0123] Used to correct the baseline parameters in the compensation algorithm (such as...) (Reference values, capacitance values ​​in charge injection calculations, etc.) These parameters typically drift with temperature. This effectively compensates for the systematic drift of device parameters caused by temperature changes and long-term aging, ensuring consistent performance and long-term stability of the system across the entire temperature range and operating life.

[0124] Example embodiments have been disclosed herein, and while specific terminology has been used, it is intended and should be interpreted only in a general illustrative sense and is not intended to be limiting. In some instances, it will be apparent to those skilled in the art that features, characteristics, and / or elements described in conjunction with particular embodiments may be used alone, or in combination with features, characteristics, and / or elements described in conjunction with other embodiments, unless otherwise expressly indicated.

Claims

1. A CMOS analog switching system based on a temporary compensation unit, characterized in that, include: The main CMOS analog switching unit is composed of at least one pair of complementary NMOS and PMOS transistors connected in parallel. The source and drain of each transistor are connected to the signal input terminal and the output terminal, respectively, for transmitting analog signals. An adaptive gate drive and sensing unit is connected to the control terminal and signal path of the main CMOS analog switch unit to provide gate control voltage and acquire electrical sensing signals reflecting the conduction state of the main CMOS analog switch unit in real time. The intelligent control logic unit is used to receive the electrical sensing signal and generate a compensation drive signal based on the electrical sensing signal and / or external input parameters. The intelligent control logic unit is configured to execute a compensation control algorithm to generate the compensation drive signal. The compensation control algorithm is a nonlinear prediction compensation algorithm based on a lightweight neural network. The intelligent control logic unit integrates a lightweight neural network prediction module for establishing the on-resistance R of the main CMOS analog switch unit. on Input voltage V in Nonlinear mapping model f of temperature T NN : ； in, For the on-resistance R on The predicted nonlinear offset; The intelligent control logic unit is based on the real-time sampled V in With T, using the nonlinear mapping model f NN The feedforward calculation yields the predicted nonlinear offset. And predict nonlinear offset The on-resistance measured in real time by the adaptive gate drive and sensing unit The final compensation amount C is generated by merging the components as follows: ； in, The fusion coefficient is... The ideal linear on-resistance is defined; the intelligent control logic unit generates the compensation drive signal based on the final compensation amount C. A dynamically reconfigurable temporary compensation unit, whose output is coupled to the signal path node of the main CMOS analog switch unit, is used to inject or extract dynamically configurable compensation current or voltage into the signal path according to the received compensation drive signal.

2. The system according to claim 1, characterized in that, The dynamically reconfigurable temporary compensation unit includes a high-speed digital-to-analog converter or a programmable current source array, and the compensation drive signal is used to control at least the amplitude, polarity, duration and waveform shape of the compensation current or voltage.

3. The system according to claim 1, characterized in that, The intelligent control logic unit is configured to generate a corresponding compensation drive signal during the transient process of the main CMOS analog switch unit being turned off or on, so as to control the dynamically reconfigurable temporary compensation unit to inject a compensation current pulse into the signal path, thereby offsetting the charge injection effect introduced by the gate control signal jump through the parasitic capacitance.

4. The system according to claim 1, characterized in that, The adaptive gate drive and sensing unit is configured to measure the on-resistance R of the main CMOS analog switch unit in the on state in real time. on and the on-resistance R on The electrical sensing signal is provided to the intelligent control logic unit; the intelligent control logic unit determines the on-resistance R based on the electrical sensing signal. on The voltage information of the signal path is used to calculate the nonlinear distortion error and generate a corresponding compensation drive signal to correct the nonlinear distortion in real time.

5. The system according to claim 1, characterized in that, The intelligent control logic unit stores multiple sets of compensation parameters corresponding to different performance priority operating modes; the system can respond to mode selection instructions and call the corresponding compensation parameter sets to generate different compensation drive signals, thereby dynamically optimizing the system's bandwidth, switching speed, or linearity indicators.

6. The system according to claim 5, characterized in that, Different performance priority operating modes include high linearity mode and high bandwidth mode; In the high linearity mode, the intelligent control logic unit preferentially calls the compensation parameter set based on real-time on-resistance sensing and correction; In the high bandwidth mode, the intelligent control logic unit prioritizes calling a set of compensation parameters that minimizes parasitic capacitance in the signal path and generates a corresponding compensation drive signal to enable the dynamically reconfigurable temporary compensation unit, thereby offsetting the influence of the on-resistance that may increase due to bandwidth optimization.

7. The system according to claim 1, characterized in that, The input layer of the lightweight neural network prediction module further receives the historical on-resistance data sequence of the main CMOS analog switch unit. As the input feature, k ranges from 3 to 5, then the nonlinear mapping model is extended as follows: ； The intelligent control logic unit is configured to: construct training samples using the adaptive gate drive and the on-resistance continuously measured by the sensing unit in a sliding time window manner, and apply these samples to the nonlinear mapping model f. NN Conduct online incremental learning; The optimization objective of the online incremental learning is to minimize the predicted nonlinear offset. The error between the actual offset and the actual offset calculated based on real-time measurements, the actual offset for: 。 8. The system according to claim 1, characterized in that, The intelligent control logic unit is configured to: utilize the predicted nonlinear offset output by the neural network prediction module. Real-time estimation of total harmonic distortion or signal-to-noise ratio performance indicators of the current signal path; The intelligent control logic unit compares the performance indicators with preset target thresholds and dynamically adjusts the fusion coefficients. Or other configuration parameters of the dynamically reconfigurable temporary compensation unit.

9. The system according to claim 1, characterized in that, The system also includes a temperature sensing module connected to the intelligent control logic unit; the intelligent control logic unit adjusts the reference parameters in the compensation drive signal according to temperature changes to compensate for device parameter drift caused by temperature and aging.

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