Application circuit of domestic high-precision ADC chip

Abstract

The invention belongs to the technical field of high-precision signal acquisition and analog-to-digital conversion, and particularly relates to an application circuit of a domestic high-precision ADC chip. Comprising a signal conditioning module which adopts a voltage follower formed by an operational amplifier and is used for outputting conditioning signals ADCSIN + and ADCSIN-to an analog-to-digital conversion module after carrying out buffer amplification, noise filtering and impedance matching on input analog signals SIN + and SIN-; the power supply filtering module adopts a voltage follower formed by an operational amplifier and is used for buffering the input common-mode voltage VCM and then outputting common-mode reference voltage AVDDVCM to the analog-to-digital conversion module; and the analog-digital conversion module adopts a CBM79AD60G type ADC (Analog to Digital Converter) chip. According to the invention, high-performance application of the chip is realized through completely localized component type selection and scenarized parameter optimization. The circuit solves the problems of poor adaptability, high cost and supply chain risk of an imported ADC application circuit.

Description

TECHNICAL FIELD

[0001] The application belongs to the technical field of high-precision signal acquisition and analog-to-digital conversion, and particularly relates to an application circuit of a domestic high-precision ADC chip. BACKGROUND

[0002] As a domestic self-developed 18-bit high-precision ADC chip, CBM79AD60G has international advanced performances such as a 5MSps sampling rate, a 96.5dB dynamic range, and a-113dB total harmonic distortion, and is manufactured by using a completely domestic process, and can effectively replace imported chips such as ADS8881 and AD7982.

[0003] Therefore, a completely domestic and modular application circuit is designed according to the hardware characteristics of the CBM79AD60G chip, the accurate matching of chip performance and scene demand is realized, the supply chain security is ensured, and the manufacturing cost of high-end equipment is reduced. SUMMARY

[0004] The application aims to provide an application circuit of a domestic high-precision ADC chip, and the application circuit takes a domestic CBM79AD60G chip as a core, performs signal conditioning, power filtering, and ADC module design around the pin definition, performance parameters and working mode of the chip, and all components are domestic models, so that the high compatibility of the circuit and the chip is ensured.

[0005] To solve the above technical problems, the application provides an application circuit of a domestic high-precision ADC chip, which comprises:

[0006] A signal conditioning module adopts a voltage follower composed of an operational amplifier, is used for buffering and amplifying, noise filtering and impedance matching of input analog signals SIN+ and SIN-, and outputs conditioning signals ADC_SIN+ and ADC_SIN- to an analog-to-digital conversion module;

[0007] A power filtering module adopts a voltage follower composed of an operational amplifier, is used for buffering input common-mode voltage VCM, and outputs common-mode reference voltage AVDD_VCM to the analog-to-digital conversion module;

[0008] An analog-to-digital conversion module adopts a CBM79AD60G type ADC chip.

[0009] Preferably, the signal conditioning module comprises a SIN+ signal conditioning unit and a SIN- signal conditioning unit.

[0010] The SIN+ signal conditioning unit includes: operational amplifier U8, resistor R8, resistor R67, capacitor C4, capacitor C45, capacitor C33, capacitor C37, capacitor C39, and capacitor C73. The IN+ terminal of operational amplifier U8 is connected to one end of capacitor C4 and one end of resistor R8, the other end of capacitor C4 is connected to the analog signal SIN+, and the other end of resistor R8 is connected to the common-mode voltage VCM. The IN- terminal of operational amplifier U8 is connected to the OUT terminal and one end of resistor R67, the other end of resistor R67 is connected to the grounded capacitor C73 and the output conditioning signal ADC_SIN+. The positive power supply terminal of operational amplifier U8 is connected to the power supply voltage OP_VS+ and the grounded capacitors C33 and C39. The negative power supply terminal of operational amplifier U8 is connected to OP_VS- and the grounded capacitors C37 and C45.

[0011] The SIN- signal conditioning unit includes: operational amplifier U2, resistors R6 and R65, capacitors C2, C47, C53, C57, C71, and C75; the IN+ terminal of operational amplifier U2 is connected to one end of capacitor C2 and one end of resistor R6, the other end of capacitor C2 is connected to the analog signal SIN-, the other end of resistor R6 is connected to the common-mode voltage VCM, the IN- terminal of operational amplifier U2 is connected to the OUT terminal and one end of resistor R65, the other end of resistor R65 is connected to the grounded capacitor C47 and the output conditioning signal ADC_SIN-, the positive power supply terminal of operational amplifier U2 is connected to the power supply voltage OP_VS+ and the grounded capacitors C53 and C57, and the negative power supply terminal of operational amplifier U2 is connected to OP_VS- and the grounded capacitors C71 and C75.

[0012] Preferably, both the operational amplifier U8 and the operational amplifier U2 use TLV9061M5 / TR type chips.

[0013] Preferably, the power supply filtering module includes: an operational amplifier U6 and a capacitor C69; the IN+ terminal of the operational amplifier U6 is connected to a common-mode voltage VCM, the IN- terminal of the operational amplifier U6 is connected to an OUT terminal and outputs a common-mode reference voltage AVDD_VCM, the positive power supply terminal of the operational amplifier U6 is connected to a power supply voltage OP_VS+ and a grounded capacitor C69, and the negative power supply terminal of the operational amplifier U6 is grounded.

[0014] Preferably, the operational amplifier U6 uses a CBM8601AST5 chip.

[0015] Preferably, the analog-to-digital conversion module includes: an ADC chip U4; the IN+ and IN- terminals of the ADC chip U4 are respectively connected to conditioning signals ADC_SIN+ and ADC_SIN-, the VREF terminal of the ADC chip U4 is connected to a reference voltage AVDD_VREF, the VCM terminal of the ADC chip U4 is connected to a common-mode reference voltage AVDD_VCM, the EN0 to EN3 terminals of the ADC chip U4 are respectively connected to enable signals ADC_EN0 to ADC_EN3, a resistor R4 is connected in series between the CNV+ and CNV- terminals of the ADC chip U4, and a resistor R2 is connected in series between the CLK+ and CLK- terminals of the ADC chip U4.

[0016] Compared with the prior art, the present invention has the following beneficial effects:

[0017] This invention discloses an application circuit for a domestically produced high-precision ADC chip, specifically adapted to the domestically produced CBM79AD60G high-precision ADC chip. This application circuit, designed for the 18-bit resolution and 5MSps sampling rate of the CBM79AD60G chip, incorporates a modular architecture including signal conditioning, power filtering, and analog-to-digital conversion. Through the selection of entirely domestically produced components and scenario-specific parameter optimization, the chip achieves high-performance applications. This circuit solves the problems of poor compatibility, high cost, and supply chain risks associated with imported ADC application circuits. The core components are 100% domestically produced, and the CBM79AD60G chip's performance utilization rate exceeds 90%. The overall solution cost is 35%–50% lower than imported solutions. It can be widely applied in digital imaging, medical testing, industrial measurement and control, and other fields, providing key technological support for the independent control of China's electronic information industry. Attached Figure Description

[0018] Figure 1 The circuit diagram of the signal conditioning module provided by this invention.

[0019] Figure 2 The circuit diagram of the power filtering module provided by the present invention.

[0020] Figure 3 The circuit diagram of the analog-to-digital conversion module provided by the present invention.

[0021] Figure 4 The timing diagram of the CBM79AD60G analog-to-digital converter (ADC) chip provided by this invention. Detailed Implementation

[0022] The present invention will be further described in detail below with reference to the accompanying drawings and specific embodiments. The advantages and features of the present invention will become clearer from the following description. It should be noted that the drawings are all in a very simplified form and use non-precise proportions, and are only used to facilitate and clarify the illustration of the embodiments of the present invention.

[0023] like Figures 1 to 4 As shown, this embodiment of the invention specifically provides an application circuit for a domestically produced high-precision ADC chip, including:

[0024] The signal conditioning module uses a voltage follower composed of operational amplifiers to buffer, amplify, filter noise, and match the impedance of the input analog signals SIN+ and SIN- before outputting the conditioning signals ADC_SIN+ and ADC_SIN- to the analog-to-digital converter module.

[0025] The power supply filtering module uses a voltage follower composed of operational amplifiers to buffer the input common-mode voltage VCM and output the common-mode reference voltage AVDD_VCM to the analog-to-digital converter module.

[0026] The analog-to-digital conversion module uses the CBM79AD60G ADC chip.

[0027] like Figure 1 As shown, the signal conditioning module includes a SIN+ signal conditioning unit and a SIN- signal conditioning unit; wherein, the SIN+ signal conditioning unit includes an operational amplifier U8, resistors R8 and R67, capacitors C4, C45, C33, C37, C39, and C73; the IN+ terminal of the operational amplifier U8 is connected to one end of capacitor C4 and one end of resistor R8, the other end of capacitor C4 is connected to the analog signal SIN+, the other end of resistor R8 is connected to the common-mode voltage VCM, the IN- terminal of the operational amplifier U8 is connected to the OUT terminal and one end of resistor R67, the other end of resistor R67 is connected to the grounded capacitor C73 and the output conditioning signal ADC_SIN+, the positive power supply terminal of the operational amplifier U8 is connected to the power supply voltage OP_VS+ and the grounded capacitors C33 and C39, and the negative power supply terminal of the operational amplifier U8 is connected to OP_VS- and the grounded capacitors C37 and C45;

[0028] The SIN- signal conditioning unit includes: operational amplifier U2, resistors R6 and R65, capacitors C2, C47, C53, C57, C71, and C75; the IN+ terminal of operational amplifier U2 is connected to one end of capacitor C2 and one end of resistor R6, the other end of capacitor C2 is connected to the analog signal SIN-, the other end of resistor R6 is connected to the common-mode voltage VCM, the IN- terminal of operational amplifier U2 is connected to the OUT terminal and one end of resistor R65, the other end of resistor R65 is connected to the grounded capacitor C47 and the output conditioning signal ADC_SIN-, the positive power supply terminal of operational amplifier U2 is connected to the power supply voltage OP_VS+ and the grounded capacitors C53 and C57, and the negative power supply terminal of operational amplifier U2 is connected to OP_VS- and the grounded capacitors C71 and C75.

[0029] The primary function of the aforementioned signal conditioning module is to buffer, amplify, filter noise, and match the impedance of the input analog signal SIN±, providing a high-quality input signal for the downstream ADC (Analog-to-Digital Converter) and ensuring ADC conversion accuracy and stability. The core component of this module is the operational amplifier TLV9061M5 / TR, which forms a voltage follower (non-inverting amplifier, gain ≈ 1), acting as a signal buffer, increasing input impedance, decreasing output impedance, enhancing signal driving capability, preventing excessive load on the preceding signal source, and stabilizing signal amplitude. It also achieves impedance matching in the signal chain, reducing signal reflection, ensuring signal integrity, and enabling the ADC to accurately acquire the signal.

[0030] like Figure 2 As shown, the power supply filtering module includes: operational amplifier U6 and capacitor C69; the IN+ terminal of operational amplifier U6 is connected to the common-mode voltage VCM, the IN- terminal of operational amplifier U6 is connected to the OUT terminal and outputs the common-mode reference voltage AVDD_VCM, the positive power supply terminal of operational amplifier U6 is connected to the power supply voltage OP_VS+ and the grounded capacitor C69, and the negative power supply terminal of operational amplifier U6 is grounded.

[0031] The operational amplifier U6 uses the CBM8601AST5 chip.

[0032] The main function of the aforementioned power supply filtering module is to provide a stable common-mode reference voltage for the ADC, ensuring the conversion accuracy and stability of the ADC. The core component of this module is the operational amplifier CBM8601AST5, which forms a voltage follower (non-inverting amplifier, gain ≈ 1) to directly buffer the input VCM signal and output it, providing a stable common-mode reference voltage (AVDD_VCM) for the ADC.

[0033] like Figure 3As shown, the analog-to-digital conversion module includes: an ADC chip U4; the IN+ and IN- terminals of the ADC chip U4 are respectively connected to conditioning signals ADC_SIN+ and ADC_SIN-, the VREF terminal of the ADC chip U4 is connected to a 5V reference voltage AVDD_VREF, the VCM terminal of the ADC chip U4 is connected to a 2.5V common-mode reference voltage AVDD_VCM, the EN0 to EN3 terminals of the ADC chip U4 are respectively connected to enable signals ADC_EN0 to ADC_EN3, a resistor R4 is connected in series between the CNV+ and CNV- terminals of the ADC chip U4, and a resistor R2 is connected in series between the CLK+ and CLK- terminals of the ADC chip U4.

[0034] The CBM79AD60G is a domestically developed high-precision successive approximation (SAR) analog-to-digital converter (ADC) chip developed by Chipwise Microelectronics (Beijing) Co., Ltd. It boasts internationally advanced performance and the advantage of complete domestic production, making it widely applicable in high-precision signal acquisition scenarios for high-end equipment. The recommended timing for an 18-bit 5MSps A / D converter is as follows... Figure 4 As shown.

[0035] The following is a brief summary of its core information:

[0036] Resolution and sampling rate: 18-bit lossless resolution, with a sampling rate of up to 5MSps (millions of samples per second), which can accurately capture subtle changes in weak signals.

[0037] Accuracy and distortion specifications: Linearity error (INL) ≤ ±2.0 LSB, Differential error (DNL) ≤ ±0.99 LSB; Dynamic range (DR) up to 96.5 dB, Signal-to-noise ratio (SNR) 95.5 dB, Spurious-free dynamic range (SFDR) 120 dB, Total harmonic distortion (THD) as low as -113 dB, ensuring high fidelity in signal conversion.

[0038] Power consumption and power supply: Typical power consumption is 64.5mW, supports dual power supply of 1.8V / 5.0V, and is suitable for low power consumption and wide voltage scenarios.

[0039] Operating environment: Operating temperature range -40℃ to +85℃, meeting the wide temperature requirements of industrial, medical and other fields.

[0040] SAR Architecture and Error Correction: Adopting a SAR architecture, there is no pipeline delay. The internal error correction circuit can compensate for errors such as capacitor mismatch and op-amp offset in real time, ensuring conversion accuracy.

[0041] Interface and Control: Equipped with a high-speed LVDS serial interface, multiple operating modes can be configured through the EN0-EN3 pins, such as sampling bandwidth switching, power-down / sleep mode, etc., to flexibly adapt to different scenarios.

[0042] Input and reference: The differential analog input range is ±VREF (VREF maximum value 5V, typical value 4.096V~5V), and it supports internal / external reference voltage configuration to meet diverse signal amplitude requirements.

[0043] The above description is merely a description of preferred embodiments of the present invention and is not intended to limit the scope of the present invention in any way. Any changes or modifications made by those skilled in the art based on the above disclosure shall fall within the protection scope of the claims.

Claims

1. An application circuit of a localized high-precision ADC chip, characterized in that, The signal conditioning module includes a voltage follower composed of an operational amplifier, which is used for buffering and amplifying the input analog signals SIN+, SIN-, filtering noise and matching impedance, and then outputs the conditioned signals ADC_SIN+, ADC_SIN- to the analog-digital conversion module. The power supply filtering module includes a voltage follower composed of an operational amplifier, which is used for buffering the input common-mode voltage VCM and then outputs the common-mode reference voltage AVDD_VCM to the analog-digital conversion module. The analog-digital conversion module adopts a CBM79AD60G type ADC chip. The signal conditioning module includes a SIN+ signal conditioning unit and a SIN- signal conditioning unit.

2. The application circuit of a localized high-precision ADC chip according to claim 1, characterized in that, The SIN+ signal conditioning unit includes an operational amplifier U8, a resistor R8, a resistor R67, a capacitor C4, a capacitor C45, a capacitor C33, a capacitor C37, a capacitor C39 and a capacitor C73; the IN+ end of the operational amplifier U8 is connected to one end of the capacitor C4 and one end of the resistor R8, the other end of the capacitor C4 is connected to the analog signal SIN+, the other end of the resistor R8 is connected to the common-mode voltage VCM, the IN- end of the operational amplifier U8 is connected to the OUT end and one end of the resistor R67, the other end of the resistor R67 is connected to the grounded capacitor C73 and the output conditioned signal ADC_SIN+, the positive power supply end of the operational amplifier U8 is connected to the power supply voltage OP_VS+ and the grounded capacitor C33 and capacitor C39, and the negative power supply end of the operational amplifier U8 is connected to OP_VS- and the grounded capacitor C37 and capacitor C45. The SIN- signal conditioning unit includes an operational amplifier U2, a resistor R6, a resistor R65, a capacitor C2, a capacitor C47, a capacitor C53, a capacitor C57, a capacitor C71 and a capacitor C75; the IN+ end of the operational amplifier U2 is connected to one end of the capacitor C2 and one end of the resistor R6, the other end of the capacitor C2 is connected to the analog signal SIN-, the other end of the resistor R6 is connected to the common-mode voltage VCM, the IN- end of the operational amplifier U2 is connected to the OUT end and one end of the resistor R65, the other end of the resistor R65 is connected to the grounded capacitor C47 and the output conditioned signal ADC_SIN-, the positive power supply end of the operational amplifier U2 is connected to the power supply voltage OP_VS+ and the grounded capacitor C53 and capacitor C57, and the negative power supply end of the operational amplifier U2 is connected to OP_VS- and the grounded capacitor C71 and capacitor C75. Both the operational amplifier U8 and the operational amplifier U2 adopt a TLV9061M5 / TR type chip.

3. The application circuit of a localized high-precision ADC chip according to claim 2, characterized in that, The power supply filtering module includes an operational amplifier U6 and a capacitor C69; the IN+ end of the operational amplifier U6 is connected to the common-mode voltage VCM, the IN- end of the operational amplifier U6 is connected to the OUT end and outputs the common-mode reference voltage AVDD_VCM, the positive power supply end of the operational amplifier U6 is connected to the power supply voltage OP_VS+ and the grounded capacitor C69, and the negative power supply end of the operational amplifier U6 is grounded.

4. The application circuit of a localized high-precision ADC chip according to claim 1, characterized in that, The operational amplifier U6 adopts a CBM8601AST5 type chip.

5. The application circuit of a localized high-precision ADC chip according to claim 4, characterized in that, ​ 6. The application circuit of a localized high-precision ADC chip according to claim 1, characterized in that, The analog-digital conversion module comprises an ADC chip U4; IN+ and IN- ends of the ADC chip U4 are connected to conditioning signals ADC_SIN+ and ADC_SIN- respectively, a VREF end of the ADC chip U4 is connected to a reference voltage AVDD_VREF, a VCM end of the ADC chip U4 is connected to a common-mode reference voltage AVDD_VCM, EN0-EN3 ends of the ADC chip U4 are connected to enabling signals ADC_EN0-ADC_EN3 respectively, a resistor R4 is connected in series between CNV+ and CNV- ends of the ADC chip U4, and a resistor R2 is connected in series between CLK+ and CLK- ends of the ADC chip U4.

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