Back contact cells, cell assemblies and photovoltaic systems

Abstract

The application relates to the technical field of solar cells, and provides a back contact cell, a cell module and a photovoltaic system. In the back contact cell, a third main group element is doped in a first tunneling layer, and the second tunneling layer is doped with the third main group element and a fifth main group element. The doping concentration of the fifth main group element in the second tunneling layer is 2-100 times that of the third main group element in the second tunneling layer. In this way, by adopting a double-doping strategy for the second tunneling layer and controlling the concentration ratio relationship between the third main group element and the fifth main group element, the second tunneling layer can simultaneously realize low tunneling resistance and excellent gettering performance, and the problems of large N region tunneling resistance and poor gettering effect in the prior art are effectively solved.

Description

Technical Field

[0001] This application relates to the field of solar cell technology, and more particularly to a back-contact cell, a cell module, and a photovoltaic system. Background Technology

[0002] Solar cell power generation is a sustainable and clean energy source. It uses the photovoltaic effect of semiconductor PN junctions to convert sunlight into electrical energy, and the conversion efficiency is an important indicator of solar cell performance.

[0003] As a high-efficiency photovoltaic device, the core design of back-contact solar cells lies in integrating the P-type and N-type regions, as well as the metal electrodes, onto the back side of the silicon substrate, thereby avoiding optical shading caused by the front metal electrodes.

[0004] In related technologies, the back side of a back contact battery forms a P-region and an N-region. The P-region has a tunneling layer and a P-type doped layer doped with P-type doping elements such as boron, while the N-region has a tunneling layer and an N-type doped layer doped with N-type doping elements such as phosphorus. In existing technologies, the tunneling layer in the P-region typically contains only Group 3 elements such as boron, and the tunneling layer in the N-region typically contains only Group 5 elements such as phosphorus. Under such circumstances, the tunneling resistance of the N-region is relatively large and the gettering effect is poor, which restricts the further improvement of the efficiency of the back contact battery. Summary of the Invention

[0005] This application provides a back-contact battery, a battery module, and a photovoltaic system.

[0006] This application is implemented as follows: the back contact battery in the embodiments of this application includes:

[0007] A silicon substrate, wherein the back side of the silicon substrate has a plurality of first polar regions and a plurality of second polar regions arranged alternately;

[0008] A first tunneling layer and a first doped layer are sequentially stacked on the first polar region, wherein the first doped layer is doped with a third group element; and

[0009] A second tunneling layer and a second doped layer are sequentially stacked on the second polar region, wherein the second doped layer is doped with a Group 5 element;

[0010] The first tunneling layer is doped with a Group 3 element, and the second tunneling layer is doped with both a Group 3 element and a Group 5 element. The doping concentration of the Group 5 element in the second tunneling layer is 2 to 100 times that of the doping concentration of the Group 3 element in the second tunneling layer.

[0011] In some embodiments, the third group element is boron and the fifth group element is phosphorus.

[0012] In some embodiments, the doping concentration of the third main group element in both the first tunneling layer and the second tunneling layer is greater than 10. 17 atoms / cm 3 The doping concentration of Group 5 elements in the second tunneling layer is also greater than 10. 17 atoms / cm 3 .

[0013] In some embodiments, the first tunneling layer contains silicon, oxygen, and nitrogen.

[0014] In some embodiments, the first tunneling layer includes at least one of a silicon nitride layer and a silicon oxynitride layer.

[0015] In some embodiments, the first tunneling layer includes a first silicon oxide layer stacked on the first polar region and a first nitride layer stacked on the first silicon oxide layer, wherein the first nitride layer includes at least one of a silicon nitride layer and a silicon oxynitride layer.

[0016] In some embodiments, the doping concentration of the third group element in the first nitride layer is greater than the doping concentration of the third group element in the first silicon oxide layer.

[0017] In some embodiments, the second tunneling layer contains silicon, oxygen, and nitrogen.

[0018] In some embodiments, the second tunneling layer includes at least one of a silicon nitride layer and a silicon oxynitride layer.

[0019] In some embodiments, the second tunneling layer includes a second silicon oxide layer stacked on the second polar region and a second nitride layer stacked on the second silicon oxide layer, wherein the second nitride layer includes at least one of a silicon nitride layer and a silicon oxynitride layer.

[0020] In some embodiments, the doping concentration of the third group element in the second nitride layer is greater than the doping concentration of the third group element in the second silicon oxide layer; the doping concentration of the fifth group element in the second nitride layer is greater than the doping concentration of the fifth group element in the second silicon oxide layer.

[0021] In some embodiments, the first tunneling layer and the second tunneling layer are continuous on the back side of the silicon substrate and are formed together in the same process step.

[0022] In some embodiments, the first doped layer includes a first sub-doped layer and a second sub-doped layer sequentially stacked on a first tunneling layer. The first sub-doped layer is doped with a third group element, and the second sub-doped layer is doped with a third group element and a fifth group element. The doping concentration of the third group element in the second sub-doped layer is greater than the doping concentration of the fifth group element.

[0023] In some embodiments, a first inner expansion layer is formed at the interface between the silicon substrate and the first tunneling layer, and a second inner expansion layer is formed at the interface between the silicon substrate and the second tunneling layer. The first inner expansion layer is doped with a third group element, and the second inner expansion layer is doped with a third group element and a fifth group element.

[0024] In some embodiments, the doping concentration of the third main group element in the first inner layer is greater than 10. 17 atoms / cm 3 The thickness of some parts is less than 100 nm;

[0025] The doping concentration of Group 5 elements in the second inner layer is greater than 10. 17 atoms / cm 3 The thickness of some parts is less than 100 nm.

[0026] In some embodiments, the first inner expansion layer and the second inner expansion layer are in contact within the silicon substrate to form a bulk inter-expansion region within the silicon substrate, wherein the bulk inter-expansion region contains a Group 3 element and a Group 5 element, and the depth of the bulk inter-expansion region is less than 150 nm.

[0027] In some embodiments, the width of the in vivo inter-diffusion region is 10 nm-2 μm.

[0028] In some embodiments, the doping concentration of the third group element in the first inner layer is less than the doping concentration of the third group element in the second inner layer.

[0029] In some embodiments, a plurality of first holes are formed on the first tunneling layer, and a plurality of second holes are formed on the second tunneling layer, wherein the hole density on the second tunneling layer is less than the hole density on the first tunneling layer.

[0030] In some embodiments, the surface of the first polar region is a velvety surface, and the first polar region has a plurality of first pyramid structures. The first pyramid structure has a first base slope, and the first base slope includes a first region, a second region, and a third region arranged sequentially along the direction from the bottom of the first pyramid structure toward the top of the first pyramid structure. The second region is located between the first region and the third region.

[0031] The pore density of the portion of the first tunneling layer located in the third region is greater than the pore density of the portion of the first tunneling layer located in the second region.

[0032] In some embodiments, a first inner expansion layer is formed at the interface between the silicon substrate and the first tunneling layer, and the thickness of the portion of the first inner expansion layer corresponding to the third region is greater than the thickness of the portion of the first inner expansion layer corresponding to the second region.

[0033] In some embodiments, the surface of the second polar region is a velvety surface, the second polar region has a plurality of second pyramid structures, the second pyramid structure has a second base slope, the second base slope includes a fourth region, a fifth region and a sixth region arranged sequentially along the direction from the bottom of the second pyramid structure toward the top of the second pyramid structure, the fifth region being located between the fourth region and the sixth region;

[0034] The pore density of the portion of the second tunneling layer located in the sixth region is greater than the pore density of the portion of the second tunneling layer located in the fifth region.

[0035] In some embodiments, a second inner expansion layer is formed at the contact interface between the silicon substrate and the second tunneling layer, and the thickness of the portion of the second inner expansion layer corresponding to the sixth region is greater than the thickness of the portion of the second inner expansion layer corresponding to the fifth region.

[0036] In some embodiments, the first polar region and the second polar region are flush, or the height difference between the first polar region and the second polar region is 10nm-100nm;

[0037] At least one of the first doped layers is in at least partial contact with an adjacent second doped layer to form an external inter-spreading region, wherein the external inter-spreading region contains both a Group 3 element and a Group 5 element, and the first doped layer and the second doped layer form a tunneling composite structure through the external inter-spreading region.

[0038] In some embodiments, in adjacent first doped layers and second doped layers, the length of contact between the first doped layer and the second doped layer is greater than 80% of the length of the first doped layer.

[0039] In some embodiments, in adjacent first doped layers and second doped layers, the length of the first doped layer and the second doped layer that do not contact each other is less than 5% of the length of the first doped layer.

[0040] In some embodiments, the width of the in vitro inter-spreading region is 10 nm-2 μm.

[0041] In some embodiments, the depth of the external inter-spreading region is 50nm-500nm.

[0042] This application also provides a battery assembly comprising a plurality of back contact batteries as described in any of the preceding claims.

[0043] This application also provides a photovoltaic system, which includes the aforementioned battery components.

[0044] In the back-contact battery, battery module, and photovoltaic system of this application embodiment, a Group 3 element is doped in the first tunneling layer, and a Group 3 element and a Group 5 element are doped in the second tunneling layer. The doping concentration of the Group 5 element in the second tunneling layer is 2 to 100 times that of the Group 3 element in the second tunneling layer. Thus, on the one hand, in the P-type contact region with the first doped layer, the first tunneling layer contains only a Group 3 element or a very small amount of the Group 5 element, which avoids the local inversion that can easily occur in the P-type contact region due to a high content of the Group 5 element in the first tunneling layer, leading to local structural failure in the P-type contact region. On the other hand, by simultaneously doping the Group 3 element and the Group 5 element in the second tunneling layer, and precisely controlling the doping concentration of the Group 5 element to be 2 to 100 times that of the Group 3 element, a high concentration of the Group 5 element is doped in the second tunneling layer in the N-type contact region. This reduces the tunneling resistance of electrons through the tunneling layer, thereby improving electron collection efficiency. Meanwhile, the second tunneling layer is also doped with a Group 3 element. The concentration of the Group 3 element is lower than that of the Group 5 element. By doping the second tunneling layer on the N-type region with both Group 3 and Group 5 elements and controlling the concentration ratio of the two, it is possible to avoid inversion in the N-type region while helping to form efficient gettering centers near the N-type region, thereby improving the gettering effect and efficiency.

[0045] Additional aspects and advantages of this application will be set forth in part in the description which follows, and in part will be obvious from the description, or may be learned by practice of this application. Attached Figure Description

[0046] Figure 1 This is a schematic diagram of the photovoltaic system provided in the embodiments of this application;

[0047] Figure 2 This is a schematic diagram of a battery assembly provided in an embodiment of this application;

[0048] Figure 3 This is a schematic diagram of the planar structure of the back contact battery provided in an embodiment of this application;

[0049] Figure 4This is a cross-sectional structural diagram of the back contact battery provided in an embodiment of this application;

[0050] Figure 5 This is another cross-sectional structural diagram of the back contact battery provided in the embodiments of this application;

[0051] Figure 6 This is another cross-sectional structural diagram of the back contact battery provided in the embodiments of this application;

[0052] Figure 7 This is another cross-sectional structural diagram of the back contact battery provided in the embodiments of this application;

[0053] Figure 8 yes Figure 7 A magnified schematic diagram of the back contact battery at point VIII;

[0054] Figure 9 yes Figure 7 A magnified schematic diagram of the back contact battery at point IX. Detailed Implementation

[0055] To make the objectives, technical solutions, and advantages of this application clearer, the following detailed description is provided in conjunction with the accompanying drawings and embodiments. Examples of embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions throughout. It should be noted that the embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain this application, and should not be construed as limiting this application. Furthermore, it should be understood that the specific embodiments described herein are merely for explaining this application and are not intended to limit this application.

[0056] In the description of this application, it should be understood that the terms "upper", "lower", "left", "right", "lateral", "longitudinal", etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this application.

[0057] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Therefore, a feature defined as "first" or "second" may explicitly or implicitly include one or more features. In the description of this application, "several" means two or more, unless otherwise explicitly specified.

[0058] In this application, unless otherwise expressly specified and limited, "above" or "below" the second feature can include direct contact between the first and second features, or contact between the first and second features through another feature between them. Furthermore, "above," "over," and "on top" of the second feature includes the first feature being directly above or diagonally above the second feature, or simply indicates that the first feature is at a higher horizontal level than the second feature. "Below," "below," and "under" the second feature includes the first feature being directly below or diagonally below the second feature, or simply indicates that the first feature is at a lower horizontal level than the second feature.

[0059] The following disclosure provides numerous different embodiments or examples for implementing various structures of this application. To simplify the disclosure, specific examples of components and arrangements are described below. These are merely examples and are not intended to limit the scope of this application. Furthermore, reference numerals and / or letters may be repeated in different examples; such repetition is for simplification and clarity and does not in itself indicate a relationship between the various embodiments and / or arrangements discussed. In addition, various specific examples of processes and materials are provided in this application, but those skilled in the art will recognize the application of other processes and / or the use of other materials.

[0060] Please see Figure 1 and Figure 2 The photovoltaic system 1000 in this application embodiment may include the battery module 200 in this application embodiment, and the battery module 200 in this application embodiment may include a plurality of back contact cells 100 in this application embodiment. In the embodiments of this application, the plurality of back contact cells 100 in the battery module 200 may be connected in series to form a plurality of battery strings. The battery strings may be connected in series, in parallel, or in a series-parallel combination to achieve current collection and output. For example, the connection between the individual cells may be achieved by welding solder strips, or the connection between the individual battery strings may be achieved by busbars. In some embodiments, the individual battery strings may form a cell array, and then be packaged together by a front plate, a front adhesive film, a rear adhesive film, and a back plate to form the battery module 200.

[0061] In the embodiments of this application, please refer to Figures 3-4 The back contact battery 100 in this application embodiment may include a silicon substrate 10, a first tunneling layer 20, a first doped layer 30, a second tunneling layer 40, and a second doped layer 50.

[0062] The silicon substrate 10 has a front side 11 and a back side 12, and the back side 12 of the silicon substrate 10 has a plurality of first polar regions 121 and a plurality of second polar regions 122 arranged alternately. For example... Figure 3As shown, in some possible embodiments, the first polar region 121 and the second polar region 122 may be arranged alternately along the first direction, and both the first polar region 121 and the second polar region 122 may extend along the second direction. The first direction and the second direction intersect. Specifically, in some possible embodiments, the first direction and the second direction may be the lateral direction and the longitudinal direction of the back contact battery 100, respectively.

[0063] The first tunneling layer 20 and the first doped layer 30 are stacked sequentially on the first polar region 121. That is, the first tunneling layer 20 is stacked on the first polar region 121, and the first doped layer 30 is stacked on the first tunneling layer 20. The first doped layer 30 is doped with a third group element.

[0064] The second tunneling layer 40 and the second doped layer 50 are stacked sequentially on the second polar region 122. That is, the second tunneling layer 40 is stacked on the second polar region 122, and the second doped layer 50 is stacked on the second tunneling layer 40. The second doped layer 50 is doped with a Group 5 element.

[0065] In the back contact battery 100, the first tunneling layer 20 is doped with a Group 3 element, and the second tunneling layer 40 is doped with both a Group 3 element and a Group 5 element. The doping concentration of the Group 5 element in the second tunneling layer 40 is 2 to 100 times that of the Group 3 element in the second tunneling layer 40. It should be noted that in some embodiments of this application, the first tunneling layer 20 may contain only a Group 3 element and not a Group 5 element. However, during the fabrication process, a small amount of Group 5 element may diffuse into the first tunneling layer 20, but its doping concentration is much lower than that of the Group 3 element.

[0066] In the back contact battery 100, battery module 200 and photovoltaic system 1000 of this application embodiment, the first tunneling layer 20 is doped with a group 3 element, and the second tunneling layer 40 is doped with a group 3 element and a group 5 element. The doping concentration of the group 5 element in the second tunneling layer 40 is 2 to 100 times that of the doping concentration of the group 3 element in the second tunneling layer 40. Thus, on the one hand, in the P-type contact region (i.e., the first polar region 121) with the first doped layer 30, the first tunneling layer 20 contains only Group III elements (e.g., boron) or a very small amount of Group V doping elements. This avoids the local inversion that can easily occur in the P-type contact region due to the high content of Group V elements in the first tunneling layer 20, which would lead to local structural failure in the P-type contact region. On the other hand, the second tunneling layer 40 is simultaneously doped with both Group III and Group V elements, and the doping concentration of Group V elements is precisely controlled to be 2 to 100 times that of Group III elements. This results in a high concentration of Group V elements (e.g., phosphorus) in the N-type contact region (i.e., the second polar region 122). This reduces the tunneling resistance of electrons through the tunneling layer, thereby improving the electron collection efficiency. Meanwhile, the second tunneling layer 40 is also doped with a Group 3 element (e.g., boron). The concentration of the Group 3 element is lower than that of the Group 5 element. By doping the second tunneling layer 40 on the N-type region with both Group 3 and Group 5 elements and controlling the concentration ratio of the two, it can help form efficient gettering centers near the N-type region while avoiding inversion in the N-type region, thereby improving the gettering effect and efficiency.

[0067] In other words, in the embodiments of this application, by employing a dual doping strategy on the second tunneling layer 40 and controlling the concentration ratio between the third group elements and the fifth group elements, the second tunneling layer 40 can simultaneously achieve low tunneling resistance and excellent gettering performance, effectively solving the problems of high tunneling resistance and poor gettering effect in the N-region in the prior art.

[0068] Specifically, in the embodiments of this application, the doping concentration of the Group 5 element in the second tunneling layer 40 can be 2, 3, 4, 5, 6, 7, 8, 9, 10, 15, 20, 25, 30, 35, 40, 45, 50, 55, 60, 65, 70, 75, 80, 85, 90, 95, 100 times, or other values ​​between 2 and 100 times the doping concentration of the Group 3 element in the second tunneling layer 40. Through research and demonstration by the inventors of this application, it has been found that this ratio is preferably 5 to 50 times, within which the gettering effect and efficiency of the back contact battery 100 are optimal.

[0069] In the embodiments of this application, a Group 3 element refers to an element in Group III of the periodic table, such as boron (B), which is typically used as a P-type dopant in silicon to form hole-conducting regions. A Group 5 element refers to an element in Group V of the periodic table, such as phosphorus (P), which is typically used as an N-type dopant in silicon to form electron-conducting regions.

[0070] In this application, boron is preferably a Group 3 element, and phosphorus is preferably a Group 5 element. Boron can be introduced into the film layer (e.g., the first doped layer 30) of the back contact battery 100 in various ways. For example, it can be implanted into the film using ion implantation, or chemical vapor deposition (CVD) using boron-containing gases such as boron trichloride or diborane as precursors, or solid-state diffusion by contacting the boron source (e.g., borosilicate glass) with the film layer and diffusing it at high temperature. Phosphorus can also be introduced in various ways. For example, it can be implanted into the conductive film (e.g., the second doped layer 50) using ion implantation, or chemical vapor deposition (CVD) using phosphorus-containing gases such as phosphorus oxychloride or phosphine as precursors, or solid-state diffusion by contacting the phosphorus source (e.g., phosphosilicate glass) with the film layer and diffusing it at high temperature. In the following description, boron will be used as a Group 3 element, and phosphorus as a Group 5 element.

[0071] Furthermore, in this application, the third group element in the first tunneling layer 20 can be directly introduced during the preparation of the first tunneling layer 20, or it can diffuse into the first tunneling layer 20 during the preparation of the first doped layer 30; no specific limitation is imposed here. Similarly, in this application, the third group element in the second tunneling layer 40 can be directly introduced during the preparation of the second tunneling layer 40, or it can diffuse into the second tunneling layer 40 during the preparation of the first doped layer 30; no specific limitation is imposed here. The fifth group element in the second tunneling layer 40 can be directly introduced during the preparation of the second tunneling layer 40, or it can diffuse into the second tunneling layer 40 during the preparation of the second doped layer 50; no specific limitation is imposed here.

[0072] Furthermore, in this application, "doping concentration" refers to the number density of dopant atoms (e.g., boron atoms, phosphorus atoms) in a certain material layer, expressed as atoms per cubic centimeter (atoms / cm³). 3 )express.

[0073] It is easy to understand that in the embodiments of this application, the first doped layer 30 and the first tunneling layer 20 together form the P-type passivation contact structure of the back contact battery 100, and the second doped layer 50 and the second tunneling layer 40 together form the N-type passivation contact structure of the back contact battery 100.

[0074] The first tunneling layer 20 and the second tunneling layer 40 are thin dielectric layers respectively disposed on the first polar region 121 and the second polar region 122. Their main function is to realize the tunneling transport of charge carriers and passivate the surface of the silicon substrate 10 to reduce surface recombination losses. The first doped layer 30 can be a boron-doped amorphous silicon or polycrystalline silicon layer, and the second doped layer 50 can be a phosphorus-doped amorphous silicon or polycrystalline silicon layer; the specifics are not limited here.

[0075] In some embodiments, the back contact battery 100 in this application embodiment can be prepared by the following preparation method, which may include the following steps:

[0076] A silicon substrate 10 is provided, the silicon substrate 10 having a front side 11 and a back side 12 opposite to each other;

[0077] The silicon substrate 10 is textured; in this step, the back surface 12 of the silicon substrate 10 may be texturized or polished, which is not limited here, that is, the back surface 12 of the silicon substrate 10 may be a texturized surface or a polished surface. In some embodiments, the back surface 12 of the silicon substrate 10 is preferably a texturized surface, and the back surface 12 includes a plurality of first polar regions 121 and a plurality of second polar regions 122. The first polar regions 121 and the second polar regions 122 are surface regions of the silicon substrate 10 in the same etching process, that is, the first polar regions 121 and the second polar regions 122 are formed by the same etching process step.

[0078] A tunneling layer is deposited on the back side 12 of the silicon substrate 10. Specifically, in this step, the tunneling layer is deposited together on the entire back side 12 of the silicon substrate 10. The portion of the tunneling layer located in the first polar region 121 is the first tunneling layer 20, and the portion located in the second polar region 122 is the second tunneling layer 40. That is to say, in this embodiment, the first tunneling layer 20 and the second tunneling layer 40 are formed in the same step. Of course, in some possible embodiments, the first tunneling layer 20 and the second tunneling layer 40 may also be formed using different preparation steps, which is not limited here.

[0079] A first doped layer 30 is prepared on the first tunneling layer 20 and a second doped layer 50 is prepared on the second tunneling layer 40;

[0080] A back passivation layer is deposited over the entire back side 12 and a front passivation layer is deposited over the front side 11;

[0081] A first electrode and a second electrode are respectively fabricated on the first polar region 121 and the second polar region 122. The first electrode at least partially penetrates the back passivation layer and forms an ohmic contact with the first doped layer 30. The second electrode at least partially penetrates the back passivation layer and forms an ohmic contact with the second doped layer 50.

[0082] In some embodiments, the first doped layer 30 and the second doped layer 50 can be implemented through the following steps:

[0083] A first doped layer 30 is prepared on the entire tunneling layer, and a first dielectric layer is formed on the first doped layer 30;

[0084] Etching process to remove the first dielectric layer on the second polar region 122 and the first doped layer 30 on the second polar region 122;

[0085] A second doped layer 50 is prepared over the entire surface, and a second dielectric layer is formed on the second doped layer 50.

[0086] An opening process is performed on the second dielectric layer on the first polar region 121 to expose the second doped layer 50;

[0087] Remove the second doped layer 50 exposed at the first polarity region 121;

[0088] After this, the entire second dielectric layer can be removed or retained; no specific restriction is imposed here. Furthermore, after removing the second doped layer 50 exposed at the first polarity region 121, the exposed first dielectric layer can be removed or retained. If the first dielectric layer is removed, the subsequent back passivation layer contacts the first doped layer 30 at the opening region, and the first electrode at least partially burns through the back passivation layer to contact the first doped layer 30. If the first dielectric layer is retained, the subsequent back passivation layer contacts the first dielectric layer at the opening region, and the first electrode at least partially burns through the back passivation layer and the first dielectric layer to contact the first doped layer 30.

[0089] In some embodiments, during the fabrication process, a first silicon material layer doped with boron can be first prepared on the entire tunneling layer. Then, high-temperature annealing or laser annealing oxidation is performed to transform the first silicon material layer into a boron-doped polycrystalline silicon layer (i.e., the first doped layer 30), and a first dielectric layer is formed on the boron-doped polycrystalline silicon layer. The first dielectric layer can be a borosilicate glass layer. Then, the portion of the first dielectric layer located on the second polar region 122 is removed. Subsequently, the first doped layer 30 is etched to remove the first doped layer 30 on the second polar region 122 while retaining the second tunneling layer 40. Then, a second silicon material layer is deposited. The second silicon material layer is then subjected to high-temperature annealing or laser annealing oxidation to transform it into a phosphorus-doped polycrystalline silicon layer (i.e., the second doped layer 50), and a second dielectric layer is formed on the phosphorus-doped polycrystalline silicon layer. The second dielectric layer can be a phosphorus-silicon glass layer. Then, an opening is made in the portion of the second dielectric layer located on the first polar region 121, and the second doped layer 50 in the opening area is etched away.

[0090] In this case, the first silicon material layer can be either doped or undoped; that is, the first silicon material layer can be doped with boron or not. When the first silicon material layer is doped, it can be a boron-doped amorphous silicon layer. In this case, high-temperature annealing or laser annealing oxidation transforms it into a boron-doped polycrystalline silicon layer (i.e., the first doped layer 30) and forms the first dielectric layer. When the first silicon material layer is undoped, it can be an intrinsic amorphous silicon layer. In this case, the first silicon material layer can undergo thermal diffusion treatment. During thermal diffusion, boron doping can be achieved while simultaneously transforming it into a boron-doped polycrystalline silicon layer (i.e., the first doped layer 30) and forming the first dielectric layer. Specific details are not limited here.

[0091] Similarly, in this case, the second silicon material layer can be either doped or undoped. If the second silicon material layer is doped, it can be a phosphorus-doped amorphous silicon layer, which is then transformed into a phosphorus-doped polycrystalline silicon layer by high-temperature annealing or laser annealing oxidation to form the second dielectric layer. If the second silicon material layer is undoped, it can be an intrinsic amorphous silicon layer. In this case, the second silicon material layer can be thermally diffused. During the thermal diffusion process, phosphorus doping can be achieved while transforming it into a polycrystalline silicon layer and forming the second dielectric layer. The specific details are not limited here.

[0092] In some embodiments, the boron element in the first tunneling layer 20 and the second tunneling layer 40 may be doped during the formation of the first doped layer 30, and the phosphorus element in the second tunneling layer 40 may be doped during the formation of the second doped layer 50. Of course, in some possible embodiments, the boron element in the first tunneling layer 20 and the second tunneling layer 40 may also be doped simultaneously during the formation of the tunneling layers, and the phosphorus element in the second tunneling layer 40 may be doped through selective ion implantation or selective diffusion, etc., without limitation.

[0093] In other embodiments, the first doped layer 30 and the second doped layer 50 can also be implemented through the following steps:

[0094] A first doped layer 30 is prepared on the entire tunneling layer, and a first dielectric layer is formed on the first doped layer 30;

[0095] The first dielectric layer is opened to remove the first dielectric layer on the second polar region 122;

[0096] A second silicon material layer is prepared across the entire surface, and the second silicon material layer is doped with phosphorus. In some embodiments, the second silicon material layer may be a phosphorus-doped polycrystalline silicon layer, a phosphorus-doped amorphous silicon layer, or other phosphorus-doped film layer. Of course, the specific material of the second silicon material layer is not limited here.

[0097] The second silicon material layer is subjected to high-temperature annealing treatment, thereby activating the phosphorus element in the second silicon material layer and causing the phosphorus element to diffuse into the portion of the first doped layer 30 located on the second polar region 122, thereby inverting the portion of the first doped layer 30 located on the second polar region 122, thus forming a boron-phosphorus co-doped polycrystalline silicon layer (i.e., the second doped layer 50). In other words, the portion of the first doped layer 30 located on the second polar region 122 can be inverted to become the second doped layer 50. That is, the first doped layer 30 can be locally inverted to form the second doped layer 50 by compensating doping.

[0098] In this case, when the second silicon material layer is a phosphorus-doped intrinsic amorphous silicon layer, the second silicon material layer will transform into a phosphorus-doped polycrystalline silicon layer. Therefore, a second doped layer 50, doped to an inversion state, and a phosphorus-doped polycrystalline silicon layer located on the second doped layer 50 will be formed on the second polar region 122. During this process, a phosphorus-silicon glass layer (i.e., a second dielectric layer) will be formed on the second silicon material layer.

[0099] Subsequently, the second dielectric layer and the second silicon material layer on the first polar region 121 can be opened to expose the second silicon material layer on the first polar region 121. Then, the exposed second silicon material layer at the first polar region 121 can be etched away, thereby facilitating the subsequent fabrication of the passivation film layer on the back side 12 and the electrode.

[0100] It is understood that in such an embodiment, the first dielectric layer on the first polar region 121 can effectively block the phosphorus element in the second silicon material layer, thereby preventing the portion of the first doped layer 30 located on the first polar region 121 from being inverted and causing the first doped layer 30 on the first polar region 121 to fail.

[0101] In such an embodiment, the preparation method of the first doped layer 30 is basically the same as that of the embodiment described above, and will not be repeated here.

[0102] Of course, in some possible embodiments, the second silicon material layer may not be doped with phosphorus; for example, the second silicon material layer may be an intrinsic amorphous silicon layer. In such cases, after the second silicon material layer is deposited, high-temperature phosphorus diffusion and annealing can be performed to transform the second silicon material layer into a phosphorus-doped film layer, such as a phosphorus-doped polycrystalline silicon layer, and to advance phosphorus into the portion of the first doped layer 30 located on the second polar region 122 to dope it into an inverted second doped layer 50.

[0103] In this case, the surface portion of the second silicon material layer transforms into a phosphosilicate glass layer, thereby forming the second dielectric layer described above. The second silicon material layer also covers the first dielectric layer. The second silicon material layer and the first dielectric layer (e.g., a borosilicate glass layer) on the first polar region 121 can buffer the diffusion of phosphorus, preventing the first doped layer 30 on the first polar region 121 from being inverted and thus causing failure.

[0104] Of course, in some possible embodiments, the thickness of the second silicon material layer can be set to be relatively thin, for example, less than 50 nm, preferably less than 30 nm. In such cases, after the second silicon material layer is prepared, it can be completely transformed into a second dielectric layer. For example, when the second silicon material layer is an intrinsic amorphous silicon layer, it can be completely transformed into a phosphosilicate glass layer (i.e., the second dielectric layer) through high-temperature phosphorus diffusion and annealing, allowing phosphorus to diffuse into the portion of the first doped layer 30 located on the second polar region 122 to invert it into a second doped layer 50 with opposite polarity. That is to say, in such embodiments, the second silicon material layer can be completely depleted and transformed into a second dielectric layer, and the presence of the second dielectric layer and the first dielectric layer can effectively block phosphorus on the first polar region 121, thereby preventing the first doped layer 30 on the first polar region 121 from being inverted by the doped layer.

[0105] In addition, in some embodiments, the first doped layer 30 and the second doped layer 50 can also be prepared by the following method, which may include the steps of:

[0106] A first doped layer 30 is prepared on the entire tunneling layer and a first dielectric layer is formed on the first doped layer 30; wherein, the first doped layer 30 may be a boron-doped polycrystalline silicon layer, the first dielectric layer may be a borosilicate glass layer, and the thickness of the first dielectric layer is greater than 50 nm;

[0107] Remove the portion of the first dielectric layer located on the second polar region 122;

[0108] By employing high-temperature phosphorus diffusion and annealing, a portion of the first doped layer 30 located on the second polar region 122 is inverted into a second doped layer 50 simultaneously doped with boron and phosphorus elements. In this case, the polarity of the second doped layer 50 is opposite to that of the first doped layer 30.

[0109] It is easy to understand that in such an embodiment, because the first dielectric layer has sufficient thickness, it can effectively resist the diffusion of phosphorus, thereby effectively preventing the portion of the first doped layer 30 located on the first polar region 121 from being doped into an inversion state and thus failing. Specifically, the specific preparation method of the first doped layer 30 can be basically the same as that used in the embodiments described above, and will not be repeated here.

[0110] Of course, in some possible embodiments, in order to improve the blocking effect of phosphorus on the first polar region 121, a blocking layer can also be prepared on the first dielectric layer of the first polar region 121, so as to more efficiently block phosphorus in the phosphorus diffusion and prevent it from entering the first doped layer too much.

[0111] Please see Figure 6 In some embodiments, the first doped layer 30 may include a first sub-doped layer 31 and a second sub-doped layer 32 sequentially stacked on the first tunneling layer 20. That is, the first sub-doped layer 31 is stacked on the first tunneling layer 20, and the second sub-doped layer 32 is stacked on the first sub-doped layer 31. The first sub-doped layer 31 is doped with a Group 3 element, and the second sub-doped layer 32 is doped with both a Group 3 element and a Group 5 element. The doping concentration of the Group 3 element in the second sub-doped layer 32 is greater than the doping concentration of the Group 5 element.

[0112] Thus, the second sub-doped layer 32 located on the surface is doped with Group 3 and Group 5 elements, which can effectively improve the gettering effect during the preparation of the back contact battery 100. The doping concentration of the Group 3 elements in the second sub-doped layer 32 is greater than that of the Group 5 elements, which can prevent the Group 5 elements in the second sub-doped layer 32 from inverting and causing failure.

[0113] Specifically, in such an embodiment, the second sub-doped layer 32 can be formed by locally doping a small amount of phosphorus on its surface after the overall boron-doped layer is formed, thereby forming the lower first sub-doped layer 31 and the upper second sub-doped layer 32. Of course, in some embodiments, a small amount of phosphorus can also diffuse through the first dielectric layer to the top of the first doped layer 30 during the preparation of the second doped layer 50 to form the second sub-doped layer 32; the specific method is not limited here.

[0114] In some embodiments, the doping concentration of the third main group element in both the first tunneling layer 20 and the second tunneling layer 40 may be greater than 10. 17 atoms / cm 3 The doping concentration of Group 5 elements in the second tunneling layer 40 can also be greater than 10. 17 atoms / cm 3 .

[0115] Thus, by setting the doping concentration of the third main group element in both the first tunneling layer 20 and the second tunneling layer 40 to be greater than 10... 17 atoms / cm 3 Furthermore, the doping concentration of Group 5 elements in the second tunneling layer 40 is also set to be greater than 10.17 atoms / cm 3 This ensures that the interfaces between the first tunneling layer 20 and the second tunneling layer 40 and the silicon substrate 10 can form a sufficiently strong electric field, thereby significantly enhancing the tunneling probability of charge carriers. The high concentration of doping not only optimizes the conductivity of the tunneling layer, but also improves the passivation effect on the surface of the silicon substrate 10, effectively suppressing interface recombination loss.

[0116] Specifically, in such an embodiment, in the first polar region 121, high concentration of Group 3 main elements doping enables the first tunneling layer 20 to efficiently collect holes, and in the second polar region 122, high concentration of Group 3 main elements and Group 5 main elements co-doping, especially the high concentration of Group 5 main elements, enables the second tunneling layer 40 to efficiently collect electrons while maintaining good passivation.

[0117] In such an embodiment, the doping concentration of the third group element in the first tunneling layer 20 and the second tunneling layer 40 is not specifically limited, nor is the doping concentration of the fifth group element in the second tunneling layer 40 specifically limited. It is only necessary to satisfy that the doping concentration of the fifth group element in the second tunneling layer 40 is 2 to 100 times that of the doping concentration of the third group element in the second tunneling layer 40.

[0118] In some embodiments, the first tunneling layer 20 may include a first nitride layer 22, and the second tunneling layer 40 may include a second nitride layer 42.

[0119] Thus, the addition of nitrogen enhances the blocking effect on the diffusion source and solves the problem of surface defect recombination caused by high-density pores.

[0120] In some embodiments, the first tunneling layer 20 may include at least one of a silicon nitride layer and a silicon oxynitride layer. In some embodiments, the second tunneling layer 40 may also include at least one of a silicon nitride layer and a silicon oxynitride layer.

[0121] In some embodiments, the first tunneling layer 20 contains silicon, oxygen, and nitrogen. In some embodiments, the second tunneling layer 40 may also contain silicon, oxygen, and nitrogen.

[0122] Thus, by using a composite tunneling layer grown with silicon, oxygen and nitrogen, the addition of nitrogen enhances the blocking effect on the diffusion source and solves the problem of surface defect recombination caused by high-density pores. The participation of oxygen reduces the interface defect state density between the tunneling layer and the silicon substrate 10.

[0123] Please see Figure 5In some embodiments, the first tunneling layer 20 may also include a first silicon oxide layer 21 stacked on the first polar region 121 and a first nitride layer 22 stacked on the first silicon oxide layer 21, wherein the first nitride layer 22 includes at least one of a silicon nitride layer and a silicon oxynitride layer.

[0124] In some embodiments, the second tunneling layer 40 may include a second silicon oxide layer 41 stacked on the second polar region 122 and a second nitride layer 42 stacked on the second silicon oxide layer 41, wherein the second nitride layer 42 includes at least one of a silicon nitride layer and a silicon oxynitride layer. Of course, in some possible embodiments, both the first tunneling layer 20 and the second tunneling layer 40 may be silicon nitride layers or silicon oxynitride layers.

[0125] Please see Figure 5 In some embodiments, the first tunneling layer 20 and the second tunneling layer 40 are continuously formed on the back side 12 of the silicon substrate 10 and are formed together in the same process step, that is, the first tunneling layer 20 and the second tunneling layer 40 are a single continuous film.

[0126] In this way, the pore density of the tunneling layer and the depth of the doped layer within the silicon substrate 10 can be effectively controlled, whether in the P-region or the N-region.

[0127] Specifically, because the process control of nitrogen-containing tunneling layers is difficult, costly, and requires significant equipment investment, if the tunneling layers of the P-region and N-region are treated separately using nitrogen-containing technology, it would undoubtedly hinder the widespread adoption of the technology. Furthermore, the conductivity of the pores is crucial to the device's resistance. The drawback of silicon oxide tunneling layers is their excessively high pore density and deep internal expansion depth, which can lead to surface recombination and Auger recombination. However, nitrogen-containing tunneling layers tend to go to the other extreme: insufficient pore density and excessively high resistance. Due to the high cutoff characteristics of nitrogen-containing tunneling layers, higher temperatures or multiple high-temperature processes are required to form sufficient pore density. If the N-region tunneling layer is grown with nitrogen-containing tunneling layers alone, it will not experience the "punching" effect brought about by the high temperature of phosphorus diffusion, and it will only undergo one high-temperature process. If the phosphorus diffusion temperature is significantly increased, it will lead to the "punching" transition in the P-region. Therefore, sharing the same nitrogen-containing tunneling layer between the P-region and N-region can effectively reduce the overall production difficulty, lower costs, and reduce equipment investment.

[0128] Furthermore, given the characteristics of the nitrogen-containing tunnel layer, the differences in passivation contact performance caused by boron and phosphorus doping are masked by the nitrogen atmosphere. Therefore, the pre-defined trench etching process in the boron-expanded N-region can be removed. This reduces production costs and solves the problem of localized thinning of the silicon substrate 10, enhancing the cell's strength. In other words, when the P-region and N-region share the same nitrogen-containing tunnel layer, it is unnecessary to use a trenching process in subsequent processes to isolate the first doped layer 30 and the second doped layer 50.

[0129] Furthermore, since the P-region and N-region use the same nitrogen-containing tunneling layer, and its inner depth is controlled to be sufficiently small, the space charge region at the boundary between the P-region and N-region is mainly present within the polycrystalline silicon layer. This space charge is isolated from the substrate region that absorbs photons and diffuses minority carriers. This effectively solves the edge recombination problem between the N-region and P-region in the back contact cell 100 without trench isolation, reducing the need for trench isolation or even eliminating it altogether. This brings additional technical benefits: 1. Saves on trench etching process costs or even eliminates the trench etching process altogether. 2. More trenchless areas between the P-region and N-region result in higher reverse leakage current, lower hotspot temperature, and stronger anti-shading performance. 3. It solves the problem of reduced light-trapping performance caused by excessive thinning of the local silicon substrate 10 due to the introduction of trenches.

[0130] In some embodiments, the doping concentration of the third group element in the first nitride layer 22 is greater than the doping concentration of the third group element in the first silicon oxide layer 21.

[0131] Thus, the doping concentration of the third group elements in the first silicon oxide layer 21 is relatively low, which can effectively avoid the passivation quality of the P region being greatly reduced due to the excessive doping concentration of the third group elements in the first silicon oxide layer 21.

[0132] In some embodiments, the doping concentration of the third group element in the second nitride layer 42 is greater than the doping concentration of the third group element in the second silicon oxide layer 41; the doping concentration of the fifth group element in the second nitride layer 42 is greater than the doping concentration of the fifth group element in the second silicon oxide layer 41.

[0133] In this way, the passivation quality of the N region can be significantly reduced due to excessive doping concentration of Group III and Group V elements in the second silicon oxide layer 41.

[0134] Please see Figure 7 In some embodiments, a first inner expansion layer 60 is formed at the interface between the silicon substrate 10 and the first tunneling layer 20, and a second inner expansion layer 70 is formed at the interface between the silicon substrate 10 and the second tunneling layer 40. The first inner expansion layer 60 is doped with a Group 3 element, and the second inner expansion layer 70 is doped with both a Group 3 element and a Group 5 element. Specifically, the polarity of the first inner expansion layer 60 is opposite to that of the second inner expansion layer 70. In some embodiments, the doping concentration of the Group 5 element in the second inner expansion layer 70 is greater than the doping concentration of the Group 3 element.

[0135] Thus, the first inner layer 60 forms a P-type region in the silicon substrate 10, creating a back surface field with the main body of the silicon substrate 10. This effectively repels minority carriers (electrons) away from the interface, significantly reducing the recombination rate at the interface. Simultaneously, the second inner layer 70 forms an N-type region in the silicon substrate 10, also creating a back surface field that effectively repels minority carriers (holes) away from the interface and promotes the collection of majority carriers (electrons). In this way, the first inner layer 60 and the second inner layer 70 work together to form a localized back surface field on the back surface 12 of the silicon substrate 10, effectively passivating the interface between the back surface 12 of the silicon substrate 10 and the tunneling layer, reducing carrier recombination losses.

[0136] In some embodiments, the doping concentration of the third main group element in the first inner layer 60 is greater than 10. 17 atoms / cm 3 The thickness of some parts is less than 100nm, such as 95nm, 90nm, 80nm, 70nm, 60nm, 50nm, 40nm, 30nm, 20nm, and 10nm.

[0137] The doping concentration of Group 5 elements in the second inner layer 70 is greater than 10. 17 atoms / cm 3 The thickness of some parts is less than 100nm, such as 95nm, 90nm, 80nm, 70nm, 60nm, 50nm, 40nm, 30nm, 20nm, and 10nm.

[0138] In this way, the excessive thickness of the portion with a high doping concentration of Group 3 elements in the first inner layer 60, which would lead to too many defects in the silicon substrate 10, can be avoided. Similarly, the excessive thickness of the portion with a high doping concentration of Group 5 elements in the second inner layer 70, which would also lead to too many defects in the silicon substrate 10, can be avoided.

[0139] Please see Figure 7 In some embodiments, the first inner expansion layer 60 is in contact with the second inner expansion layer 70 to form a bulk inter-expansion region 110 in the silicon substrate 10. The bulk inter-expansion region 110 contains a third group element and a fifth group element, and the depth of the bulk inter-expansion region 110 can be 10nm-500nm.

[0140] In such embodiments, the depth of the in-body inter-spreading region 110 is preferably less than 150 nm, for example, 145 nm, 140 nm, 135 nm, 130 nm, 125 nm, 120 nm, 115 nm, 110 nm, 105 nm, 100 nm, 95 nm, 90 nm, 80 nm, 70 nm, 60 nm, 50 nm, 40 nm, 30 nm, 20 nm, or 10 nm.

[0141] Thus, the presence of the bulk inter-spreading region 110 can effectively reduce the reverse breakdown voltage of the back contact battery 100, thereby improving the hot spot resistance of the back contact battery 100. Simultaneously, controlling the depth of the bulk inter-spreading region 110 to 10nm-500nm, preferably less than 150nm, can prevent excessive recombination caused by an excessively large depth of the bulk inter-spreading region 110, which would negatively impact the efficiency of the back contact battery 100. In other words, this configuration can improve the hot spot resistance while preventing a significant decrease in the efficiency of the back contact battery 100.

[0142] Specifically, the "in-body inter-diffusion region 110" refers to the region where the first inner diffusion layer 60 and the second inner diffusion layer 70 diffuse into each other. A portion of the area where the first inner diffusion layer 60 and the second inner diffusion layer 70 contact each other, and a portion of the area where the second inner diffusion layer 70 and the first inner diffusion layer 60 contact each other, together form the in-body inter-diffusion region. That is, a portion of the in-body inter-diffusion region 110 is located in the first polar region 121, and another portion is located in the second polar region 122. The "depth of the in-body inter-diffusion region 110" refers to the thickness of the in-body inter-diffusion region 110 in the thickness direction, which is determined by the thickness of the contact area between the first inner diffusion layer 60 and the second inner diffusion layer 70.

[0143] In some embodiments, the width of the in-body inter-spreading region 110 (i.e., the width in the first direction) is 10 nm to 2 μm, such as 10 nm, 20 nm, 30 nm, 40 nm, 50 nm, 60 nm, 70 nm, 80 nm, 90 nm, 100 nm, 0.2 μm, 0.4 μm, 0.6 μm, 0.8 μm, 1 μm, 1.2 μm, 1.4 μm, 1.6 μm, 1.8 μm, 2 μm, or other values ​​between 10 nm and 2 μm.

[0144] In this way, it can effectively avoid the situation where the width of the internal inter-spreading region 110 is too small, which would prevent it from failing to improve the anti-hot spot effect, and it can also avoid the situation where the width of the internal inter-spreading region 110 is too large, which would result in excessive efficiency loss of the back contact battery 100.

[0145] Specifically, in such embodiments, the width of the portion of the in vivo inter-diffusion region 110 located on the first polar region 121 may be the same as or different from the width of the portion located on the second polar region 122, without limitation. In some embodiments, preferably, the width of the portion of the in vivo inter-diffusion region 110 located on the first polar region 121 may be the same as the width of the portion located on the second polar region 122, that is, the width of the portion of the in vivo inter-diffusion region 110 located on the first polar region 121 may be 5nm-1μm, and the width of the portion of the in vivo inter-diffusion region 110 located on the second polar region 122 may also be 5nm-1μm.

[0146] Please see Figure 8 and Figure 9In some embodiments, both the first tunneling layer 20 and the second tunneling layer 40 have a plurality of holes, specifically, such as Figure 8 and Figure 9 As shown, a number of first holes 201 are formed on the first tunneling layer 20, and a number of second holes 401 are formed on the second tunneling layer 40. The hole density on the second tunneling layer 40 (i.e., the density of the first holes 201) is less than the hole density on the first tunneling layer 20 (i.e., the density of the second holes 401). "Hole density" refers to the number of holes per unit area.

[0147] Specifically, the number of pores in the tunneling layer affects the carrier collection efficiency of the P-region and the N-region. In the back contact cell 100, the carrier collection efficiency of the P-region is inherently lower than that of the N-region, and an excessive number of pores will affect the passivation effect. Based on this, this embodiment sets the pore density on the first tunneling layer 20 to be greater than that on the second tunneling layer 40, which can effectively improve the carrier collection efficiency of the P-region while avoiding the poor passivation effect caused by an excessively high pore density in the N-region. In other words, under such circumstances, the carrier collection effect of the P-region can be improved while ensuring that the passivation effect of the N-region does not decrease significantly.

[0148] Please see Figure 8 In some embodiments, the surface of the first polar region 121 is velvety, the first polar region 121 has a plurality of first pyramid structures 13, the first pyramid structure 13 has a first base slope 131, the first base slope 131 includes a first region 1311, a second region 1312 and a third region 1313 arranged sequentially along the direction from the bottom of the first pyramid structure 13 toward the top of the first pyramid structure 13, the second region 1312 is located between the first region 1311 and the third region 1313;

[0149] The pore density of the portion of the first tunneling layer 20 located in the third region 1313 (i.e., the density of the first pore 201 in the third region 1313) is greater than the pore density of the portion of the first tunneling layer 20 located in the second region 1312 (i.e., the density of the first pore 201 in the second region 1312).

[0150] In this way, by setting a larger pore density in the third region 1313 of the first tunneling layer 20 located on the first tower base slope 131 near the tower tip, the resistance can be effectively reduced and the carrier collection efficiency can be improved.

[0151] Specifically, in such embodiments, the first tunneling layer 20 may include a first nitride layer 22, which may consist only of the first nitride layer 22, or may include a first silicon oxide layer 21 and the first nitride layer 22; the specific details are not limited here. In some preferred embodiments, the first tunneling layer 20 contains three elements: silicon, nitrogen, and oxygen. For example, the first tunneling layer 20 may be a stack of silicon oxide and silicon nitride or silicon oxynitride; or, for example, the first tunneling layer 20 may be a single layer of silicon oxynitride; the specific details are not limited here.

[0152] Specifically, in the back contact battery 100, the density of pores in the tunneling layer determines the resistance value of the tunneling layer. In conventional technology, pores are usually obtained by increasing the temperature or through multiple high-temperature steps. However, even in a nitrogen-containing tunneling layer structure that meets passivation quality requirements, it is difficult to achieve a sufficient number of pores to obtain the ideal resistance value. Furthermore, excessively high temperatures can induce defects related to the silicon substrate 10, leading to performance degradation. The inventors have discovered that introducing texture (i.e., using a velvety structure) on the surface is an effective measure. Tunneling layers at the edges of textured surfaces often suffer from high-density defects or are prone to stress concentration and tearing during high-temperature processes. This is detrimental in current silicon dioxide tunneling layer technology, leading to excessive pores and inward expansion, resulting in an excessive increase in defects. However, in nitrogen-containing tunneling layers, this is a beneficial effect. It can significantly reduce the required thermal process, selectively forming pores and inward expansion at the edges, producing a localized open-pore passivation structure similar to that in microstructures. This ensures the beneficial effect of passivation improvement while solving the problem of excessively high resistance. Based on this, the inventors of this application set the first polar region 121 to a textured surface. The textured surface can improve the light trapping effect and thus improve the utilization rate of light. The first tunneling layer 20 is set to a nitrogen-containing tunneling layer. The pore density of the third region 1313 of the first tunneling layer 20 located on the first tower base slope 131 near the tower tip is set to be larger, which can make the tower tip region form a better conductive path while ensuring the passivation effect, thereby improving the carrier collection efficiency.

[0153] In other words, by using a textured surface and a nitrogen-containing tunneling layer in the P-type region, and by specially optimizing the pore density on the inclined surface of the tower base, the shortcomings of using textured surface and single-layer silicon oxide as the tunneling layer in traditional technology are overcome. This can improve the light trapping effect and thus improve the utilization rate of light, while also improving the carrier collection efficiency. It can also improve the passivation effect and reduce defects in the silicon substrate 10, thereby improving the efficiency of the back contact cell 100.

[0154] In some embodiments, the pore density of the portion of the first tunneling layer 20 located in the third region 1313 (i.e., the density of the first pores 201 in the third region 1313) is at least three times the pore density of the portion of the first tunneling layer 20 located in the second region 1312 (i.e., the density of the first pores 201 in the second region 1312), and the pore density of the portion of the first tunneling layer 20 located in the third region 1313 is at least three times the pore density of the portion of the first tunneling layer 20 located in the second region 1312, for example, 3 times, 4 times, 5 times, 6 times, 7 times, 8 times, 10 times, 50 times, 100 times, or 200 times.

[0155] In this way, by specifically designing the number of holes in the two regions, the collection efficiency of charge carriers can be further improved.

[0156] In some embodiments, the pore density of the portion of the first tunneling layer 20 located in the third region 1313 is preferably 3 to 200 times that of the portion of the first tunneling layer 20 located in the second region 1312.

[0157] In some embodiments, the pore density of the portion of the first tunneling layer 20 located in the first region 1311 is also greater than the pore density of the portion of the first tunneling layer 20 located in the second region 1312.

[0158] In this way, by making the holes at the bottom and top of the inclined surface of the tower base denser and the holes in the middle area sparser, the collection efficiency of charge carriers can be further improved, while ensuring the stability of the part of the first tunneling layer 20 located on the inclined surface of the tower base.

[0159] Furthermore, in such an embodiment, the pore density of the portion of the first tunneling layer 20 located in the first region 1311 is at least three times that of the pore density of the portion of the first tunneling layer 20 located in the second region 1312, for example, 3 times, 4 times, 5 times, 6 times, 7 times, 8 times, 10 times, 50 times, 100 times, or 200 times.

[0160] This can further improve the efficiency of carrier collection.

[0161] In some embodiments, the pore density of the portion of the first tunneling layer 20 located in the first region 1311 is preferably 3 to 200 times that of the portion of the first tunneling layer 20 located in the second region 1312.

[0162] In some embodiments, the porosity of the portion of the first tunneling layer 20 located on the third region 1313 is 10. 6 -10 9 pcs / cm 2 For example, 10 6 pcs / cm 25*10 6 pcs / cm 2 10 7 pcs / cm 2 5*10 7 pcs / cm 2 10 8 pcs / cm 2 5*10 8 pcs / cm 2 10 9 pcs / cm 2 The porosity of the portion of the first tunnel layer 20 located on the second region 1312 is less than 10. 7 pcs / cm 2 For example, 10 6 pcs / cm 2 5*10 5 pcs / cm 2 10 5 pcs / cm 2

[0163] 5*10 4 pcs / cm 2 The specific requirements are not limited here, as long as the pore density of the portion of the first tunnel layer 20 located in the third region 1313 is at least three times that of the portion located in the second region 1312.

[0164] Thus, by optimizing the design of the pore density in the third region 1313 and the pore density in the second region 1312, the pore density in the third region 1313 can be prevented from being too small, which would result in a low carrier collection effect. It can also prevent the pore density in the third region 1313 from being too large, which would result in excessive recombination. At the same time, it can also prevent the pore density in the second region 1312 from being too large, which would result in poor stability of the portion of the first tunneling layer 20 located on the inclined surface of the tower base.

[0165] In some embodiments, the pore density of the portion of the first tunneling layer 20 located on the first region 1311 may also be 10. 6 -10 9 pcs / cm 2 For example, 10 6 pcs / cm 2 5*10 6 pcs / cm 2 10 7 pcs / cm 2 5*10 7 pcs / cm 2 10 8 pcs / cm 2 5*10 8 pcs / cm2 10 9 pcs / cm 2 The specific requirements are not limited here, as long as the pore density of the portion of the first tunnel layer 20 located in the first region 1311 is at least three times that of the portion located in the second region 1312.

[0166] Thus, by optimizing the design of the pore density on the first region 1311 and the pore density on the second region 1312, the pore density on the first region 1311 can be prevented from being too small, which would result in a low carrier collection effect. It can also prevent the pore density on the first region 1311 from being too large, which would result in excessive recombination. At the same time, it can also prevent the pore density on the second region 1312 from being too large, which would result in poor stability of the portion of the first tunneling layer 20 located on the inclined surface of the tower base.

[0167] In some embodiments, a first inner expansion layer 60 is formed at the contact interface between the silicon substrate 10 and the first tunneling layer 20, and the thickness of the portion of the first inner expansion layer 60 corresponding to the third region 1313 is greater than the thickness of the portion of the first inner expansion layer 60 corresponding to the second region 1312.

[0168] Thus, by setting the thickness of the inner expansion layer in the third region 1313, where the pore density is relatively high, to be thicker, the carrier collection efficiency of the region can be improved.

[0169] In some embodiments, the thickness of the portion of the first inner expansion layer 60 corresponding to the first region 1311 is greater than the thickness of the portion of the first inner expansion layer 60 corresponding to the second region 1312.

[0170] In some embodiments, the thickness of the portion of the first tunneling layer 20 located on the third region 1313 is greater than the thickness of the portion of the first tunneling layer 20 located on the second region 1312.

[0171] Thus, since the pore density of the third region 1313 is relatively high, if its thickness is too thin, the passivation effect of this region will be poor. By setting the thickness of the part of the first tunneling layer 20 located in the third region 1313 to be thicker, the passivation effect of this region can be effectively guaranteed.

[0172] In some embodiments, the thickness of the portion of the first tunneling layer 20 located on the first region 1311 is greater than the thickness of the portion of the first tunneling layer 20 located on the second region 1312.

[0173] Please see Figure 9In some embodiments, the surface of the second polar region 122 is velvety, the second polar region 122 has a plurality of second pyramid structures 14, the second pyramid structure 14 has a second base slope 141, the second base slope 141 includes a fourth region 1411, a fifth region 1412 and a sixth region 1413 arranged sequentially along the direction from the bottom of the second pyramid structure 14 toward the top of the second pyramid structure 14, the fifth region 1412 being located between the fourth region 1411 and the sixth region 1413;

[0174] The pore density of the portion of the second tunneling layer 40 located in the sixth region 1413 (i.e., the density of the second pores 401 in the sixth region 1413) is greater than the pore density of the portion of the second tunneling layer 40 located in the fifth region 1412 (i.e., the density of the second pores 401 in the fifth region 1412).

[0175] Thus, by setting a larger pore density in the sixth region 1413 of the second tunneling layer 40 located on the second tower base slope 141 near the tower tip, the resistance can be effectively reduced, and the carrier collection efficiency can be improved. Specifically, by using a textured surface and a nitrogen-containing tunneling layer in the N-type region, and by specially optimizing the pore density on the tower base slope, the shortcomings of using textured surfaces and single-layer silicon oxide as tunneling layers in traditional technologies are overcome. This can improve the light trapping effect, thereby increasing the bifaciality of light utilization, while also improving the carrier collection efficiency. Furthermore, it can improve the passivation effect while reducing defects in the silicon substrate 10, thereby improving the efficiency of the back contact cell 100.

[0176] Specifically, in such embodiments, the second tunneling layer 40 may include a second nitride layer 42, which may consist only of the second nitride layer 42, or it may include a second silicon oxide layer 41 and a second nitride layer 42; the specific details are not limited here. In some preferred embodiments, the second tunneling layer 40 contains three elements: silicon, nitrogen, and oxygen. For example, the second tunneling layer 40 may be a stack of silicon oxide and silicon nitride or silicon oxynitride; or it may be a single layer of silicon oxynitride; the specific details are not limited here.

[0177] In some embodiments, the pore density of the portion of the second tunneling layer 40 located in the sixth region 1413 (i.e., the density of the second pores 401 in the sixth region 1413) is at least three times the pore density of the portion of the second tunneling layer 40 located in the fifth region 1412 (i.e., the density of the second pores 401 in the fifth region 1412), for example, 3 times, 4 times, 5 times, 6 times, 7 times, 8 times, 10 times, 50 times, 100 times, or 200 times.

[0178] In this way, by specifically designing the number of holes in the two regions, the collection efficiency of charge carriers can be further improved.

[0179] In some embodiments, the pore density of the portion of the second tunneling layer 40 located in the sixth region 1413 is preferably 3 to 200 times that of the portion of the second tunneling layer 40 located in the fifth region 1412.

[0180] In some embodiments, the pore density of the portion of the second tunneling layer 40 located in the fourth region 1411 is also greater than the pore density of the portion of the second tunneling layer 40 located in the fifth region 1412.

[0181] In this way, by making the holes at the bottom and top of the inclined surface of the tower base denser and the holes in the middle area sparser, the collection efficiency of charge carriers can be further improved, while ensuring the stability of the part of the second tunneling layer 40 located on the inclined surface of the tower base.

[0182] Furthermore, in such an embodiment, the pore density of the portion of the second tunneling layer 40 located in the fourth region 1411 is at least three times that of the pore density of the portion of the second tunneling layer 40 located in the fifth region 1412, for example, 3 times, 4 times, 5 times, 6 times, 7 times, 8 times, 10 times, 50 times, 100 times, or 200 times.

[0183] This can further improve the efficiency of carrier collection.

[0184] In some embodiments, the pore density of the portion of the second tunneling layer 40 located in the fourth region 1411 is preferably 3 to 200 times that of the portion of the second tunneling layer 40 located in the fifth region 1412.

[0185] In some embodiments, the pore density of the portion of the second tunneling layer 40 located on the sixth region 1413 is 10. 6 -10 9 pcs / cm 2 For example, 10 6 pcs / cm 2 5*10 6 pcs / cm 2 10 7 pcs / cm 2 5*10 7 pcs / cm 2 10 8 pcs / cm 2 5*10 8 pcs / cm 2 10 9 pcs / cm 2The pore density of the portion of the second tunneling layer 40 located on the fifth region 1412 is less than 10. 7 pcs / cm 2 For example, 10 6 pcs / cm 2 5*10 5 pcs / cm 2 10 5 pcs / cm 2

[0186] 5*10 4 pcs / cm 2 The specific requirements are not limited here, as long as the pore density of the portion of the second tunnel layer 40 located in the sixth region 1413 is at least three times that of the portion in the fifth region 1412.

[0187] Thus, by optimizing the design of the pore density in the sixth region 1413 and the fifth region 1412, the pore density in the sixth region 1413 can be prevented from being too small, which would result in a low carrier collection effect. It can also prevent the pore density in the sixth region 1413 from being too large, which would result in excessive recombination. At the same time, it can also prevent the pore density in the fifth region 1412 from being too large, which would result in poor stability of the part of the second tunneling layer 40 located on the inclined surface of the tower base.

[0188] In some embodiments, the pore density of the portion of the second tunneling layer 40 located on the fourth region 1411 may also be 10. 6 -10 9 pcs / cm 2 For example, 10 6 pcs / cm 2 5*10 6 pcs / cm 2 10 7 pcs / cm 2 5*10 7 pcs / cm 2 10 8 pcs / cm 2 5*10 8 pcs / cm 2 10 9 pcs / cm 2 The specific requirements are not limited here, as long as the pore density of the portion of the second tunnel layer 40 located in the fourth region 1411 is at least three times that of the portion located in the fifth region 1412.

[0189] Thus, by optimizing the design of the pore density in the fourth region 1411 and the pore density in the fifth region 1412, the pore density in the fourth region 1411 can be prevented from being too small, which would result in a low carrier collection effect. It can also prevent the pore density in the fourth region 1411 from being too large, which would result in excessive recombination. At the same time, it can also prevent the pore density in the fifth region 1412 from being too large, which would result in poor stability of the part of the second tunneling layer 40 located on the inclined surface of the tower base.

[0190] In some embodiments, a second inner expansion layer 70 is formed at the contact interface between the silicon substrate 10 and the second tunneling layer 40, and the thickness of the portion of the second inner expansion layer 70 corresponding to the sixth region 1413 is greater than the thickness of the portion of the second inner expansion layer 70 corresponding to the fifth region 1412.

[0191] Thus, by setting the thickness of the inner expansion layer in the sixth region 1413, where the pore density is relatively high, to be thicker, the carrier collection efficiency of the region can be improved.

[0192] In some embodiments, the thickness of the portion of the second inner expansion layer 70 corresponding to the fourth region 1411 is greater than the thickness of the portion of the second inner expansion layer 70 corresponding to the fifth region 1412.

[0193] In some embodiments, the thickness of the portion of the second tunneling layer 40 located on the sixth region 1413 is greater than the thickness of the portion of the second tunneling layer 40 located on the fifth region 1412.

[0194] Thus, since the pore density of the sixth region 1413 is relatively high, if its thickness is too thin, the passivation effect of this region will be poor. By setting the thickness of the second tunneling layer 40 in the part of the sixth region 1413 to be thicker, the passivation effect of this region can be effectively guaranteed.

[0195] In some embodiments, the thickness of the portion of the second tunneling layer 40 located on the fourth region 1411 is greater than the thickness of the portion of the second tunneling layer 40 located on the fifth region 1412.

[0196] Please see Figure 7 In some embodiments, the first polar region 121 and the second polar region 122 are flush or the height difference between the first polar region 121 and the second polar region 122 (i.e., the height difference between the surface of the first polar region 121 and the surface of the second polar region 122 in the thickness direction) is 10nm-100nm. At least one first doped layer 30 is at least partially in contact with the adjacent second doped layer 50 to form an external inter-diffusion region 120. The external inter-diffusion region 120 contains both a third group element and a fifth group element. The first doped layer 30 and the second doped layer 50 form a tunneling composite structure through the external inter-diffusion region 120.

[0197] In such an embodiment, the depth of the in vivo inter-spreading region 110 can be 10nm-500nm, preferably less than 150nm.

[0198] Thus, on the one hand, the first doped layer 30 and the second doped layer 50 form an external inter-diffusion region 120 outside the bulk region, which can reduce the reverse breakdown voltage of the back contact cell 100 and thereby improve the hot spot resistance of the back contact cell 100. On the other hand, setting the first polar region 121 and the second polar region 122 to be flush or the height difference between the first polar region 121 and the second polar region 122 to be 10nm-100nm can avoid the formation of deep trenches on the silicon substrate 10, thereby effectively avoiding the excessive height difference between the first polar region 121 and the second polar region 122, which would lead to an excessively large space charge region in the bulk region and excessive recombination loss in the bulk region.

[0199] Specifically, in such an embodiment, by optimizing the height of the first polar region 121 and the second polar region 122, the depth of the bulk inter-diffusion region 110 can be controlled within 10nm-500nm, reducing the influence range of the space charge region within the bulk region and moving the space charge region outside the bulk region, thereby improving the hot spot resistance performance of the back contact battery 100 while reducing recombination losses within the bulk region.

[0200] Specifically, the "external inter-diffusion region 120" refers to the region where the first doped layer 30 and the second doped layer 50 diffuse into each other. A portion of the contact area between the first doped layer 30 and the second doped layer 50 and a portion of the contact area between the second doped layer 50 and the first doped layer 30 together form the internal inter-diffusion region.

[0201] In some embodiments, the depth of the external inter-diffusion region 120 is 50nm-500nm, such as 50nm, 100nm, 150nm, 200nm, 250nm, 300nm, 350nm, 400nm, 450nm, 500nm, or other values ​​between 50nm and 500nm. "Depth of the external inter-diffusion region 120" refers to the thickness of the external inter-diffusion region 120 in the thickness direction, which is determined by the thickness at which the first doped layer 30 and the second doped layer 50 are in contact.

[0202] Thus, the presence of the external inter-spreading region 120 can effectively reduce the reverse breakdown voltage of the back contact battery 100, thereby improving the hot spot resistance of the back contact battery 100. Simultaneously, controlling the depth of the external inter-spreading region 120 within the range of 50μm-500μm avoids excessive recombination due to an excessively large depth, which would negatively impact the efficiency of the back contact battery 100. In other words, this configuration can improve the hot spot resistance while preventing a significant decrease in the efficiency of the back contact battery 100.

[0203] In some embodiments, the width of the external inter-spreading region 120 (i.e., the width in the first direction) may be 10 nm to 2 μm.

[0204] In this way, it can effectively avoid the situation where the width of the external inter-spreading region 120 is too small, which would prevent it from failing to improve the anti-hot spot effect, and it can also avoid the situation where the width of the external inter-spreading region 120 is too large, which would result in excessive efficiency loss of the back contact battery 100.

[0205] Specifically, in such embodiments, the width of the portion of the external inter-spreading region 120 located on the first polar region 121 may be the same as or different from the width of the portion located on the second polar region 122, without limitation. In some embodiments, preferably, the width of the portion of the external inter-spreading region 120 located on the first polar region 121 may be the same as the width of the portion located on the second polar region 122, that is, the width of the portion of the external inter-spreading region 120 located on the first polar region 121 may be 5nm-1μm, and the width of the portion of the external inter-spreading region 120 located on the second polar region 122 may also be 5nm-1μm.

[0206] In some embodiments, in the external inter-expansion region 120, the difference between the doping concentration of the Group 3 element and the doping concentration of the Group 5 element (i.e., the absolute value of the difference) is less than 10. 19 atoms / cm 3 The width of some regions is greater than 20 nm, for example, 25 nm, 30 nm, 40 nm, 50 nm, 60 nm, 70 nm, 80 nm, and 90 nm. That is, the difference between the doping concentration of Group III elements and the doping concentration of Group V elements in the external cross-expansion region 120 is less than 10. 19 atoms / cm 3 The size of the region in the first direction.

[0207] In this way, this specific setting can prevent the area from being too narrow, which would prevent the anti-hot spot effect from failing to meet expectations.

[0208] In some embodiments, in adjacent first doped layers 30 and second doped layers 50, the length of contact between the first doped layer 30 and the second doped layer 50 (i.e., the length in the second direction) is greater than 80% of the length of the first doped layer 30, such as 81%, 85%, 90%, 95%, 96%, 94%, etc.

[0209] This configuration can further improve the heat spot resistance of the back contact battery 100.

[0210] In such embodiments, in adjacent first doped layers 30 and second doped layers 50, the length of the non-contact length between the first doped layer 30 and the second doped layer 50 is less than 5% of the length of the first doped layer 30, for example, 4.5%, 4%, 3.5%, 3%, 2.5%, 2%, etc. That is, in some embodiments, in adjacent first doped layers 30 and second doped layers 50, the contact length between the first doped layer 30 and the second doped layer 50 (i.e., the length in the second direction) is preferably greater than 95% of the length of the first doped layer 30.

[0211] This can further improve the heat spot resistance of the back contact battery 100.

[0212] Specifically, in the embodiments of this application, all the first doped layers 30 may be in at least partial contact with the adjacent second doped layers 50 to form a composite contact structure that resists hot spots, or only some of the first doped layers 30 may be in at least partial contact with the adjacent second doped layers 50 to form a composite contact structure that resists hot spots. No specific limitation is made here.

[0213] In the description of this specification, the references to terms such as "some embodiments," "illustrative embodiments," "examples," "specific examples," or "some examples," etc., indicate that a specific feature, structure, material, or characteristic described in connection with an embodiment or example is included in at least one embodiment or example of this application. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples.

[0214] Furthermore, the above are merely preferred embodiments of this application and are not intended to limit this application. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of this application should be included within the scope of protection of this application.

Claims

1. A back-contact battery, characterized in that, include: A silicon substrate, wherein the back side of the silicon substrate has a plurality of first polar regions and a plurality of second polar regions arranged alternately; A first tunneling layer and a first doped layer are sequentially stacked on the first polar region, wherein the first doped layer is doped with a third group element; and A second tunneling layer and a second doped layer are sequentially stacked on the second polar region, wherein the second doped layer is doped with a Group 5 element; The first tunneling layer is doped with a Group 3 element, and the second tunneling layer is doped with both a Group 3 element and a Group 5 element. The doping concentration of the Group 5 element in the second tunneling layer is 2 to 100 times that of the doping concentration of the Group 3 element in the second tunneling layer.

2. The back contact battery according to claim 1, characterized in that, The third group element is boron, and the fifth group element is phosphorus.

3. The back contact battery according to claim 1, characterized in that, The doping concentration of Group 3 elements in both the first and second tunneling layers is greater than 10. 17 atoms / cm 3 The doping concentration of Group 5 elements in the second tunneling layer is also greater than 10. 17 atoms / cm 3 .

4. The back contact battery according to claim 1, characterized in that, The first tunneling layer contains three elements: silicon, oxygen, and nitrogen.

5. The back contact battery according to claim 4, characterized in that, The first tunneling layer includes at least one of a silicon nitride layer and a silicon oxynitride layer.

6. The back contact battery according to claim 4, characterized in that, The first tunneling layer includes a first silicon oxide layer stacked on the first polar region and a first nitride layer stacked on the first silicon oxide layer, wherein the first nitride layer includes at least one of a silicon nitride layer and a silicon oxynitride layer.

7. The back contact battery according to claim 6, characterized in that, The doping concentration of the third group element in the first nitride layer is greater than that of the third group element in the first silicon oxide layer.

8. The back contact battery according to claim 1, characterized in that, The second tunneling layer contains three elements: silicon, oxygen, and nitrogen.

9. The back contact battery according to claim 8, characterized in that, The second tunneling layer includes at least one of a silicon nitride layer and a silicon oxynitride layer.

10. The back contact battery according to claim 8, characterized in that, The second tunneling layer includes a second silicon oxide layer stacked on the second polar region and a second nitride layer stacked on the second silicon oxide layer, wherein the second nitride layer includes at least one of a silicon nitride layer and a silicon oxynitride layer.

11. The back contact battery according to claim 10, characterized in that, The doping concentration of the third group element in the second nitride layer is greater than that of the third group element in the second silicon oxide layer; the doping concentration of the fifth group element in the second nitride layer is greater than that of the fifth group element in the second silicon oxide layer.

12. The back contact battery according to claim 1, characterized in that, The first tunneling layer and the second tunneling layer are continuous on the back side of the silicon substrate and are formed together in the same process step.

13. The back contact battery according to claim 1, characterized in that, The first doped layer includes a first sub-doped layer and a second sub-doped layer stacked sequentially on a first tunneling layer. The first sub-doped layer is doped with a third group element, and the second sub-doped layer is doped with a third group element and a fifth group element. The doping concentration of the third group element in the second sub-doped layer is greater than the doping concentration of the fifth group element.

14. The back contact battery according to claim 1, characterized in that, A first inner expansion layer is formed at the interface between the silicon substrate and the first tunneling layer, and a second inner expansion layer is formed at the interface between the silicon substrate and the second tunneling layer. The first inner expansion layer is doped with a third group element, and the second inner expansion layer is doped with a third group element and a fifth group element.

15. The back contact battery according to claim 14, characterized in that, The doping concentration of Group 3 elements in the first inner layer is greater than 10. 17 atoms / cm 3 The thickness of some parts is less than 100 nm; The doping concentration of Group 5 elements in the second inner layer is greater than 10. 17 atoms / cm 3 The thickness of some parts is less than 100 nm.

16. The back contact battery according to claim 14, characterized in that, The first inner expansion layer and the second inner expansion layer are in contact within the silicon substrate to form a bulk inter-expansion region within the silicon substrate. The bulk inter-expansion region contains a Group 3 element and a Group 5 element, and the depth of the bulk inter-expansion region is less than 150 nm.

17. The back contact battery according to claim 16, characterized in that, The width of the in vivo inter-diffusion region is 10 nm-2 μm.

18. The back contact battery according to claim 14, characterized in that, The doping concentration of the third group element in the first inner layer is less than the doping concentration of the third group element in the second inner layer.

19. The back contact battery according to claim 1, characterized in that, A plurality of first holes are formed on the first tunneling layer, and a plurality of second holes are formed on the second tunneling layer. The hole density on the second tunneling layer is less than the hole density on the first tunneling layer.

20. The back contact battery according to claim 19, characterized in that, The surface of the first polar region is velvety, and the first polar region has a plurality of first pyramid structures. The first pyramid structure has a first base slope, and the first base slope includes a first region, a second region and a third region arranged sequentially along the direction from the bottom of the first pyramid structure toward the top of the first pyramid structure. The second region is located between the first region and the third region. The pore density of the portion of the first tunneling layer located in the third region is greater than the pore density of the portion of the first tunneling layer located in the second region.

21. The back contact battery according to claim 20, characterized in that, A first inner expansion layer is formed at the interface between the silicon substrate and the first tunneling layer, and the thickness of the portion of the first inner expansion layer corresponding to the third region is greater than the thickness of the portion of the first inner expansion layer corresponding to the second region.

22. The back contact battery according to claim 19, characterized in that, The surface of the second polar region is velvety, and the second polar region has a plurality of second pyramid structures. The second pyramid structure has a second base slope, and the second base slope includes a fourth region, a fifth region, and a sixth region arranged sequentially along the direction from the bottom of the second pyramid structure toward the top of the second pyramid structure. The fifth region is located between the fourth region and the sixth region. The pore density of the portion of the second tunneling layer located in the sixth region is greater than the pore density of the portion of the second tunneling layer located in the fifth region.

23. The back contact battery according to claim 22, characterized in that, A second inner expansion layer is formed at the interface between the silicon substrate and the second tunneling layer, and the thickness of the portion of the second inner expansion layer corresponding to the sixth region is greater than the thickness of the portion of the second inner expansion layer corresponding to the fifth region.

24. The back contact battery according to claim 1, characterized in that, The first polar region and the second polar region are flush, or the height difference between the first polar region and the second polar region is 10nm-100nm; At least one of the first doped layers is in at least partial contact with an adjacent second doped layer to form an external inter-spreading region, wherein the external inter-spreading region contains both a Group 3 element and a Group 5 element, and the first doped layer and the second doped layer form a tunneling composite structure through the external inter-spreading region.

25. The back contact battery according to claim 24, characterized in that, In adjacent first and second doped layers, the length of contact between the first and second doped layers is greater than 80% of the length of the first doped layer.

26. The back contact battery according to claim 25, characterized in that, In the adjacent first doped layer and second doped layer, the length of the first doped layer and the second doped layer that do not contact each other is less than 5% of the length of the first doped layer.

27. The back contact battery according to claim 24, characterized in that, The width of the in vitro inter-spreading region is 10 nm-2 μm.

28. The back contact battery according to claim 24, characterized in that, The depth of the in vitro inter-spreading region is 50nm-500nm.

29. A battery assembly, characterized in that, Includes the back contact battery as described in any one of claims 1-28.

30. A photovoltaic system, characterized in that, Includes the battery assembly as described in claim 29.

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