Direct current converter of a battery pack and method of controlling the same

Abstract

The DC-DC converter of the battery pack of the present invention includes a dual active bridge converter and an equalizer converter, both of which share a first half-bridge circuit, and also includes series-connected battery modules. The equalizer converter includes a filter inductor, a bidirectional switching circuit, and a diode circuit. The two ends of the diode circuit are respectively connected to the two ends of the series-connected battery modules. The midpoint of the diode circuit and one end of the bidirectional switching circuit are both connected to the same end of the filter inductor. The other end of the filter inductor is connected to the series midpoint of the series-connected battery modules. The other end of the bidirectional switching circuit is connected to the midpoint of the bridge arm of the first half-bridge circuit. The two ends of the first half-bridge circuit are respectively connected to the two ends of the diode circuit. The structure is simple, the number of converters is small, and the cost is saved while improving the utilization rate of the components. The control method of the DC-DC converter of the battery pack of the present invention realizes the control method of balanced power regulation between two series-connected battery modules.

Description

Technical Field

[0001] This invention belongs to the technical field of converter control equipment applied to electrochemical energy storage battery charging and discharging power conversion systems, specifically relating to DC converters for battery packs, and also to control methods for DC converters for battery packs. Background Technology

[0002] Battery energy storage systems typically employ multiple individual battery cells to form battery modules (referred to as modules), which are then connected in series to create a high-voltage system. If the State of Charge (SOC) of these series-connected battery modules is unbalanced, and only one module is fully charged or fully discharged, the entire cluster of battery modules will cease operation, reducing battery utilization efficiency and impacting the system's operating time. Therefore, balancing the SOC of battery modules is crucial for improving battery utilization and ensuring system safety and stability.

[0003] In a DC system, a DC-DC converter is added to each battery module. The inner port of the DC-DC converter is connected to the battery module, while the outer port becomes an external port with controllable voltage and power. The charging / discharging power of each battery module can be adjusted by adjusting the power of the DC-DC converter. The power of each battery module is adjusted according to its state of charge (SOC), temperature, and other conditions, facilitating balanced control of the modules. The battery module with the added DC-DC converter is called a power electronic battery pack, or PEP for short.

[0004] Equipping each battery module with an independent DC-DC converter results in an excessive number of switching devices and higher system losses. For example, the invention patent "A Flexible Battery-Powered Transformer Integration System with Dynamic Reconfiguration Function" (CN116094015B, 2023-06-27) proposes a flexible battery-powered transformer integration system where each small battery pack has a corresponding switching circuit, leading to a large number of devices and making loss suppression difficult. The invention patent application "An Energy Storage System, a Control Method for the Energy Storage System, and a Photovoltaic Power Generation System" (CN116349106A, 2023-06-27) faces similar difficulties. It can be observed that there are very few power semiconductors that can meet the power and voltage requirements of PEP (Power Generation Platform) composed of battery packs with fewer than 72 cells, and the power semiconductor switching devices used are difficult to find in large quantities and stably in the near future. Considering the adequacy of device supply and voltage and current utilization, the voltage parameters of the main power devices in the DC-DC converter should be improved. In addition, considering safety and the need for battery PACK to be boosted and connected to the local 750V~1000V DC smart microgrid, this invention proposes a DC-DC converter that connects two series modules to the battery side and realizes balanced control power regulation between the modules. Summary of the Invention

[0005] The purpose of this invention is to provide a DC-DC converter for battery packs, which solves the problems in the prior art where equipping each battery module with an independent DC-DC converter results in too many system switching devices, leading to high system losses and low battery utilization.

[0006] Another objective of this invention is to provide a control method for a DC-DC converter of a battery pack, thereby achieving power balance of the battery module during charging and discharging.

[0007] The technical solution adopted in this invention is that the DC-DC converter of the battery pack includes a dual active bridge converter and an equalization converter, which share the first half-bridge circuit, and also includes a series battery module.

[0008] The equalization converter includes a filter inductor La, a bidirectional switching circuit, and a diode circuit. The two ends of the diode circuit are connected to the two ends of the series battery module, respectively. The midpoint of the diode circuit and one end of the bidirectional switching circuit are both connected to the same end of the filter inductor La. The other end of the filter inductor La is connected to the midpoint of the series connection of the series battery module. The other end of the bidirectional switching circuit is connected to the midpoint of the bridge arm of the first half-bridge circuit.

[0009] The two ends of the first half-bridge circuit are connected to the two ends of the diode circuit, respectively.

[0010] The invention is further characterized in that,

[0011] The dual active bridge converter includes a bus-side circuit, a battery-side full-bridge circuit, a high-frequency transformer T1, a series inductor Lk, and a battery-side filter capacitor C1.

[0012] The battery-side full-bridge circuit includes a second half-bridge circuit. The two ends of the second half-bridge circuit and the two ends of the first half-bridge circuit are each connected to the two ends of the battery-side filter capacitor C1. The two ends of the battery-side filter capacitor C1 are respectively connected to the two ends of the series battery module. The battery-side filter capacitor C1 and the series battery module are connected through a battery-side soft-start circuit.

[0013] The two ends of the primary side of the high-frequency transformer T1 are respectively connected to the midpoint of the first half-bridge circuit arm and the midpoint of the second half-bridge circuit arm.

[0014] The series inductor Lk is connected in series between the primary side of the high-frequency transformer T1 and the midpoint of the bridge arm of the second half-bridge circuit.

[0015] The series battery module includes a first battery module and a second battery module. The negative terminal of the first battery module is connected to the positive terminal of the second battery module. The positive terminal of the first battery module is connected to the positive terminal of the battery-side filter capacitor C1. The negative terminal of the second battery module is connected to the negative terminal of the battery-side filter capacitor C1.

[0016] The positive terminal of the first battery module is connected to the positive terminal of the battery-side filter capacitor, or the negative terminal of the second battery module is connected to the negative terminal of the battery-side filter capacitor via a battery-side soft-start circuit.

[0017] The bus-side circuit adopts a series half-bridge three-level circuit with DC blocking capacitor, an NPC-type three-level half-bridge / full-bridge, a flying capacitor-type three-level half-bridge / full-bridge, or a two-level half-bridge / full-bridge circuit.

[0018] When the bus-side circuit adopts a series half-bridge three-level circuit, it consists of a series half-bridge circuit, a bus capacitor circuit, and a DC blocking capacitor Cb.

[0019] The two ends of the series half-bridge circuit and the two ends of the bus capacitor circuit are respectively connected to the positive and negative terminals of the DC bus.

[0020] The series half-bridge circuit includes two series-connected third half-bridge circuits, and the bus capacitor circuit includes two series-connected bus capacitors; the midpoint of the series connection of the two bus capacitors is connected to the midpoint of the series connection of the two third half-bridge circuits.

[0021] The two ends of the secondary side of the high-frequency transformer T1 are respectively connected to the midpoints of the bridge arms of the two third half-bridge circuits; the DC blocking capacitor Cb is connected in series between the secondary side of the high-frequency transformer T1 and the midpoint of the bridge arm of the third half-bridge circuit closest to the positive terminal of the bus.

[0022] The first half-bridge circuit includes a fully controlled switch Q1 and a fully controlled switch Q2 connected in series;

[0023] The bidirectional switching circuit includes fully controlled switching device QB1 and fully controlled switching device QB2, and QB1 and QB2 are connected in reverse series.

[0024] The diode circuit includes diodes Da1 and Da2 connected in series;

[0025] The second half-bridge circuit includes a fully controlled switch Q3 and a fully controlled switch Q4 connected in series;

[0026] The third half-bridge circuit near the positive terminal of the busbar includes a fully controlled switch Q5 and a fully controlled switch Q6 connected in series;

[0027] The third half-bridge circuit near the negative terminal of the busbar includes a series-connected fully controlled switch Q7 and a fully controlled switch Q8.

[0028] The fully controlled switching devices in the first half-bridge circuit, the second half-bridge circuit, and the third half-bridge circuit are MOSFETs or IGBTs, and are equipped with or have built-in anti-parallel diodes.

[0029] Another technical solution adopted in this invention is a control method for the DC-DC converter of the battery pack, the steps of which are as follows:

[0030] Step 1: Detect the SOC values ​​of the first battery module and the second battery module, and calculate the SOC error;

[0031] Step 2: Determine the operating modes of QB1 and QB2 based on the direction and magnitude of the SOC error;

[0032] Step 3: Calculate the current loop deviation and output the conduction time of QB1 or QB2 via the PI regulator;

[0033] Step 4: Based on the operating mode, conduction time, and Q1 switch signal count of QB1 and QB2, trigger the PWM turn-on or turn-off of QB1 / QB2.

[0034] Another feature of the present invention is that:

[0035] SOC error = SOC2 - SOC1, where SOC2 represents the state of charge of the second battery module and SOC1 represents the state of charge of the first battery module.

[0036] Step 2 is as follows:

[0037] Calculate the reference value of the filter inductor current based on the SOC error;

[0038] The sampled and filtered inductor current is averaged over the switching cycle to obtain the feedback average value of the current loop;

[0039] The deviation between the current reference value and the feedback average value is calculated, and the conduction time of QB1 or QB2 is output through the PI regulator.

[0040] Step 3 specifically involves:

[0041] Mode 1: QB2 remains off, QB1 operates in PWM mode;

[0042] Mode 2: QB1 remains off, QB2 operates in PWM mode;

[0043] Mode 3: Both QB1 and QB2 are turned off, and the equalization function is not enabled;

[0044] When in mode 3, if the SOC error is less than the negative threshold, then switch to mode 2; if the SOC error is greater than the positive threshold, then switch to mode 1; if the absolute value of the SOC error is less than the threshold, then maintain mode 3.

[0045] If you are already in mode 1 and the SOC error is ≤ 0, then switch to mode 3;

[0046] If you are already in Mode 2 and the SOC error is ≥ 0, then switch to Mode 3.

[0047] The beneficial effects of this invention are:

[0048] The DC-DC converter of the battery pack of the present invention enables balanced control of two series-connected battery modules by enabling a local two-level full-bridge converter; the structure is simple, the number of converters is small, saving costs while improving the utilization rate of components.

[0049] The present invention provides a control method for the DC-DC converter of a battery pack, which is a control method for balancing power regulation between two series-connected battery modules. Attached Figure Description

[0050] Figure 1 This is a topology diagram of the DC-DC converter for the battery pack of the present invention;

[0051] Figure 2a This is a waveform diagram illustrating the working principle of the equalization circuit of this invention where the inductor current is greater than zero.

[0052] Figure 2b This is the present invention. Figure 2a A magnified view of the working principle waveform at the Q1Q2 switching cycle level;

[0053] Figure 3a This is a waveform diagram illustrating the working principle of the equalization circuit of the present invention where the inductor current is less than zero.

[0054] Figure 3b This is the present invention. Figure 3a A magnified view of the working principle waveform at the Q1Q2 switching cycle level;

[0055] Figure 4 This is a flowchart of the equalization control process for the two battery modules connected to the equalization converter in the DC-DC converter of the battery pack of the present invention.

[0056] Figure 5 This is a flowchart of the bidirectional switching mode determination process for QB1 and QB2 in the DC-DC converter of the battery pack of the present invention. Detailed Implementation

[0057] The technical solutions in the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments in this application, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the scope of protection of this application.

[0058] Example 1

[0059] The DC-DC converter for the battery pack of the present invention has the following structure: Figure 1 As shown, it includes a dual active bridge DAB converter and an equalizer. The DAB converter and the equalizer do not operate independently; they share the first half-bridge circuit. It also includes a series battery module.

[0060] The equalization converter includes a filter inductor La, a bidirectional switching circuit, and a diode circuit. The two ends of the diode circuit are connected to the two ends of the series battery module, respectively. The midpoint of the diode circuit and one end of the bidirectional switching circuit are both connected to the same end of the filter inductor La. The other end of the filter inductor La is connected to the midpoint of the series connection of the series battery module. The other end of the bidirectional switching circuit is connected to the midpoint of the bridge arm of the first half-bridge circuit.

[0061] The two ends of the first half-bridge circuit are connected to the two ends of the diode circuit, respectively.

[0062] The dual active bridge converter includes a bus-side circuit, a battery-side full-bridge circuit, a high-frequency transformer T1, a series inductor Lk, and a battery-side filter capacitor C1.

[0063] The battery-side full-bridge circuit includes a second half-bridge circuit. The two ends of the second half-bridge circuit and the two ends of the first half-bridge circuit are each connected to the two ends of the battery-side filter capacitor C1. The two ends of the battery-side filter capacitor C1 are respectively connected to the two ends of the series battery module. The battery-side filter capacitor C1 and the series battery module are connected through a battery-side soft-start circuit.

[0064] The two ends of the primary side of the high-frequency transformer T1 are respectively connected to the midpoint of the first half-bridge circuit arm and the midpoint of the second half-bridge circuit arm.

[0065] The series inductor Lk is connected in series between the primary side of the high-frequency transformer T1 and the midpoint of the bridge arm of the second half-bridge circuit.

[0066] Example 2

[0067] Based on Example 1, the series battery module includes a first battery module and a second battery module. The negative terminal of the first battery module is connected to the positive terminal of the second battery module. The positive terminal of the first battery module is connected to the positive terminal of the battery-side filter capacitor C1, and the negative terminal of the second battery module is connected to the negative terminal of the battery-side filter capacitor C1.

[0068] The positive terminal of the first battery module is connected to the positive terminal of the battery-side filter capacitor, or the negative terminal of the second battery module is connected to the negative terminal of the battery-side filter capacitor via a battery-side soft-start circuit.

[0069] Example 3

[0070] Based on Example 2, the bus-side circuit adopts a series half-bridge three-level circuit with DC blocking capacitor, an NPC-type three-level half-bridge / full-bridge, a flying capacitor-type three-level half-bridge / full-bridge, or a two-level half-bridge / full-bridge circuit.

[0071] When the bus-side circuit adopts a series half-bridge three-level circuit, it consists of a series half-bridge circuit, a bus capacitor circuit, and a DC blocking capacitor Cb.

[0072] The two ends of the series half-bridge circuit and the two ends of the bus capacitor circuit are respectively connected to the positive and negative terminals of the DC bus.

[0073] The series half-bridge circuit includes two series-connected third half-bridge circuits, and the bus capacitor circuit includes two series-connected bus capacitors; the midpoint of the series connection of the two bus capacitors is connected to the midpoint of the series connection of the two third half-bridge circuits.

[0074] The two ends of the secondary side of the high-frequency transformer T1 are respectively connected to the midpoints of the bridge arms of the two third half-bridge circuits; the DC blocking capacitor Cb is connected in series between the secondary side of the high-frequency transformer T1 and the midpoint of the bridge arm of the third half-bridge circuit closest to the positive terminal of the bus.

[0075] Example 4

[0076] Based on embodiment 3, the first half-bridge circuit includes a fully controlled switch device Q1 and a fully controlled switch device Q2 connected in series;

[0077] The bidirectional switching circuit includes fully controlled switching device QB1 and fully controlled switching device QB2, and QB1 and QB2 are connected in reverse series.

[0078] The diode circuit includes diodes Da1 and Da2 connected in series;

[0079] The second half-bridge circuit includes a fully controlled switch Q3 and a fully controlled switch Q4 connected in series;

[0080] The third half-bridge circuit near the positive terminal of the busbar includes a fully controlled switch Q5 and a fully controlled switch Q6 connected in series;

[0081] The third half-bridge circuit near the negative terminal of the busbar includes a series-connected fully controlled switch Q7 and a fully controlled switch Q8.

[0082] The fully controlled switching devices in the first half-bridge circuit, the second half-bridge circuit, and the third half-bridge circuit are MOSFETs or IGBTs, and are equipped with or have built-in anti-parallel diodes.

[0083] Example 5

[0084] The control method for the DC-DC converter of the battery pack in Embodiment 4 of the present invention comprises the following steps:

[0085] Step 1: Detect the SOC values ​​of the first battery module and the second battery module, and calculate the SOC error. SOC error = SOC2 - SOC1, where SOC2 represents the state of charge of the second battery module and SOC1 represents the state of charge of the first battery module.

[0086] Step 2: Calculate the current loop deviation and output the conduction time of QB1 or QB2 via the PI regulator; by adjusting the conduction time of QB1 or QB2, the average value of the current of the closed-loop control filter inductor La is obtained, thereby realizing the independent adjustment of the charging and discharging power of the two battery modules.

[0087] Specifically:

[0088] Calculate the reference value of the filter inductor current based on the SOC error;

[0089] The current of the filter inductor La is sampled and averaged over the switching cycle;

[0090] The deviation between the current reference value and the average value is calculated, and the conduction time of QB1 or QB2 is output through the PI regulator.

[0091] Step 3: Determine the operating modes of QB1 and QB2 based on the direction and magnitude of the SOC error;

[0092] Mode 1: QB2 remains off, QB1 operates in PWM mode;

[0093] Mode 2: QB1 remains off, QB2 operates in PWM mode;

[0094] Mode 3: Both QB1 and QB2 are turned off, and the equalization function is not enabled;

[0095] The QB1 and QB2 bidirectional switch modes are in mode 3 by default;

[0096] When the discharge capacity of the first battery module is higher than that of the second battery module, or when the charge capacity of the first battery module is lower than that of the second battery module, i.e., SOC error < negative threshold, then enter mode two: QB1 remains off, QB2 works in PWM mode, making the average current of the filter inductor La negative, increasing the discharge of the first battery module or decreasing its charging.

[0097] When the discharge capacity of the first battery module is lower than that of the second battery module, or when the charge capacity of the first battery module is higher than that of the second battery module, i.e., SOC error > positive threshold, then enter mode one: QB2 remains off, QB1 works in PWM mode, making the average value of the current of the filter inductor La positive, increasing the discharge of the second battery module or decreasing its charging.

[0098] If the absolute value of the SOC error is less than the threshold, then maintain mode three;

[0099] If you are already in mode 1 and the SOC error is ≤ 0, then switch to mode 3;

[0100] If you are already in Mode 2 and the SOC error is ≥ 0, then switch to Mode 3.

[0101] Step 4: Based on the operating mode, conduction time, and Q1 switch signal count of QB1 and QB2, trigger the PWM turn-on or turn-off of QB1 / QB2.

[0102] Example 6

[0103] The DC-DC converter for the battery pack of this invention is a battery module isolated DC-DC converter based on DAB with an added equalization converter, and its structure is as follows: Figure 1 As shown, it consists of a three-level DAB converter and an equalizer, where the Q1Q2 half-bridge is used by both the three-level DAB converter and the equalizer.

[0104] The fully controlled switching devices Q1, Q2, Q3, and Q4 form the full-bridge circuit on the battery side of the DAB circuit, and C1 is the battery-side filter capacitor; the fully controlled switching devices Q5, Q6, Q7, and Q8 form the series half-bridge three-level circuit on the bus side of the DAB circuit, C2 and C3 are the positive and negative bus capacitors, and Cb is the DC blocking capacitor of the series half-bridge; T1 is the high-frequency transformer, and Lk is the transformer leakage inductance or additional series inductance.

[0105] On the DAB bus side, a series half-bridge three-level circuit can be used, in which case a DC blocking capacitor Cb1 is required. Other circuits can also be used, such as an NPC (Neutral Point Clamped) type three-level half-bridge or full-bridge, a flying capacitor type three-level half-bridge or full-bridge, or a two-level half-bridge or full-bridge. One bridge arm Q1Q2 on the DAB battery side is shared with the following equalization converter.

[0106] The structure and connection method of the equalizer are as follows:

[0107] Diodes Da1 and Da2, fully controlled switching devices QB1 and QB2, and Q1 and Q2 constitute the equalization converter, and La is the filter inductor of the equalization converter.

[0108] All semiconductor fully controllable switching devices are not limited in type, but must be equipped with or have an integrated anti-parallel diode. The collector of an IGBT (Insulated Gate Bipolar Transistor) is on the same side as the drain of a MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor), and the emitter of an IGBT is on the same side as the source of a MOSFET. The principle is similar for other devices. The connection method is explained below using the MOSFET electrode as an example.

[0109] Battery module 1 and battery module 2 are connected in series. The negative terminal of battery module 1 is connected to the positive terminal of battery module 2, and the connection point is called the midpoint M. The positive terminal of battery module 1 is connected to the positive terminal of the battery-side filter capacitor C1 through a battery-side soft-start circuit, and the connection point is called the positive terminal P. The negative terminal of battery module 2 is connected to the negative terminal of capacitor C1, and the connection point is called the negative terminal N. Midpoint M is connected to terminal 1 of La. This soft-start circuit may also be connected between the negative terminal of battery module 2 and the negative terminal of capacitor C1.

[0110] MOSFETs QB1 and QB2 (including the anti-parallel diode) are connected in reverse series. Figure 1 In the first case, the drain of QB1 is connected to terminals 2 of inductor La, and the drain of QB2 is connected to the midpoint of the Q1Q2 bridge arm. If the drains of QB1 and QB2 are connected, then the source of QB1 is connected to terminals 2 of inductor La, and the source of QB2 is connected to the midpoint of the Q1Q2 bridge arm. The following description uses the source-connected configuration as an example.

[0111] The anode of diode Da1 is connected to terminal 2 of La, and the cathode of Da1 is connected to point P.

[0112] The cathode of diode Da2 is connected to terminal 2 of La, and the anode of Da2 is connected to point N.

[0113] The drain of Q1 is connected to the P terminal, and its source is connected to the drain of Q2, forming the midpoint of the Q1Q2 bridge arm. The source of Q2 is connected to the N terminal.

[0114] The equalization converter is used to adjust the current entering and exiting at the midpoint of the series connection of two battery modules. The positive direction of the current is defined by the arrow in the figure. This current is the current iLa of the inductor La. The average value of iLa is controlled by the operation of each switching device.

[0115] The connection method of the three-level DAB is existing technology and will not be repeated.

[0116] The working principle of the battery pack DC-DC converter of this invention is as follows:

[0117] When the discharge capacity of battery module 1 is lower than that of battery module 2, or when the charge capacity of battery module 1 is higher than that of battery module 2, to achieve a balance between charge and discharge capacity, the average value of iLa should be in the positive direction. This ensures that battery module 2 discharges more and charges less, while battery module 1 discharges less and charges more. In this case, QB2 remains normally off, while QB1 operates in PWM mode with a switching period of Tsw2. Let Tsw2 >> Tsw1, and Δd < 0.

[0118] The working principle of the equalization circuit is as follows: Figure 2a As shown. The first row is the QB1 drive switch signal, the second row is the drive switch signal for the shared bridge arms Q1 and Q2, the third row is the voltage signal vLa on La, the fourth row is the current signal iLa on La, and the fifth row is the current iDa1 of the freewheeling diode Da1 and the current i_QB1 of QB1. From t0 to t3 is one switching cycle of QB1. During the t0 to t2 stage, QB1 is in the on state. When Q2 is on and Q1 is off, vLa is the second battery module voltage Vbat2, and iLa rises. When Q1 is on and Q2 is off, vLa is the negative first battery module voltage -Vbat1, and iLa falls. Until iLa equals 0, the current is interrupted because QB2 is reverse cut off.

[0119] Since Δd < 0, the duty cycle of Q2 is greater than 0.5, so the conduction time of Q2 is greater than the conduction time of Da1. Therefore, during the conduction time of QB1, as long as Vbat1 and Vbat2 satisfy (0.5 + Δd)Vbat1 < (0.5 - Δd)Vbat2, iLa will increase (i.e., increase positively) in each DAB switching cycle.

[0120] Figure 2b It is Figure 2a Zooming in around time t1 helps observe the details of the Q1Q2 switching cycle. t1 is in the middle of the t0 to t2 phase. At this time, QB1 remains on, and the switching action of Q1Q2 causes the average value of iLa to rise during the Q1Q2 switching cycle. It can be seen that the on-time of Q2 is slightly longer than that of Q1. In specific implementations, the design should be combined with the ratio of the voltages of the two modules to ensure that the volt-second integral of the switching cycle of vLa is greater than 0.

[0121] During the transition from t2 to t3, QB1 is off. From the beginning of t2, the positive current iLa flows through Da1, and vLa is the negative module 1 voltage. The current decreases until it reaches zero, after which Da1 is turned off. This continues until the next switching cycle, t3, begins. Therefore, by adjusting the on-time of QB1, the magnitude of iLa can be controlled. The longer the on-time of QB1, the higher the peak value of iLa, thus achieving power adjustment for charge / discharge balancing.

[0122] DAB operates under phase-shift control. The duty cycle of Q1 is d1, which deviates slightly from 0.5 and is 0.5 + Δd, where Δd > 0.

[0123] The switching states of Q2 and Q1 are complementary. The duty cycle of Q3 is d3, which is the same as d1, also 0.5 + Δd. The switching states of Q4 and Q3 are complementary.

[0124] The DAB switching period is Tsw1, and Tsw1 is generally less than 1ms, but it is possible that it is between 1ms and 5ms.

[0125] Only one of QB1 or QB2 operates in pulse width modulation (PWM) mode. When the discharge capacity of battery module 1 is higher than that of battery module 2, or when the charge capacity of battery module 1 is lower than that of battery module 2, to achieve balanced charge or discharge, the average current direction of La should be negative. This causes battery module 1 to discharge more and charge less, and battery module 2 to discharge less and charge more. In this case, QB1 remains normally off while QB2 operates in PWM mode, with a switching period of Tsw2. Let Tsw2 >> Tsw1, and Δd > 0.

[0126] Figure 3aThis demonstrates the operating principle of the equalization circuit when iLa < 0. The first line shows the QB1 drive switch signal, the second line shows the drive switch signals for the shared bridge arms Q1 and Q2, the third line shows the voltage signal vLa on La, the fourth line shows the current signal iLa on La, and the fifth line shows the current iDa1 of the freewheeling diode Da1 and the current i_QB1 of QB1. From t0 to t3 is one switching cycle of QB1. During the t0 to t2 phase, QB1 is in the on state. When Q2 is on and Q1 is off, vLa is the voltage of module 2, and iLa rises. When Q1 is on and Q2 is off, vLa is the negative voltage of module 1, and iLa falls.

[0127] Figure 3b It is Figure 3a The magnification around time t1 is beneficial for observing the details of the Q1Q2 switching cycle. During the conduction time of QB2, when Q1 is on, the excitation voltage vLa on La is equal to the negative value of the battery module 1 voltage Vbat1 - Vbat1. At this time, the current iLa on La decreases. When Q1 is off, iLa commutates from Q1 to Da2. Da2 conducts, making vLa become the voltage Vbat2 of battery module 2, and iLa starts to rise until iLa equals 0. Since QB1 is reverse cut off, the current is interrupted.

[0128] Since Δd>0, the duty cycle of Q1 is greater than 0.5, so the conduction time of Q1 is greater than the conduction time of Da2. Therefore, during the conduction time of QB2, as long as Vbat1 and Vbat2 satisfy (0.5+Δd)Vbat1>(0.5-Δd)Vbat2, iLa will decrease (i.e. increase negatively) in each DAB switching cycle.

[0129] During the transition from t2 to t3, QB1 is off. From the beginning of t2, the positive current iLa flows through Da1, and vLa is the negative voltage of module 1. The current decreases until it reaches zero, after which Da1 is turned off. This continues until the next switching cycle begins at t3. Therefore, by adjusting the on-time of QB2, the magnitude of iLa can be controlled. The longer the on-time of QB2, the larger the negative peak value of iLa, thus achieving power adjustment for charge / discharge balancing.

[0130] Figure 4 The flowchart for the two-battery module equalization control of this invention is shown below. The control block diagram is executed once per cycle Tsw2, and the various steps are as follows:

[0131] Step 1: SOC difference calculation. Input: SOC1 and SOC2 of two battery modules; Function: Calculate the difference between SOC2 and SOC1 using a subtractor, i.e., SOC error = SOC2 - SOC1, which serves as the trigger for equalization control.

[0132] Stage 2: Proportional Amplification Stage (Kp). Input: SOC error; Function: Amplify the SOC error signal according to the proportional coefficient Kp to obtain the inductor current reference value iLA_Ref, providing a target for subsequent current regulation.

[0133] Step 3: Averaging filter with a period of Tsw2. Input: Detected value of inductor current iLA; Function: Samples the inductor current iLA and averages it over a period of Tsw2 (requiring storage of a corresponding number of sampled values) to obtain iLA_Avg, which serves as the feedback signal for the current loop.

[0134] Step 4: Current Loop Deviation Calculation. Inputs: iLA_Ref (target), iLA_Avg (feedback); Function: Calculates the deviation between the current reference value and the feedback average value, and inputs it to the subsequent regulator.

[0135] Step 5: PI controller for droop coefficient fine-tuning. Input: Current loop deviation; Function: To achieve closed-loop control of the inductor current by adjusting the on-time Nton of the output QB through PI regulation (combined with droop coefficient fine-tuning).

[0136] Step 6: QB1 / QB2 Bidirectional Switch Mode Determination Step. Input: SOC error; Function: Determine the operating mode of the bidirectional switch based on the SOC error.

[0137] Mode 1: QB1 operates in PWM mode, QB2 is blocked;

[0138] Mode 2: QB2 operates in PWM mode, QB1 is blocked;

[0139] Mode 3: QB1 and QB2 are completely blocked.

[0140] Step 7: Q1 switch signal counting step. Input: Q1 switch signal; Function: Count the rising edges of the Q1 switch signal to obtain Nqlr, which is used as one of the trigger conditions for turning on or off.

[0141] Step 8: Tsw2 Periodic Triggering Circuit. Input: On-time Nton, count Nqlr; Function: During the Tsw2 cycle, based on the matching relationship between Nton and Nqlr, trigger the PWM on or off of QB1 / QB2, and finally output the control signals of QB1 and QB2.

[0142] Signal flow:

[0143] Step 1, SOC difference calculation:

[0144] Input: SOC1 of battery module 1, SOC2 of battery module 2;

[0145] Output: SOC error (SOC2-SOC1), passed to stage 2;

[0146] Step 2, scaling up Kp

[0147] Input: SOC error of stage 1 output;

[0148] Output: Inductor current reference value iLA_Ref, passed to stage 4;

[0149] Step 3: Average filtering with a period of Tsw2

[0150] Input: Real-time detection of inductor iLA current;

[0151] Output: The average value of iLA within the Tsw2 period, iLA_Avg, is passed to stage 4;

[0152] Step 4: Calculation of Current Loop Deviation

[0153] Input: iLA_Ref output from stage 2, iLA_Avg output from stage 3;

[0154] Output: Current deviation, i.e., iLA_Ref - iLA_Avg, is passed to stage 5;

[0155] Step 5: Shaft Coefficient Fine-tuning PI Regulator

[0156] Input: Current deviation of the output of stage 4;

[0157] Output: QB conduction time Nton, passed to stage 8;

[0158] Step 6: Determining the bidirectional switch mode of QB1 / QB2

[0159] Input: SOC error of stage 1 output;

[0160] Output: Switch operating mode command (corresponding to mode 1 / 2 / 3), transmitted to stage 8;

[0161] Step 7, Q1 switch signal counting

[0162] Input: Q1 switch signal;

[0163] Output: Q1 rising edge count Nqlr, passed to stage 8;

[0164] Step 8, Tsw2 periodic triggering

[0165] Inputs: Nton output from stage 5, mode command output from stage 6, and Nqlr output from stage 7;

[0166] Outputs: PWM on / off signal for QB1, PWM on / off signal for QB2, controlling the bidirectional switch operation.

[0167] The entire signal flow is as follows: SOC difference → current reference → current feedback → regulator output conduction time → combining the mode instruction and the counting signal → finally controlling the bidirectional switch to achieve SOC balance.

[0168] Figure 5 It is the logical flow of the 6QB1 / QB2 bidirectional switch mode judgment, which is specifically as follows:

[0169] 1) Initial state link

[0170] The 6QB1 / QB2 bidirectional switch mode defaults to mode 3, that is, both QB1 and QB2 are in the fully blocked state;

[0171] The process starts from the default mode 3 and enters the next judgment.

[0172] 2) Mode 3 determination link

[0173] Judge whether the current mode is mode 3. If it is, enter step 3); if not, enter step 4).

[0174] 3) SOC error threshold judgment in mode 3 (negative direction)

[0175] Judge whether the SOC error < SOC balance threshold - Limit. If it is, it is determined to be mode 2, that is, QB2 works according to PWM and QB1 is blocked, and the process ends; if not, enter step 5).

[0176] 4) Mode 1 determination link when not in mode 3

[0177] Judge whether the current mode is mode 1. If it is, enter step 6); if not, it is determined that the current mode is mode 2 and enter step 7).

[0178] 5) SOC error threshold judgment in mode 3 (positive direction) Content: Judge whether the SOC error > Limit. If it is, it is determined to be mode 1, that is, QB1 PWM and QB2 are blocked, and the process ends; if not, maintain mode 3 and the process ends.

[0179] 6) SOC error direction judgment in mode 1

[0180] Judge whether the SOC error ≤ 0. If it is, it is determined to be mode 3 and the process ends; if not, maintain mode 1 and the process ends.

[0181] 7) SOC error direction judgment in mode 2

[0182] Judge whether the SOC error ≥ 0. If it is, it is determined to be mode 3 and the process ends; if not, maintain mode 2 and the process ends.

[0183] The overall logic is as follows: with mode 3 as the default state, switch to mode 1 / 2 based on whether the SOC error exceeds ±Limit; if it is already in mode 1 / 2, determine whether to maintain the current mode based on the direction of the SOC error, otherwise switch back to mode 3.

[0184] The DC-DC converter for the battery pack of the present invention has the following advantages:

[0185] This system provides simultaneous boost conversion for two series-connected battery modules and offers equalization control between them. The equalization converter shares a bridge arm with the DAB, allowing the DAB to provide equalization control current while maintaining its original normal operating state, thus controlling cost increases. An additional bidirectional switching stage operates at a lower switching frequency, resulting in low switching losses. When equalization control is not used, the equalization converter has no losses other than device leakage current.

[0186] The above description is only a preferred embodiment of the present invention, and the scope of protection of the present invention is not limited thereto. Any equivalent substitutions or changes based on the technical solution and concept of the present invention should fall within the scope of protection of the present invention.

Claims

1. A DC-DC converter for a battery pack, characterized in that, It includes a dual active bridge converter and an equalizer, both of which share the first half-bridge circuit, and also includes a series battery module. The equalization converter includes a filter inductor, a bidirectional switching circuit, and a diode circuit. The two ends of the diode circuit are respectively connected to the two ends of the series battery module. The midpoint of the diode circuit and one end of the bidirectional switching circuit are both connected to the same end of the filter inductor. The other end of the filter inductor is connected to the series midpoint of the series battery module. The other end of the bidirectional switching circuit is connected to the midpoint of the bridge arm of the first half-bridge circuit. The two ends of the first half-bridge circuit are connected to the two ends of the diode circuit respectively. The diode circuit includes diodes Da1 and Da2 connected in series; the anode of diode Da1 is connected to the end of the filter inductor away from the battery module, the cathode of Da1 is connected to the positive terminal of the series battery module, the cathode of diode Da2 is connected to the end of the filter inductor away from the battery module, and the anode of Da2 is connected to the negative terminal of the series battery module.

2. The DC-DC converter for the battery pack according to claim 1, characterized in that, The dual active bridge converter includes a bus-side circuit, a battery-side full-bridge circuit, a high-frequency transformer, a series inductor, and a battery-side filter capacitor. The battery-side full-bridge circuit includes a second half-bridge circuit. The two ends of the second half-bridge circuit and the two ends of the first half-bridge circuit are each connected to the two ends of the battery-side filter capacitor. The two ends of the battery-side filter capacitor are respectively connected to the two ends of the series battery module. The battery-side filter capacitor and the series battery module are connected through a battery-side soft-start circuit. The two ends of the primary side of the high-frequency transformer are respectively connected to the midpoint of the first half-bridge circuit arm and the midpoint of the second half-bridge circuit arm. The series inductor is connected in series between the primary side of the high-frequency transformer and the midpoint of the second half-bridge circuit arm.

3. The DC-DC converter for the battery pack according to claim 2, characterized in that, The series battery module is composed of a first battery module and a second battery module connected in series. The negative terminal of the first battery module is connected to the positive terminal of the second battery module. The positive terminal of the first battery module is connected to the positive terminal of the battery-side filter capacitor, and the negative terminal of the second battery module is connected to the negative terminal of the battery-side filter capacitor. The positive terminal of the first battery module is connected to the positive terminal of the battery-side filter capacitor, or the negative terminal of the second battery module is connected to the negative terminal of the battery-side filter capacitor via a battery-side soft-start circuit.

4. The DC-DC converter for the battery pack according to claim 2, characterized in that, The bus-side circuit adopts a series half-bridge three-level circuit with DC blocking capacitor, an NPC-type three-level half-bridge / full-bridge, a flying capacitor-type three-level half-bridge / full-bridge, or a two-level half-bridge / full-bridge circuit.

5. The DC-DC converter for the battery pack according to claim 4, characterized in that, When the bus-side circuit adopts a series half-bridge three-level circuit, it consists of a series half-bridge circuit, a bus capacitor circuit, and a DC blocking capacitor. The two ends of the series half-bridge circuit and the two ends of the bus capacitor circuit are respectively connected to the positive and negative terminals of the DC bus. The series half-bridge circuit includes two series-connected third half-bridge circuits, and the bus capacitor circuit includes two series-connected bus capacitors; the midpoint of the series connection of the two bus capacitors is connected to the midpoint of the series connection of the two third half-bridge circuits. The two ends of the secondary side of the high-frequency transformer are respectively connected to the midpoints of the bridge arms of the two third half-bridge circuits; the DC blocking capacitor is connected in series between the secondary side of the high-frequency transformer and the midpoint of the bridge arm of the third half-bridge circuit closest to the positive terminal of the bus.

6. The DC-DC converter for the battery pack according to claim 5, characterized in that, The first half-bridge circuit includes a fully controlled switch Q1 and a fully controlled switch Q2 connected in series; The bidirectional switching circuit includes a fully controlled switching device QB1 and a fully controlled switching device QB2, and QB1 and QB2 are connected in reverse series. The second half-bridge circuit includes a fully controlled switch Q3 and a fully controlled switch Q4 connected in series; The third half-bridge circuit near the positive terminal of the busbar includes a fully controlled switch Q5 and a fully controlled switch Q6 connected in series. The third half-bridge circuit near the negative terminal of the busbar includes a fully controlled switch Q7 and a fully controlled switch Q8 connected in series.

7. The DC-DC converter for the battery pack according to claim 6, characterized in that, The fully controlled switching devices in the first half-bridge circuit, the second half-bridge circuit, and the third half-bridge circuit are MOSFETs or IGBTs, and each is equipped with or has its own anti-parallel diode.

8. The control method for the DC-DC converter of the battery pack as described in claim 6 or 7, characterized in that, The steps are as follows: Step 1: Detect the SOC values ​​of the first battery module and the second battery module, and calculate the SOC error; Step 2: Calculate the current loop deviation and output the conduction time of QB1 or QB2 via the PI regulator; Step 3: Determine the operating modes of QB1 and QB2 based on the direction and magnitude of the SOC error; Step 4: Based on the operating mode, conduction time, and Q1 switch signal count of QB1 and QB2, trigger the PWM turn-on or turn-off of QB1 / QB2.

9. The control method for the DC-DC converter of the battery pack according to claim 8, characterized in that, The SOC error = SOC2 - SOC1, where SOC2 represents the state of charge of the second battery module and SOC1 represents the state of charge of the first battery module. Step 2 specifically involves: Calculate the reference value of the filter inductor current based on the SOC error; The sampled and filtered inductor current is averaged over the switching cycle to obtain the feedback average value of the current loop; The deviation between the current reference value and the feedback average value is calculated, and the conduction time of QB1 or QB2 is output through the PI regulator.

10. The control method for the DC-DC converter of the battery pack according to claim 9, characterized in that, Step 3 specifically involves: Mode 1: QB2 remains off, QB1 operates in PWM mode; Mode 2: QB1 remains off, QB2 operates in PWM mode; Mode 3: Both QB1 and QB2 are turned off, and the equalization function is not enabled; When in mode 3, if the SOC error is less than the negative threshold, then switch to mode 2; if the SOC error is greater than the positive threshold, then switch to mode 1; if the absolute value of the SOC error is less than the threshold, then maintain mode 3. If you are already in mode 1 and the SOC error is ≤ 0, then switch to mode 3; If you are already in Mode 2 and the SOC error is ≥ 0, then switch to Mode 3.

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