Reference voltage source circuit with low power consumption and wide temperature application range

Abstract

The invention provides a reference voltage source circuit with low power consumption and a wide temperature application range. The reference voltage source circuit mainly comprises a reference core circuit and a feedback voltage stabilizing circuit, current compensation is carried out by utilizing leakage current of a parasitic diode of an MOS (Metal Oxide Semiconductor) tube in a reference core circuit, so that a wide temperature application range is realized; according to the invention, the structure of the reference core circuit is simplified, so that low power consumption is realized; according to the invention, the feedback voltage stabilizing circuit is arranged to improve the anti-interference capability of the power supply, so that the precision of the output voltage of the power supply is improved; the reference core circuit can generate a pre-reference voltage Ue in a wide temperature range and output the pre-reference voltage Ue to the feedback voltage stabilizing circuit; the feedback voltage stabilizing circuit resists interference of working voltage fluctuation and circuit noise, stabilizes pre-reference voltage Ue in a negative feedback mode and outputs stable reference voltage Uo.

Description

Technical Field

[0001] This invention relates to the field of electronic circuit technology, and more specifically, to a low-power, wide-temperature-range reference voltage source circuit. Background Technology

[0002] Reference voltage source circuits are widely used in highly integrated electronic circuit systems with long operating ranges. However, the minimum operating voltage of traditional reference voltage source circuits is typically no less than 0.5V, which hinders the use of ultra-low voltage power supplies to achieve long operating ranges. Furthermore, some electronic circuit systems require operation in high-temperature environments. High temperatures can alter the characteristics of the circuit components in the reference voltage source circuit, thus affecting its stable operation. The primary function of a reference voltage source circuit is to provide a stable reference voltage for electronic circuit systems; however, variations in power supply voltage and circuit noise (such as coupling noise, thermal noise, flicker noise, and electromagnetic radiation) can affect the accuracy of the reference voltage source circuit's output voltage, thereby impacting the performance of the entire circuit system. Summary of the Invention

[0003] The problem addressed by this invention is to propose a low-power, wide-temperature-range reference voltage source circuit. This wide-temperature-range application is achieved by utilizing the leakage current of the parasitic diode in the MOSFET core circuit for current compensation. The invention achieves low power consumption by simplifying the structure of the reference core circuit. Furthermore, the invention improves its anti-interference capability by incorporating a feedback voltage regulator circuit, thereby enhancing the accuracy of the output voltage.

[0004] To address the aforementioned issues, this invention proposes a low-power, wide-temperature-range reference voltage source circuit, comprising a reference core circuit and a feedback voltage regulator circuit.

[0005] The reference core circuit is connected to the feedback regulator circuit. The reference core circuit can generate a pre-reference voltage Ue over a wide temperature range and output it to the feedback regulator circuit. The reference core circuit provides a stable operating voltage Usn and bias voltage Ub to the feedback regulator circuit.

[0006] The feedback voltage regulator circuit resists interference from operating voltage fluctuations and circuit noise, stabilizes the pre-reference voltage Ue in the form of negative feedback, and outputs a stable reference voltage Uo.

[0007] The reference core circuit includes ports Vdd, Vus, Vef, and Vbs.

[0008] The feedback voltage regulator circuit includes ports Vcn, Vrf, Ve, and Vou.

[0009] Port Vdd is used to receive the power supply voltage Ucc.

[0010] Port Vus is connected to port Vcn to transmit the operating voltage Usen.

[0011] Port Vef is connected to port Vrfn and is used to transmit the pre-reference voltage Ue.

[0012] Port Vbs is connected to port Ve to transmit the bias voltage Ub.

[0013] Port Vou is used to output the reference voltage Uo.

[0014] The core circuit of the reference circuit includes a power supply circuit and a reference generation circuit.

[0015] The power supply circuit is connected to the reference generation circuit. The power supply circuit regulates the input power supply voltage Ucc and provides the operating voltage Usn to the reference generation circuit. During the rising phase of the power supply voltage Ucc, the power supply circuit provides bias current to the reference generation circuit, assisting it in stabilizing and entering normal operating condition.

[0016] The reference generation circuit can operate normally at a working voltage of 0.3V Usn and can stably generate a pre-reference voltage Ue over a wide temperature range.

[0017] A feedback voltage regulator circuit includes a bias circuit and a negative feedback circuit.

[0018] The bias circuit is connected to the negative feedback circuit. The bias circuit provides a bias voltage to the negative feedback circuit, enabling it to function properly.

[0019] The negative feedback circuit regulates the received pre-reference voltage Ue to resist the interference of operating voltage fluctuations and circuit noise on the accuracy of the output voltage, and outputs a reference voltage Uo.

[0020] Compared with existing technologies, the beneficial effects of this invention are as follows: This invention proposes a low-power, wide-temperature-range reference voltage source circuit, which includes a reference core circuit and a feedback regulator circuit. The reference core circuit can generate a pre-reference voltage Ue over a wide temperature range and output it to the feedback regulator circuit. The feedback regulator circuit resists interference from operating voltage fluctuations and circuit noise, stabilizes the pre-reference voltage Ue in the form of negative feedback, and outputs a stable reference voltage Uo. This invention achieves its wide temperature range by utilizing the leakage current of the parasitic diode of the MOSFET in the reference core circuit for current compensation. This invention achieves its low power consumption by simplifying the structure of the reference core circuit. Attached Figure Description

[0021] Figure 1 This is a schematic diagram of the system structure of the present invention; Figure 2 This is a schematic diagram of the principle structure of the reference core circuit of the present invention; Figure 3 This is a schematic diagram of the feedback voltage regulator circuit of the present invention.

[0022] Explanation of reference numerals in the attached figures: 10 - Reference core circuit; 20 - Feedback voltage regulator circuit; 101 - Power supply circuit; 102 - Reference generation circuit; 201 - Bias circuit; 202 - Negative feedback circuit. Detailed Implementation

[0023] To make the above-mentioned objects, features and advantages of the present invention more apparent and understandable, specific embodiments of the present invention will be described in detail below with reference to the accompanying drawings.

[0024] like Figure 1 As shown, a low-power, wide-temperature-range reference voltage source circuit includes a reference core circuit 10 and a feedback voltage regulator circuit 20.

[0025] The reference core circuit 10 is connected to the feedback regulator circuit 20. The reference core circuit 10 can generate a pre-reference voltage Ue over a wide temperature range and output it to the feedback regulator circuit 20. The reference core circuit 10 provides a stable operating voltage Usn and bias voltage Ub to the feedback regulator circuit 20. The feedback regulator circuit 20 resists interference from operating voltage fluctuations and circuit noise, stabilizes the pre-reference voltage Ue in the form of negative feedback, and outputs a stable reference voltage Uo.

[0026] The reference core circuit 10 includes ports Vdd, Vus, Vef, and Vbs. The feedback regulator circuit 20 includes ports Vcn, Vrf, Ve, and Vou.

[0027] Port Vdd is used to receive the power supply voltage Ucc. Port Vus is connected to port Vcn and is used to transmit the operating voltage Usn. Port Vef is connected to port Vrfn and is used to transmit the pre-reference voltage Ue. Port Vbs is connected to port Ve and is used to transmit the bias voltage Ub. Port Vou is used to output the reference voltage Uo.

[0028] like Figure 1 As shown, the reference core circuit 10 includes a power supply circuit 101 and a reference generation circuit 102.

[0029] The power supply circuit 101 is connected to the reference generation circuit 102. The power supply circuit 101 regulates the input power supply voltage Ucc and provides the operating voltage Usn to the reference generation circuit 102. During the rising phase of the power supply voltage Ucc, the power supply circuit 101 provides bias current to the reference generation circuit 102, assisting the reference generation circuit 102 in stabilizing and entering normal operating mode. The reference generation circuit 102 can operate normally at a 0.3V operating voltage Usn and can stably generate a pre-reference voltage Ue over a wide temperature range.

[0030] like Figure 1 As shown, the feedback voltage regulator circuit 20 includes a bias circuit 201 and a negative feedback circuit 202.

[0031] The bias circuit 201 is connected to the negative feedback circuit 202. The bias circuit 201 provides a bias voltage to the negative feedback circuit 202, enabling the negative feedback circuit 202 to operate normally. The negative feedback circuit 202 regulates the received pre-reference voltage Ue, resisting the interference of operating voltage fluctuations and circuit noise on the accuracy of the output voltage, and outputs a reference voltage Uo.

[0032] like Figure 2 As shown, the power supply circuit 101 includes MOSFETs M1, M2, M3, M4, M5, M6, and M7, port Vdd, port Vbs, resistor R1, capacitor C1, and current source IS1.

[0033] The drain of MOSFET M1 is connected to port Vdd. The gate of MOSFET M1 is connected to the upper end of capacitor C1, and the lower end of capacitor C1 is grounded. The source of MOSFET M1 is connected to the drain of MOSFET M2. The drain of MOSFET M2 is connected to the source of MOSFET M1, the gate of MOSFET M2 is connected to the drain of MOSFET M2, and the source of MOSFET M2 is connected to the source of MOSFET M4. The upper end of resistor R1 is connected to the drain of MOSFET M1, and the lower end of resistor R1 is connected to the gate of MOSFET M1.

[0034] The upper end of current source IS1 is connected to port Vdd, and the lower end of current source IS1 is connected to the drain of MOSFET M3. The drain of MOSFET M3 is connected to the lower end of current source IS1, the gate of MOSFET M3 is connected to the gate of MOSFET M6, the gate of MOSFET M3 is connected to port Vbs, and the source of MOSFET M3 is grounded. The source of MOSFET M4 is connected to the source of MOSFET M2, the gate of MOSFET M4 is connected to the drain of MOSFET M10, and the drain of MOSFET M4 is connected to the source of MOSFET M5. The source of MOSFET M5 is connected to the drain of MOSFET M4, the gate of MOSFET M5 is connected to the drain of MOSFET M5, and the drain of MOSFET M5 is connected to the drain of MOSFET M6. The drain of MOSFET M6 is connected to the drain of MOSFET M5, the gate of MOSFET M6 is connected to the drain of MOSFET M3, and the source of MOSFET M6 is grounded. The source of MOSFET M7 is connected to the source of MOSFET M4, the gate of MOSFET M7 is connected to the drain of MOSFET M4, and the drain of MOSFET M7 is connected to the drain of MOSFET M8.

[0035] The circuit structure, consisting of interconnected MOSFETs M1 and M2, resistor R1, capacitor C1, and port Vdd, isolates interference from the power supply voltage Ucc and provides a stable operating voltage Usn for subsequent circuits. The power supply voltage Ucc biases the gate of MOSFET M1 through resistor R1 and capacitor C1. Because the connection between resistor R1 and capacitor C1 has a filtering function, MOSFET M1 obtains a relatively stable gate bias voltage. MOSFETs M1 and M2 act as voltage clamps, and the gate-source voltage of MOSFET M2 is used as the operating voltage Usn to supply subsequent circuits and the reference generation circuit 102, thereby preventing high-frequency noise from the power supply voltage Ucc from directly coupling into the subsequent circuits and the reference generation circuit 102.

[0036] The circuit connection structure of MOSFETs M3, M4, M5, M6, and M7, current source IS1, and port Vbs provides high-stability biasing. When the power supply voltage Ucc appears and rises, current source IS1 starts working, providing stable bias current for MOSFETs M3 and M6. MOSFET M3 uses its gate-source voltage as the bias voltage Ub, which is output through port Vbs. After MOSFET M6 turns on, it pulls down the gate voltage of MOSFET M7 through MOSFET M5, thereby turning on MOSFET M7.

[0037] The source of MOSFET M7 is connected to the operating voltage Usn, and the drain of MOSFET M7 is connected to the gates of MOSFETs M9 and M10. When MOSFET M7 is turned on, it injects current into MOSFETs M9 and M10, enabling them to stably enter their operating state and thus driving the reference generation circuit 102 to operate normally. This process can still drive the reference generation circuit 102 to stably enter its operating state and output a pre-reference voltage Ue, even when the power supply voltage Ucc is rising slowly, overcoming the problem that traditional reference voltage source circuit systems cannot handle slowly rising power supply voltages. After the reference generation circuit 102 is operating normally, it will turn on MOSFET M4, thereby pulling up the gate voltage of MOSFET M7 and turning off MOSFET M7 to prevent current injection into MOSFETs M9 and M10, thus reducing system power consumption.

[0038] like Figure 2 The reference generation circuit 102 shown includes MOSFETs M8, M9, M10, and M11, a parasitic substrate diode D1, port Vus, and port Vef.

[0039] The source of MOSFET M8 is connected to the source of MOSFET M7, the gate of MOSFET M8 is connected to the source of MOSFET M8, the gate of MOSFET M8 is connected to port Vus, and the drain of MOSFET M8 is connected to the drain of MOSFET M9. The drain of MOSFET M9 is connected to the drain of MOSFET M8, the gate of MOSFET M9 is connected to the drain of MOSFET M9, and the source of MOSFET M9 is grounded. The source of MOSFET M10 is connected to the drain of MOSFET M8, the gate of MOSFET M10 is connected to the source of MOSFET M10, and the drain of MOSFET M10 is connected to the drain of MOSFET M11. The cathode of parasitic substrate diode D1 is connected to the source of MOSFET M10, and the anode of parasitic substrate diode D1 is connected to the drain of MOSFET M10. The drain of MOSFET M11 is connected to port Vef, the gate of MOSFET M11 is connected to the drain of MOSFET M11, and the source of MOSFET M11 is grounded.

[0040] The source of MOSFET M8 is connected to its own gate and is also connected to the source of MOSFET M2. Under the operating voltage Usn, MOSFET M8 is in the off state, and the drain current Id8 of MOSFET M8 (the reverse saturation current generated by the reverse bias of the PN junction inside MOSFET M8) provides bias for MOSFETs M9, M10, and M11. MOSFET M9 is connected in the form of a diode and has a sufficiently small aspect ratio, making the connection node Qn1 between the drain of MOSFET M8 and the drain of MOSFET M9 a low-impedance node. This reduces power consumption while also providing a sufficiently large bias voltage for the gate and source of MOSFET M10.

[0041] The gate of MOSFET M10 is connected to its source, and the gate of MOSFET M11 is connected to its drain. The drain of MOSFET M11 is grounded. MOSFET M10 draws a portion of its drain current Id8 to provide load current for MOSFET M11, thereby generating a pre-reference voltage Ue (the gate-source voltage of MOSFET M11), which is output through port Vef. The expressions for the current Is10 flowing through MOSFET M10 and the current Is11 flowing through MOSFET M11 are shown below.

[0042] ; In the formula, u is the carrier mobility of the MOSFET, COX is the gate oxide capacitance per unit area of ​​the MOSFET, Wm10 is the conductive channel width of the MOSFET M10, Lm10 is the conductive channel length of the MOSFET M10, G is the subthreshold slope factor of the MOSFET, Us is the thermal voltage, and Vtm10 is the threshold voltage of the MOSFET M10.

[0043] ; In the formula, COX is the gate oxide capacitance per unit area of ​​the MOSFET, u is the carrier mobility of the MOSFET, Wm11 is the conductive channel width of the MOSFET M11, Lm11 is the conductive channel length of the MOSFET M11, G is the subthreshold slope factor of the MOSFET, Us is the thermal voltage, Vtm11 is the threshold voltage of the MOSFET M11, and Ue is the pre-reference voltage output by the reference generation circuit 102.

[0044] The channel lengths Lm10 and Lm11 of MOSFET M10 are set to 15 micrometers and 20 micrometers respectively to suppress the influence of short-channel effects on the temperature coefficient of the pre-reference voltage. Based on the expressions for currents Is10 and Is11, and the branch connection relationship between MOSFETs M10 and M11, the expression for the pre-reference voltage Ue can be derived as follows.

[0045] ; In the formula, Vtm10 is the threshold voltage of MOSFET M10, Vtm11 is the threshold voltage of MOSFET M11, G is the subthreshold slope factor of MOSFET, Us is the thermal voltage, Wm10 is the conductive channel width of MOSFET M10, and Wm11 is the conductive channel width of MOSFET M11.

[0046] The sum of the first and second terms in the expression for the pre-reference voltage Ue, i.e., "Vtm10 + Vth11", has a negative temperature coefficient. The third term in the expression for the pre-reference voltage Ue has a positive temperature coefficient. Therefore, by adjusting the conductive channel widths Wm10 of MOSFET M10 and Wm11 of MOSFET M11, precise complementarity between the positive and negative temperature coefficient terms in the pre-reference voltage Ue can be achieved, making the temperature coefficient of the pre-reference voltage Ue close to zero. Since the reference generation circuit 102 uses the leakage current of the MOSFETs for biasing and has a very simple circuit structure, the reference generation circuit 102 can generate the pre-reference voltage Ue at a working voltage of 0.3V Usn.

[0047] When the reference voltage source circuit operates in a high-temperature environment, the reverse diode formed between the drain of the N-type MOSFET and ground draws current from the reference voltage output terminal, causing the reference voltage to drop. In the reference generation circuit 102, there is a parasitic substrate diode D1 between the drain of MOSFET M11 and the N-well of node Qn1, and a leakage current Id1 flows from the substrate of MOSFET M10 to the drain of MOSFET M11 through the parasitic substrate diode D1. When the operating ambient temperature is low, the value of the leakage current Id1 is very small and does not affect the pre-reference voltage Ue. When the operating ambient temperature is high, the leakage current Id1 increases, compensating for the output current drawn by MOSFET M11 due to the high-temperature environment, thereby keeping the pre-reference voltage Ue stable and preventing it from dropping. Based on the circuit structure of the reference generation circuit 102, this invention can generate a stable reference voltage in both low-temperature and high-temperature operating environments, thus achieving a wide temperature range for the reference voltage source circuit.

[0048] like Figure 3 As shown, the bias circuit 201 includes MOSFETs M12, M13, M14, and M21, port Vcn, and port Ve.

[0049] The source of MOSFET M12 is connected to port Vcn, and the gate of MOSFET M12 is connected to the drain of MOSFET M12. The drain of MOSFET M12 is connected to the source of MOSFET M13. The source of MOSFET M13 is connected to the drain of MOSFET M12, and the gate of MOSFET M13 is connected to the drain of MOSFET M13. The drain of MOSFET M13 is connected to the drain of MOSFET M14. The drain of MOSFET M14 is connected to the gate of MOSFET M13, and the gate of MOSFET M14 is connected to port Ve. The source of MOSFET M14 is grounded. The drain of MOSFET M21 is connected to the source of MOSFET M20, and the gate of MOSFET M21 is connected to the gate of MOSFET M14. The source of MOSFET M21 is grounded.

[0050] Port Vcn is connected to port Vus to receive the operating voltage Usn. Under the bias of the operating voltage Usn, both MOSFETs M12 and M13 operate in the subthreshold region. MOSFET M12 provides bias to MOSFETs M16 and M22 in the negative feedback circuit 202 via a current mirror structure. MOSFET M13 provides bias to MOSFETs M17 and M23 in the negative feedback circuit 202 via a current mirror structure. Port Ve is connected to port Vbs to receive the bias voltage Ub. The gate of MOSFET M14 is connected to port Ve to obtain the bias voltage Ub, enabling it to operate in the subthreshold region. MOSFETs M14 and M21 are connected via a current mirror structure. MOSFETs M21 and M20 are connected in the same branch, providing a bias current Ib21 to the negative feedback circuit 202.

[0051] like Figure 3 As shown, the negative feedback circuit 202 includes MOSFETs M15, M16, M17, M18, M19, M20, M22, M23, M24, and M25, port Vrf, and port Vou.

[0052] The drain of MOSFET M15 is connected to the drain of MOSFET M16, the gate of MOSFET M15 is connected to port Vrf, and the source of MOSFET M15 is connected to the source of MOSFET M20. The source of MOSFET M16 is connected to the source of MOSFET M12, the gate of MOSFET M16 is connected to the gate of MOSFET M12, and the drain of MOSFET M16 is connected to the source of MOSFET M17. The source of MOSFET M17 is connected to the drain of MOSFET M15, the gate of MOSFET M17 is connected to the gate of MOSFET M13, and the drain of MOSFET M17 is connected to the drain of MOSFET M18. The drain of MOSFET M18 is connected to the drain of MOSFET M17, the gate of MOSFET M18 is connected to the gate of MOSFET M24, and the source of MOSFET M18 is connected to the drain of MOSFET M19. The drain of MOSFET M19 is connected to the source of MOSFET M18, the gate of MOSFET M19 is connected to the gate of MOSFET M25, and the source of MOSFET M19 is grounded.

[0053] The drain of MOSFET M20 is connected to the drain of MOSFET M22, the gate of MOSFET M20 is connected to the drain of MOSFET M23, and the source of MOSFET M20 is connected to the source of MOSFET M15. The source of MOSFET M22 is connected to the source of MOSFET M16, the gate of MOSFET M22 is connected to the gate of MOSFET M16, and the drain of MOSFET M22 is connected to the source of MOSFET M23. The source of MOSFET M23 is connected to the drain of MOSFET M20, the gate of MOSFET M23 is connected to the gate of MOSFET M17, and the drain of MOSFET M23 is connected to the drain of MOSFET M24. The drain of MOSFET M24 is connected to port Vou, the gate of MOSFET M24 is connected to the drain of MOSFET M18, and the source of MOSFET M24 is connected to the drain of MOSFET M25. The drain of MOSFET M25 is connected to the source of MOSFET M24, the gate of MOSFET M25 is connected to the drain of MOSFET M19, and the source of MOSFET M25 is grounded.

[0054] MOSFETs M16, M17, M22, and M23 are connected to form an active load, converting the current in the branches containing MOSFETs M22 and M23 into a reference voltage Uo, which is then output through port Vou. MOSFETs M18, M19, M24, and M25 are interconnected, forming a circuit structure with output current enhancement functionality. When the load connected to port Vou changes, causing the reference voltage Uo to drop, the circuit structure formed by MOSFETs M18, M19, M24, and M25 can provide a sufficiently large output current, enabling rapid adjustment of the reference voltage Uo and thus maintaining its stability at the set value. The gate of MOSFET M20 is connected to port Vou, feeding the reference voltage Uo back to the negative feedback circuit 202 as feedback. Based on the circuit structure of the negative feedback circuit 202, the reference voltage Uo and the pre-reference voltage Ue have a voltage following relationship. By adjusting the parameters of the MOSFET in the negative feedback circuit 202, the reference voltage Uo is made equal to the pre-reference voltage Ue when the input impedance of the negative feedback circuit 202 is close to infinity.

[0055] Port Vrf is connected to port Vef to receive the pre-reference voltage Ue. The gate of MOSFET M15 is connected to port Vrf, introducing the pre-reference voltage Ue into the negative feedback circuit 202. When operating voltage fluctuations and circuit noise interference cause the reference voltage Uo to be less than the pre-reference voltage Ue, the gate voltage of MOSFET M15 (pre-reference voltage Ue) will be higher than the gate voltage of MOSFET M20 (reference voltage Uo). Consequently, the drain current of MOSFET M15 will increase, and the drain voltage of MOSFET M20 will decrease, thus suppressing the influence of operating voltage fluctuations and circuit noise on the reference voltage Uo and the pre-reference voltage Ue. When operating voltage fluctuations and circuit noise interference cause the reference voltage Uo to be greater than the pre-reference voltage Ue, the gate voltage of MOSFET M15 (pre-reference voltage Ue) will be lower than the gate voltage of MOSFET M20 (reference voltage Uo). Consequently, the drain current of MOSFET M15 will decrease, and the drain voltage of MOSFET M20 will increase, in order to suppress the influence of operating voltage fluctuations and circuit noise on the reference voltage Uo and the pre-reference voltage Ue, so that the reference voltage Uo and the pre-reference voltage Ue remain stable.

Claims

1. A low-power, wide-temperature-range reference voltage source circuit, characterized in that, It includes a reference core circuit (10) and a feedback voltage regulator circuit (20); The reference core circuit (10) is connected to the feedback regulator circuit (20). The reference core circuit (10) can generate a pre-reference voltage Ue over a wide temperature range and output it to the feedback regulator circuit (20). The reference core circuit (10) provides a stable operating voltage Usn and bias voltage Ub for the feedback voltage regulator circuit (20); The feedback voltage regulator circuit (20) resists the interference of working voltage fluctuations and circuit noise, stabilizes the pre-reference voltage Ue in the form of negative feedback, and outputs a stable reference voltage Uo.

2. The low-power, wide-temperature-range reference voltage source circuit according to claim 1, characterized in that, The reference core circuit (10) includes a power supply circuit (101) and a reference generation circuit (102). The power supply circuit (101) is connected to the reference generation circuit (102). The power supply circuit (101) regulates the input power supply voltage Ucc and provides the working voltage Usn to the reference generation circuit (102). The power supply circuit (101) provides bias current to the reference generation circuit (102) during the rising phase of the power supply voltage Ucc, which helps the reference generation circuit (102) to stably enter the normal working state. The reference generation circuit (102) can operate normally at a working voltage of 0.3V Usn and can stably generate a pre-reference voltage Ue over a wide temperature range.

3. The low-power, wide-temperature-range reference voltage source circuit according to claim 1, characterized in that, The feedback voltage regulator circuit (20) includes a bias circuit (201) and a negative feedback circuit (202); The bias circuit (201) is connected to the negative feedback circuit (202). The bias circuit (201) provides a bias voltage to the negative feedback circuit (202) so that the negative feedback circuit (202) can work normally. The negative feedback circuit (202) regulates the received pre-reference voltage Ue to resist the interference of working voltage fluctuations and circuit noise on the accuracy of the output voltage, and outputs the reference voltage Uo.

4. The low-power, wide-temperature-range reference voltage source circuit according to claim 2, characterized in that, The power supply circuit (101) includes MOSFET M1, MOSFET M2, resistor R1, capacitor C1, and port Vdd; The drain of MOSFET M1 is connected to the port Vdd. The gate of MOSFET M1 is connected to the upper end of capacitor C1, and the lower end of capacitor C1 is grounded. The source of MOSFET M1 is connected to the drain of MOSFET M2. The drain of MOSFET M2 is connected to the source of MOSFET M1. The gate of MOSFET M2 is connected to the drain of MOSFET M2. The source of MOSFET M2 is connected to the source of MOSFET M4. The upper end of resistor R1 is connected to the drain of MOSFET M1, and the lower end of resistor R1 is connected to the gate of MOSFET M1.

5. The low-power, wide-temperature-range reference voltage source circuit according to claim 2, characterized in that, The power supply circuit (101) includes MOSFETs M3, M4, M5, M6, and M7, current source IS1, and port Vbs; The upper end of current source IS1 is connected to port Vdd, and the lower end of current source IS1 is connected to the drain of MOSFET M3; the drain of MOSFET M3 is connected to the lower end of current source IS1, the gate of MOSFET M3 is connected to the gate of MOSFET M6, the gate of MOSFET M3 is connected to port Vbs, and the source of MOSFET M3 is grounded; the source of MOSFET M4 is connected to the source of MOSFET M2, the gate of MOSFET M4 is connected to the drain of MOSFET M10, and the drain of MOSFET M4 is connected to the source of MOSFET M5. The source of MOSFET M5 is connected to the drain of MOSFET M4, the gate of MOSFET M5 is connected to the drain of MOSFET M5, and the drain of MOSFET M5 is connected to the drain of MOSFET M6; the drain of MOSFET M6 is connected to the drain of MOSFET M5, the gate of MOSFET M6 is connected to the drain of MOSFET M3, and the source of MOSFET M6 is grounded; the source of MOSFET M7 is connected to the source of MOSFET M4, the gate of MOSFET M7 is connected to the drain of MOSFET M4, and the drain of MOSFET M7 is connected to the drain of MOSFET M8.

6. The low-power, wide-temperature-range reference voltage source circuit according to claim 2, characterized in that, The reference generation circuit (102) includes MOSFETs M8, M9, M10, and M11, a parasitic substrate diode D1, port Vus, and port Vef; The source of MOSFET M8 is connected to the source of MOSFET M7, the gate of MOSFET M8 is connected to the source of MOSFET M8, the gate of MOSFET M8 is connected to the port Vus, and the drain of MOSFET M8 is connected to the drain of MOSFET M9. The drain of MOSFET M9 is connected to the drain of MOSFET M8, the gate of MOSFET M9 is connected to the drain of MOSFET M9, and the source of MOSFET M9 is grounded. The source of MOSFET M10 is connected to the drain of MOSFET M8, the gate of MOSFET M10 is connected to the source of MOSFET M10, and the drain of MOSFET M10 is connected to the drain of MOSFET M11. The cathode of parasitic substrate diode D1 is connected to the source of MOSFET M10, and the anode of parasitic substrate diode D1 is connected to the drain of MOSFET M10. The drain of MOSFET M11 is connected to port Vef, the gate of MOSFET M11 is connected to the drain of MOSFET M11, and the source of MOSFET M11 is grounded.

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