Digital-to-analog converter output signal calibration method, medium, product and equipment

Abstract

The invention discloses a digital-to-analog converter output signal calibration method, a medium, a product and equipment, and relates to the technical field of integrated circuit testing. The method comprises the following steps: taking multiple groups of test excitation signals and actual simulation test signals as data points, and fitting original signal data to obtain initial fitting parameters and initial calibration test signals; according to a difference value between each actual simulation test signal and the corresponding initial calibration test signal, determining a corresponding weight for each data point according to a mode that the weight of each data point is inversely proportional to the corresponding difference value; and fitting the weighted data points again until a preset convergence condition is met, and storing a final fitting parameter and a weight value. And the DAC calibrates the received test excitation signal according to the fitting parameter and the weight value, and outputs the calibrated signal to the device to be tested. The problem that the DAC calibration requirement of a user cannot be met in the prior art can be solved, and the DAC calibration precision can be effectively improved.

Description

Technical Field

[0001] This application relates to the field of integrated circuit testing, and in particular to a method, medium, product, and equipment for calibrating the output signal of a digital-to-analog converter. Background Technology

[0002] In the integrated circuit manufacturing process, ATE (Automatic Test Equipment) applies analog test stimulus signals to DUT (Device Under Test) through the DAC (Digital-to-Analog Converter) in its internal analog resource module. ATE then tests the DUT by acquiring and analyzing its response signals. The output accuracy of the DAC affects the accuracy of the test conditions applied to the DUT by the ATE, and ultimately, the reliability of the test results.

[0003] To ensure the accuracy and familiarity of the analog signal applied to the device under test (DUT), related technologies employ linear fitting methods to calculate correction coefficients. These coefficients are then used to correct nonlinear errors, thus calibrating the DAC. However, this calibration method often results in significant errors, failing to meet users' DAC calibration requirements.

[0004] Therefore, improving the accuracy of DAC calibration is a technical problem that needs to be solved by those skilled in the art.

[0005] It should be noted that the information disclosed in the background section above is only used to enhance the understanding of the background of this application, and therefore may include information that does not constitute prior art known to those skilled in the art. Summary of the Invention

[0006] This application provides a method for calibrating the output signal of a digital-to-analog converter, a computer-readable storage medium, a computer program product, and an automatic testing device, which can effectively improve the calibration accuracy of the DAC.

[0007] To solve the above-mentioned technical problems, this application provides the following technical solution:

[0008] This application provides a method for calibrating the output signal of a digital-to-analog converter, including:

[0009] Multiple sets of test excitation signals generated by the excitation signal generation processor and their corresponding actual analog test signals output by the digital-to-analog converters are used as multiple sets of data points to obtain raw signal data. The raw signal data is then fitted using a fitting algorithm with computing resources matching the total resources of the excitation signal generation processor to determine initial fitting parameters and initial calibration test signals corresponding to each actual analog test signal. Based on the difference between each actual analog test signal and its corresponding initial calibration test signal, weights are determined for each data point in a manner where the weight of each data point is inversely proportional to the corresponding difference. The weighted data points are then fitted again using the fitting algorithm. If the preset convergence condition is not met, the weights of each data point are adjusted, and the fitting process is repeated until the preset convergence condition is met. If the preset convergence condition is met, the current fitting parameters and corresponding weight values ​​are stored as calibration data. The digital-to-analog converter receives the current test excitation signal, reads the current fitting parameters and corresponding weight values, and calibrates the current test excitation signal.

[0010] This application also provides an electronic device, including a memory and a processor, wherein the processor is used to implement the steps of any of the above-described digital-to-analog converter output signal calibration methods when executing a computer program stored in the memory.

[0011] This application also provides a computer-readable storage medium storing a computer program, which, when executed by a processor, implements the steps of any of the above-described digital-to-analog converter output signal calibration methods.

[0012] This application also provides a computer program product, including a computer program / instructions that, when executed by a processor, implement the steps of any of the above-described digital-to-analog converter output signal calibration methods.

[0013] Finally, this application also provides an automatic testing device, including an interactive component, a digital-to-analog converter (DAC), a calibration memory, an excitation signal generation processor, a calibration processor, and a measuring device; wherein, the excitation signal generation processor is connected to both the interactive component and the DAC, the output of the DAC is connected to both the device under test (DUT) and the measuring device, and the calibration processor is connected to the measuring device; the excitation signal generation processor, upon receiving a test task instruction to test the DUT through the interactive component, generates a test excitation signal to drive the theoretical analog test signal output by the DAC, and sends the test excitation signal to the DAC; the measuring device measures the actual analog test signal output by the DAC and sends the actual analog test signal to the calibration processor; the calibration processor, when executing the steps of the DAC output signal calibration method described above, obtains calibration data for calibrating the DAC output signal and stores the calibration data in the calibration memory; the DAC reads the calibration data from the calibration memory, calibrates the current test excitation signal to the corresponding theoretical analog test signal based on the calibration data, and sends the calibrated test signal to the DUT.

[0014] The advantages of the technical solution provided in this application are as follows: by collecting DAC input and output data to establish an initial fitting relationship, a preliminary model of the DAC's nonlinear characteristics is achieved. The fitting process balances accuracy and the computational efficiency of the excitation signal generation processor, enabling high-precision and robust calibration of the DAC output without significantly increasing hardware overhead. During the fitting process, the difference between the actual output and the fitted result is calculated and weighted dynamically according to its magnitude. This automatically identifies and suppresses the influence of measurement anomalies, giving the calibration process inherent robustness, automatically weakening the impact of outliers, ensuring the robustness of the fitting results, and improving calibration accuracy. Furthermore, through iterative weighted fitting and convergence judgment, the final fitting result and data are co-optimized in a closed loop, ultimately obtaining stable and accurate compensation parameters. This method decouples time-consuming high-precision calibration from efficient real-time application, significantly improving the absolute accuracy and long-term stability of the DAC output. It also achieves complete automation and intelligence in the calibration process. The entire iterative process is completed automatically, without the need for manually setting complex filtering thresholds or outlier removal rules. It adaptively handles changes in data quality, reducing the difficulty of use and maintenance, and providing reliable and adaptive signal integrity assurance for high-precision integrated circuit testing.

[0015] Furthermore, this application also provides a corresponding computer-readable storage medium, computer program product, and automatic testing equipment for the calibration method of digital-to-analog converter output signal, which further makes the method more practical. The computer-readable storage medium, computer program product, and automatic testing equipment have corresponding advantages.

[0016] The technical features mentioned above, those to be mentioned below, and those shown individually in the accompanying drawings can be arbitrarily combined, as long as the combined technical features are not contradictory. All feasible combinations of features are the technical content explicitly described in this application. Any one of the multiple sub-features contained in the same statement can be applied independently, without necessarily being applied together with other sub-features.

[0017] It should be understood that the above general description and the following detailed description are merely exemplary and do not limit this application. Attached Figure Description

[0018] To more clearly illustrate the technical solutions of this application or related technologies, the drawings used in the description of the embodiments or related technologies will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0019] Figure 1 A flowchart illustrating a method for calibrating the output signal of a digital-to-analog converter provided in this application;

[0020] Figure 2 A flowchart illustrating another method for calibrating the output signal of a digital-to-analog converter provided in this application;

[0021] Figure 3 A schematic diagram of the original signal data and multi-order calibration curves provided in this application in an exemplary application scenario;

[0022] Figure 4 A schematic diagram of the data residuals provided for this application in an exemplary application scenario;

[0023] Figure 5 A schematic diagram illustrating the calibration comparison of data points provided in this application in an exemplary application scenario;

[0024] Figure 6 A structural framework diagram of an exemplary embodiment of the digital-to-analog converter output signal calibration device provided in this application;

[0025] Figure 7 A structural diagram of an exemplary embodiment of the electronic device provided in this application;

[0026] Figure 8 This is a structural framework diagram of an exemplary embodiment of the automatic testing equipment provided in this application. Detailed Implementation

[0027] To enable those skilled in the art to better understand the technical solutions of this application, the application will be further described in detail below with reference to the accompanying drawings and specific embodiments. The terms "first," "second," "third," "fourth," etc., used in the specification and the aforementioned drawings are used to distinguish different objects, not to describe a specific order. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover non-exclusive inclusion. The term "exemplary" means "serving as an example, embodiment, or illustration." Any embodiment described herein as "exemplary" is not necessarily to be construed as superior to or better than other embodiments.

[0028] An Equipment Tester (ATE) is a computer-controlled system used in semiconductor manufacturing processes, such as wafer testing or post-packaging testing, to perform functional and performance testing on integrated circuits. It applies precise test signals (such as voltage, current, and timing signals) to the device under test (DUT) and captures and analyzes the DUT's output response, thereby screening out devices that function correctly and meet specifications. The Digital-to-Analog Converter (DAC) is a functional module (or sub-circuit) of the ATE. It receives digital codes (representing a specific voltage or current value) from the ATE's main controller and converts them into real and continuous analog signals (voltage or current signals) for output. These signals are directly used as the DUT's power supply, bias voltage, reference voltage, and input excitation, providing precise analog excitation signals (such as bias voltage, reference voltage, and analog input signals) or setting test conditions (such as power supply voltage). The accuracy of the ATE test results depends on the precision of the DAC output signal.

[0029] However, as integrated circuit technology advances towards higher performance and more complex systems (such as system-on-a-chip), especially in demanding applications with extremely low tolerance for measurement errors, such as medical electronic devices, high-precision test and measurement instruments, and aerospace electronic systems, the accuracy requirements for ATE testing are becoming increasingly stringent. In these scenarios, even extremely small deviations in the ATE's DAC output, such as errors at the millivolt or microampere level, can lead to catastrophic misjudgments, equipment malfunctions, or severe system performance degradation after system-level transmission or amplification, resulting in significant economic or safety risks. Therefore, it is crucial to ensure that the output of the internal DAC has extremely high accuracy before the ATE can perform high-precision, high-stability chip system testing.

[0030] To ensure the output accuracy of a DAC, external calibration is essential. Related technologies employ offset calibration and nonlinear calibration. Offset calibration aims to eliminate systematic deviations in the DAC output at zero (or reference point). Nonlinear calibration calculates a correction coefficient using linear fitting methods (such as least squares) to compensate for the linear error component in the DAC transfer function, thus correcting nonlinear errors. After calibration, the calculated offset and gain coefficients are used to mathematically correct the original DAC output data. However, the results of such calibration often have significant errors. These errors may stem from manufacturing errors during production, ATE performance degradation due to changes in time and temperature, and random fluctuations in measurement data introduced by factors such as signal noise, power supply fluctuations, and test connections during testing. Therefore, simple linear calibration is insufficient for complex application scenarios and does not account for the inherent volatility of the data.

[0031] For example, the relevant technology will first construct a mathematical model: Here, Vcmd represents the command voltage (the ideal voltage corresponding to the DAC input code value), Vmeas represents the actual measured voltage, which can be measured using a high-precision multimeter, G represents the true gain (i.e., slope), and O represents the true offset (i.e., intercept). The DAC outputs a series of known command voltages Vcmd,iVcmd,i (i=1,2,...,N), for example, at least 10 to cover its range. Then, using a higher-precision measurement unit within the ATE system (such as a precision multimeter), the corresponding actual output voltages Vmeas,iVmeas,i are measured one by one. A straight line is determined using these data: y=G·x+O, which minimizes the sum of the squares of the vertical distances (residuals) from all data points (Vcmd,i,Vmeas,i) to this line. The formulas for calculating the gain G and the offset O are as follows:

[0032] ;

[0033] .

[0034] To instruct the DAC to obtain the required precise voltage, the above mathematical model can be inversely operated on, using the relational formula. , can be obtained Vdesired is the precise voltage required for the DAC output. During operation, ATE uses this inverse formula to correct each instruction value in real time.

[0035] Because a first-order model can only fit a straight line, but the actual DAC conversion characteristics may not be a perfect straight line and will have nonlinear errors (INL / DNL), related techniques cannot calibrate nonlinear errors. Furthermore, the goal of the least squares method is to "minimize the sum of squares," meaning that any outlier measurement point with a large deviation will have a significant leverage effect on the fitting result. In other words, simple linear fitting methods cannot effectively describe and compensate for the complex nonlinear error characteristics of the DAC and the dynamic drift caused by environmental factors. Using only offset and gain coefficients for correction has extremely limited ability to correct nonlinear distortion (especially higher-order nonlinearities), resulting in unsatisfactory calibration results and large residual errors under high-precision testing requirements.

[0036] In view of this, in order to address the significant accuracy errors still existing in the calibration results of related technologies in practical applications, this application proposes an adaptive DAC output calibration method. This method considers the impact of data fluctuations and the waste of computational resources caused by high-order fitting, overcoming the limitations of traditional linear calibration. The fitting process comprehensively considers balancing accuracy and FPGA computational efficiency (e.g., using polynomial fitting of up to the third order). By dynamically adjusting the weights of data points, the influence of outliers is automatically weakened, ensuring the robustness of the fitting results. It can flexibly and automatically fit suitable calibration parameters based on test data, guaranteeing the reliability and accuracy of the ATE output. This method significantly improves the accuracy of the DAC output signal in high-precision testing scenarios (such as medical and aerospace applications).

[0037] The various non-limiting embodiments of this application are described in detail below with reference to the accompanying drawings and specific embodiments. First, please refer to... Figure 1 According to the digital-to-analog converter output signal calibration method provided in this application, it can be implemented as a computer program product, installed and run in a device for calibrating the DAC of an ATE (Automatic Transmitter Amplifier), such as a user's terminal device or a server, to perform adaptive calibration processing on the output signal of the DAC of the ATE. In some embodiments of the method, the method includes the following steps: digital-to-analog converter output signal calibration.

[0038] S101: The original signal data is obtained by taking the multiple sets of test excitation signals generated by the excitation signal generation processor and the actual analog test signals output by their respective digital-to-analog converters as multiple sets of data points.

[0039] The excitation signal generation processor is the processing unit in the ATE (Automatic Test Equipment) used to generate test excitation signals. It outputs digital signals (i.e., digital codes) to drive the DAC (Digital Transducer) according to test task instructions. Its computational resource limitations affect the selection of the required computational resources for the fitting algorithm. For example, the hardware carrier of the excitation signal generation processor can be an FPGA (Field-Programmable Gate Array). The digital-to-analog converter receives the digital code and converts it into continuous analog signals (voltage / current signals) to provide test excitation signals or set test conditions for the device under test (DUT). The test excitation signal is the digital code generated by the excitation signal generation processor according to the user's test task requirements. The actual analog test signal is the signal output to the DUT after the DAC receives the test excitation signal and can be measured using dedicated equipment. In this step, a test excitation signal and its corresponding actual analog test signal constitute a data pair, which is considered a data point. Correspondingly, multiple sets of test excitation signals and their corresponding actual analog test signals constitute multiple sets of data points. For ease of description, these data points are defined as raw signal data.

[0040] For example, such as Figure 2 As shown, after receiving the test task instruction from the device under test (such as a certain model of sensor chip) via software, the ATE transmits the instruction to the excitation signal generation processor (FPGA). The excitation signal generation processor generates multiple sets of digital test excitation signals (e.g., 10 sets of digital codes covering the DAC range, corresponding to an ideal voltage range of 0-5V) according to the test task requirements, and sends these test excitation signals to the DAC. The DAC receives each set of test excitation signals, converts them into continuous analog signals, and outputs them. This output is divided into two paths: one path is transmitted to the device under test for testing, and the other path is transmitted to a measuring device (a high-precision multimeter with an accuracy of ±1μV). The measuring device accurately measures each set of analog signals output by the DAC to obtain multiple sets of actual analog test signals. Each set of test excitation signals + the corresponding actual analog test signal is considered as a data point, and the set of all data points constitutes the original signal data. For example, the test excitation... The ideal voltages corresponding to the signals are 0V, 1V, 2V, 3V, 4V, and 5V (6 groups in total). The actual analog test signals measured by the measuring equipment are 0.0002V, 1.0003V, 1.9998V, 3.0005V, 4.0001V, and 5.0004V, forming 6 sets of data points {(0, 0.0002), (1, 1.0003), (2, 1.9998), (3, 0005), (4, 4.0001), and (5, 5.0004)}.

[0041] S102: Using computing resources that match the total resources of the excitation signal generator, the original signal data is fitted using a fitting algorithm to determine the initial fitting parameters and the initial calibration test signals corresponding to each actual simulated test signal.

[0042] In this embodiment, the fitting algorithm is a computational method that approximates the patterns of the original signal data using a mathematical model, minimizing the deviation between the data points and the fitted curve through fitting processing. The selection of the fitting algorithm must balance the computational efficiency and fitting accuracy of the excitation signal generation processor. That is, the total amount of resources provided by the excitation signal generation processor determines the resource allocation for the fitting computation. The complexity of all fitting operations (matrix inversion, residual calculation, weight update) must match the processing power of the excitation signal generation processor, without exceeding the preset resource quota. The maximum resource quota represents the resource requirement when the improvement in fitting accuracy is limited but would place an excessive burden on the excitation signal generation processor. Under the premise of satisfying accuracy requirements, the fitting algorithm with the lowest resource consumption can be selected first, and then the function computation scale corresponding to the fitting algorithm can be further determined. The essence of fitting methods is to minimize the variance between the curve and the data. Fitting algorithms can be polynomial fitting, exponential fitting, and sine / cosine functions. The simplest polynomial fitting can be selected from these three fitting algorithms. Then, the highest order of the polynomial fitting is determined. Low-order (such as linear) fitting is insufficient. If it exceeds the third order, the fitting effect will not have a more obvious advantage. The coefficients of the fourth order are close to 0. The higher the order, the greater the computational cost. In the ATE test process, the third order is for accurate calibration. In other words, the fourth order and above are too burdensome for the FPGA and have limited improvement.

[0043] The initial fitting parameters refer to the set of parameters obtained after the first fitting of the fitting equation. Once the initial fitting parameters are determined, the value corresponding to a test excitation signal is substituted into the fitting equation for calculation. The result is the output after correction for that test excitation signal. The test excitation signal corresponds to an actual simulated test signal, and correspondingly, it also corresponds to an actual simulated test signal. That is, the actual simulated test signal and the initial calibration test signal are the original output and the output after one correction, respectively. For example, considering computational resource limitations, the fitting algorithm can use polynomial fitting, with the polynomial order set to a maximum of 3 (to avoid high-order fitting consuming too many resources and causing computational delays). Through this fitting process, the initial fitting parameters are determined, i.e., the coefficients of each term in the 3rd-order polynomial. Based on these initial fitting parameters and the test points corresponding to the test excitation signal, the initial calibration test signal (i.e., the simulated signal value predicted by the fitting model) corresponding to each set of actual simulated test signals is calculated.

[0044] S103: Based on the difference between each actual simulated test signal and the corresponding initial calibration test signal, determine the corresponding weight for each data point in a manner that the weight of each data point is inversely proportional to the corresponding difference.

[0045] In this embodiment, the principle that the weight of each data point is inversely proportional to its corresponding difference means that the larger the difference between the actual simulated test signal and the corresponding initial calibration test signal, the smaller its weight, thereby weakening the impact of outliers. The weight values ​​can be determined using any weighting algorithm, and this embodiment does not impose any limitations on this. For example, for each group of data points, the difference between its actual simulated test signal and the corresponding initial calibration test signal is calculated. For instance, if the actual simulated test signal of data point A is 1.9998V and the initial calibration test signal is 2.0000V, the difference is 1.9998V - 2.0000V = -0.0002V. The smaller the absolute value of the difference, the higher the reliability of the data point and the larger its weight; conversely, the larger the absolute value of the difference, the lower the reliability of the data point and the smaller its weight. For example, a data point with an absolute difference of 0.0001V has a weight of 1.0, and a data point with an absolute residual value of 0.001V has a weight of 0.1.

[0046] 104: The weighted data points are fitted again using a fitting algorithm. If the preset convergence condition is not met, the weights of each data point are adjusted and the fitting process is repeated until the preset convergence condition is met. If the preset convergence condition is met, the current fitting parameters and corresponding weight values ​​are stored as calibration data. The digital-to-analog converter receives the current test excitation signal, reads the current fitting parameters and corresponding weight values, and calibrates the current test excitation signal.

[0047] The preset convergence condition is the criterion for determining whether iterative fitting should stop, ensuring that the fitted parameters and weight values ​​reach a stable state and avoiding invalid iterations. The preset convergence condition can be whether the changes in the fitted parameters are stable, or whether the changes in the weight coefficients are stable. If the difference between the current fitted parameters and the initial fitted parameters in S102 is a minimum value, then convergence is considered achieved, i.e., the preset convergence condition is met. If the difference between the current fitted parameters and the initial fitted parameters in S102 is not a minimum value, then convergence is considered non-convergence. This minimum value can be predefined, such as a first preset threshold and a second preset threshold. Correspondingly, if the difference between two adjacent fitted parameters is less than the first preset threshold, the preset convergence condition is met; or, if the difference in weights of two adjacent data points is less than the second preset threshold, the preset convergence condition is met. By clarifying the specific quantitative standard of the convergence condition, the blindness of iterative fitting is avoided; by determining the threshold of the difference between fitted parameters or weights, it is ensured that the fitting result has reached a stable state when iteration stops. This avoids excessive iteration that wastes computational resources and prevents insufficient iteration that leads to insufficient calibration accuracy, thus improving the controllability and efficiency of the calibration process.

[0048] This step is an iterative process that is executed multiple times. If the fitting result does not converge, steps S102, S103, and S104 are repeated. The number of executions is determined by a preset convergence condition. The current fitting parameters and corresponding weight values ​​refer to the fitting parameters determined by the last fitting result, i.e., the iterative process that satisfies the preset convergence condition, and the weight values ​​assigned to each data point in that fitting process. This data is stored as calibration data in a designated location. When the DAC receives the current test excitation signal, it reads the stored calibration data, performs real-time calibration on the current test excitation signal, and then outputs the calibrated analog signal to the device under test (DUT). The DUT is an integrated circuit or electronic component whose performance is tested via ATE and DAC; the accuracy of its test results depends on the precision of the DAC output signal.

[0049] Taking the least squares method for polynomial fitting as the fitting algorithm and an FPGA as the excitation signal generation processor as an example, this embodiment can be as follows: Multiple sets of test excitation signals generated by the FPGA and their corresponding actual analog test signals output by the digital-to-analog converters are used as multiple sets of data points to obtain the original signal data; the least squares method is used to perform highest-order third-order polynomial fitting on the original signal data to determine the initial fitting parameters and the initial calibration test signals corresponding to each actual analog test signal; based on the difference between each actual analog test signal and the corresponding initial calibration test signal, the corresponding weights are determined for each data point in a manner where the weight of each data point is inversely proportional to the corresponding difference; the highest-order third-order polynomial fitting is performed again on the weighted data points using the fitting algorithm; if the preset convergence condition is not met, the weights of each data point are adjusted, and the fitting process is performed again until the preset convergence condition is met; if the preset convergence condition is met, the current fitting parameters and corresponding weight values ​​are stored as calibration data; the digital-to-analog converter receives the current test excitation signal, reads the current fitting parameters and corresponding weight values, and calibrates the current test excitation signal. This embodiment achieves robust fitting of a polynomial model of arbitrary order by iteratively reducing the weights of outlier data points. First, an initial standard least squares fit is performed to obtain an initial polynomial model, and the differences between all data points are calculated. Next, the core iterative loop begins: based on the current differences, a robust weighting function (such as the Tukey Bisquare function) is used to assign new weights to each data point, with the principle that points with larger residuals have lower weights. Subsequently, weighted least squares fitting is performed using the new weights to obtain updated fitting parameters. This process of "calculating residuals - updating weights - refitting" is repeated until the change in fitting parameters or the change in the weight vector is less than a preset threshold, indicating convergence. Finally, the converged polynomial coefficients and the final weights of each data point are output, thus simultaneously achieving accurate fitting of high-order curves and automatic outlier removal.

[0050] In the technical solution provided in this application embodiment, an initial fitting relationship is established by collecting DAC input and output data, achieving preliminary modeling of the DAC's nonlinear characteristics. The fitting process balances accuracy and the computational efficiency of the excitation signal generation processor, enabling high-precision and robust calibration of the DAC output without significantly increasing hardware overhead. During the fitting process, the difference between the actual output and the fitting result is calculated and weighted dynamically according to its magnitude. The influence of measurement anomalies is automatically identified and suppressed, giving the calibration process inherent robustness. This automatically weakens the influence of outliers, ensuring the robustness of the fitting results and improving calibration accuracy. Furthermore, through iterative weighted fitting and convergence determination, the final fitting result and data are co-optimized in a closed loop, ultimately obtaining stable and accurate compensation parameters. This method decouples time-consuming high-precision calibration from efficient real-time application, significantly improving the absolute accuracy and long-term stability of the DAC output. It also achieves complete automation and intelligence in the calibration process. The entire iterative process is completed automatically, eliminating the need for manually setting complex filtering thresholds or outlier removal rules. It adaptively handles changes in data quality, reducing the difficulty of use and maintenance, and providing reliable and adaptive signal integrity assurance for high-precision integrated circuit testing.

[0051] Based on the above embodiments, this invention takes the initial fitting of a polynomial using the least squares method as an example to illustrate the implementation process of determining the first-order fitting process, which may include the following steps:

[0052] Based on the least squares method, a normal equation is used to determine the correspondence between the coefficients of the original signal data and the highest third-order polynomial. A test point matrix is ​​generated based on each test excitation signal, and a corresponding actual measurement point matrix is ​​generated based on each actual simulated test signal. The normal equation is calculated based on the test point matrix and the actual measurement point matrix to obtain the initial fitting parameters. The initial fitting parameters are the coefficients of the third-order polynomial. Based on the initial fitting parameters and the test point matrix, the calculation result of the highest third-order polynomial is used as the corresponding initial calibration test signal.

[0053] The least squares method is a data fitting method that determines the parameters of the fitted model by minimizing the sum of squares of the residuals of all data points, ensuring the overall fit between the model and the data. The test point matrix is ​​obtained by determining the number of rows and columns of the matrix according to the polynomial order and the total number of data points, and using each test excitation signal as a matrix element. The actual measurement point matrix is ​​obtained by determining the number of rows of the matrix according to the total number of data points, and using each actual simulated test signal as a matrix element. The original signal data is represented as ( , ), ( , (x_N, y_N), where N is the total number of data points, x_N represents the test excitation signal in the Nth data point group, and y_N represents the actual simulated test signal in the Nth data point group. The test point matrix generated based on each test excitation signal can be represented by matrix X as follows, and the corresponding actual measurement point matrix generated based on each actual simulated test signal can be represented by matrix Y as follows:

[0054] ;

[0055] .

[0056] The original signal data is fitted with an m-th order polynomial using the standard least squares method. The m-th order polynomial can be expressed as: , For the m-th order parameters that need to be determined through fitting, the corresponding fitting parameters are... Represented as T denotes transpose. The normal equation for determining the correspondence between the coefficients of the original signal data and the highest third-order polynomial based on the least squares method can be: Substituting the above test point matrix and actual measurement point matrix into the normal equation, the calculation is performed. The fitting results can be obtained. The results are from the first fitting process. The initial fitting parameters are used as the basis for subsequent fitting processes, which can be performed in the same manner as in this embodiment. Substituting the fitting parameters into an m-order polynomial for fitting, the calibration test signal corresponding to each known x (representing the test excitation signal) can be calculated using a polynomial with known coefficients. The initial calibration test signal is obtained from the first round of fitting calculation.

[0057] Fittings can be performed for m=1, 2, 3, and 4 respectively, and the fitting results are as follows: Figure 3 As shown, according to Figure 3 It is evident that low-order (i.e., first and second order) fitting methods are clearly insufficient to describe the real data, while fitting results of fourth order or higher waste the FPGA's computing resources and have little meaning for the fitting results. Therefore, the polynomial order in this embodiment can be selected as third order. Of course, if FPGA resources are not limited, fourth order or higher can be selected according to the actual scenario.

[0058] As can be seen from the above, this embodiment clarifies the solution logic of the initial fitting parameters by combining the least squares method with the specific calculation method of the third-order polynomial, ensuring the scientificity and accuracy of the initial fitting results; at the same time, the selection of the third-order polynomial is matched with the total resources of the excitation signal generation processor (FPGA), avoiding the delay caused by high-order fitting occupying too many computing resources, and taking into account the computational efficiency while ensuring the fitting accuracy (covering the nonlinear error of DAC).

[0059] The above embodiments do not limit how the weights are allocated. This embodiment also provides an exemplary implementation method, which may include the following:

[0060] For each data point of the original signal data, the residual between the actual simulated test signal and the corresponding initial calibration test signal of each data point is calculated in sequence. According to the principle that the weight of each data point is inversely proportional to the absolute value of the corresponding residual, the corresponding weight value is assigned to each data point using a robust weighting function based on the value of the absolute value of the residual of each data point.

[0061] The residual (e_i) is the difference between the actual value of a data point and the predicted value calculated by the fitting. It is a key indicator for measuring the deviation of the data point from the fitted curve, i.e., e_i = actual simulated test signal - initial calibration test signal. The robust weighting function is a function that dynamically allocates weights based on the residuals of the data points (such as the Tukey Bisquare function). The logic of the robust weighting function is as follows: when the absolute value of the residual is small, the weight approaches 1 (the data point has high reliability and fully participates in the fitting); when the absolute value of the residual exceeds a preset threshold, the weight rapidly decays to 0 (the data point is an outlier, and its influence is weakened). This reduces the impact of outlier data points with large residuals on the fitting results and improves the robustness of the fitting.

[0062] In this embodiment, the residual for each data point is calculated based on the actual value and the fitted value of each data point. Let e_i be the residual of the i-th data point, and y_i be the actual simulated test signal of the i-th data point. The calibration test signal is calculated for the i-th data point in the current fitting round. Based on the current residual e_i, a new weight w_i is assigned to each data point i using a robust weighting function (such as Tukey Bisquare). To automatically reduce the influence of outliers (excessively large residuals), the larger the residual |e_i|, the lower the weight w_i, and the smaller the impact of that point on the next fitting. Weighted least squares fitting is performed using the new weight w_i, and the calibration test signal is calculated using the new weight w_i. Where W is the weight matrix, the updated fitting parameters are obtained. Recalculate the residuals e_i for all points using the polynomial function updated by weighted least squares in the current iteration. Repeat the above steps until the fitted parameters are obtained. If the change in the magnitude of the change or the change in the weight vector w is less than the corresponding preset threshold, output the converged polynomial coefficients. And the final weight w of each data point.

[0063] As can be seen from the above, this embodiment achieves quantitative allocation of weights by combining residual calculation with a robust weight function, avoiding subjective bias; it can automatically identify outlier data points with large residuals and reduce their weights, suppressing the interference of outliers on the fitting results, improving the robustness of the fitting process, and ensuring the accuracy of subsequent calibration.

[0064] To further improve data quality and calibration accuracy, based on the above embodiments, for example, residual analysis and data correction steps can be further improved to enhance data quality and calibration accuracy.

[0065] Based on the differences between the data points of the original signal data, determine the discrete information of each data point relative to the current fitted curve; identify abnormal data points based on the discrete information of each data point, and correct at least one abnormal data point based on the positive deviation of other data points of non-abnormal data points; use the fitting algorithm to fit the corrected original signal data again, and if the preset convergence condition is met, update the current fitting parameters and corresponding weight values ​​based on the corrected fitting result.

[0066] Discrete information is a quantitative indicator of the degree of deviation of data points from the currently fitted curve, used to identify outlier data points. The currently fitted curve is the curve corresponding to the current fitted parameters. If the fitted relation is a polynomial, then the currently fitted curve is the curve corresponding to the third-order polynomial with the current fitted parameters as coefficients.

[0067] In this embodiment, based on the differences between data points in the original signal data, the discrete information of each data point relative to the current fitted curve (the third-order polynomial curve corresponding to the current fitting parameters) is calculated. This discrete information quantifies the degree to which the data point deviates from the fitted curve. A discrete information threshold is set (based on the test accuracy requirements, for example, the absolute value of the discrete value is greater than 3). If the discrete information of a data point exceeds this threshold, it is determined to be an abnormal data point. All non-abnormal data points are collected, and the positive deviation of these data points relative to the current fitted curve is calculated (i.e., the average of the positive residuals among the non-abnormal data points). This positive deviation is used to correct the actual simulated test signal value of the abnormal data points. For example, the correction value of the abnormal data point = original measured value + mean positive deviation × correction coefficient) to ensure that the corrected data points are closer to the overall data pattern. The corrected original signal data is substituted back into the fitting algorithm for fitting processing to determine whether the preset convergence condition is met. If it is met, the current fitting parameters and corresponding weight values ​​are updated according to the new fitting result and stored in the calibration memory to obtain more accurate calibration data.

[0068] As can be seen from the above, this embodiment identifies abnormal data points by using discrete information, clarifies the criteria for judging abnormal points, and avoids missed or misjudged cases; it performs positive deviation correction on abnormal points instead of directly removing them, thus preserving the integrity of the data and correcting the deviation of the abnormal points; the secondary fitting update further optimizes the fitting parameters and improves the accuracy of the calibration data, which is especially suitable for scenarios where the proportion of abnormal points in the original signal is high.

[0069] Furthermore, to address the issue of insufficient accuracy in identifying outlier data points, which affects the correction effect, this embodiment, using polynomial fitting as an example, also provides an exemplary process for determining discrete information, which may include the following:

[0070] The degrees of freedom are determined based on the total number of data points and the order of the polynomial; the mean residual is determined based on the residual of each data point; the standard value of data difference is determined based on the degrees of freedom, the mean residual, and the residual of each data point; and the discrete information of each data point relative to the current fitted curve is determined based on the ratio of the residual value of each data point to the standard value of data difference.

[0071] The degrees of freedom are parameters related to the difference between the total number of data points and the polynomial order, reflecting the flexibility of the data fit. For example, they can be determined using the formula "degrees of freedom = Nm-1" (where N is the total number of data points and m is the polynomial order). The residual mean is the average of the residual values ​​for all data points. The standard deviation of data is a benchmark for measuring the dispersion of residuals, determined by combining the degrees of freedom, the residual mean, and the residuals of each data point. Discrete information is calculated as the ratio of the residual value of each data point to the standard deviation of data; this ratio represents the discrete information of the data point relative to the currently fitted curve.

[0072] For example, the discrete value calculation formula can be stored locally. During the calculation of calibration data, the discrete value calculation formula can be called to calculate the discrete information of each data point relative to the current fitted curve; the discrete value calculation formula is:

[0073] ;

[0074] in, This represents the discrete value corresponding to the i-th data point. This represents the residual value corresponding to the i-th data point, where N is the total number of data points and m is the polynomial order. This represents the mean of the residuals.

[0075] In this embodiment, after calculating the residuals of each data point, the formula can be used to... Calculate the standard deviation of each data point Then according to the relation Calculate the standardized residuals for each data point; these residuals can then be used as discrete values. Generally, an absolute value greater than 2 indicates a significant deviation, meaning these are outlier data points. Residual analysis can identify data points that deviate from the fitted data, such as… Figure 4 As shown, this is common in the measurement process. Therefore, residual correction can be performed on the data at this point. By calculating the positive deviation of other data points, a reasonable correction can be made, and finally the corrected data can be obtained. Then, the data can be refitted, as shown below. Figure 5 As shown, after fitting the data, calibrating the data with larger deviations will yield data that is more in line with reality, thereby improving the accuracy of subsequent data calculations. Figure 5 As shown, some points have been corrected through calculation.

[0076] As can be seen from the above, this embodiment provides step-by-step calculation logic for discrete information, ensuring that the calculation of discrete information is standardized and repeatable. By introducing parameters such as degrees of freedom and residual mean, discrete information can accurately quantify the deviation of data points, providing a scientific basis for the identification of abnormal data points and improving the accuracy of abnormal point correction.

[0077] It should be noted that there is no strict order of execution for the steps in this application. As long as they conform to a logical order, these steps can be executed simultaneously or in a certain preset order. Figure 1 This is just an illustrative example and does not mean that this is the only possible execution order.

[0078] This application also provides a corresponding apparatus for the digital-to-analog converter output signal calibration method, further enhancing the practicality of the method. The apparatus can be described from both a functional module perspective and a hardware perspective. The following describes the digital-to-analog converter output signal calibration apparatus provided in this application. This apparatus is used to implement the digital-to-analog converter output signal calibration method provided in this application. In this embodiment, the digital-to-analog converter output signal calibration apparatus may include or be divided into one or more program modules. These one or more program modules are stored in a storage medium and executed by one or more processors to complete the digital-to-analog converter output signal calibration method disclosed in Embodiment 1. The program module referred to in this embodiment refers to a series of computer program instruction segments capable of performing specific functions, which are more suitable than the program itself for describing the execution process of the digital-to-analog converter output signal calibration apparatus in the storage medium. The following description will specifically introduce the functions of each program module in this embodiment. The digital-to-analog converter output signal calibration apparatus described below can be referred to in correspondence with the digital-to-analog converter output signal calibration method described above.

[0079] From the perspective of functional modules, see Figure 6 , Figure 6This is a structural diagram of the digital-to-analog converter output signal calibration device provided in this embodiment, in one specific implementation. The device may include:

[0080] The data acquisition module 601 is used to take multiple sets of test excitation signals generated by the excitation signal generation processor and the actual analog test signals output by their respective digital-to-analog converters as multiple sets of data points to obtain the original signal data.

[0081] The initial fitting module 602 is used to use computing resources that match the total resources of the excitation signal generation processor to perform fitting processing on the original signal data through a fitting algorithm, and to determine the initial fitting parameters and the initial calibration test signals corresponding to each actual simulation test signal.

[0082] The weight allocation module 603 is used to determine the corresponding weight for each data point based on the difference between each actual simulated test signal and the corresponding initial calibration test signal, in a manner in which the weight of each data point is inversely proportional to the corresponding difference.

[0083] The calibration data determination module 604 is used to refit the weighted data points using a fitting algorithm. If the preset convergence condition is not met, the weights of each data point are adjusted and the fitting process is repeated until the preset convergence condition is met. If the preset convergence condition is met, the current fitting parameters and corresponding weight values ​​are stored as calibration data. The digital-to-analog converter receives the current test excitation signal, reads the current fitting parameters and corresponding weight values, and calibrates the current test excitation signal.

[0084] For example, in some embodiments of this example, the initial fitting module 602 can also be used to: determine the normal equation corresponding to the coefficients of the original signal data and the highest third-order polynomial based on the least squares method; generate a test point matrix according to each test excitation signal, and generate a corresponding actual measurement point matrix according to each actual simulated test signal; calculate the normal equation based on the test point matrix and the actual measurement point matrix to obtain the initial fitting parameters; the initial fitting parameters are the coefficients of the third-order polynomial; and use the calculation result of the highest third-order polynomial as the corresponding initial calibration test signal according to the initial fitting parameters and the test point matrix.

[0085] For example, in some other embodiments of this embodiment, the calibration data determination module 604 can also be used to: satisfy the preset convergence condition if the difference between two adjacent fitting parameters is less than a first preset threshold; or, satisfy the preset convergence condition if the weight difference between two adjacent data points is less than a second preset threshold.

[0086] For example, in some other embodiments of this embodiment, the weight allocation module 603 can also be used to: calculate the residual between the actual simulated test signal and the corresponding initial calibration test signal for each data point of the original signal data in sequence; and allocate corresponding weight values ​​to each data point using a robust weight function according to the value of the absolute value of the residual of each data point, in a manner in which the weight of each data point is inversely proportional to the absolute value of the corresponding residual.

[0087] For example, in some other embodiments of this embodiment, the above-described apparatus may further include an anomaly correction module, which may be used to: determine the discrete information of each data point relative to the current fitted curve based on the differences between the data points of the original signal data; the current fitted curve is the curve corresponding to the current fitting parameters; determine abnormal data points based on the discrete information of each data point, and correct at least one abnormal data point based on the positive deviation of other data points of non-abnormal data points; and perform fitting processing on the corrected original signal data again using a fitting algorithm, and if a preset convergence condition is met, update the current fitting parameters and the corresponding weight values ​​based on the corrected fitting result.

[0088] As an exemplary implementation of the above embodiments, the anomaly correction module can also be used to: determine the degrees of freedom based on the total number of data points and the polynomial order; determine the residual mean based on the residual of each data point; determine the data difference standard value based on the degrees of freedom, the residual mean, and the residual of each data point; and determine the discrete information of each data point relative to the current fitted curve based on the ratio of the residual value of each data point to the data difference standard value.

[0089] As another exemplary implementation of the above embodiments, the anomaly correction module can also be used to: call the discrete value calculation formula to calculate the discrete information of each data point relative to the current fitted curve; the discrete value calculation formula is:

[0090] ;

[0091] in, This represents the discrete value corresponding to the i-th data point. This represents the residual value corresponding to the i-th data point, where N is the total number of data points and m is the polynomial order. This represents the mean of the residuals.

[0092] The digital-to-analog converter output signal calibration device mentioned above is described from the perspective of functional modules. Furthermore, this application also provides an electronic device, which is described from the perspective of hardware. Figure 7This is a schematic diagram of the structure of an electronic device provided in one embodiment of the present application. The electronic device includes a memory and a processor. The memory stores a computer program, and the processor is configured to run the computer program to perform the steps in any of the above embodiments of the digital-to-analog converter output signal calibration method.

[0093] like Figure 7 As shown, the electronic device includes a memory 70 for storing a computer program; and a processor 71 for executing the computer program to implement the steps of the digital-to-analog converter output signal calibration method as described in any of the above embodiments.

[0094] The processor 71 may include one or more processing cores, such as a quad-core processor or an octa-core processor. The processor 71 may also be a controller, microcontroller, microprocessor, or other data processing chip. The processor 71 may be implemented using at least one hardware form selected from DSP (Digital Signal Processing), FPGA (Field-Programmable Gate Array), and PLA (Programmable Logic Array). The processor 71 may also include a main processor and a coprocessor. The main processor, also known as a CPU (Central Processing Unit), is used to process data in the wake-up state; the coprocessor is a low-power processor used to process data in the standby state. In some embodiments, the processor 71 may integrate a GPU (Graphics Processing Unit), which is responsible for rendering and drawing the content required to be displayed on the screen. In some embodiments, the processor 71 may also include an AI (Artificial Intelligence) processor, which is used to handle computational operations related to machine learning.

[0095] The memory 70 may include one or more computer non-volatile storage media, which may be non-transitory. The memory 70 may also include high-speed random access memory and non-volatile memory, such as one or more disk storage devices or flash memory devices. In some embodiments, the memory 70 may be an internal storage unit of an electronic device, such as a server hard drive. In other embodiments, the memory 70 may be an external storage device of an electronic device, such as a plug-in hard drive on a server, a Smart Media Card (SMC), a Secure Digital (SD) card, a Flash Card, etc. Furthermore, the memory 70 may include both internal and external storage units of the electronic device. The memory 70 can be used not only to store application software and various types of data installed on the electronic device, such as code executing the digital-to-analog converter output signal calibration method, but also to temporarily store data that has been output or will be output. In this embodiment, the memory 70 is used to store at least the following computer program 701, which, after being loaded and executed by the processor 71, can implement the relevant steps of the digital-to-analog converter output signal calibration method disclosed in any of the foregoing embodiments. In addition, the resources stored in memory 70 may also include operating system 702 and data 703, and the storage method may be temporary storage or permanent storage. Operating system 702 may include Windows, Unix, Linux, etc. Data 703 may include, but is not limited to, data corresponding to the calibration results of the digital-to-analog converter output signal.

[0096] In some embodiments, the aforementioned electronic device may further include a display screen 72, an input / output interface 73, a communication interface 74 (or network interface), a power supply 75, and a communication bus 76. The display screen 72 and input / output interface 73, such as a keyboard, are user interfaces. Exemplary user interfaces may also include standard wired interfaces, wireless interfaces, etc. Optionally, in some embodiments, the display may be an LED display, a liquid crystal display, a touch-sensitive liquid crystal display, or an OLED (Organic Light-Emitting Diode) touchscreen, etc. The display may also be appropriately referred to as a display screen or display unit, used to display information processed in the electronic device and to display a visual user interface. The communication interface 74 may exemplary include wired and / or wireless interfaces, such as a Wi-Fi interface, a Bluetooth interface, etc., typically used to establish communication connections between the electronic device and other electronic devices. The communication bus 76 may be a peripheral component interconnect (PCI) bus or an extended industry standard architecture (EISA) bus, etc. This bus can be divided into an address bus, a data bus, a control bus, etc. For ease of representation, Figure 7 The bus is represented by a single thick line, but this does not mean that there is only one bus or one type of bus.

[0097] Those skilled in the art will understand that Figure 7 The structure shown does not constitute a limitation on the electronic device and may include more or fewer components than shown, such as sensors 77 that perform various functions.

[0098] It is understood that if the digital-to-analog converter output signal calibration method in the above embodiments is implemented as a software functional unit and sold or used as an independent product, it can be stored in a non-volatile storage medium. Based on this understanding, the technical solution of this application, in essence, or the part that contributes to the related technology, or all or part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and executes all or part of the steps of the methods in the various embodiments of this application. The aforementioned storage medium includes, but is not limited to, various media capable of storing program code, such as: USB flash drive, mobile hard drive, read-only memory (ROM), random access memory (RAM), electrically erasable programmable ROM, register, hard disk, multimedia card, card-type memory (e.g., SD or DX memory), magnetic memory, removable disk, CD-ROM, magnetic disk, or optical disk. Based on this, this application also provides a non-volatile storage medium storing a computer program, which, when executed by a processor, performs the steps of the digital-to-analog converter output signal calibration method as described in any of the above embodiments.

[0099] It is understood that if the digital-to-analog converter output signal calibration method in the above embodiments is implemented as a software functional unit and sold or used as an independent product, the computer software product may not need to be stored in a physical storage medium. For example, it can be directly transmitted to a computer or other device with information processing capabilities via a wired or wireless network to execute all or part of the steps of the methods in the various embodiments of this application. Based on this understanding, the technical solution of this application, in essence, or the part that contributes to the related technology, or all or part of the technical solution, can be embodied in the form of a software product. Based on this, this application also provides a computer program product storing a computer program, which, when executed by a processor, performs the steps of the digital-to-analog converter output signal calibration method as described in any of the above embodiments.

[0100] Finally, this application also provides an automated testing device, please refer to [link to relevant documentation]. Figure 8 It may include an interactive component 801, a digital-to-analog converter 802, a calibration memory 803, an excitation signal generation processor 804, a calibration processor 805, and a measuring device 806.

[0101] The excitation signal generation processor 804 is connected to the interaction component 801 and the digital-to-analog converter 802, respectively. The output of the digital-to-analog converter 802 is connected to the device under test (DUT) and the measuring device, respectively. The calibration processor is connected to the measuring device. When the excitation signal generation processor 804 receives a test task instruction to test the DUT through the interaction component, it generates a test excitation signal to drive the theoretical analog test signal output by the digital-to-analog converter 802 according to the test task instruction, and sends the test excitation signal to the digital-to-analog converter 802. The measuring device 806 measures the actual analog test signal output by the digital-to-analog converter 802 and sends the actual analog test signal to the calibration processor. The calibration memory 803 executes the steps of the digital-to-analog converter output signal calibration method as described in any of the above embodiments, obtains calibration data of the calibrated digital-to-analog converter output signal, and stores the calibration data in the calibration memory 803. The digital-to-analog converter 802 reads the calibration data from the calibration memory 803, calibrates the current test excitation signal to the corresponding theoretical analog test signal according to the calibration data, and sends the calibrated test signal to the DUT.

[0102] The interactive component 801 can be, for example, a human-computer interaction interface or user interface; the excitation signal generation processor 804 can be, for example, an FPGA; and the calibration memory is a storage unit in the ATE used to store calibration data (fitting parameters, weight values) for the DAC to read in real time for signal calibration. The measurement device is a high-precision device (such as a precision multimeter) in the ATE used to acquire the actual analog test signal output by the DAC, providing raw measurement data for calibration calculations.

[0103] Based on the ATE provided in the above embodiments, during ATE testing, the PC software issues instructions, the FPGA generates digital code in real time, and the DAC ultimately outputs an analog signal to the DUT. However, to ensure the absolute accuracy of this signal, the ATE must rely on a background calibration process: First, a precision measuring device (such as a high-precision multimeter) is used as a "fair measure of accuracy" to measure the actual output value of the DAC. Then, the calibration processor 805 compares these measured values ​​with theoretical values, calculates the coefficients used to correct the inherent gain and offset errors of the DAC, and stores them in the calibration memory. Through a non-real-time calibration process, the ATE provides accuracy assurance for the front-end application. Before outputting, the DAC automatically calls the stored coefficients to compensate the original code sent by the FPGA in real time. This "measurement and control separation" design cleverly combines one-time, high-precision calibration with efficient and continuous operation, fundamentally ensuring the long-term reliability and accuracy of the entire signal chain.

[0104] The calibration process for the calibration processor 805 can be as follows:

[0105] The reference voltage value and the actual measured voltage value are obtained as the raw signal data. The reference voltage value is also the DAC input code, and the actual measured voltage value is the DAC output. Considering the computational efficiency of the FPGA, higher-order fitting data would reduce computation speed. Also, considering the practical application scenario, the polynomial fitting expression is limited to a maximum of third order. The weight of each data point relative to the fitted curve is calculated, and outliers that do not meet the requirements or significantly deviate from the model are corrected or processed.

[0106] By iteratively reducing the weights of outlier data points, robust fitting of polynomial models of arbitrary order is achieved. First, an initial standard least squares fit is performed to obtain an initial polynomial model, and the residuals for all data points are calculated. Next, the core iterative loop begins: based on the current residuals, a robust weighting function (such as Tukey's Bisquare) is used to assign new weights to each data point, with the principle that points with larger residuals have lower weights. Subsequently, weighted least squares fitting is performed using the new weights to obtain updated model parameters. This process of "calculating residuals - updating weights - refitting" is repeated until the change in model parameters or the change in the weight vector is less than a preset threshold, indicating that the algorithm has converged. Finally, the converged polynomial coefficients and the final weights of each data point are output, thus simultaneously achieving accurate fitting of high-order curves and automatic outlier removal.

[0107] As shown above, the ATE in this embodiment can perform numerical analysis based on DAC data to fit a calibration curve that better reflects the actual situation, thus improving accuracy. Simultaneously, considering the inherent volatility of the data, the fitting result serves as an assessment of data stability; unreliable data that significantly deviates from the standard curve will be corrected or excluded. Compared to other calibration methods, this approach offers several advantages: firstly, it achieves a higher degree of fit; secondly, it determines the order of fit based on the fitting effect, making it more intelligent; and thirdly, it calibrates outlier or nonlinear data based on the characteristics of the data, avoiding large deviations.

[0108] The foregoing has provided a detailed description of a digital-to-analog converter output signal calibration method, a computer-readable storage medium, a computer program product, and an automatic testing device provided in this application. The various embodiments in this specification are described in a progressive manner, with each embodiment focusing on its differences from other embodiments. Similar or identical parts between embodiments can be referred to interchangeably. Whether the units and algorithm steps of the various examples described in the disclosed embodiments are implemented in electronic hardware or computer software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, and such implementations should not be considered beyond the scope of this application. Several improvements and modifications can be made to this application without departing from the principles of this application, and these improvements and modifications also fall within the protection scope of this application.

Claims

1. A method for calibrating the output signal of a digital-to-analog converter, characterized in that, include: The original signal data is obtained by taking multiple sets of test excitation signals generated by the excitation signal generation processor and the actual analog test signals output by their respective digital-to-analog converters as multiple sets of data points. The original signal data is fitted using a fitting algorithm with computing resources matching the total resources of the excitation signal generator, to determine the initial fitting parameters and the initial calibration test signals corresponding to each actual simulated test signal. Based on the difference between each actual simulated test signal and the corresponding initial calibration test signal, the corresponding weights for each data point are determined in a manner that the weight of each data point is inversely proportional to the corresponding difference. The weighted data points are fitted again using a fitting algorithm. If the preset convergence condition is not met, the weights of each data point are adjusted and the fitting process is repeated until the preset convergence condition is met. If the preset convergence condition is met, the current fitting parameters and corresponding weight values ​​are stored as calibration data. The digital-to-analog converter receives the current test excitation signal, reads the current fitting parameters and corresponding weight values, and calibrates the current test excitation signal.

2. The digital-to-analog converter output signal calibration method according to claim 1, characterized in that, Using computing resources matching the total resources of the excitation signal generation processor, the original signal data is fitted using a fitting algorithm to determine initial fitting parameters and initial calibration test signals corresponding to each actual simulated test signal, including: Based on the least squares method, a normal equation is used to determine the correspondence between the coefficients of the original signal data and the highest third-order polynomial. A test point matrix is ​​generated based on each test excitation signal, and a corresponding actual measurement point matrix is ​​generated based on each actual simulated test signal. The normal equation is calculated based on the test point matrix and the actual measurement point matrix to obtain the initial fitting parameters; the initial fitting parameters are the coefficients of each term of the third-order polynomial. Based on the initial fitting parameters and the test point matrix, the calculation result of the highest third-order polynomial is used as the corresponding initial calibration test signal.

3. The digital-to-analog converter output signal calibration method according to claim 1, characterized in that, After refitting the weighted data points using a fitting algorithm, the following steps are taken: If the difference between two consecutive fitted parameters is less than the first preset threshold, the preset convergence condition is met; or, if the difference between the weights of two consecutive data points is less than the second preset threshold, the preset convergence condition is met.

4. The digital-to-analog converter output signal calibration method according to claim 1, characterized in that, Based on the difference between each actual simulated test signal and the corresponding initial calibration test signal, and in a manner where the weight of each data point is inversely proportional to the corresponding difference, a corresponding weight is determined for each data point, including: For each data point of the original signal data, the residual between the actual simulated test signal and the corresponding initial calibration test signal of each data point is calculated sequentially. Based on the principle that the weight of each data point is inversely proportional to the absolute value of the corresponding residual, a robust weighting function is used to assign corresponding weight values ​​to each data point according to the value of the absolute value of the residual.

5. The digital-to-analog converter output signal calibration method according to any one of claims 1 to 4, characterized in that, After storing the current fitted parameters and corresponding weight values ​​as calibration data, the following is also included: Based on the differences between the data points of the original signal data, the discrete information of each data point relative to the current fitted curve is determined; the current fitted curve is the curve corresponding to the current fitting parameters. Abnormal data points are identified based on the discrete information of each data point, and at least one abnormal data point is corrected based on the positive deviation of other non-abnormal data points. The original signal data after correction is fitted again using a fitting algorithm. If the preset convergence condition is met, the current fitting parameters and corresponding weight values ​​are updated based on the corrected fitting result.

6. The digital-to-analog converter output signal calibration method according to claim 5, characterized in that, The fitting algorithm is a polynomial fitting algorithm. Based on the differences between data points in the original signal data, it determines the discrete information of each data point relative to the current fitted curve, including: Degrees of freedom are determined based on the total number of data points and the order of the polynomial. Determine the mean of the residuals based on the residuals of each data point; The standard value of data difference is determined based on the degrees of freedom, the mean residual, and the residual of each data point; Based on the ratio of the residual value of each data point to the standard value of the data difference, the discrete information of each data point relative to the current fitted curve is determined.

7. The digital-to-analog converter output signal calibration method according to claim 5, characterized in that, Based on the differences between the data points of the original signal data, the discrete information of each data point relative to the current fitted curve is determined, including: The discrete value calculation formula is invoked to calculate the discrete information of each data point relative to the current fitted curve; the discrete value calculation formula is as follows: ； in, This represents the discrete value corresponding to the i-th data point. This represents the residual value corresponding to the i-th data point, where N is the total number of data points and m is the polynomial order. This represents the mean of the residuals.

8. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores a computer program that, when executed by a processor, implements the steps of the digital-to-analog converter output signal calibration method as described in any one of claims 1 to 7.

9. A computer program product comprising a computer program / instructions, characterized in that, When executed by a processor, the computer program / instruction implements the steps of the digital-to-analog converter output signal calibration method according to any one of claims 1 to 7.

10. An automatic testing device, characterized in that, Includes interactive components, digital-to-analog converters, calibration memory, excitation signal generation processor, calibration processor, and measurement equipment; The excitation signal generation processor is connected to the interaction component and the digital-to-analog converter respectively, the output of the digital-to-analog converter is connected to the device under test and the measuring device respectively, and the calibration processor is connected to the measuring device. When the excitation signal generation processor receives a test task instruction to test the device under test through the interaction component, it generates a test excitation signal to drive the theoretical analog test signal output by the digital-to-analog converter according to the test task instruction, and sends the test excitation signal to the digital-to-analog converter. The measuring device measures the actual analog test signal output by the digital-to-analog converter and sends the actual analog test signal to the calibration processor; When the calibration processor executes the steps of the digital-to-analog converter output signal calibration method as described in any one of claims 1 to 7, it obtains calibration data for calibrating the digital-to-analog converter output signal and stores the calibration data in the calibration memory. The digital-to-analog converter reads calibration data from the calibration memory, calibrates the current test excitation signal into the corresponding theoretical analog test signal based on the calibration data, and sends the calibration test signal to the device under test.

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