Circuit board, circuit board assembly and electronic equipment

Abstract

The invention discloses a circuit board, a circuit board assembly and electronic equipment, and belongs to the technical field of electronic products. The electronic board comprises at least one device layout area, at least a first bonding pad group and a second bonding pad group are arranged in the device layout area, the first bonding pad group is used for arranging a first device unit, and the second bonding pad group is used for arranging a second device unit; the first bonding pad group comprises a first metal bonding pad and a second metal bonding pad which are arranged at an interval, the second bonding pad group comprises a third metal bonding pad and a fourth metal bonding pad which are arranged at an interval, the second metal bonding pad and the third metal bonding pad are arranged adjacently, and the second metal bonding pad and the third metal bonding pad are bonding pads of the same electrical network; the solder mask layer is provided with at least one solder mask window, the solder mask windows are in one-to-one correspondence with the metal pads, and at least part of the surfaces of the metal pads are exposed by the solder mask windows; and the solder resist window of the second metal bonding pad and the solder resist window of the third metal bonding pad are mutually connected to form a solder resist through window.

Description

Technical Field

[0001] This application belongs to the field of electronic product technology, specifically relating to a circuit board, circuit board assembly, and electronic device. Background Technology

[0002] Currently, printed circuit board assemblies (PCBAs) for electronic devices such as smartphones and wearable devices consist of a PCB substrate, integrated circuits, and discrete components such as resistors, capacitors, and inductors interconnected by soldering. The standard package design of discrete components includes elements such as the body shape, pad size, and solder mask openings.

[0003] In traditional PCB design, to prevent solder from forming unnecessary short circuits between adjacent pads, a certain amount of solder mask layer is usually required between the pads, forming solder mask bridges. Solder mask bridges occupy a certain amount of space, thus limiting the minimum physical spacing that can be achieved between the pads.

[0004] However, with the increasing complexity of electronic products and the growing demand for battery capacity, how to reduce the layout spacing between metal pads and increase the device layout density of circuit boards is an urgent technical problem to be solved. Summary of the Invention

[0005] The purpose of this application is to provide a circuit board, circuit board assembly, and electronic device that can solve the problem of how to reduce the layout spacing between metal pads and increase the device layout density of the circuit board.

[0006] To solve the above-mentioned technical problems, this application is implemented as follows:

[0007] In a first aspect, embodiments of this application provide a circuit board, including:

[0008] At least one device layout area, wherein at least a first pad group and a second pad group are provided in the device layout area, the first pad group is used to arrange a first device unit, and the second pad group is used to arrange a second device unit.

[0009] The first pad group includes a first metal pad and a second metal pad arranged at intervals, the second pad group includes a third metal pad and a fourth metal pad arranged at intervals, the second metal pad and the third metal pad are arranged adjacent to each other, and the second metal pad and the third metal pad are pads of the same electrical network.

[0010] A solder resist layer, wherein at least one solder resist opening is formed on the solder resist layer, the solder resist opening corresponds one-to-one with a metal pad, and the solder resist opening exposes at least a portion of the surface of the metal pad;

[0011] The solder mask opening of the second metal pad and the solder mask opening of the third metal pad are connected to each other to form a solder mask through window.

[0012] In a second aspect, embodiments of this application provide a circuit board assembly, including the circuit board as described in the first aspect, as well as a first device unit and a second device unit;

[0013] A second gap is formed between the first device unit and the second device unit.

[0014] Third aspect: Embodiments of this application provide an electronic device, including a circuit board assembly as described in the second aspect.

[0015] In this embodiment, at least one device layout area is provided on the circuit board. The device layout area includes at least a first pad group and a second pad group. The first pad group is used to arrange a first device unit, and the second pad group is used to arrange a second device unit. The first pad group includes a first metal pad and a second metal pad spaced apart. The second pad group includes a third metal pad and a fourth metal pad spaced apart. The second metal pad and the third metal pad are adjacent to each other and are on the same electrical network. At least one solder mask opening is provided on the solder mask layer. The solder mask opening corresponds one-to-one with the metal pads and exposes at least a portion of the surface of the metal pads. The solder mask openings of the second and third metal pads are interconnected to form a solder mask through-window. In this embodiment, by connecting the solder mask openings of at least two metal pads belonging to the same electrical network to form a solder mask through-window, the solder mask bridge between adjacent metal pads is eliminated. This removes the minimum physical spacing between metal pads of the same electrical network from the influence of the solder mask bridge, allowing components on the metal pads of the same electrical network to be placed closer together, thus improving the layout density of electronic devices. Moreover, by eliminating the solder mask bridge between two metal pads of the same electrical network, in a structure where the two metal pads are close to each other, during reflow soldering, the device unit will not be obstructed by the stepped solder mask bridge, preventing uneven stress at both ends of the device unit from causing one end to lift up, thus improving the stability of device soldering. Attached Figure Description

[0016] Figure 1 One of the structural schematic diagrams showing the device layout area in a circuit board according to an embodiment of the present invention;

[0017] Figure 2 A second schematic diagram illustrating the structure of the device layout area in a circuit board according to an embodiment of the present invention;

[0018] Figure 3 One of the schematic diagrams showing the structure of the first pad group in a circuit board according to an embodiment of the present invention;

[0019] Figure 4 Third schematic diagram illustrating the structure of the device layout area in a circuit board according to an embodiment of the present invention;

[0020] Figure 5 Fourth schematic diagram showing the structural layout area of ​​the device layout area in the circuit board according to an embodiment of the present invention;

[0021] Figure 6 Fifth schematic diagram showing the structure of the device layout area in the circuit board according to an embodiment of the present invention;

[0022] Figure 7 Sixth schematic diagram illustrating the structure of the device layout area in a circuit board according to an embodiment of the present invention;

[0023] Figure 8 A second schematic diagram illustrating the structure of the first pad group in a circuit board according to an embodiment of the present invention;

[0024] Figure 9 Seventh schematic diagram showing the structural layout area of ​​the device layout area in the circuit board according to an embodiment of the present invention;

[0025] Figure 10 Eighth schematic diagram showing the structural layout area of ​​the device layout area in the circuit board according to an embodiment of the present invention;

[0026] Figure 11 Schematic diagram nine illustrating the structure of the device layout area in a circuit board according to an embodiment of the present invention;

[0027] Figure 12 Schematic diagram ten illustrating the device layout area in a circuit board according to an embodiment of the present invention;

[0028] Figure 13 Eleventh schematic diagram showing the structural layout area of ​​the device layout area in the circuit board according to an embodiment of the present invention;

[0029] Figure 14 The third schematic diagram illustrating the structure of the first pad group in a circuit board according to an embodiment of the present invention;

[0030] Figure 15 12. A schematic diagram showing the device layout area in a circuit board according to an embodiment of the present invention;

[0031] Figure 16 Thirteenth schematic diagram showing the structure of the device layout area in the circuit board according to an embodiment of the present invention;

[0032] Figure 17 Fourteenth schematic diagram illustrating the structure of the device layout area in a circuit board according to an embodiment of the present invention;

[0033] Figure 18 Fifteenth schematic diagram showing the structural layout area of ​​the device layout area in the circuit board according to an embodiment of the present invention;

[0034] Figure 19 Sixteenth schematic diagram showing the structure of the device layout area in the circuit board according to an embodiment of the present invention;

[0035] Figure 20 Fourth schematic diagram illustrating the structure of the first pad group in a circuit board according to an embodiment of the present invention;

[0036] Figure 21 Seventeenth schematic diagram showing the structural layout area of ​​the device layout area in the circuit board according to an embodiment of the present invention;

[0037] Figure 22 Eighteenth schematic diagram showing the structural layout area of ​​the device layout area in the circuit board according to an embodiment of the present invention;

[0038] Figure 23 Nineteenth schematic diagram showing the structural layout area of ​​the device layout area in the circuit board according to an embodiment of the present invention;

[0039] Figure 24 Schematic diagram 20 showing the device layout area in a circuit board according to an embodiment of the present invention;

[0040] Figure 25 Schematic diagram twenty-one showing the structural layout area of ​​the device layout region in the circuit board according to an embodiment of the present invention;

[0041] Figure 26 Fifth schematic diagram illustrating the structure of the first pad group in a circuit board according to an embodiment of the present invention;

[0042] Figure 27 Schematic diagram twenty-two illustrating the structure of the device layout area in a circuit board according to an embodiment of the present invention;

[0043] Figure 28 Schematic diagram twenty-three illustrating the device layout area in a circuit board according to an embodiment of the present invention;

[0044] Figure 29 Schematic diagram twenty-four of the present invention showing the structural layout area of ​​the device layout region in a circuit board according to an embodiment of the present invention;

[0045] Figure 30 Schematic diagram twenty-five illustrating the device layout area in a circuit board according to an embodiment of the present invention;

[0046] Figure 31 Sixth schematic diagram illustrating the structure of the first pad group in a circuit board according to an embodiment of the present invention;

[0047] Figure 32 Seventh schematic diagram illustrating the structure of the first pad group in a circuit board according to an embodiment of the present invention;

[0048] Figure 33A schematic diagram showing the structure of the second pad group in a circuit board according to an embodiment of the present invention;

[0049] Figure 34 One of the cross-sectional schematic diagrams of a circuit board assembly according to an embodiment of the present invention;

[0050] Figure 35 A second cross-sectional schematic diagram of a circuit board assembly according to an embodiment of the present invention;

[0051] Figure 36 A third cross-sectional schematic diagram of a circuit board assembly according to an embodiment of the present invention;

[0052] Figure 37 Fourth cross-sectional schematic diagram of a circuit board assembly according to an embodiment of the present invention;

[0053] Figure 38 Fifth cross-sectional schematic diagram of a circuit board assembly according to an embodiment of the present invention;

[0054] Figure 39 Sixth schematic cross-sectional view of a circuit board assembly according to an embodiment of the present invention;

[0055] Figure 40 Seventh cross-sectional schematic diagram of a circuit board assembly according to an embodiment of the present invention;

[0056] Figure 41 Eighth cross-sectional schematic diagram of a circuit board assembly according to an embodiment of the present invention;

[0057] Figure 42 Ninth schematic cross-sectional view of a circuit board assembly according to an embodiment of the present invention;

[0058] Figure 43 This is the tenth cross-sectional schematic diagram of a circuit board assembly according to an embodiment of the present invention.

[0059] Explanation of reference numerals in the attached figures:

[0060] 10 - Device layout area; 100 - Device layout frame; 101 - First pad group; b1 - First metal pad; b2 - Second metal pad; 102 - Second pad group; b3 - Third metal pad; b4 - Fourth metal pad; 103 - Third pad group; 20 - Solder mask layer; 201 - First solder mask opening; 202 - Second solder mask opening; 203 - Third solder mask opening; 204 - Fourth solder mask opening; 205 - Fifth solder mask opening; 206 - Sixth solder mask opening; L1 - First contour edge; L2 - Second contour edge; L3 - Third contour edge; L4 - Fourth contour edge; D - Recessed area; F - Raised area; a1 - First device unit; a2 - Second device unit; a3 - Third device unit; c - Solder mask through window; d - Solder paste; S1 - First gap spacing; S2 - Second gap spacing. Detailed Implementation

[0061] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0062] The terms "first," "second," etc., used in the specification and claims of this application are used to distinguish similar objects and not to describe a specific order or sequence. It should be understood that such use of data can be interchanged where appropriate so that embodiments of this application can be implemented in orders other than those illustrated or described herein. Furthermore, in the specification and claims, "and / or" indicates at least one of the connected objects, and the character " / " generally indicates that the preceding and following objects are in an "or" relationship.

[0063] The control method provided in this application will be described in detail below with reference to the accompanying drawings, through specific embodiments and application scenarios.

[0064] Please refer to Figures 1 to 33 This invention provides a circuit board, comprising:

[0065] At least one device layout area 10, wherein at least a first pad group 101 and a second pad group 102 are provided in the device layout area 10, the first pad group 101 is used to arrange the first device unit a1, and the second pad group 102 is used to arrange the second device unit a2.

[0066] The first pad group 101 includes a first metal pad b1 and a second metal pad b2 arranged at intervals, and the second pad group 102 includes a third metal pad b3 and a fourth metal pad b4 arranged at intervals. The second metal pad b2 and the third metal pad b3 are arranged adjacent to each other, and the second metal pad b2 and the third metal pad b3 are pads of the same electrical network.

[0067] Solder mask layer 20, with at least one solder mask opening on the solder mask layer 20, the solder mask opening corresponding to a metal pad, the solder mask opening exposing at least a portion of the surface of the metal pad;

[0068] Among them, the solder mask opening of the second metal pad b2 and the solder mask opening of the third metal pad b3 are connected to each other to form a solder mask through window c.

[0069] In the above embodiments, compared with traditional circuit board designs, the embodiments of this application connect the solder mask openings of at least two metal pads belonging to the same electrical network to form a solder mask through window, thereby eliminating the solder mask bridge between adjacent metal pads. This means that the minimum physical distance between metal pads of the same electrical network is no longer limited by the influence of the solder mask bridge, allowing components on metal pads of the same electrical network to be closer together, thus improving the layout density of electronic devices.

[0070] Furthermore, by eliminating the solder mask bridge between the two metal pads of the same electronic network, in a structure where the two metal pads are close to each other, the device unit will not be obstructed by the stepped solder mask bridge during reflow soldering, which would cause one end of the device unit to lift up due to uneven force, thus improving the stability of device soldering.

[0071] In a specific implementation, the circuit board includes a substrate 30, at least one device layout area 10 is formed on the substrate 30 (i.e., the carrier board), and solder mask openings provided on the solder mask layer 20 are formed on the metal pads to expose part or all of the surface of the pads.

[0072] For example, in applications where the metal pad type is Non-Solder Mask Defined (NSMD), the size of the solder mask opening is larger than the size of the metal pad, exposing the entire surface of the metal pad. Specifically, the opening area of ​​the first solder mask opening 201 is larger than the area occupied by the first metal pad b1; the opening area of ​​the second solder mask opening 202 is larger than the area occupied by the second metal pad b2; the opening area of ​​the third solder mask opening 203 is larger than the area occupied by the third metal pad b3; and the opening area of ​​the fourth solder mask opening 204 is larger than the area occupied by the fourth metal pad b4.

[0073] For example, in applications where the metal pad type is Solder Mask Defined (SMD), the size of the solder mask window is larger than the size of the metal pad, exposing part of the metal pad's surface. Specifically, the opening area of ​​the first solder mask window 201 is smaller than the area occupied by the first metal pad b1; the opening area of ​​the second solder mask window 202 is smaller than the area occupied by the second metal pad b2; the opening area of ​​the third solder mask window 203 is smaller than the area occupied by the third metal pad b3; and the opening area of ​​the fourth solder mask window 204 is smaller than the area occupied by the fourth metal pad b4.

[0074] Optionally, the metal pads can be copper pads or pads made of other metals, without any specific limitation.

[0075] In practical implementation, the pad structure consists of: a copper layer, a solder mask window layer, and a stencil layer. In SMD design, the solder mask layer covers the edge of the copper pad, leaving only the central area of ​​the copper pad. The solder mask layer directly contacts the edge of the pad, without a copper ring. The effective area of ​​the copper pad is the size of the solder mask window. In NSMD design, the copper pad is fully exposed, the solder mask layer does not overlap with the pad, and a ring of copper foil is retained around the pad. The effective area of ​​the copper pad is the original size of the copper foil.

[0076] It should be noted that there is no limit to the number of pads that can be placed in the same device layout area.

[0077] For example, in Figure 1 , Figure 6 , Figure 11 , Figure 12 , Figure 17 , Figure 18 , Figure 23 , Figure 24 In the example shown, two pad groups are arranged along a straight line in the same device layout area 10, including a first pad group 101 and a second pad group 102. Figure 2 , Figure 7 , Figure 13 , Figure 19 , Figure 25 As shown in the identification box of the device unit, the first pad group 101 is used to arrange the first device unit a1, and the second pad group 102 is used to arrange the second device unit a2. Taking the NSMD pad type as an example, the solder mask layer 20 has a first solder mask opening 201, a second solder mask opening 202, a third solder mask opening 203, and a fourth solder mask opening 204; the first solder mask opening 201 exposes the entire surface of the first metal pad b1; the second solder mask opening 202 exposes the entire surface of the second metal pad b2; the third solder mask opening 203 exposes the entire surface of the third metal pad b3; the fourth solder mask opening 204 exposes the entire surface of the fourth metal pad b4; the solder mask openings of the second metal pad b2 and the third metal pad b3 are interconnected to form a solder mask through-window c.

[0078] Understandably, following a similar layout, more metal pads belonging to the same electrical network can be placed in the same device layout area, and the solder mask bridges between the metal pads can be eliminated, making the solder mask windows of adjacent metal pads interconnected. For example, if there is at least one intermediate device among multiple series discrete devices (such as resistors and capacitors), and the metal pads at both ends of the intermediate device are interconnected with the adjacent metal pads in the same network, then the solder mask window design of two metal pads can be extended to a series chain of three or more pad groups.

[0079] For example, in Figure 4 , Figure 9 , Figure 15 , Figure 21 , Figure 27 In the example shown, three pad groups are arranged along a straight line in the same device layout area 10, including a first pad group 101, a second pad group 102, and a third pad group 103. Figure 5 , Figure 10 , Figure 16 , Figure 22 , Figure 28 As shown in the identification box of the device unit, the first pad group 101 is used to arrange the first device unit a1, the second pad group 102 is used to arrange the second device unit a2, and the third pad group 103 is used to arrange the third device unit a3. Specifically, the first pad group 101 includes a first metal pad b1 and a second metal pad b2 spaced apart; the second pad group 102 includes a third metal pad b3 and a fourth metal pad b4 spaced apart, with the second metal pad b2 and the third metal pad b3 adjacent to each other; and the third pad group 103 includes a fifth metal pad b5 and a sixth metal pad b6 spaced apart, with the fourth metal pad b4 and the fifth metal pad b5 adjacent to each other. Taking the NSMD pad structure type as an example, the solder mask layer 20 also has a fifth solder mask opening 205 and a sixth solder mask opening 206. The fifth solder mask opening 205 exposes the entire surface of the fifth metal pad b5, and the sixth solder mask opening 206 exposes the entire surface of the sixth metal pad b6. The fourth weld resistance window 204 and the fifth weld resistance window 205 are connected to form a weld resistance through window c.

[0080] The above example is only illustrative of the NSMD pad structure type; however, the solution of this application can also be applied to the SMD pad structure type. For example, for... Figure 20 This illustration shows the NSMD pad structure type. If the pad structure type is SMD, then the first pad group 101 can be as follows: Figure 31 As shown, the size of the solder mask opening is smaller than the size of the metal pad.

[0081] It should be noted that setting two or three pad groups in the same device layout area 10 is only an example, and this application is not limited to this. In specific implementation, more pad groups can be set in series, which will not be listed here.

[0082] Optionally, such as Figures 1 to 28 In this context, each pad group is identified by a device layout box 100, and the same device layout area 10 consists of multiple device layout boxes 100.

[0083] For example, in Figure 1 , Figure 6 , Figure 11 , Figure 12 , Figure 17 , Figure 18 , Figure 23 , Figure 24In the example shown, the device layout frame 100 of the first pad group 101 and the device layout frame 100 of the second pad group 102 together constitute a device layout area 10.

[0084] For example, in Figure 4 , Figure 9 , Figure 15 , Figure 21 , Figure 27 In the example shown, the device layout frame 100 of the first pad group 101, the device layout frame 100 of the second pad group 102, and the device layout frame 100 corresponding to the third pad group 103 together constitute a device layout area 10.

[0085] In some embodiments of this application, a first gap S1 is provided between the second metal pad b2 and the third metal pad b3.

[0086] For example, in Figure 1 , Figure 2 , Figure 4 , Figure 5 , Figure 11 , Figure 18 , Figure 23 , Figure 25 In the example shown, the second metal pad b2 and the third metal pad b3 are spaced apart from each other, and the solder mask openings of the second metal pad b2 and the third metal pad b3 are connected, so that the solder mask layer between the second metal pad b2 and the third metal pad b3 is removed, forming a continuous and larger opening area.

[0087] like Figure 41 As shown, during solder reflow, solder paste can fill the first gap S1, forming a single continuous solder joint between the second metal pad b2 and the third metal pad b3, thus increasing the soldering area. This allows for increased density of network components while enhancing the connection strength between the component units and the circuit board. Of course, as... Figure 40 As shown, when solder reflow is performed, the solder paste may not fill the first gap S1.

[0088] In some embodiments of this application, the second metal pad b2 and the third metal pad b3 are interconnected to form a pad connection area.

[0089] For example, in Figure 6 , Figure 7 , Figure 9 , Figure 10 , Figure 12 , Figure 15 , Figures 19 to 22 , Figure 24 , Figures 31 to 36In the example shown, the second metal pad b2 and the third metal pad b3 are interconnected to form a pad connection area, and the first pad group 101 and the second pad group 102 achieve zero spacing. The solder mask openings (i.e., the second solder mask opening 202 and the third solder mask opening 203) of the second metal pad b2 and the third metal pad b3 are connected on opposite sides to form a solder mask through window, which removes the solder mask layer between the second metal pad b2 and the third metal pad b3, forming a continuous and larger opening area. This further reduces the layout spacing between device units and enhances the connection strength between device units and the circuit board. Moreover, since the two metal pads are physically connected on the copper layer, the potential risk of electrical disconnection due to insufficient or uneven solder can be eliminated.

[0090] Optionally, Figures 6 to 9 In this design, the interconnect sides of two adjacent metal pads are designed with right-angled edges to form smooth, integrated pads and avoid the formation of irregularly shaped pads.

[0091] In some embodiments of this application, such as Figure 1 In the process, the solder mask opening of the second metal pad b2 has a first contour edge L1 and a second contour edge L2 that are arranged opposite to each other; the solder mask opening of the third metal pad b3 has a third contour edge L3 and a fourth contour edge L4 that are arranged opposite to each other; the first contour edge L1 and the third contour edge L3 are connected to form a first linear boundary of the solder mask opening c; the third contour edge L3 and the fourth contour edge L4 are connected to form a second linear boundary of the solder mask opening c; the first linear boundary is opposite to the second linear boundary.

[0092] It should be noted that the first linear boundary and the second linear boundary are window edges with a straight-line trend. They do not have to be absolutely straight lines. The edges that are connected to each other can form a smooth and integrated window.

[0093] In this embodiment, by connecting the second solder resist window 202 and the third solder resist window 203 to form a linear boundary, the second solder resist window 202 and the third solder resist window 203 can form a continuous and regular solder resist through window, such as... Figure 1 , Figures 4 to 7 , Figures 9 to 16 , Figures 23 to 30 In the middle, the solder resist window is a regular rounded rectangular window.

[0094] It should be noted that solder paste is printed onto the PCB via a stencil. The shape of the openings on the stencil corresponds one-to-one with the solder mask openings on the PCB. A regular solder mask opening ensures that the openings on the stencil are also regular. Regular stencil openings ensure the accuracy of solder paste printing, allowing the solder paste to evenly fill the entire opening area, thereby guaranteeing the quality of the solder joints.

[0095] In some embodiments of this application, when the second metal pad b2 and the third metal pad b3 are interconnected to form a pad communication area, at least one of the second metal pad b2 and the third metal pad b3 has a recessed region D on its adjacent side, and the protruding portions on both sides of the recessed region D serve as the connection ends of the second metal pad b2 and the third metal pad b3. Figure 14 As shown, this is a schematic diagram of the first pad group 101. A second solder mask opening 202 is provided above the second metal pad b2 in the first pad group 101. The second metal pad b2 has a recessed area D on the side near the third metal pad b3. Similarly, as... Figure 12 In the middle, the third solder mask opening 203 and the third metal pad b3 are with Figure 14 The structure is similar to that in [the text].

[0096] like Figures 12 to 13 In this design, the second metal pad b2 and the third metal pad b3 are positioned on opposite sides as a recessed region D. The second solder mask opening 202 and the third solder mask opening 203 are interconnected to form a first linear boundary and a second linear boundary. This design achieves two advantages: firstly, when the second solder mask opening 202 and the third solder mask opening 203 are connected, a continuous and regular solder mask window is formed, avoiding irregular or jagged transitions that may result from curved edges. Secondly, when the second metal pad b2 and the third metal pad b3 are interconnected, a narrower connected soldering area is formed, thereby reducing the amount of solder bridging between the two metal pads and lowering the risk of device cell misalignment due to solder bridging.

[0097] It should be noted that the recessed region D on both the second metal pad b2 and the third metal pad b3 is only one implementation example; in a specific implementation, the recessed region D can also be set on the second metal pad b2, with the raised portion of the recessed region D connected to the third metal pad b3; or, the recessed region D can be set on the third metal pad b3, with the raised portion of the recessed region D connected to the second metal pad b2. This achieves two relatively narrow solder joint areas between the second metal pad b2 and the third metal pad b3.

[0098] The openings in the stencil can match the regular outline defined by the regular windows, thereby ensuring the accuracy and uniformity of solder paste printing.

[0099] In some embodiments of this application, at least one of the second metal pad b2 and the third metal pad b3 has a raised region F on one side close to each other, the raised region F connecting the second metal pad b2 and the third metal pad b3 to form the pad connection area; the opening profile of the solder mask window c matches the overall profile of the pad connection area, and the solder mask window c exposes at least a portion of the surface of the pad connection area.

[0100] like Figure 20 The diagram shows a schematic of the first pad group 101. A second solder mask opening 202 is provided above the second metal pad b2 in the first pad group 101. The second metal pad b2 has a raised area F on the side near the third metal pad b3. The opening shape of the second solder mask opening 202 encloses the second metal pad b2, ensuring that the solder mask opening of the protruding metal pad is matched to the manufacturing tolerance. Similarly, as... Figure 18 In the middle, the third solder mask opening 203 and the third metal pad b3 are with Figure 20 The structures shown are similar. The raised region F serves as the connection area between the second metal pad b2 and the third metal pad b3.

[0101] It should be noted that the raised region F on both the second metal pad b2 and the third metal pad b3 is only one example of implementation. In specific implementations, a raised region F can also be provided on the second metal pad b2, with the raised portion of the raised region F connected to the third metal pad b3; or, a raised region F can be provided on the third metal pad b3, with the raised portion of the raised region F connected to the second metal pad b2. In this way, on the one hand, when the second metal pad b2 and the third metal pad b3 are interconnected, a narrower connected soldering area can be formed, thereby reducing the amount of solder bridging between the two metal pads and reducing the risk of device cell displacement due to solder bridging; on the other hand, during reflow soldering, the narrower connection formed between the second solder mask opening 202 and the third solder mask opening 203 can provide a clear boundary guide for solder flow, precisely defining the diffuseable range of the solder.

[0102] It should be pointed out that, Figure 20 This illustration shows the NSMD pad structure type. If the pad structure type is SMD, then the first pad group 101 can be as follows: Figure 31 As shown, the size of the solder mask opening is smaller than the size of the metal pad.

[0103] It should be noted that the shapes of the metal pads and solder mask openings described above in this application are merely examples and can be adjusted according to actual needs. This application does not limit them. In specific implementations, the shapes of the metal pads and solder mask openings can be diverse and can be combinations of multiple shapes.

[0104] For example, such as Figures 1 to 5 In this design, the first metal pad b1, the second metal pad b2, the third metal pad b3, and the fourth metal pad b4 are all rounded rectangular structures. The edge contours of the second solder mask opening 202 and the third solder mask opening 203 are connected to form opposing first and second linear boundaries, resulting in a continuous and regular solder mask through-window. The openings in the stencil can match the regular outer contour defined by the regular solder mask through-window, thereby ensuring the accuracy and uniformity of solder paste printing.

[0105] For example, such as Figures 6 to 10 In this design, the first metal pad b1 and the fourth metal pad b4 are both rounded rectangles. The outlines of the second metal pad b2 and the third metal pad b3 are connected to form a rounded rectangle metal pad connection area. The edge outlines of the second solder mask opening 202 and the third solder mask opening 203 are connected to form opposing first and second linear boundaries, realizing a rounded rectangle solder mask window. This minimizes the deviation between the solder mask opening and the metal pads, ensuring that the boundary of the solder mask opening is at the same height as the boundary of the metal pad, thus avoiding uneven solder paste printing caused by irregular solder mask openings or mismatch with the metal pads. Furthermore, the openings in the stencil match the regular outer contour defined by the connection window, ensuring the accuracy and uniformity of the solder paste printing.

[0106] For example, such as Figure 23 , Figure 24 , Figure 26 , Figure 27 In this design, both the second metal pad b2 and the third metal pad b3 have raised areas F, which are connected or spaced apart. The second solder mask opening 202 and the third solder mask opening 203 are connected to form a first linear boundary and a second linear boundary, realizing a rounded rectangular solder mask window. Furthermore, when the second metal pad b2 and the third metal pad b3 are interconnected, a narrower connected soldering area can be formed, thereby reducing the amount of solder bridging between the two metal pads and lowering the risk of device unit displacement due to solder bridging. The openings in the stencil can match the regular external contour defined by the regular solder mask window, thus ensuring the accuracy and uniformity of solder paste printing.

[0107] For example, such as Figure 18 In the design, the first metal pad b1 and the fourth metal pad b4 are both rounded rectangular structures. The second metal pad b2 and the third metal pad b3 have raised areas F on their adjacent sides, with a first gap S1 between the raised areas F. The shape of the solder mask windows formed by the second solder mask opening 202 and the third solder mask opening 203 encloses the second metal pad b2 and the third metal pad b3. During reflow soldering, the narrow connection formed between the second solder mask opening 202 and the third solder mask opening 203 provides a clear boundary guide for the solder flow, precisely defining the diffusion range of the solder.

[0108] For example, such as Figure 29In this design, the first metal pad b1, the second metal pad b2, the third metal pad b3, and the fourth metal pad b4 are all polygonal structures; the first solder mask opening 201 and the fourth solder mask opening 204 are polygonal structures that match the metal pad structures; the edge contours of the second solder mask opening 202 and the third solder mask opening 203 are connected to form opposing first and second linear boundaries, resulting in a continuous and regular solder mask through-window. The openings in the stencil can match the regular outer contour defined by the regular solder mask through-window, thereby ensuring the accuracy and uniformity of solder paste printing.

[0109] It should be noted that the above examples all illustrate structures where the solder mask opening is larger than the metal pad. However, this application is not limited thereto. Figures 31 to 32 The image shows an example of a structure where the solder mask opening of the first pad group 101 is smaller than that of the metal pad, as shown below. Figure 33 The image shows an example of a structure where the solder mask opening of the second pad group 102 is smaller than that of the metal pad. Figure 3 The second pad group shown can be used as Figure 9 The intermediate pad is located between the first pad group 101 and the third pad group 103. Since the positional relationship of the pad groups is similar to the example where the solder mask opening is larger than the metal pad, this application will not provide specific examples of pad structures where the solder mask opening is smaller than the metal pad.

[0110] See Figures 34 to 43 This application also provides a circuit board assembly, including the circuit board as described above, and a first device unit a1 and a second device unit a2; wherein a second gap S2 is formed between the first device unit a1 and the second device unit a2.

[0111] The circuit board assembly in this embodiment enables the minimum physical spacing between metal pads on the same electrical network to no longer be limited by the solder mask bridge, allowing components on the metal pads on the same electrical network to be closer together, thus improving the layout density of electronic devices.

[0112] In some embodiments of this application, the second gap interval S2 is filled with solder paste d, or the second gap interval S2 is an open space.

[0113] For example, such as Figure 35 , Figure 36 , Figure 37 and Figure 39 The diagram shows a second gap S2 filled with solder paste d. The amount of solder paste d can be adjusted according to actual needs.

[0114] For example, such as Figure 38 The diagram shows a schematic of the second gap interval S2 being an open space. Figure 38In the second gap S2, there is a connected area where solder paste is not filled and part of the metal pads are exposed.

[0115] In some embodiments of this application, the second gap interval S2 and the first gap interval S1 form a connected gap interval; the connected gap interval is filled with solder paste d, or the connected gap interval is an open space.

[0116] For example, such as Figure 40 In this configuration, the second gap spacing S2 and the first gap spacing S1 form a connected gap spacing, which is an open space, meaning that there is no solder connection between device units; for example... Figure 41 In this configuration, the second gap S2 and the first gap S1 form a connected gap, which is filled with solder paste d, i.e., solder bridging between device units. The amount of solder bridging can be controlled and adjusted according to actual needs.

[0117] In some embodiments of this application, the first device unit a1 is a discrete device and the second device unit a2 is an integrated circuit device; or, both the first device unit a1 and the second device unit a2 are discrete devices; or, both the first device unit a1 and the second device unit a2 are integrated circuit devices.

[0118] For example, such as Figure 34 , Figure 35 , Figures 38 to 41 , Figure 43 The diagram shows that the first device unit a1 and the second device unit a2 are discrete devices; Figure 37 The diagram shows that the first device unit a1 is a discrete device and the second device unit a2 is an integrated circuit device. Figure 36 and Figure 42 The diagram shows a schematic of an integrated circuit device with first device unit a1 and second device unit a2.

[0119] Optionally, integrated circuit (IC) devices include, but are not limited to, IC packaged devices such as Quad Flat No-leads Package (QFN) and Ball Grid Array (BGA); discrete devices include, but are not limited to, resistors, capacitors, inductors, Transient Voltage Suppression Diodes (TVS), three-terminal capacitors, and other device types.

[0120] It should be noted that other devices besides the first device unit a1 and the second device unit a2 can also be placed on the circuit board assembly. If multiple intermediate devices exist in multiple device units, and the metal pads at both ends of each device are interconnected with adjacent metal pads on the same network, then the design of the solder mask window c of the two metal pads can be extended to, for example... Figure 38 , Figure 39 and Figure 43 A series chain of three pad groups, or four or more pad groups, and does not limit the device types of multiple device units in the series chain.

[0121] Furthermore, embodiments of this application also provide an electronic device, including the circuit board assembly described above.

[0122] By employing the aforementioned circuit board assembly, the minimum physical spacing between metal pads of the same electrical network is no longer limited by solder mask bridges. This allows components on the same metal pads to be placed closer together, increasing the layout density of electronic components. Furthermore, by eliminating the solder mask bridge between two metal pads of the same electronic network, in a structure where the two metal pads are close together, during reflow soldering, the device unit will not experience uneven stress at both ends due to the stepped solder mask bridge, thus improving the stability of the device soldering.

[0123] It should be noted that, in this document, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes that element. Furthermore, it should be noted that the scope of the methods and apparatuses in the embodiments of this application is not limited to performing functions in the order shown or discussed, but may also include performing functions substantially simultaneously or in the reverse order, depending on the functions involved. For example, the described methods may be performed in a different order than described, and various steps may be added, omitted, or combined. Additionally, features described with reference to certain examples may be combined in other examples.

[0124] The embodiments of this application have been described above with reference to the accompanying drawings. However, this application is not limited to the specific embodiments described above. The specific embodiments described above are merely illustrative and not restrictive. Those skilled in the art can make many other forms under the guidance of this application without departing from the spirit and scope of the claims, and all of these forms are within the protection scope of this application.

Claims

1. A circuit board, characterized in that, include: At least one device layout area, wherein at least a first pad group and a second pad group are provided in the device layout area, the first pad group is used to arrange a first device unit, and the second pad group is used to arrange a second device unit. The first pad group includes a first metal pad and a second metal pad arranged at intervals, the second pad group includes a third metal pad and a fourth metal pad arranged at intervals, the second metal pad and the third metal pad are arranged adjacent to each other, and the second metal pad and the third metal pad are pads of the same electrical network. A solder resist layer, wherein at least one solder resist opening is formed on the solder resist layer, the solder resist opening corresponds one-to-one with a metal pad, and the solder resist opening exposes at least a portion of the surface of the metal pad; The solder mask opening of the second metal pad and the solder mask opening of the third metal pad are connected to each other to form a solder mask through window.

2. The circuit board according to claim 1, characterized in that, There is a first gap between the second metal pad and the third metal pad.

3. The circuit board according to claim 1, characterized in that, The second metal pad and the third metal pad are interconnected to form a pad connection area.

4. The circuit board according to claim 2 or 3, characterized in that, The solder mask opening of the second metal pad has a first contour edge and a second contour edge that are disposed opposite to each other; the solder mask opening of the third metal pad has a third contour edge and a fourth contour edge that are disposed opposite to each other. The first contour edge and the third contour edge are connected to form the first linear boundary of the solder mask through-window; the third contour edge and the fourth contour edge are connected to form the second linear boundary of the solder mask through-window; The first linear boundary is opposite to the second linear boundary.

5. The circuit board according to claim 4, characterized in that, When the second metal pad and the third metal pad are connected to each other to form a pad communication area, at least one of the second metal pad and the third metal pad has a recessed area on the side that is close to each other, and the protruding portions on both sides of the recessed area serve as the connection ends of the second metal pad and the third metal pad.

6. The circuit board according to claim 3, characterized in that, At least one of the second metal pad and the third metal pad has a raised area on one side that is close to each other, and the raised area connects the second metal pad and the third metal pad to form the pad communication area; The opening profile of the solder mask window matches the overall profile of the pad connection area, and the solder mask window exposes at least a portion of the surface of the pad connection area.

7. A circuit board assembly, characterized in that, It includes the circuit board as described in any one of claims 1 to 6, and the first device unit and the second device unit; A second gap is formed between the first device unit and the second device unit.

8. The circuit board assembly according to claim 7, characterized in that, The second gap is filled with solder paste, or the second gap is an open space.

9. The circuit board assembly according to claim 7, characterized in that, The second gap interval and the first gap interval form a connected gap interval; The connecting gap is filled with solder paste, or the connecting gap is an open space.

10. The circuit board assembly according to claim 7, characterized in that, The first device unit is a discrete device, and the second device unit is an integrated circuit device; or... Both the first device unit and the second device unit are discrete devices; or, Both the first device unit and the second device unit are integrated circuit devices.

11. An electronic device, characterized in that, Includes the circuit board assembly as described in any one of claims 7 to 10.

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