Layout via merging method and device, computer equipment and storage medium
By generating vertically and horizontally extended merged rectangles using the scan line method, the problems of low efficiency and incorrect merging of vias in advanced packaging are solved, achieving efficient and accurate via merging processing.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- XPEEDIC CO LTD
- Filing Date
- 2026-02-06
- Publication Date
- 2026-05-01
AI Technical Summary
In advanced packaging, via merging is inefficient and prone to introducing design errors. Existing methods are inefficient in large-scale via processing and are prone to mistakenly merging adjacent but electrically isolated vias.
The via is traversed using the scan line method. By generating vertically and horizontally extended merged rectangles, the connection relationship is constructed based on the spatial relationship of the rectangles within the group, thus generating the via merged graphic, avoiding complex geometric Boolean operations.
It improves the efficiency and accuracy of via merging, eliminates via gaps, and achieves fast and accurate via merging.
Smart Images

Figure CN121683678B_ABST
Abstract
Description
Technical Field
[0001] This application relates to a layout via merging method, apparatus, computer equipment, and storage medium, belonging to the field of EDA model layout simulation technology. Background Technology
[0002] In the semiconductor industry, traditional packaging mainly focuses on connecting the pins of a single chip to the package housing, and then connecting the housing pins to the circuit board. Its layout structure is relatively simple, mainly consisting of traces and pads. Advanced packaging layout, on the other hand, refers to the physical design for achieving high-performance, high-density, and low-power interconnection of multiple chips (such as CPUs, GPUs, and memory). Its complexity and scale are far greater than those of traditional packaging.
[0003] Vias, as conductive holes connecting different wiring layers within printed circuit boards, packaging substrates, or chips, are the fundamental structure for achieving three-dimensional electrical connections. Among them, the vias connecting internal metal layers of a chip (such as M1 to M2) have the smallest size, reaching the nanometer scale. Since the via matrix in advanced packaging often reaches tens of millions, directly using the raw data for simulation would be extremely inefficient or even impossible due to excessive memory consumption. Therefore, equivalent simplification processing of vias is necessary.
[0004] Related technologies typically employ a method of first enlarging the vias to a certain size, then merging the enlarged patterns using Boolean operations, and finally shrinking the merged result back to the original size. However, this method has significant drawbacks in advanced packaging scenarios: firstly, when dealing with large-scale vias, the layout enlargement and Boolean operations are inefficient; secondly, during the enlargement and merging process, vias on adjacent but electrically isolated patterns are easily merged by mistake, introducing design errors. Summary of the Invention
[0005] In view of this, this application provides an advanced packaging layout via merging method, apparatus, computer device and storage medium based on scan line method. The embodiments of this application abandon complex geometric Boolean operations, can accurately locate via gaps, and provide an efficient optimization solution for realizing large-scale via merging in advanced packaging layout, significantly improving processing efficiency and accuracy.
[0006] The first aspect of this application discloses a via merging method in a layout. The method includes: traversing vias in the layout to extract the geometric coordinates of the bounding box of each via; based on the extracted coordinates, scanning in the vertical direction using a scan line method to merge vias with a spacing less than a preset merging distance, generating one or more vertically extending first merging rectangles; scanning in the horizontal direction using a scan line method to merge vias with a spacing less than a preset merging distance, generating one or more horizontally extending second merging rectangles; extracting the boundary edges constituting the merged shape based on the spatial relationship of the rectangles within the group; constructing connection relationships based on the boundary edges to obtain inner and outer contours; and generating the via merged shape based on the inner and outer contours.
[0007] In one embodiment, the geometric coordinates include the X-coordinate values of the left and right sides of the via's outer bounding box, and the Y-coordinate values of the top and bottom sides. The scanning in the vertical direction using the scan line method includes: sorting all the X-coordinate values to form an ordered sequence; dividing several continuous X-coordinate intervals based on the ordered sequence; and assigning each via to the corresponding X-coordinate interval according to the X-direction span of its outer bounding box.
[0008] In one embodiment, generating a first merged rectangle includes: for each X-coordinate interval, sorting all vias according to the Y-coordinate of their bounding boxes; identifying the gap between adjacent vias in the Y direction; and when the gap is less than the preset merging distance, performing a filling and merging operation to form the vertically extending first merged rectangle within the corresponding interval.
[0009] In one embodiment, the geometric coordinates include the X-coordinate values of the left and right sides of the via's outer bounding box, and the Y-coordinate values of the top and bottom sides. The scanning in the horizontal direction using the scan line method includes: sorting all the Y-coordinate values to form an ordered sequence; dividing several continuous Y-coordinate intervals based on the ordered sequence; and assigning each via to the corresponding Y-coordinate interval according to the Y-direction span of its outer bounding box.
[0010] In one embodiment, generating the second merged rectangle includes: for each Y-coordinate interval, sorting all vias according to the X-coordinate of their bounding boxes; identifying the gap between adjacent vias in the X direction; and when the gap is less than the preset merging distance, performing a filling and merging operation to form the horizontally extending second merged rectangle within the corresponding interval.
[0011] In one embodiment, the step of extracting the boundary edges constituting the merged graphic based on the spatial relationship of rectangles within the group includes: determining whether the first merged rectangle and the second merged rectangle overlap; if they overlap, determining that the two corresponding rectangles are connected to each other and recording their connecting edges; and grouping all rectangles associated through connection relationships into the same group; for the first merged rectangle after grouping, identifying the parts on its left and right sides that are not connected to other rectangles, extracting them as independent left or right line segments, and extracting the top and bottom sides as independent top and bottom line segments; for the second merged rectangle after grouping, identifying the parts on its top and bottom edges that are not connected to other rectangles, extracting them as independent top or bottom line segments, and extracting the left and right sides as independent left and right line segments; wherein the line segments formed by the endpoints are boundary edges.
[0012] In one embodiment, constructing connection relationships based on boundary edges includes: establishing a connection graph between all endpoints.
[0013] The second aspect of this application discloses a layout via merging device, the device comprising: a first extraction module, used to traverse the vias in the layout to extract the geometric coordinates of the bounding box of each via;
[0014] The merging module is used to scan vertically using the scan line method based on the extracted coordinates to merge vias with a spacing less than a preset merging distance, generating one or more vertically extending first merged rectangles. It also scans horizontally using the scan line method to merge vias with a spacing less than a preset merging distance, generating one or more horizontally extending second merged rectangles. The second extraction module is used to extract the boundary edges that constitute the merged graphic based on the spatial relationship of the rectangles within the group. The connection module is used to construct connection relationships based on the boundary edges to obtain the inner and outer contours. The generation module is used to generate the via merged graphic based on the inner and outer contours.
[0015] A third aspect of this application discloses a computer-readable storage medium comprising a stored program, wherein the program, when running, controls the execution of the layout via merging method of the above embodiments in a processor of the device.
[0016] A fourth aspect of this application discloses a computer device, the computer device including a processor and a memory; wherein the memory stores a computer program adapted to be loaded by the processor and executed by the layout via merging method of the above embodiments.
[0017] Compared with the prior art, the embodiments of this application have the following beneficial effects:
[0018] First, it completes the identification and elimination of via gaps; second, it enables the rapid merging of rectangles. These two tasks together improve the overall efficiency and accuracy of via merging. Attached Figure Description
[0019] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on the structures shown in these drawings without creative effort.
[0020] Figure 1 A flowchart of a layout via merging method provided in an embodiment of this application.
[0021] Figure 2 This is a flowchart of a gap filling and merging method provided in an embodiment of this application.
[0022] Figure 3 This is a flowchart of a final graphic generation method provided in an embodiment of this application.
[0023] Figure 4 This is an example diagram of a layout via merging provided in an embodiment of this application.
[0024] Figure 5 This is an example diagram of a layout via merging provided in an embodiment of this application.
[0025] Figure 6 This is an example diagram of a layout via merging provided in an embodiment of this application.
[0026] Figure 7 This is an example diagram of a layout via merging provided in an embodiment of this application.
[0027] Figure 8 This is an example diagram of a layout via merging provided in an embodiment of this application.
[0028] Figure 9 This is an example diagram of a layout via merging provided in an embodiment of this application.
[0029] Figure 10 This is an example diagram of a layout via merging provided in an embodiment of this application.
[0030] Figure 11 This is an example diagram of a layout via merging provided in an embodiment of this application.
[0031] Figure 12 This is an example diagram of a layout via merging provided in an embodiment of this application. Detailed Implementation
[0032] To enable those skilled in the art to better understand the present invention, the technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings of the embodiments of the present invention. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort should fall within the scope of protection of the present invention.
[0033] It should be noted that the terms "first," "second," etc., in the specification, claims, and accompanying drawings of this invention are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate so that the embodiments of the invention described herein can be implemented in orders other than those illustrated or described herein. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover a non-exclusive inclusion; for example, a process, method, system, product, or apparatus that comprises a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or apparatus.
[0034] Example 1:
[0035] See Figures 1 to 3 This application provides a layout via merging method, which may include the following steps:
[0036] Step 1. Traverse the vias in the layout to extract the geometric coordinates of the bounding box of each via.
[0037] In this step, the geometric coordinates include the X-coordinate values of the left and right sides of the via outer enclosure; the geometric coordinates also include the Y-coordinate values of the top and bottom sides of the via outer enclosure.
[0038] As an optional implementation method, such as Figure 4 As shown, traverse all vias in the diagram and extract the X coordinate values of the left and right sides and the Y coordinate values of the top and bottom sides of each via.
[0039] For ease of calculation, the coordinates of the bounding box of each via are extracted.
[0040] The definition of an outer box is: a simple, regular (usually rectangular) box that contains one or more complex or irregular objects.
[0041] Step 2. Based on the extracted coordinates, scan in the vertical direction using the scan line method to merge vias with a spacing smaller than the preset merging distance, generating one or more vertically extending first merged rectangles. Scan in the horizontal direction using the scan line method to merge vias with a spacing smaller than the preset merging distance, generating one or more horizontally extending second merged rectangles.
[0042] In this step, the scanning in the vertical direction using the scan line method includes: sorting all X coordinate values to form an ordered sequence; dividing several continuous X coordinate intervals based on the ordered sequence; and assigning each via to the corresponding X coordinate interval according to the X-direction span of its outer bounding box.
[0043] As an optional implementation method, such as Figure 5 As shown, using vertical scan lines from left to right, the vertical gap of the vias is processed to obtain several X coordinate intervals, and these vias are placed in the corresponding intervals.
[0044] It should be noted that the algorithm identifies vias and places them into the corresponding X-coordinate intervals based on the X-coordinate range of their bounding boxes. If the bounding box spans multiple intervals, the via will be added to all of those intervals simultaneously.
[0045] The ordered sequence above is a sequence of numerical values sorted from smallest to largest.
[0046] The above coordinate interval is composed of two adjacent coordinates.
[0047] In this step, generating the first merged rectangle includes: for each X-coordinate interval, sorting all vias according to the Y-coordinate of their bounding boxes; identifying the gap between adjacent vias in the Y direction; and when the gap is less than the preset merging distance, performing filling and merging operations to form the vertically extending first merged rectangle within the corresponding interval.
[0048] As an optional implementation method, such as Figure 6 As shown, for gaps smaller than the preset via merging distance, a rectangle is used as the filler. Figure 7 As shown, the interval is traversed starting from the smallest, and these rectangles (overlapping or adjacent rectangles) are merged to obtain a large rectangle, thus completing the scan and merging.
[0049] It should be noted that the preset via merging distance can be determined in two ways: one is by specifying it directly by external parameters, and the other is by automatic selection by the system (such as minimum gap). No limitation is made here.
[0050] The above sorting is a numerical sort from smallest to largest.
[0051] Alternatively, you can first use the scan line method to scan in the horizontal direction.
[0052] In another embodiment, the scanning in the horizontal direction using the scan line method includes: sorting all Y coordinate values to form an ordered sequence; dividing several continuous Y coordinate intervals based on the ordered sequence; and assigning each via to the corresponding Y coordinate interval according to the Y-direction span of its outer bounding box.
[0053] In another embodiment, generating the second merged rectangle includes: for each Y-coordinate interval, sorting all vias according to the X-coordinate of their bounding boxes; identifying the gap between adjacent vias in the X direction, and when the gap is less than the preset merging distance, performing a filling and merging operation to form the horizontally extending second merged rectangle within the corresponding interval.
[0054] In this step, such as Figure 8 As shown, using horizontal scan lines similar to vertical scan lines, several horizontally oriented second merged rectangles are obtained.
[0055] As an optional implementation, the generated first merged rectangle and the unfilled merged rectangle (i.e., the bounding box) are traversed, and the X coordinates of the left and right sides and the Y coordinates of the top and bottom edges of each rectangle are extracted. Then, using horizontal scan lines similar to the vertical scan lines, several Y coordinate regions (i.e., Y coordinate intervals) are created, and finally several horizontally oriented second merged rectangles are generated.
[0056] Step 3. Based on the spatial relationship of the rectangles within the group, extract the boundary edges that constitute the merged graphic.
[0057] In this step, extracting the boundary edges that constitute the merged graphic based on the spatial relationship of rectangles within the group includes:
[0058] Step 31. Determine whether the first merged rectangle and the second merged rectangle overlap. If they overlap, determine that the two rectangles are connected to each other and record their connecting edges. Group all rectangles that are connected by a connection into the same group.
[0059] As an optional implementation, based on the aforementioned Y-coordinate intervals, each Y-coordinate interval is traversed sequentially from bottom to top to determine whether rectangles in two adjacent Y-regions are connected. For two connected rectangles, if their X-coordinates overlap, the connection is recorded, which can be categorized as top-edge connection or bottom-edge connection. Figure 9 As shown, (1,3), (2,3), (3,4), (3,5), (4,6), (5,6), (6,7), and (6,8) are interconnected. Grouping these interconnected rectangles together forms several rectangle groups.
[0060] Step 32. For the first merged rectangle after grouping, identify the parts on its left and right sides that are not connected to other rectangles, extract them as independent left or right line segments, and extract the top and bottom sides as independent top and bottom line segments.
[0061] Refer to step 33 below.
[0062] Step 33. For the second merged rectangle after grouping, identify the parts on its top and bottom edges that are not connected to other rectangles, extract them as independent top edge segments or bottom edge segments, and extract the left and right edges as independent left edge segments and right edge segments; where the segments formed by the endpoints are the boundary edges.
[0063] As an optional implementation, each rectangle is traversed sequentially, and based on the connection status of the top and bottom edges of each rectangle, the portions of the top / bottom edges that do not overlap with other rectangles are extracted, resulting in several discrete edges. For example... Figure 10 As shown, rectangles 1 through 8 are illustrated. Taking rectangle 6 as an example, we obtain three discrete top edges (a, b, c) and three discrete bottom edges (d, e, f), plus two left and right edges (g, h).
[0064] Step 4. Based on the boundary edges, construct the connection relationship to obtain the inner and outer contours.
[0065] Summarizing steps S32-S33, we obtain the discrete top / bottom edges and left / right / top / bottom edges. For example... Figure 11 As shown, based on the fact that the two vertices (endpoints) of each edge are connected to each other, the connection relationship of all endpoints is established (i.e., the connection graph).
[0066] It is understandable that finding the connected endpoints in sequence will give us the inner and outer contours of the figure.
[0067] In a preferred embodiment, based on the connection relationship of all endpoints, the bottom left endpoint of all rectangles is selected as the starting point. Following the connection relationship of the endpoints, all connected endpoints are found sequentially, which constitutes the outer contour of the through-hole merged graphic. If there are still endpoints that have not been traversed, starting from these endpoints, the connected endpoints are found sequentially, which constitutes the inner contour of the through-hole merged graphic.
[0068] Step 5. Generate the via merge graphic based on the inner and outer contours.
[0069] In this step, such as Figure 12 As shown, the final through-hole merged graphic is output based on the outer and inner contours.
[0070] Example 2:
[0071] Embodiments of this application also provide a layout via merging apparatus, the apparatus comprising:
[0072] The first extraction module is used to traverse the vias in the layout to extract the geometric coordinates of the bounding box of each via.
[0073] The merging module is used to scan vertically based on the extracted coordinates using the scan line method to merge vias with a spacing less than a preset merging distance, generating one or more vertically extending first merged rectangles. It also scans horizontally using the scan line method to merge vias with a spacing less than a preset merging distance, generating one or more horizontally extending second merged rectangles.
[0074] The second extraction module is used to extract the boundary edges that constitute the merged graphic based on the spatial relationship of the rectangles within the group.
[0075] The connection module is used to construct connection relationships based on boundary edges to obtain the inner and outer contours.
[0076] The generation module is used to generate via merge graphics based on the inner and outer contours.
[0077] Example 3:
[0078] Embodiments of this application also provide a computer device, including: a memory storing an executable program; and a processor for running the program, wherein the program executes the methods in various embodiments of the present invention during runtime.
[0079] The aforementioned memory can refer to devices inside a computer used to store data and programs, including RAM, hard disks, etc. RAM can be used to temporarily store running programs and data, while hard disks can be used to store programs and data long-term. Memory enables the computer to read and write data and execute programs. The aforementioned processor is responsible for executing instructions in computer programs and performing data processing. It can also be responsible for controlling and executing various operations, including arithmetic operations, logical operations, and data transmission.
[0080] Example 4:
[0081] Embodiments of this application also provide a computer-readable storage medium including a stored executable program, wherein, when the executable program is running, it controls the device where the computer-readable storage medium is located to perform the methods of various embodiments of the present invention.
[0082] The aforementioned computer storage media can refer to the media used in computer memory to store certain discontinuous physical quantities. Computer storage media mainly include semiconductors, magnetic cores, magnetic drums, magnetic tapes, laser discs, etc. Computer-readable storage media include stored programs, which can be a set of instructions that a computer can recognize and execute, running on an electronic computer to meet certain information needs.
[0083] Example 5:
[0084] Embodiments of this application also provide a computer program product, including a computer program that, when executed by a processor, implements the methods of various embodiments of the present invention.
[0085] The aforementioned computer program products can refer to software programs that have been written, tested, and released, and can run on computers or other devices. Computer program products can include application programs, operating systems, utility software, etc., used to achieve specific functions or solve specific problems.
[0086] Example 6:
[0087] Embodiments of this application also provide a computer program product, including a non-volatile computer-readable storage medium for storing a computer program that, when executed by a processor, implements the methods in various embodiments of the present invention.
[0088] The aforementioned non-volatile computer-readable storage medium can refer to a medium for storing data. Non-volatile computer-readable storage media can retain data without loss when power is off and can be used to store long-term data, such as operating systems, applications, and user files. Non-volatile storage media can include hard disk drives, solid-state drives, optical disks, and flash memory storage devices, etc.
[0089] Example 7:
[0090] Embodiments of this application also provide a computer program that, when executed by a processor, implements the methods described in the various embodiments of the present invention.
[0091] The aforementioned computer program can refer to a set of instructions used to tell the computer to perform specific tasks or operations. Computer programs can be written by programmers using specific programming languages and can include algorithms, data structures, logic, and control flow. Computer programs can be used for a variety of purposes, including application software, operating systems, etc.
[0092] In the above embodiments of the present invention, the descriptions of each embodiment have different focuses. For parts not described in detail in a certain embodiment, please refer to the relevant descriptions of other embodiments.
[0093] In the several embodiments provided in this application, it should be understood that the disclosed technical content can be implemented in other ways. The device embodiments described above are merely illustrative; for example, the division of units can be a logical functional division, and in actual implementation, there may be other division methods. For instance, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. Furthermore, the displayed or discussed mutual coupling, direct coupling, or communication connection may be through some interfaces; the indirect coupling or communication connection between units or modules may be electrical or other forms.
[0094] The units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple units. Some or all of the units can be selected to achieve the purpose of this embodiment according to actual needs.
[0095] Furthermore, the functional units in the various embodiments of the present invention can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit. The integrated unit can be implemented in hardware or as a software functional unit.
[0096] If the integrated unit is implemented as a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present invention, in essence, or the part that contributes to the prior art, or all or part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of the present invention. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, read-only memory (ROM), random access memory (RAM), portable hard drives, magnetic disks, or optical disks.
[0097] The above description is only a preferred embodiment of the present invention. It should be noted that for those skilled in the art, several improvements and modifications can be made without departing from the principle of the present invention, and these improvements and modifications should also be considered within the scope of protection of the present invention.
Claims
1. A method for merging vias in a layout, characterized in that, include: Traverse the vias in the layout to extract the geometric coordinates of the bounding box of each via; Based on the extracted coordinates, a vertical scan is performed using the scan line method to merge vias with a spacing smaller than a preset merging distance, generating one or more vertically extending first merged rectangles. A horizontal scan is also performed using the scan line method to merge vias with a spacing smaller than a preset merging distance, generating one or more horizontally extending second merged rectangles. Based on the spatial relationship of rectangles within the group, extract the boundary edges that constitute the merged graphic; Based on the boundary edges, construct the connection relationships to obtain the inner and outer contours; Generate a via merge pattern based on the inner and outer contours; The extraction of boundary edges constituting the merged graphic based on the spatial relationship of rectangles within the group includes: Determine whether the first merged rectangle and the second merged rectangle overlap. If they overlap, determine that the two rectangles are connected and record their connecting edges. Group all rectangles that are connected by a connection into the same group. For the first merged rectangle after grouping, identify the parts on its left and right sides that are not connected to other rectangles, extract them as independent left or right line segments, and extract the top and bottom sides as independent top and bottom line segments. For the second merged rectangle after grouping, identify the parts on its top and bottom edges that are not connected to other rectangles, extract them as independent top edge segments or bottom edge segments, and extract the left and right edges as independent left edge segments and right edge segments. The line segments formed by the endpoints are called boundary edges.
2. The layout via merging method according to claim 1, characterized in that, The geometric coordinates include the X-coordinate values of the left and right sides of the via's outer enclosure, and the Y-coordinate values of the top and bottom sides. The scanning in the vertical direction using the scan line method includes: All X-coordinate values are sorted to form an ordered sequence; Several continuous X-coordinate intervals are divided based on the ordered sequence; Each via is assigned to a corresponding X-coordinate interval based on the X-axis span of its bounding box.
3. The layout via merging method according to claim 2, characterized in that, Generate the first merged rectangle, including: For each X-coordinate interval, sort all vias according to the Y-coordinate of their bounding boxes; Identify the gap between adjacent vias in the Y direction. When the gap is less than the preset merging distance, perform filling and merging operations to form the vertically extending first merged rectangle within the corresponding interval.
4. The layout via merging method according to claim 1, characterized in that, The geometric coordinates include the X-coordinate values of the left and right sides of the via's outer enclosure, and the Y-coordinate values of the top and bottom sides. The scanning in the horizontal direction using the scan line method includes: All Y-coordinate values are sorted to form an ordered sequence; Several continuous Y-coordinate intervals are divided based on the ordered sequence; Each via is assigned to a corresponding Y-coordinate interval based on the Y-span of its bounding box.
5. The layout via merging method according to claim 4, characterized in that, Generate the second merged rectangle, including: For each Y-coordinate interval, sort all vias according to the X-coordinate of their bounding boxes; Identify the gap between adjacent vias in the X direction. When the gap is less than the preset merging distance, perform filling and merging operations to form the horizontally extending second merged rectangle within the corresponding interval.
6. The layout via merging method according to claim 1, characterized in that, The construction of connection relationships based on boundary edges includes: Create a connection graph between all endpoints.
7. A layout via merging device, characterized in that, include: The first extraction module is used to traverse the vias in the layout to extract the geometric coordinates of the bounding box of each via; The merging module is used to scan in the vertical direction based on the extracted coordinates to merge vias with a spacing less than a preset merging distance, generating one or more vertically extending first merged rectangles; and to scan in the horizontal direction using the scan line method to merge vias with a spacing less than a preset merging distance, generating one or more horizontally extending second merged rectangles. The second extraction module is used to extract the boundary edges that constitute the merged graphic based on the spatial relationship of the rectangles within the group. The extraction of boundary edges constituting the merged graphic based on the spatial relationship of rectangles within the group includes: Determine whether the first merged rectangle and the second merged rectangle overlap. If they overlap, determine that the two rectangles are connected and record their connecting edges. Group all rectangles that are connected by a connection into the same group. For the first merged rectangle after grouping, identify the parts on its left and right sides that are not connected to other rectangles, extract them as independent left or right line segments, and extract the top and bottom sides as independent top and bottom line segments. For the second merged rectangle after grouping, identify the parts on its top and bottom edges that are not connected to other rectangles, extract them as independent top edge segments or bottom edge segments, and extract the left and right edges as independent left edge segments and right edge segments. The line segments formed by the endpoints are called boundary edges; The connection module is used to construct connection relationships based on boundary edges to obtain the inner and outer contours; The generation module is used to generate via merge graphics based on the inner and outer contours.
8. A computer-readable storage medium having a computer program stored thereon, characterized in that, When the computer program is executed by the processor, it implements the layout via merging method as described in any one of claims 1 to 6.
9. A computer device, comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, characterized in that, When the processor executes the program, it implements the layout via merging method as described in any one of claims 1 to 6.
Citation Information
Patent Citations
Integrated circuit layout verification self adaptive scanning line solution
CN102411643A
Method and device for extracting through hole resistance of integrated circuit, storage medium and electronic equipment
CN121413546A