Method and device for improving impedance accuracy of multilayer circuit board, electronic equipment and medium

Abstract

The application relates to the technical field of circuit board manufacturing, in particular to a multilayer circuit board impedance precision improving method and device, electronic equipment and medium, which comprises the following steps: dividing a multilayer circuit board processing piece into zones, taking the middle position as a reference zone and the rest as dynamic zones, determining reference zone parameters and calculating a first theoretical line width, determining dynamic zone parameters and calculating a second theoretical line width, determining the dynamic zone line width according to the two, and transmitting impedance design parameters containing the dynamic zone line width to related process equipment, so that the process equipment reperforms at least one process step according to the adjusted parameters, and the multilayer circuit board manufacturing is completed, thereby effectively improving the impedance precision.

Description

Technical Field

[0001] This application relates to the field of circuit board manufacturing technology, and in particular to a method, apparatus, electronic device and medium for improving the impedance accuracy of multilayer circuit boards. Background Technology

[0002] With the rapid development of 5G communication, cloud computing, artificial intelligence, and high-performance computing, electronic devices such as servers and switches are placing higher demands on the transmission rate and signal integrity of printed circuit boards (PCBs). As the core carrier of high-speed signal transmission, the impedance control accuracy of PCBs directly affects signal attenuation, reflection, and crosstalk, thus determining the reliability and stability of the system. To meet the application requirements of 400G / 800G optical modules, high-speed backplanes, and other applications, PCB impedance tolerance needs to be compressed from the traditional ±10% to ±7%~±8% (mass production) or even ±5% (sample stage), which poses a significant challenge to the fine-grained control of PCB manufacturing processes.

[0003] In existing technologies, PCB impedance design typically employs a single-parameter model, assuming uniform dielectric thickness (H), copper thickness (T), dielectric DK value (DK), and trace width (W) across the entire PCB. However, in actual PCB manufacturing, to improve production efficiency, PCB manufacturers often integrate multiple customer PCB panels onto the same workpiece (Pnl) (e.g., Figure 1 (As shown). However, due to limitations in equipment capabilities and process characteristics, regional deviations exist in different areas of the processed parts, such as uneven dielectric thickness, fluctuations in DK values, and deviations in linewidth, which can easily lead to signal integrity failures (such as eye diagram closure and increased bit error rate). Summary of the Invention

[0004] To overcome the shortcomings of the prior art, the present invention provides a method, apparatus, electronic device and medium for improving the impedance accuracy of multilayer circuit boards, which effectively improves the impedance accuracy.

[0005] A first aspect of this application provides a method for improving the impedance accuracy of a multilayer circuit board, the method comprising: The multilayer circuit board component is divided into a reference area and at least one dynamic area, wherein the reference area is located in the middle of the multilayer circuit board component, and the dynamic area is the remaining area of ​​the multilayer circuit board component other than the reference area. Determine the reference area parameters of the reference area, and calculate the first theoretical linewidth of the reference area based on the reference area parameters; Determine the dynamic region parameters of the dynamic region, and calculate the second theoretical linewidth of the dynamic region based on the dynamic region parameters; The dynamic zone linewidth of the dynamic zone is determined based on the first theoretical linewidth and the second theoretical linewidth. The impedance design parameters of the dynamic region, including the linewidth of the dynamic region, are sent to the relevant process equipment so that the relevant process equipment can re-perform at least one of the following process steps: pattern transfer process, lamination process, drilling process, electroplating process, and screen printing process, based on the adjusted impedance design parameters, in order to complete the fabrication of the multilayer circuit board.

[0006] In an optional implementation, determining the reference area parameters of the reference area and calculating the first theoretical linewidth of the reference area based on the reference area parameters includes: The first copper thickness, first dielectric thickness, and first dielectric constant of the reference region are obtained as parameters of the reference region. The reference area parameters are input into the impedance calculation software so that the impedance calculation software can obtain the first theoretical linewidth through simulation calculation based on the set target impedance value.

[0007] In an optional implementation, the method further includes: The second copper thickness of the dynamic region is determined based on the first copper thickness, and the second dielectric thickness of the dynamic region is determined based on the first copper thickness; The second dielectric constant of the dynamic region is determined based on the first dielectric constant, the first dielectric thickness, and the second dielectric thickness. The second copper thickness, the second dielectric thickness, the second dielectric dielectric constant, and the dynamic region linewidth are determined as the impedance design parameters of the dynamic region.

[0008] In an optional implementation, determining the second dielectric constant of the dynamic region based on the first dielectric constant, the first dielectric thickness, and the second dielectric thickness includes: The dielectric constant of the second dielectric is determined using the following formula: ; ;X=H1-H2; or ; ;Y=H1-H2;or ; Z = H1 - H2; Wherein, DK2 is the dielectric constant of the second dielectric, DK1 is the dielectric constant of the first dielectric, H1 is the thickness of the first dielectric, and H2 is the thickness of the second dielectric.

[0009] In an optional implementation, determining the dynamic region linewidth of the dynamic region based on the first theoretical linewidth and the second theoretical linewidth includes: Calculate the difference between the first theoretical linewidth and the second theoretical linewidth; When it is determined that the difference is less than the preset tolerance, the dynamic zone line width is determined based on the first theoretical line width and the difference; When it is determined that the difference is greater than the preset tolerance, the dynamic zone line width is determined based on the first theoretical line width and the preset tolerance.

[0010] In an optional implementation, determining the dynamic zone linewidth based on the first theoretical linewidth and the difference includes: determining the dynamic zone linewidth using the formula W2=W1-K, where W2 is the dynamic zone linewidth, W1 is the first theoretical linewidth, and K is the difference.

[0011] In an optional implementation, determining the dynamic zone linewidth based on the first theoretical linewidth and the preset tolerance includes: determining the dynamic zone linewidth using the formula W2=W1-M / 2, where M / 2 is the preset tolerance and M is the linewidth tolerance.

[0012] A second aspect of this application provides a device for improving the impedance accuracy of multilayer circuit boards, the device comprising: A partitioning module is used to partition a multilayer circuit board component into a reference area and at least one dynamic area, wherein the reference area is located in the middle of the multilayer circuit board component, and the dynamic area is the remaining area of ​​the multilayer circuit board component other than the reference area. A determining module is used to determine the reference area parameters of the reference area and calculate the first theoretical linewidth of the reference area based on the reference area parameters; determine the dynamic area parameters of the dynamic area and calculate the second theoretical linewidth of the dynamic area based on the dynamic area parameters; and determine the dynamic area linewidth of the dynamic area based on the first theoretical linewidth and the second theoretical linewidth. The sending module is used to send the impedance design parameters of the dynamic area, including the linewidth of the dynamic area, to the relevant process equipment, so that the relevant process equipment can re-perform at least one of the following process steps: pattern transfer process, lamination process, drilling process, electroplating process, and screen printing process according to the adjusted impedance design parameters, in order to complete the fabrication of the multilayer circuit board.

[0013] A third aspect of this application provides an electronic device, including a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the computer program to implement the steps of the method for improving the impedance accuracy of a multilayer circuit board.

[0014] A fourth aspect of this application provides a computer-readable storage medium having a computer program stored thereon, wherein the computer program, when executed by a processor, implements the steps of the above-described method for improving the impedance accuracy of multilayer circuit boards.

[0015] In summary, the method, apparatus, electronic equipment, and dielectric for improving the impedance accuracy of multilayer circuit boards provided in this application have at least one of the following beneficial effects: 1. The multilayer circuit board component is divided into a reference area and at least one dynamic area. The reference area is located in the middle of the multilayer circuit board component, and the dynamic area is the rest of the area except for the reference area. This partitioning method takes into account the actual situation that there are regional deviations in different areas of the component. The component is divided into different characteristic areas, which lays the foundation for subsequent differentiated processing for different areas and avoids the limitation of a single parameter model to uniformly process the entire component. 2. Due to regional deviations in the dynamic zone, its parameters differ from those in the reference zone. By determining the parameters of the dynamic zone separately and calculating the theoretical line width, the actual situation of the dynamic zone can be reflected more accurately, rather than simply using the same parameters and line width as the reference zone. 3. The dynamic zone linewidth is determined based on the first and second theoretical linewidths. The characteristics of the reference zone and the dynamic zone are taken into account. Through comparison and adjustment, the linewidth of the dynamic zone can better adapt to the actual regional deviations, thereby controlling the impedance of the dynamic zone more accurately. 4. Send the impedance design parameters of the dynamic area, including the dynamic area linewidth, to the relevant process equipment. The relevant process equipment will then re-perform at least one of the following process steps: pattern transfer, lamination, drilling, electroplating, and screen printing, based on the adjusted impedance design parameters to complete the fabrication of the multilayer circuit board. By adjusting the process parameters, the characteristics of different areas can be precisely controlled, which can effectively reduce signal integrity failures caused by regional deviations and improve the impedance control accuracy of the PCB. Attached Figure Description

[0016] Figure 1 This is a schematic diagram of the structure of a PCB panel integrated processing component shown in the prior art; Figure 2 This is a flowchart illustrating a method for improving the impedance accuracy of a multilayer circuit board according to an embodiment of this application; Figure 3 This is a schematic diagram of the partitioning of a multilayer circuit board component shown in an embodiment of this application; Figure 4 This is a capability analysis diagram of an 85Ω±7.5% impedance control process shown in an embodiment of this application; Figure 5 This is a capability analysis diagram of a 100Ω±7.5% impedance control process shown in an embodiment of this application; Figure 6 This is a capability analysis diagram of a 100Ω±5% impedance control process shown in an embodiment of this application; Figure 7This is a functional block diagram of a multilayer circuit board impedance accuracy improvement device shown in an embodiment of this application; Figure 8 This is a schematic diagram of the structure of an electronic device shown in an embodiment of this application. Detailed Implementation

[0017] The present invention will be further described below with reference to the accompanying drawings and embodiments.

[0018] The following will clearly and completely describe the concept, specific structure, and technical effects of the present invention in conjunction with embodiments and accompanying drawings, so as to fully understand the purpose, features, and effects of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, not all of them. Other embodiments obtained by those skilled in the art based on the embodiments of the present invention without creative effort are all within the scope of protection of the present invention. Furthermore, all connections / linkages involved in the patent do not simply refer to direct contact between components, but rather to the ability to form a better connection structure by adding or reducing connecting accessories according to specific implementation conditions. The various technical features in this invention can be combined interactively without contradicting each other.

[0019] Reference Figure 2 The diagram shown is a flowchart illustrating a method for improving the impedance accuracy of a multilayer circuit board according to an embodiment of this application. The method for improving the impedance accuracy of a multilayer circuit board includes the following steps.

[0020] S21, the multilayer circuit board is partitioned into a reference area and at least one dynamic area.

[0021] The reference area is located in the middle of the multilayer circuit board panel (Pnl), and the dynamic area is the remaining area of ​​the multilayer circuit board panel excluding the reference area, serving as the dynamic adjustment range for impedance parameters. It should be noted that the multilayer circuit board panel refers to a collection of customer-designed circuit boards assembled using Genesis2000 software.

[0022] In some embodiments, the multilayer circuit board (Pnl) is partitioned, that is, utilizing the principle of dielectric loss during lamination (overflow to parts other than the part) and the principle of etching differences (including etching differences caused by the thickness of electroplated copper), the multilayer circuit board is partitioned by reducing the part towards the edge of Pnl at a certain distance, thereby forming regions. Specifically, Pnl is divided into two main regions, denoted as A1 and A2 respectively. The middle position of Pnl is denoted as A1 and defined as the reference region. The impedance design parameters involved in the reference region (A1) are all used as reference parameters, including copper thickness, dielectric thickness, line width, and dielectric DK value. Other Pnl positions are denoted as A2, which serves as the dynamic adjustment range for impedance parameters. A2 can be divided into or not into smaller regions, where the smaller regions are denoted as A21, A22, and A2n. A2 implements dynamic parameters for impedance dielectric thickness, dielectric DK, and line width. The partitioning criteria of the reference region (A1) and the dynamic region (A2) are as follows. Figure 3 As shown, E represents the length of the short side of the multilayer circuit board component, and L represents the length of the long side of the multilayer circuit board component.

[0023] S22, determine the reference area parameters of the reference area, and calculate the first theoretical linewidth of the reference area based on the reference area parameters.

[0024] S23, determine the dynamic region parameters of the dynamic region, and calculate the second theoretical linewidth of the dynamic region based on the dynamic region parameters.

[0025] In the reference area (A1), fixed impedance design parameters are used as the global reference, specifically including: copper thickness T, dielectric thickness H, linewidth W, and dielectric constant DK. Copper thickness T refers to a standard value (e.g., 1oz, 2oz, or 3oz) set according to customer design requirements and PCB manufacturer's process capabilities, with strict tolerance control (±5%) during production. The copper thicknesses in areas A1 and A2 are represented by T1 (also called the first copper thickness) and T2 (also called the second copper thickness), respectively. The copper thicknesses within sub-areas of A2 are named the same as the smaller areas, such as T21 representing the copper thickness in A21. Dielectric thickness H refers to the theoretical value calculated by controlling the prepreg thickness through lamination, combining copper thickness, residual copper ratio, and material properties, and then verifying the actual value through slicing and measurement. The dielectric thicknesses in areas A1 and A2 are represented by H1 (also called the first dielectric thickness) and H2 (also called the second dielectric thickness), respectively. The dielectric thicknesses within sub-areas of A2 are named the same as the smaller areas, such as H21 representing the dielectric thickness in A21. The difference between H2 and H1 is related to the copper thickness at the corresponding inner layer location, and the difference value is defined in Table 1 below.

[0026] Table 1:

[0027] The dielectric constant (DK) value is provided by the material manufacturer or determined by the PCB manufacturer using a reverse calculation method, serving as the benchmark for adjusting the DK value in the dynamic zone. The semi-cured material composed of E-glass fiber and resin is divided into regions, with the DK values ​​of regions A1 and A2 represented by DK1 (also known as the first dielectric constant) and DK2 (also known as the second dielectric constant), respectively. The DK values ​​within sub-regions of A2 are named equivalent to those of smaller regions; for example, DK21 represents the DK value in A21. DK1 is calculated using a reverse calculation method when the material is introduced, while DK2 is determined based on DK1, H1, and H2. ; ;X=H1-H2; or ; ;Y=H1-H2;or ; Z = H1 - H2. Therefore, we can summarize the results into Table 2 below.

[0028] Table 2:

[0029] Impedance linewidth refers to the theoretical linewidth calculated using SI9000 simulation software to meet the target impedance, based on input copper thickness, dielectric thickness, and dielectric DK value. In reference area A1, after obtaining the reference area parameters, including copper thickness T1, dielectric thickness H1, and dielectric DK value DK1, these parameters are input into the SI9000 simulation software. The SI9000 simulation software sets a target impedance value (e.g., 50Ω), which is the theoretical value required by the customer's design. The theoretical linewidth of reference area A1 can then be calculated using the SI9000 simulation software, and is referred to as the first theoretical linewidth W1.

[0030] The dielectric thickness and DK thickness differ in regions A1 and A2. To ensure consistent impedance design, the calculated linewidths for regions A1 and A2 will differ. Once the dynamic region parameters, including T2, H2, and DK2, are obtained, they can be input into the SI9000 simulation software. With the same target impedance value set in the SI9000 simulation software, the theoretical linewidth of dynamic region A2 can be calculated, referred to as the second theoretical linewidth W3.

[0031] For example, assuming that the inner copper thickness in dynamic region A2 is 1 oz, the dielectric thickness difference is calculated to be 0.02 mm, H2 = H1 - 0.02 mm = 0.18 mm, DK2 = DK1 - α(X / H1×DK1) (calculated according to the specific dielectric thickness difference and formula), copper thickness T2 = 1 oz, and the impedance value is also set to 50 Ω. Using SI9000 software, the second theoretical linewidth W3 is calculated to be 0.16 mm.

[0032] S24, determine the dynamic zone linewidth of the dynamic zone based on the first theoretical linewidth and the second theoretical linewidth.

[0033] In this design, A1 serves as the baseline region, and the calculated linewidth is also used as the baseline. The linewidth tolerance is specified during the client's design process. The linewidth W2 calculated in region A2 exceeds the design tolerance range. When W2 exceeds this tolerance range, directly using the calculated value will result in the circuit board impedance not meeting design requirements. Therefore, it is necessary to reasonably adjust the linewidth value in the dynamic region design based on the relationship between linewidth differences and tolerances to ensure the consistency of impedance design.

[0034] Specifically, based on the initial calculated values ​​of the first theoretical linewidth (W1) in the baseline area and the second theoretical linewidth (W3) in the dynamic area, the linewidth difference is calculated as: K = W1 - W3. Next, the linewidth tolerance M designed by the client is obtained, and the linewidth difference K is compared with the preset tolerance M / 2. If K ≤ M / 2, the dynamic area linewidth W2 is W1 - K. If K > M / 2, the dynamic area linewidth W2 is W1 - M / 2.

[0035] For example, the theoretical linewidth W1 of the baseline area is 0.2mm, the theoretical linewidth W3 of the dynamic area is 0.18mm, and the client's design linewidth tolerance M is ±0.03mm. Then K = 0.2 - 0.18 = 0.02mm, M / 2 = 0.015mm. Since the case of 0.02mm > 0.015mm does not hold, K ≤ M / 2 is satisfied. Therefore, the design linewidth of the dynamic area is W1 - K = 0.2 - 0.02 = 0.18mm. Assuming the baseline W1 is 0.3mm, the dynamic zone W2 is 0.25mm, the client-side line width tolerance M is ±0.04mm, K = 0.3 - 0.25 = 0.05mm, M / 2 = 0.02mm, and K > M / 2, then the dynamic zone design line width is W1 - M / 2 = 0.3 - 0.02 = 0.28mm. This ensures that the dynamic zone line width is within the client-side design tolerance range, maintaining the stability of the impedance design.

[0036] Therefore, the impedance design parameters for the reference region and the dynamic region can be summarized in Table 3 below: Table 3:

[0037] S25, the impedance design parameters of the dynamic area, including the linewidth of the dynamic area, are sent to the relevant process equipment so that the relevant process equipment can re-perform at least one of the following process steps: pattern transfer process, lamination process, drilling process, electroplating process, and screen printing process, according to the adjusted impedance design parameters, in order to complete the fabrication of the multilayer circuit board.

[0038] The impedance design parameters for the dynamic region include the second copper thickness T2, the second dielectric thickness H2, the second dielectric constant DK2, and the dynamic region linewidth W3. These impedance design parameters are sent to relevant process equipment by the electronic device. For example, the adjusted dielectric thickness and dielectric constant values ​​are sent to pattern transfer equipment, laminating equipment, drilling equipment, electroplating equipment, screen printing equipment, etc., so that these devices can perform subsequent process operations based on the new parameters. Specifically, after receiving the adjusted parameters from the electronic device, the pattern transfer equipment begins the pattern transfer process. Taking the core board material as an example, the pattern transfer equipment uses photolithography to remove unwanted surface copper, forming an inner core board with a specific pattern. For example, through exposure and development steps, excess copper layers are precisely removed from the core board surface, leaving the required circuit pattern; the pattern accuracy can reach the micron level. Next, the laminating equipment performs a lamination operation on the inner core board and the prepreg according to the received parameters. Multilayer inner core boards and prepregs are stacked in a specific order and pressed together under high temperature and pressure. This melts the prepregs and fills the gaps between the inner core boards, forming a multilayer circuit board semi-finished product. For example, pressing is carried out continuously for 2 hours at a temperature of 180℃ and a pressure of 5MPa to ensure lamination quality. Next, drilling equipment drills holes in the multilayer circuit board semi-finished product according to parameter requirements. Through holes or blind holes are drilled at designated locations according to design requirements, and the hole diameter and positional accuracy must be strictly controlled. For example, using a high-precision drilling machine, through holes with a diameter of 0.3mm are drilled, and the hole position deviation is controlled within ±0.02mm. Then, after receiving the parameters, electroplating equipment electroplats the drilled multilayer circuit board semi-finished product. Through the electroplating process, a uniform copper layer is deposited on the hole walls and circuit surface to achieve electrical connection and enhance the conductivity of the circuit. For example, a combination of chemical copper plating and electroplating is used to achieve a copper layer thickness of about 20μm, with thickness uniformity controlled within ±1μm. If required by the design, a graphic transfer process can be performed again. The graphic transfer equipment, based on the new parameters and design requirements, further forms more complex circuit patterns or markings on the surface of the multilayer circuit board. For example, fine circuit patterns can be created on the surface, with line widths and spacings reaching 0.1mm or even smaller. Finally, the screen printing equipment performs screen printing operations on the surface of the multilayer circuit board according to the received parameters. Through screen printing technology, solder resist ink, character ink, etc., are printed on the surface of the multilayer circuit board, serving to protect the circuitry and identify component positions. For example, printing green solder resist ink results in clearly legible character ink with uniform color and no printing defects.

[0039] Through drilling, electroplating, pattern transfer, and screen printing processes, the entire multilayer circuit board is manufactured, ultimately resulting in a high-quality multilayer circuit board product with impedance accuracy meeting preset tolerance requirements.

[0040] This application, through differentiated parameter design between the baseline and dynamic regions, combined with dielectric thickness difference compensation, dynamic correction of dielectric DK value, and intelligent adjustment mechanism for linewidth tolerance, effectively compensates for the impact of material characteristic differences and process fluctuations on impedance, ensuring a high degree of impedance matching between the dynamic region and the baseline region. By employing a linewidth value optimization strategy under client-side tolerance constraints, it avoids out-of-tolerance risks and significantly improves product yield. Simultaneously, the deep synergy between parameter adjustment and key processes such as pattern transfer, lamination, and drilling achieves closed-loop impedance control throughout the entire process from design to manufacturing, enhancing the adaptability of multilayer circuit boards to complex design requirements while ensuring electrical performance stability.

[0041] To verify the validity of this application, batch and sample production verification was conducted for a 400G optical module (model OB, tolerance ±7.5%) and an 800G optical module (model 10, tolerance ±5%). Specifically, multiple multilayer PCBs made of high-frequency, high-speed, FR4 material were selected and fabricated using a lamination process. Through pre-designed impedance parameters and linewidth limitations, and in accordance with... Figures 4 to 6 The tolerance of 400G optical modules is controlled within ±7.5%, and that of 800G optical modules within ±5%. This demonstrates improved impedance consistency across different regions, thereby enhancing impedance accuracy and achieving the required impedance tolerances of ±7%~±8% and ±5%, respectively. Furthermore, the process capability diagram shows CpK≥1.33, proving the method's strong reproducibility and reducing scrap rates due to impedance deviations, thus lowering production costs. Reference Figure 7 The diagram shown is a functional block diagram of a multilayer circuit board impedance accuracy improvement device according to an embodiment of this application.

[0042] In some embodiments, the multilayer circuit board impedance accuracy improvement device 70 may include multiple functional modules composed of computer program segments. The computer programs for each program segment of the multilayer circuit board impedance accuracy improvement device 70 may be stored in the memory of an electronic device and executed by at least one processor to perform (see details). Figure 2 (Description) This describes the function of improving impedance accuracy of multilayer circuit boards. Based on its function, it can be divided into multiple functional modules. These functional modules may include: a partitioning module 701, a determining module 702, and a sending module 703. The term "module" in this application refers to a series of computer program segments that can be executed by at least one processor and perform a fixed function, stored in memory. In this embodiment, the functions of each module will be detailed in subsequent embodiments.

[0043] The partitioning module 701 is used to partition the multilayer circuit board component into a reference area and at least one dynamic area, wherein the reference area is located in the middle of the multilayer circuit board component, and the dynamic area is the remaining area of ​​the multilayer circuit board component other than the reference area.

[0044] The determining module 702 is used to determine the reference area parameters of the reference area, and calculate the first theoretical linewidth of the reference area based on the reference area parameters; determine the dynamic area parameters of the dynamic area, and calculate the second theoretical linewidth of the dynamic area based on the dynamic area parameters; and determine the dynamic area linewidth of the dynamic area based on the first theoretical linewidth and the second theoretical linewidth.

[0045] The sending module 703 is used to send the impedance design parameters of the dynamic area, including the linewidth of the dynamic area, to the relevant process equipment, so that the relevant process equipment can re-perform at least one of the following process steps: pattern transfer process, lamination process, drilling process, electroplating process, and screen printing process according to the adjusted impedance design parameters, in order to complete the fabrication of the multilayer circuit board.

[0046] The determining module 702 is further configured to: determine the second copper thickness of the dynamic region based on the first copper thickness, and determine the second dielectric thickness of the dynamic region based on the first copper thickness; determine the second dielectric constant of the dynamic region based on the first dielectric constant, the first dielectric thickness, and the second dielectric thickness; and determine the second copper thickness, the second dielectric thickness, the second dielectric constant, and the dynamic region linewidth as impedance design parameters of the dynamic region.

[0047] It should be understood that the various variations and specific embodiments of the multilayer circuit board impedance accuracy improvement method provided in the above embodiments are also applicable to the multilayer circuit board impedance accuracy improvement device of this embodiment. Through the foregoing detailed description of the multilayer circuit board impedance accuracy improvement method, those skilled in the art can clearly understand the implementation method of the multilayer circuit board impedance accuracy improvement device of this embodiment. For the sake of brevity, it will not be described in detail here.

[0048] See Figure 8 The diagram shown is a schematic representation of the structure of an electronic device according to an embodiment of this application. In a preferred embodiment of this application, the electronic device 8 includes a memory 81, at least one processor 82, and at least one communication bus 83.

[0049] Those skilled in the art should understand that Figure 8 The structure of the electronic device shown does not constitute a limitation of the embodiments of this application. It can be a bus structure or a star structure. The electronic device 8 may also include more or fewer other hardware or software than shown, or different component arrangements.

[0050] In some embodiments, the electronic device 8 is a device capable of automatically performing numerical calculations and / or information processing according to pre-set or stored instructions. Its hardware includes, but is not limited to, microprocessors, application-specific integrated circuits (ASICs), programmable gate arrays (FPGAs), digital processors, and embedded devices. The electronic device 8 may also include user equipment, which includes, but is not limited to, any electronic product capable of human-computer interaction with a user via a keyboard, mouse, remote control, touchpad, or voice control device, such as a personal computer, tablet computer, smartphone, or digital camera.

[0051] In the embodiments provided in this application, it should be understood that the disclosed methods, apparatuses, computer-readable storage media, and electronic devices can be implemented in other ways. For example, the apparatus embodiments described above are merely illustrative. For instance, the division of modules is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple components or modules may be combined or integrated into another device, or some features may be ignored or not executed. Furthermore, the coupling or direct coupling or communication connection shown or discussed may be through some interfaces; the indirect coupling or communication connection between devices, components, or modules may be electrical, mechanical, or other forms.

[0052] The components described as separate parts may or may not be physically separate. The components shown as components may or may not be physical modules; that is, they may be located in one place or distributed across multiple network modules. Some or all of the components can be selected to achieve the purpose of this embodiment according to actual needs.

[0053] Furthermore, the functional modules in the various embodiments of the present invention can be integrated into one processing module, or each component can exist physically separately, or two or more modules can be integrated into one module. The integrated modules described above can be implemented in hardware or as software functional modules.

[0054] If the integrated module is implemented as a software functional module and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present invention, in essence, or the part that contributes to the prior art, or all or part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of the present invention. The aforementioned storage medium includes: USB flash drive, portable hard drive, read-only memory (ROM). Various media that can store program code, such as only memory, random access memory (RAM), magnetic disks or optical disks.

[0055] It should be noted that, for the sake of simplicity, the foregoing method embodiments are all described as a series of actions. However, those skilled in the art should understand that the present invention is not limited to the described order of actions, because according to the present invention, some steps can be performed in other orders or simultaneously. Furthermore, those skilled in the art should also understand that the embodiments described in the specification are preferred embodiments, and the actions and modules involved are not necessarily essential to the present invention.

[0056] In the above embodiments, the descriptions of each embodiment have different focuses. For parts not described in detail in a certain embodiment, please refer to the relevant descriptions of other embodiments.

[0057] The above is a detailed description of the preferred embodiments of the present invention. However, the present invention is not limited to the embodiments described. Those skilled in the art can make various equivalent modifications or substitutions without departing from the spirit of the present invention. All such equivalent modifications or substitutions are included within the scope defined by the claims of this application.

Claims

1. A method for improving the impedance accuracy of multilayer circuit boards, characterized in that, The method includes: The multilayer circuit board component is divided into a reference area and at least one dynamic area, wherein the reference area is located in the middle of the multilayer circuit board component, and the dynamic area is the remaining area of ​​the multilayer circuit board component other than the reference area. The first copper thickness, first dielectric thickness, and first dielectric constant of the reference region are obtained as the parameters of the reference region; the reference region parameters are input into the impedance calculation software so that the impedance calculation software can obtain the first theoretical linewidth through simulation calculation based on the set target impedance value. The dynamic region parameters of the dynamic region are determined, and the second theoretical linewidth of the dynamic region is calculated based on the dynamic region parameters. The dynamic region parameters include a second copper thickness, a second dielectric thickness, and a second dielectric constant. The second dielectric thickness is determined based on the first dielectric thickness and the dielectric thickness difference. The second dielectric constant is determined based on the first dielectric constant, the first dielectric thickness, and the second dielectric thickness. The dielectric thickness difference is determined as follows: based on the thickness grade of the copper used in the circuit board, the corresponding dielectric thickness difference is determined. Specifically, when the copper thickness used in the circuit board is less than or equal to 1 oz, the dielectric thickness difference value is X; when the second copper thickness is greater than 1 oz and less than or equal to 3 oz, the dielectric thickness difference value is Y; when the second copper thickness is greater than 3 oz and less than or equal to 6 oz, the dielectric thickness difference value is Z. X, Y, and Z are determined by averaging the differences between the dielectric thicknesses of the reference region and the dynamic region through slice measurements. Determining the dynamic zone linewidth of the dynamic zone based on the first theoretical linewidth and the second theoretical linewidth includes: calculating the difference between the first theoretical linewidth and the second theoretical linewidth; when the difference is determined to be less than a preset tolerance, determining the dynamic zone linewidth based on the first theoretical linewidth and the difference; when the difference is determined to be greater than the preset tolerance, determining the dynamic zone linewidth based on the first theoretical linewidth and the preset tolerance. The impedance design parameters of the dynamic region, including the linewidth of the dynamic region, are sent to the relevant process equipment so that the relevant process equipment can re-perform at least one of the following process steps: pattern transfer process, lamination process, drilling process, electroplating process, and screen printing process, based on the impedance design parameters, in order to complete the fabrication of the multilayer circuit board.

2. The method for improving impedance accuracy of multilayer circuit boards according to claim 1, characterized in that, Determining the second dielectric constant of the dynamic region based on the first dielectric constant, the first dielectric thickness, and the second dielectric thickness includes: The second dielectric thickness is determined based on the first dielectric thickness and the difference between the dielectric thicknesses, wherein: H2 = H1 - X, or H2 = H1 - Y, or H2 = H1 - Z; The dielectric constant of the second dielectric is determined using the following formula: ; ;X=H1-H2; or ; ;Y=H1-H2;or ; ;Z=H1-H2; Wherein, DK2 is the dielectric constant of the second dielectric, DK1 is the dielectric constant of the first dielectric, H1 is the thickness of the first dielectric, and H2 is the thickness of the second dielectric.

3. The method for improving impedance accuracy of multilayer circuit boards according to claim 1, characterized in that, The step of determining the dynamic zone linewidth based on the first theoretical linewidth and the difference includes: determining the dynamic zone linewidth using the formula W2=W1-K, where W2 is the dynamic zone linewidth, W1 is the first theoretical linewidth, and K is the difference.

4. The method for improving impedance accuracy of multilayer circuit boards according to claim 3, characterized in that, The step of determining the dynamic zone line width based on the first theoretical line width and the preset tolerance includes: determining the dynamic zone line width using the formula W2=W1-M / 2, where M / 2 is the preset tolerance and M is the line width tolerance.

5. A device for improving the impedance accuracy of multilayer circuit boards, characterized in that, The device includes: A partitioning module is used to partition a multilayer circuit board component into a reference area and at least one dynamic area, wherein the reference area is located in the middle of the multilayer circuit board component, and the dynamic area is the remaining area of ​​the multilayer circuit board component other than the reference area. The determination module is used to obtain the first copper thickness, first dielectric thickness, and first dielectric constant value of the reference region as the reference region parameters; input the reference region parameters to impedance calculation software so that the impedance calculation software can obtain the first theoretical linewidth through simulation calculation based on the set target impedance value; determine the dynamic region parameters of the dynamic region, and calculate the second theoretical linewidth of the dynamic region based on the dynamic region parameters; wherein, the dynamic region parameters include the second copper thickness, the second dielectric thickness, and the second dielectric constant, the second dielectric thickness is determined based on the first dielectric thickness and the dielectric thickness difference; the second dielectric constant is determined based on the first dielectric constant, the first dielectric thickness, and the second dielectric thickness; the dielectric thickness difference is determined in the following way: based on the thickness grade of the copper thickness used in the circuit board, the corresponding dielectric thickness difference is determined; wherein, when the When the copper thickness used in the circuit board is less than or equal to 1 oz, the dielectric thickness difference value is X; when the second copper thickness is greater than 1 oz and less than or equal to 3 oz, the dielectric thickness difference value is Y; when the second copper thickness is greater than 3 oz and less than or equal to 6 oz, the dielectric thickness difference value is Z; X, Y, and Z are determined by averaging the differences between the dielectric thicknesses of the reference area and the dynamic area through slicing measurements; determining the dynamic area linewidth based on the first theoretical linewidth and the second theoretical linewidth includes: calculating the difference between the first theoretical linewidth and the second theoretical linewidth; when the difference is determined to be less than a preset tolerance, determining the dynamic area linewidth based on the first theoretical linewidth and the difference; when the difference is determined to be greater than the preset tolerance, determining the dynamic area linewidth based on the first theoretical linewidth and the preset tolerance; The sending module is used to send the impedance design parameters of the dynamic area, including the linewidth of the dynamic area, to the relevant process equipment, so that the relevant process equipment can re-perform at least one of the following process steps: pattern transfer process, lamination process, drilling process, electroplating process, and screen printing process according to the impedance design parameters, in order to complete the fabrication of the multilayer circuit board.

6. An electronic device, characterized in that, The method includes a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the computer program to implement the steps of the method for improving impedance accuracy of a multilayer circuit board as described in any one of claims 1 to 4.

7. A computer-readable storage medium having a computer program stored thereon, characterized in that, When the computer program is executed by the processor, it implements the steps of the method for improving the impedance accuracy of multilayer circuit boards according to any one of claims 1 to 4.

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