Method for manufacturing printed circuit board

Abstract

A method of manufacturing a printed circuit board having a metallic conductor structure is described. The method comprises: providing a base substrate (101) in the form of a film or sheet, the base substrate having a first substrate side (101a) and a second substrate side, the base substrate being at least partially composed of a non-conductive organic polymer material, the first substrate side (101a) being covered with a covering metal layer (102); and removing the cover metal layer (102) in some regions of the first substrate side (101a). In order to remove the cover metal layer (102), a mask layer (103) is applied to the cover metal layer (102). The mask layer (103) is removed in some regions such that the first substrate side (101a) is divided into at least one first sub-region (104), in which the first substrate side (101a) is covered only by the cover metal layer (102), and at least one second sub-region (105), in which the first substrate side (101a) is covered by the cover metal layer (102) and the mask layer (103). The covering metal layer (102) is then removed in the at least one first sub-region (104). According to the invention, the mask layer (103) is removed by an etching process using an etching solution, and a phase change or a chemical conversion is carried out in the mask layer (103) in the first sub-region (104) prior to the etching process.

Description

[0001] The present invention described below relates to a method for manufacturing printed circuit boards. Background Technology

[0002] Printed circuit boards (PCBs) serve as a carrier for electronic components and ensure their electrical contact. Almost every electronic device contains one or more PCBs.

[0003] Printed circuit boards (PCBs) always include a non-conductive base substrate and a conductor track structure (or simply conductor structure) on at least one side of the substrate for electrical contacts of electronic components. Typically, the base substrate for PCBs is made of fiber-reinforced plastic, plastic film, or cardboard. The conductor tracks are usually made of metals such as copper.

[0004] In the simplest case, only one side of the base substrate has a conductor structure. However, for more complex circuits, more than one layer of conductor tracks is typically required, necessitating a multilayer printed circuit board (MLB). In these cases, conductor structures can be provided on both sides of the base substrate, or several base substrates (each with one conductor layer) can be combined to form an MLB. A base substrate with conductor structures on both sides can also form the basis of a multilayer structure. The conductor tracks of different conductor layers can be electrically connected to each other via vias (vertical interconnect paths). For this purpose, for example, holes can be drilled in the base substrate, and the walls of these holes can be metallized.

[0005] A classic method for forming conductor structures on a base substrate is to use a subtractive process with a photoresist (or simply resist) in a multi-stage photolithography process. The solubility of the photoresist in the developer solution can be affected by radiation, particularly UV radiation. In a conventional procedure, a metal layer is formed on the base substrate and covered with a photoresist. The photoresist layer can be, for example, laminated onto the metal layer. Then, in an exposure step, the photoresist layer is exposed to the aforementioned radiation, thereby protecting sub-regions of the layer from radiation through an exposure mask. Depending on the photoresist and developer solution used, the exposed or unexposed portions of the photoresist are soluble in the developer solution after the exposure step and can be removed in a subsequent step. In this subsequent step (development step), sub-regions of the metal layer on the base substrate are exposed, and these sub-regions can be removed by wet chemical methods in a subsequent step (etching step). The residue of the remaining metal layer after the subsequent complete removal of the resist forms the desired conductor structure. If necessary, the obtained conductor structure can be enhanced during the deposition step, for example by electroplating a suitable metal.

[0006] Due to the manufacturing process, the conductor tracks are located on the surface of the base substrate. This can be disadvantageous in MLB manufacturing. For example, if the surface of the base substrate with the conductor tracks is pressed onto another base substrate, misalignment of the conductor tracks may occur due to the pressure and temperature generated during pressing. Therefore, pressing parameters need to be controlled, and subsequent corrections are often required. Conductor tracks on the surface of the base substrate are particularly exposed to this stress. The smaller the distance and size of the conductor tracks on the substrate, the greater the corresponding requirements for control and correction (e.g., in terms of impedance and signal speed requirements).

[0007] Another common drawback of classic subtractive processes is the limited resolution of the conductor structures produced. Conductor tracks with widths ranging from 40 μm to 80 μm are common. It is almost impossible to produce conductor tracks with widths in the low two-digit or even single-digit µm range in this way.

[0008] WO 2021 / 001167 A1 discloses a method for manufacturing a printed circuit board, in which a plastic film is provided as a base substrate, the base substrate being covered with a cover metal layer on at least one side. This layer is removed in certain areas, followed by a plasma treatment that simultaneously forms recesses (e.g., trenches) in areas of the film that are exposed. The recesses are then filled with a fill metal to form a conductor structure. The residue of the cover metal layer used as a mask during the plasma treatment is then removed. Printed circuit boards produced in this manner are characterized by conductor tracks not being arranged on a surface, but rather embedded in the processed film, which compensates for some of the drawbacks of conductor tracks produced using classical subtractive processes. However, the procedure according to WO 2021 / 001167 A1 also requires subtractive etching of the metal layer formed on the base substrate.

[0009] This etching process is problematic for ecological reasons. Commercially available photoresists are not recyclable. The resulting waste solution contains organic compounds, making its environmental disposal complex and expensive. Furthermore, in many processes, it is necessary to remove the photoresist formed after subtractive etching in a separate process step.

[0010] WO 2022 / 028852 A1 discloses a method for manufacturing a printed circuit board with a metallic conductor structure. A base substrate having a first substrate side and a second substrate side is provided, the base substrate being at least partially composed of a non-conductive organic polymer material, wherein the first substrate side is covered with a cover metal layer. To remove the cover metal layer in certain areas, a mask layer of titanium, zinc, titanium dioxide, titanium nitride, zinc oxide, and / or a polymer material is applied to the cover metal layer. The mask layer is removed region by region by laser, such that the first substrate side is divided into a first sub-region and a second sub-region, in which the first substrate side is covered only by the cover metal layer, and in the second sub-region, the first substrate side is covered by both the cover metal layer and the mask layer. The cover metal layer in the first sub-region is then removed using an etching solution. According to this procedure, metals and / or metal compounds are used to form the mask layer instead of using classic photoresists, which has the advantage of allowing structuring via a laser ablation process. The ablated metal or ablated metal compound can be extracted, collected, and recovered. Therefore, the method according to WO 2022 / 028852 A1 enables the production of printed circuit boards in an environmentally friendly manner within a closed-loop system.

[0011] However, this procedure also has drawbacks. In some cases, a significant disadvantage is that, depending on the material chosen for the mask layer, vapor and dust may be generated during the area-by-area removal of the mask layer using a laser. This vapor and dust must be removed, which can be very expensive and time-consuming. Summary of the Invention

[0012] The purpose of this invention is to further improve the procedures for manufacturing printed circuit boards known from WO 2022 / 028852 A1, in particular to avoid or at least reduce the problems described.

[0013] To accomplish this task, the present invention provides a method having the features of claim 1. Further embodiments of the invention are the subject of the dependent claims.

[0014] According to the present invention, the proposed method for manufacturing a printed circuit board having a metallic conductor structure always includes the following steps a. and b.: a. A base substrate in the form of a film or sheet, the base substrate having a first substrate side and a second substrate side, the base substrate being at least partially composed of a non-conductive organic polymer material, wherein the first substrate side is covered with a cover metal layer.

[0015] b. Remove the cover metal layer in certain areas on the first substrate side.

[0016] Remove the covering metal layer as follows: c. Apply the mask layer onto the overlay metal layer.

[0017] d. Remove the mask layer in certain areas such that the first substrate side is divided into at least one first sub-region and at least one second sub-region, wherein in the first sub-region, the first substrate side is covered only by a cover metal layer, and in the second sub-region, the first substrate side is covered by both a cover metal layer and a mask layer.

[0018] e. Remove the covering metal layer in at least one first sub-region.

[0019] The method is particularly characterized by the following steps: f. Remove the mask layer in the first sub-region by using an etching solution, and perform a phase change or chemical transformation in the mask layer, particularly in the first sub-region, prior to the etching process used to remove the mask layer.

[0020] A phase transition refers to the complete or partial transformation of the material of the mask layer from a crystalline or semi-crystalline state to an amorphous state, or vice versa. Preferably, the phase transition occurs in the first sub-region.

[0021] Steps a through e are known from WO 2022 / 028852 A1, the contents of which are hereby incorporated by reference. However, a new step f is added, which has the advantage of not generating dust when removing the mask layer. Preferably, the phase change or chemical transformation is performed without removing material from the mask layer. Instead of ablation, the present invention provides a combination of the phase change or chemical transformation with the etching process. The mask layer can be removed chemically using an etching solution.

[0022] Phase transitions can be achieved in several ways. According to the invention, preferably, at least one laser is used for this purpose. Therefore, the method according to the invention is preferably characterized by at least one of the following features a to e: a. Phase transition is achieved through lasers.

[0023] b. The laser operates in pulsed or continuous mode.

[0024] c. The wavelength of the laser is in the range of 300 nm to 600 nm.

[0025] d. The laser operates with energy insufficient to cause ablation of the mask layer.

[0026] e. The laser operates in pulsed mode, with pulse energies ranging from 0.1 µJ to 100 µJ.

[0027] Depending on the material chosen for the mask layer, short laser pulses may cause amorphization or crystallization in the laser-treated area (e.g., an area with a diameter of approximately 1 μm). The laser should be operated at low energy to avoid ablation of the mask layer. If necessary, suitable laser parameters can be optimized through testing. These parameters depend on, for example, the materials constituting the mask layer.

[0028] In a preferred embodiment, for example, a polycrystalline mask layer can be formed by silicon deposition using PECVD (plasma-enhanced chemical vapor deposition) followed by a heat treatment (e.g., annealing at 850°C for a period of, for example, one minute), and then converted to an amorphous phase using a laser. Lasers with wavelengths of 354 nm, 515 nm, or 532 nm, pulse energies of, for example, 100 nJ, and pulse durations of, for example, 100 ps are suitable for this purpose.

[0029] Alternatively, phase transformation can be achieved through heat treatment. This is particularly suitable for amorphous to crystalline or semi-crystalline transformations. Therefore, the method according to the invention is preferably characterized by the following feature a: a. Phase transition is achieved through heat treatment.

[0030] In a preferred embodiment, for example, an amorphous mask layer can be formed by sputtering silicon onto a covering metal layer, and the amorphous mask layer can be converted into a polycrystalline phase by heat treatment. During the heat treatment, the mask layer in the first sub-region can be heated to a temperature in the range of, for example, 800°C to 1000°C.

[0031] Particularly preferably, the method according to the invention is further characterized by at least one of the following features a to c: a. The mask layer is formed of a mask material capable of reversible amorphization and crystallization, wherein the resistance of the mask material to the etching solution depends on the phase state of the mask material.

[0032] b. The mask layer is composed of inorganic semiconductors or inorganic semiconductor compounds, particularly selected from the group consisting of silicon, SiO2, SiN, gallium, indium and GaAs.

[0033] c. The mask layer is made of a polymer material that can exist in a semi-crystalline or amorphous state.

[0034] Preferably, features a. and b. or a. and c. are implemented in combination.

[0035] The mask layer can also be made of ceramic materials, oxides or nitrides.

[0036] The concept of this invention is based on the finding that, for most materials considered, the etch rate for removing the mask layer during the etching process depends on the phase state of the material. In other words, the effectiveness of the etch solution can be affected by changing the phase of the material to be etched. For example, subregions where the mask layer is amorphous are less chemically resistant to the etch solution than subregions with crystalline or semi-crystalline mask layers. Conversely, this depends on the choice of material.

[0037] The same effect can be achieved by chemically transforming the material to be etched.

[0038] In the context of this invention, relatively high chemical resistance means that the material exhibits a lower tendency to dissolve when in contact with the etching solution than the comparative material. Therefore, when two materials are in contact with the etching solution under the same conditions (especially the same etching solution and the same temperature), the material with a slower dissolution rate (i.e., a lower etching rate) has stronger chemical resistance than the other material.

[0039] Particularly preferably, the method according to the invention is characterized by one of the immediately following steps a. and b.: a. During the phase transition in the first sub-region, the mask layer is transformed into a phase state that is less chemically resistant to the etching solution than before the phase transition.

[0040] b. During the chemical transformation in the first sub-region, the mask layer is transformed by chemical transformation into a state where its chemical resistance to the etching solution is weaker than before the chemical transformation.

[0041] In a preferred embodiment, a mask material capable of reversible amorphization and crystallization via laser induction is selected. This concept applies to both inorganic and organic mask layers. Essentially, the only important thing is that the aforementioned phase transition can occur, and different phase states result in different etching rates. This can also be determined for individual materials and optimized experimentally.

[0042] The particularly preferred material is silicon, which can be transformed from an amorphous state to a crystalline or semi-crystalline state and from a crystalline or semi-crystalline state to an amorphous state.

[0043] The aforementioned chemical transformation refers to the complete or partial chemical transformation of the mask layer material in the first sub-region. This chemical transformation is particularly preferably oxidation (e.g., Si --> SiO). X (where x ≤ 2). However, other chemical transformations are also possible, such as nitride formation (e.g., silicon --> SiN).

[0044] Therefore, in some preferred embodiments, the method according to the invention is characterized by at least one of the following additional features a to c: a. Chemical transformation is oxidation.

[0045] b. Chemical conversion is carried out by exposing the mask layer to an oxidizing atmosphere.

[0046] c. Chemical conversion is achieved by heating the mask layer.

[0047] d. Chemical transformation is achieved through lasers.

[0048] Preferably, the preceding features a. and b. are implemented in combination. Particularly preferably, the preceding features a. to c. are implemented in combination. In a further preferred embodiment, features a. and b., and d., or features a. to d., are implemented in combination.

[0049] In other possible embodiments, the following features may be preferred: a. The mask layer is formed of a metallic or semi-metallic mask material, the oxides or nitrides of which are less chemically resistant to the etching solution than the metal or semi-metallic mask material itself.

[0050] b. The mask layer is composed of inorganic semiconductors or inorganic semiconductor compounds, particularly selected from the group consisting of silicon, gallium, indium, and GaAs. The inorganic semiconductors may be doped or undoped.

[0051] For chemical conversion to occur, a mask layer outside the first sub-region may need to be protected. However, it is preferable to also perform the chemical conversion via laser induction. For example, the mask layer can be exposed to an oxidizing atmosphere or an atmosphere containing another reactant (such as nitrogen or ammonia). The activation energy required for the corresponding chemical conversion is then supplied to the first sub-region via a laser. Masking outside the first sub-region is unnecessary.

[0052] The overlay metal layer is also preferably removed by etching with an etching solution. Two different etching solutions can be used to remove the mask layer and the overlay metal layer in the first sub-region separately, and / or the etching can be performed in a separate step. However, it is particularly preferred that the etching of the mask layer and the etching of the overlay metal layer are performed in one step using the same etching solution.

[0053] Therefore, the method according to the invention is preferably characterized by at least one of the following features a. and b.: a. Etching process using an etching solution: The same etching solution is used in one step to remove the mask layer and the overlay metal layer in the first sub-region.

[0054] b. The etching solution is an acidic or alkaline solution used to etch copper.

[0055] Commercially available etching solutions, particularly commercially available aqueous etching solutions, can be used within the scope of this invention. The core idea of ​​this invention is based on altering the material's sensitivity to etching solutions through targeted phase transitions or chemical transformations. In principle, this can be accomplished with any etching solution.

[0056] In a preferred embodiment, potassium hydroxide solution or sodium hydroxide solution can be used as an alkaline etching solution.

[0057] In a preferred embodiment, the acidic etching solution can be an aqueous solution containing nitric acid and hydrogen fluoride, or an aqueous solution containing hydrochloric acid and hydrogen peroxide. The solution containing nitric acid and hydrogen fluoride is particularly preferred for etching silicon.

[0058] In a preferred embodiment of the invention, the method is further characterized by at least one of the following features a. and b.: a. The covering metal layer is made of copper.

[0059] b. Etching solution is a solution used to etch copper.

[0060] Those skilled in the art understand that the copper does not necessarily have to be pure copper. If desired, the coating metal layer preferably contains small amounts of one or more other metals. Therefore, the coating metal layer can also be made of a copper alloy.

[0061] As an alternative to copper or copper alloys, nickel-chromium alloys can also be used as the cover metal. In this case, the etching solution is a solution used to etch the nickel-chromium alloy. In this case, the metal and / or metal compound and / or polymer material forming the mask layer must have stronger chemical resistance to the etching solution than the nickel-chromium alloy.

[0062] The etching solution is preferably based on copper chloride, sodium persulfate, ammonium persulfate, copper sulfate, and ferric chloride. Solutions containing hydrochloric acid and hydrogen peroxide are also suitable. This is particularly suitable for cases where the overlay metal layer is formed of copper or a copper alloy.

[0063] In particular, the copper etching solution can also etch a mask layer material compatible with it. Therefore, it is possible to etch both the mask layer and the overlay metal layer using the same etching solution in a single step.

[0064] Regardless of its material composition, the covering metal layer should be a continuous closed layer before it is removed in certain areas. The thickness of the covering metal layer is preferably in the range of 10 nm to 10 µm, and particularly preferably in the range of 20 nm to 6 µm.

[0065] To form the cover metal layer, a thin metal foil, particularly a thin copper foil, can be applied as a cover metal layer to the first substrate side, for example, by lamination. Alternatively, the cover metal layer can be formed on the first substrate side by physical vapor deposition (PVD) or chemical vapor deposition (CVD), by sputtering, or by a wet chemical coating process to provide the base substrate.

[0066] Metallization by physical vapor deposition and chemical vapor deposition, as well as the generation of metal layers by wet chemical coating processes or sputtering deposition, are known to those skilled in the art and require no further explanation.

[0067] It is likely preferable to apply an adhesion-promoting layer to the first substrate side before forming the cover metal layer or when applying the cover metal layer.

[0068] In another preferred embodiment of the invention, the method is further characterized by at least one of the following additional features a to d: a. The thickness of the mask layer is in the range of 5 nm to 10 μm or 10 nm to 10 μm.

[0069] b. The mask layer is formed by physical vapor deposition or chemical vapor deposition.

[0070] c. The mask layer is formed by sputtering.

[0071] d. The mask layer is formed by a wet chemical coating process.

[0072] Feature a. is particularly preferably implemented in combination with one of features b., c. or d.

[0073] Particularly preferably, the mask layer is formed with a thickness ranging from 5 nm to 1000 nm, more preferably from 5 nm to 500 nm, and particularly preferably from 5 nm to 250 nm. If a polymer material is used, the thickness of the layer can also be in the range of μm, for example, from 2 μm to 10 μm.

[0074] In a particularly preferred first variant of the method, the method is further characterized by the following step a: a. After removing the cover metal layer in at least one first sub-region, remove the mask layer in at least one second sub-region, thereby leaving the cover metal layer in the at least one second sub-region as a metal conductor structure.

[0075] This completes the partial removal of the overlay metal layer. The remaining overlay metal layer in the second sub-region forms the metal conductor structure. Printed circuit board production can then continue in the conventional manner. For example, the conductor structure can be coated with solder resist to protect it. The free contacts can be coated with precious metals such as gold, silver, or platinum.

[0076] In an alternative, particularly preferred second variant of the method, the method is further characterized by at least one of the immediately following steps a. to d.: a. After removing the cover metal layer in at least one first sub-region, subjecting the first substrate side to plasma, by means of the plasma, removing the polymer material of the base substrate in the at least one first sub-region, thereby forming at least one recess or hole in the base substrate.

[0077] b. The at least one recess or hole is filled with filler metal.

[0078] c. Completely remove the covering metal layer and mask layer in at least one second sub-region while retaining the metal conductor structure in the at least one recess or hole.

[0079] d. If necessary, planarize the first substrate side having at least one recess or hole filled with filler metal.

[0080] Preferably, the at least one recess is or includes at least one groove.

[0081] The preceding steps a., b., and c. are particularly preferably implemented in combination with each other. Step d. is an optional step that can be performed subsequently. However, in some embodiments, the complete removal of the overlay metal layer and mask layer according to step c. can also be performed during the planarization according to step d. Therefore, in some embodiments, steps c. and d. can be the same.

[0082] In some preferred embodiments of this variant, step c. is performed prior to step b., i.e., after the first substrate side has been exposed to plasma, the cover metal layer and mask layer are first completely removed in at least one second sub-region. This leaves the recess on the first substrate side without the cover metal layer and mask layer. The recess is then filled with fill metal in a subsequent step, ideally followed by planarization according to step d.

[0083] According to this second variant of the method, the conductor structure is formed in at least one recess rather than in a second local region. This allows the conductor structure to be embedded in the base substrate.

[0084] In a particularly preferred embodiment, complete removal of the mask layer is not performed as part of a separate removal step. Instead, it is preferred that the mask layer be removed during plasma treatment performed in step a. of a particularly preferred second variant of the described method. This is particularly efficient when the mask layer is formed of a polymeric material (e.g., a polymeric material that can exist in a semi-crystalline or amorphous state). If the treatment time is long enough, the mask layer can be completely removed by plasma. This saves an entire method step, thereby significantly improving the efficiency of the method.

[0085] In particularly preferred embodiments of the first and second variations of this method, a multilayer printed circuit board is produced. A first conductor structure is formed in the multilayer printed circuit board by either a conductor structure embedded in the base substrate according to the second variation, or a cover metal layer that serves as a conductor structure and remains in the second sub-region according to the first variation of the method. If desired, the first conductor structure can be connected to additional conductor structures in the printed circuit board.

[0086] In this additional embodiment, the method further includes at least one of the following additional steps a to f: a. Covering a first conductor structure with an electrically insulating material layer, the electrically insulating material layer being at least partially composed of a non-conductive organic polymer material, and the electrically insulating material layer having a lower side that is in direct contact with the first conductor structure and an upper side that is away from the first conductor structure when combined with a base substrate.

[0087] b. If it does not already exist, a covering metal layer is formed on the upper side of the electrical insulating material layer. c. Partially remove the covering metal layer, thereby dividing the upper side into at least one first sub-region and at least one second sub-region, wherein in the first sub-region the upper side is not covered by the covering metal layer, and in the at least one second sub-region the upper side is covered by the covering metal layer. d. Treat the upper surface with plasma, thereby removing the polymer material of the electrically insulating layer in the at least one first sub-region, thus forming at least one recess. e. Fill the at least one recess with filler metal, and f. Completely remove the covering metal layer in at least one second sub-region to form a second conductor structure or a part of a second conductor structure.

[0088] Preferably, at least the immediately preceding steps a. to c. are performed in combination with each other. In a preferred embodiment, the three steps d. to f. are then combined.

[0089] However, a particularly preferred first variant, similar to the method described above, could also involve a covering metal layer retained in the second sub-region of the top surface that has already formed a second metal conductor structure or is part of that metal conductor structure. In this case, the immediately preceding steps d. to f. are unnecessary.

[0090] In step c. above, the partial removal of the cover metal layer can be performed in the same manner as when the cover metal layer is partially removed on the first substrate side of the base substrate, thereby subdividing the upper side of the electrically insulating material layer.

[0091] The electrically insulating layer can be a plastic film. For example, this layer can be the same as the base substrate provided in step a. of claim 1. Therefore, it is preferably at least partially composed of a non-conductive organic polymer material. Particularly preferred is that the electrically insulating layer and the base substrate are identical.

[0092] By repeating steps a. to c. or steps a. to f. above several times, an MLB with any number of layers can be sequentially built.

[0093] In a preferred embodiment of the invention, the method includes at least one of the following features a. and b.: a. The thickness of the base substrate and / or the electrical insulating material layer is in the range of 10 μm to 3 mm, preferably in the range of 10 μm to 2 mm.

[0094] b. The organic polymer material of the base substrate and / or the electrical insulating material layer is a thermoplastic polymer material, preferably selected from the group consisting of polyimide, polyamide, Teflon, polyester, polyphenylene sulfide, polyoxymethylene and polyetherketone.

[0095] Preferably, the aforementioned features a. and b. are implemented in combination with each other.

[0096] Particularly preferred is that both the base substrate and the electrical insulating material layer are films made of polymer materials, particularly one of the aforementioned preferred polymer materials.

[0097] The aforementioned preferred thickness range is particularly applicable to cases where the printed circuit board to be produced is multilayered. In the case of a single-layer printed circuit board, in some preferred embodiments, a relatively thick base substrate is selected, i.e., a substrate formed as a relatively thick board.

[0098] Particularly preferably, the method according to the invention, especially a preferred second variant of the method, is characterized by at least one of the following additional features a to c: a. The base substrate and / or electrical insulating material layer include particulate fillers, particularly dielectric fillers.

[0099] b. The base substrate and / or the electrical insulating material layer is a plastic film with filler.

[0100] c. The characteristic of particulate fillers is that the average particle size (d50) is <1 μm.

[0101] Preferably, the aforementioned features a. and b., and especially a. to c., are implemented in combination with each other.

[0102] If desired, the base substrate and / or electrical insulating layer may include fillers, particularly dielectric fillers. For example, the base substrate and / or electrical insulating layer may be films made of one of the aforementioned polymeric materials, in which silica particles are embedded.

[0103] Metal or semi-metal oxides (especially alumina, zirconium oxide, or titanium oxide, in addition to silicon dioxide) and other ceramic fillers (especially silicon carbide, boron nitride, or boron carbide) are particularly suitable as dielectric fillers. Silicon may also be used if desired.

[0104] The filler is preferably in the form of particles, particularly particles with an average particle size (d50) in the nanometer range (<1 μm).

[0105] To facilitate handling during processing, the base substrate can be applied to a carrier or auxiliary substrate, such as one made of glass or aluminum.

[0106] In a preferred embodiment of the invention, and particularly in a preferred second variant of the method described above, the method includes at least one of the following features a. and b.: a. The plasma is provided using process gases from a group consisting of O2, H2, N2, argon, helium, CF4, C3F8, CHF3, and mixtures of the above gases (e.g., O2 / CF4).

[0107] b. The plasma is applied at a temperature ranging from -15°C to 200°C, preferably from -15°C to 80°C.

[0108] Preferably, the aforementioned features a. and b. are implemented in combination with each other.

[0109] Particularly preferably, in the context of this invention, the process gas used for plasma supply comprises at least one of the reaction gases from the group consisting of CF4, C3F8 and CHF3.

[0110] Etching using plasma is also an existing technology. Plasma etching uses process gases to transfer the material to be etched into the gas phase. The gas rich in the material being etched is pumped out, and fresh process gas is supplied. In this way, continuous removal can be achieved.

[0111] In the context of this invention, inductively coupled plasma (ICP plasma) is particularly preferred, for example, generated by an ICP generator with DC bias.

[0112] The process gases described above are particularly suitable for etching the preferred polymer materials.

[0113] In the current context, it is important that the base substrate and / or electrically insulating material layer, made of polymer material, are in direct contact with the plasma in at least one first sub-region on the first substrate side and / or in at least one first sub-region on the upper side, while at least one second sub-region on the first substrate side and / or in at least one second sub-region on the upper side is covered with a corresponding cover metal layer. Typically, metals are etched by plasma more slowly than polymer materials, especially when using the aforementioned process gases. Therefore, when exposed to plasma, recesses are formed only in at least one first sub-region on the first substrate side, while the cover metal layer and mask layer (the latter at least temporarily) form a barrier, thereby protecting each of the respective at least one second sub-region from the effects of the plasma. Thus, recesses can be constructed in a targeted manner and with high precision on the surfaces of the base substrate and the electrically insulating material layer.

[0114] In a particularly preferred embodiment, plasma is used in an anisotropic etching process. Ideally, ions in the plasma are accelerated perpendicular to the substrate surface to be etched. The accelerated ions ensure physical sputtering removal.

[0115] Reactive ion etching (RIE) and reactive ion beam etching (RIBE) are particularly suitable as anisotropic etching processes.

[0116] In another preferred embodiment of the invention, the method includes one of the following steps a. to c.: a. In order to fill at least one recess in the first substrate side of the base substrate and / or the upper side of the electrical insulating material layer, the at least one recess is metallized in a step, and the metallized at least one recess is filled with filler metal in a subsequent step.

[0117] b. Metallization of at least one recess is performed by physical vapor deposition or chemical vapor deposition, particularly by sputtering on the first substrate side, or by a wet chemical method.

[0118] c. The first substrate side and / or the top side are fully metallized.

[0119] Preferably, the aforementioned features a. and b., especially a. to c., are implemented in combination with each other.

[0120] Preferably, a thin layer of copper or a copper alloy is formed during metallization.

[0121] In the case of wet chemical metallization, for example, metallization is carried out by depositing copper from a solution.

[0122] Filling with filler metal is preferably performed by electrochemical deposition. Filling is particularly preferably performed by a so-called via-filling method, which allows deposition to be performed primarily in at least one recess and possibly in a hole or blind via, while minimizing unwanted deposition on the first substrate side and / or the top side.

[0123] The metallization layer applied to the entire surface enables electrical contact on the first substrate side and / or the top side, for example, enabling the positioning of a cathode electrode there for subsequent electrochemical deposition and ensuring that the entire substrate side can be coated.

[0124] In principle, any metal and alloy that can be used to produce conductor track structures on printed circuit boards can be used as filler metal. However, it is particularly preferred that... a. The filler metal used to fill at least one recess is copper or a copper alloy.

[0125] In a further preferred embodiment of a particularly preferred second variant of the method, the method includes one of the immediately following steps a. or b.: a. Removal of the cover metal layer and / or mask layer in at least one second sub-region on the substrate side and / or top side is performed by an etching step.

[0126] b. Removal of the cover metal layer and / or mask layer in at least one second sub-region is performed by machining the first substrate side and / or top side.

[0127] Etching steps, for example, are classic etching steps that use strong acids such as hydrochloric acid.

[0128] For example, if the cover metal layer is removed mechanically, it can be removed by polishing and / or grinding. The preferred objective is to completely remove the cover metal layer from at least one corresponding second sub-region. Only in this way is the formation of the conductor structure considered complete.

[0129] Complete removal of the cover metal layer in at least one second sub-region may also include removing the fill metal in at least one first sub-region, and, if necessary, removing the fill metal in at least one recessed region, to the extent that fill metal protruding beyond one or more edges of the at least one recess is removed.

[0130] Particularly advantageous is that during the machining of the first substrate side, not only is the overlay metal layer removed, but the first substrate side is also planarized simultaneously. The preferred objective of planarization is to flatten the first substrate side so that its surface is free of any protruding conductor tracks. Instead, the conductor structure is preferably fully embedded in at least one recess.

[0131] In a preferred embodiment, the external conductor structures formed according to this method can be coated with solder resist to protect these external conductor structures. The free contacts can be coated with precious metals such as gold, silver, or platinum.

[0132] According to this method, printed circuit boards with the highest resolution in the µm range can be produced with less work and lower production costs compared to existing technologies, while achieving higher yields.

[0133] In MLB manufacturing, especially when employing the described serialized structure, the conductor structure embedded in the base substrate plays a positive role. When the base substrate and other layers are pressed together, the pressure acting on the conductor structure is relatively low, which positively impacts meeting existing impedance and signal speed requirements. The fact that plasma etching can be used to form trenches with extremely high accuracy also has a positive effect in this regard. Attached Figure Description

[0134] Further features, details, and advantages of the invention will become apparent from the following description of preferred embodiments and the accompanying drawings, the wording of which forms part of the specification. The drawings are hereby schematically illustrated. • Figure 1 The steps of the method according to the invention, based on the particularly preferred second variant described above, are illustrated. • Figure 2 Steps of another embodiment of the method according to the present invention are shown.

[0135] • Figure 3 Steps of another embodiment of the method according to the present invention are shown. Detailed Implementation

[0136] exist Figure 1In the illustrated method, a base substrate 101 is provided in step A. In step B, a first substrate side 101a of the base substrate 101 is covered with a copper overlay metal layer 102. In step C, a phosphorus-doped polycrystalline silicon mask layer 103 is applied to the overlay metal layer 102. For this purpose, a 100 nm thick phosphorus-doped silicon layer is deposited by PECVD and heat-treated at 850°C for one minute. In step D, the mask layer 103 in the first sub-region 104 is first subjected to a phase transition—polycrystalline—to amorphous—by a laser (354 nm, pulse duration of 100 ps and pulse energy of 100 nJ), and then the mask layer is removed by an etching solution (HF / HNO3). In step E, the copper overlay metal layer 102 is removed in the first sub-region 104 by another etching solution (e.g., ammonium persulfate solution). It should be emphasized here that steps D and E can also be combined if an etching solution suitable for removing both the mask layer and the copper overlay metal layer is used.

[0137] The substrate side 101a, initially completely covered by the cover metal layer 102, is now divided into a first sub-region 104 and a second sub-region 105. In the first sub-region, the substrate side is not covered by the cover metal layer 102, while in the second sub-region, the substrate side is still covered by the cover metal layer 102 and the mask layer 103. In step F, plasma is applied to the substrate side 101a. Although sub-region 105 is shielded from the plasma by the cover metal layer 102 and the mask layer 103, the plasma causes material to be removed from sub-region 104, thus forming recesses 106, for example, in the form of trenches. However, if the plasma effect is sufficient, the mask layer can also be removed in this step. In step G, the recesses 106 are metallized by sputtering (metallization layer 107), and subsequently, in step H, the recesses 106 are filled by electrochemical deposition of filling metal 108. In step I, excess filler metal 108, as well as the cover metal layer 102 and mask layer 103 in sub-region 105 (if not already removed), are mechanically removed. Thus, a conductor structure 109 embedded in the recess 106 is obtained.

[0138] To form the MLB, in step J, a film 110 of electrically insulating polymer material is directly laminated onto the substrate side 101a having the conductor structure 109. In step K, its upper side 110a is covered with a cover metal layer 111, which is partially removed in steps L, M, and N in a manner similar to steps C, D, and E, i.e., by applying a mask layer 112 and removing the mask layer 112 in certain sub-regions and subsequently removing the cover metal layer 111 in the same sub-regions. The upper side 110a of the film 110, which was initially completely covered with the cover metal layer 111, is now divided into a first sub-region 113 and a second sub-region 114, in which the substrate side is not covered with the cover metal layer 111, and in which the substrate side is still covered with the cover metal layer 111 and the mask layer 112. In step O, plasma is applied to the upper surface 110a of the film 110. Although sub-region 114 is shielded from the effects of plasma by the covering metal layer 111 and the mask layer 112, the plasma removes material from sub-region 113, thus forming a recess 115. Here, if the plasma is strong enough, the mask layer can also be removed simultaneously. In step P, the mask layer 112 and the covering metal layer 111 are removed by an etching solution. Furthermore, one recess in the formed recess 115 is connected to the first conductor structure 109 via a hole 116. In step Q, the recess 115 including the hole 116 is metallized by sputtering (metallization layer 117), and then in step R, the recess 115 is filled by electrochemical deposition of a filling metal 118. In step S, excess filling metal 118, as well as the covering metal layer 111 and the mask layer 112 in sub-region 114, are mechanically removed. This yields a conductor structure 119 embedded in the recess 115. In step T, solder resist 120 is applied, followed by partial gold plating 121 on each contact of conductor structure 119.

[0139] According to Figure 2In the method, a base substrate 101 is provided, on which a copper overlay metal layer 102 is covered on a first substrate side 101a, and a copper overlay metal layer 107 is covered on a second substrate side 101b. In step A, a silicon mask layer 103 with a thickness of 100 nm is applied to the overlay metal layer 102 by sputtering. In step B, the mask layer 103 in at least the first sub-region 104 is subjected to a phase transition—amorphous to crystalline—by a laser (354 nm, pulse duration of 100 ps and pulse energy of 100 nJ), and then the mask layer in the sub-region 104 is removed by an etching solution (HF / HNO3). Following this step, the first substrate side 101a is divided into several first sub-regions 104 and several second sub-regions 105. In these first sub-regions, the first substrate side 101a is covered only by the cover metal layer 102, and in these second sub-regions, the first substrate side 101a is covered by both the cover metal layer 102 and the mask layer 103. In step C, the cover metal layer 102 is removed in the sub-regions 104 using an etching solution. Finally, in step D, the mask layer 103 is removed. The remaining cover metal layer 102 in the second sub-regions 105 forms a metal conductor structure.

[0140] According to Figure 3 The method provides a basis for... Figure 2 The same base substrate 101 as in the method. With Figure 2 Similarly, in step A, a 100 nm thick mask layer 103 of phosphorus-doped polycrystalline silicon is applied. In step B, the mask layer is removed in certain areas by laser-induced phase transition (laser at 354 nm, pulse duration of 100 ps, ​​and pulse energy of 100 nJ) and subsequent etching, such that the first substrate side 101a includes some first sub-regions 104 and some second sub-regions 105. In these first sub-regions, the first substrate side 101a is covered only by the cover metal layer 102, and in these second sub-regions, the first substrate side 101a is covered by both the cover metal layer 102 and the mask layer 103, as shown in B. In step C, the cover metal layer 102 is removed in region 104 using an etching solution. In step D, the substrate side 101a is exposed to plasma, which removes material in sub-regions 104 and thus forms recesses 106. The cover metal layer 102 and the mask layer 103 are then completely removed, and the mask layer can also be pre-removed by plasma if necessary. In step E, the recess 106 is metallized by sputtering (not shown), and then the recess 106 is filled by electrochemical deposition of fill metal 108. In step F, the substrate side 101a is planarized. Excess fill metal 108 is removed mechanically. Thus, a conductor structure 109 embedded in the recess 106 is obtained.

Claims

1. A method for manufacturing a printed circuit board having a metallic conductor structure, the method comprising the following steps: a. A base substrate (101) is provided in the form of a film or sheet, the base substrate having a first substrate side (101a) and a second substrate side, the base substrate being at least partially composed of a non-conductive organic polymer material, wherein, The first substrate side (101a) is covered with a cover metal layer (102), and b. Remove the cover metal layer (102) in certain areas of the first substrate side (101a). In order to remove the covering metal layer (102). c. Apply the mask layer (103) onto the overlay metal layer (102). d. Remove the mask layer (103) in certain areas, such that the first substrate side (101a) is divided into at least one first sub-region (104) and at least one second sub-region (105), in the first sub-region, the first substrate side (101a) is covered only by the cover metal layer (102), and in the second sub-region, the first substrate side (101a) is covered by both the cover metal layer (102) and the mask layer (103), and e. Remove the covering metal layer (102) in at least one first sub-region (104). Its features are, f. Remove the mask layer (103) in the first sub-region (104) by using an etching process with an etching solution, and perform a phase transition or chemical transformation in the mask layer (103) prior to the etching process for removing the mask layer (103).

2. The method according to claim 1, wherein it has at least one of the following additional features: a. The phase transition is achieved through laser light; b. The laser operates in pulsed mode or continuous mode; c. The wavelength of the laser is in the range of 300 nm to 600 nm; d. The laser is operated with energy insufficient to cause ablation of the mask layer (103); e. The laser operates in pulsed mode, wherein the pulse energy is in the range of 0.1 µJ to 100 µJ.

3. The method according to claim 1 or claim 2, wherein it has at least one of the following additional features: a. The mask layer (103) is formed of a mask material capable of reversible amorphization and crystallization, wherein, The resistance of the mask material to the etching solution depends on the phase state of the mask material; b. The mask layer (103) is composed of inorganic semiconductors or inorganic semiconductor compounds, particularly selected from the group consisting of silicon, SiO2, SiN, gallium, indium and GaAs; c. The mask layer (103) is made of a polymer material that can exist in a semi-crystalline, crystalline, or amorphous state.

4. The method according to any one of the preceding claims, further comprising the following additional features: a. The mask layer is transformed into a certain phase or state in the first sub-region by the phase transition or the chemical transformation, wherein the mask layer has lower chemical resistance to the etching solution than before the phase transition or the chemical transformation.

5. The method according to claim 1, wherein it has at least one of the following additional features: a. The chemical transformation mentioned is oxidation; b. The chemical conversion is performed by exposing the mask layer to an oxidizing atmosphere; c. The chemical transformation is performed by heating the mask layer; d. The chemical transformation is achieved through laser.

6. The method of claim 5, comprising at least one of the following additional features: a. The mask layer (103) is formed of a metal or half-metal mask material, wherein the oxide or nitride of the metal or half-metal mask material has lower chemical resistance to the etching solution than the metal or half-metal mask material. b. The mask layer (103) comprises or is composed of an inorganic semiconductor or an inorganic semiconductor compound, particularly selected from the group consisting of silicon, gallium, indium and GaAs.

7. The method according to any one of the preceding claims, having at least one of the following additional features: a. The etching process using the etching solution uses the same etching solution in one step to remove the mask layer (103) and the cover metal layer (102) in the first sub-region (104). b. The etching solution is an acidic or alkaline solution used for etching copper.

8. The method according to claim 1, wherein it has at least one of the following additional features: a. The covering metal layer is made of copper; b. The etching solution is a solution used for etching copper.

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