PCB microdefect detection method and system
By collaboratively designing a high-resolution image input and feature extraction network, an attention enhancement module, and a state space modeling module, the problems of weakened edge details, insufficient long-range dependence, and loss of low-resolution features in PCB micro-defect detection are solved, achieving high-precision and lightweight detection results.
Patent Information
- Application Number
- CN202511835431.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-12-08
- Publication Date
- 2026-03-24
AI Technical Summary
Existing technologies struggle to effectively address issues such as weakened edge details, insufficient long-range dependency, and feature loss due to low resolution in high-density wiring and miniaturized PCB inspection, especially in achieving high-precision inspection within lightweight model frameworks.
By combining high-resolution image input with a feature extraction network, an attention enhancement module, and a state space modeling module, and through prior fusion of the feature enhancement module, a dual state space model layer, and a detection head, the detection of minute defects is solved collaboratively.
It significantly improves the detection and localization capabilities of minute defects, enhances the discrimination performance under complex textures, and achieves an excellent balance between accuracy and efficiency while maintaining the model's lightweight design.
Smart Images
Figure CN121724925A_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The present application relates to the technical field of industrial automation detection, and in particular to a PCB micro-defect detection method and system. BACKGROUND
[0002] With the development of electronic manufacturing towards high-density wiring and miniaturization, PCB surface defects (such as burrs, open circuits, copper scraps, short circuits, etc.) show characteristics of small size, edge refinement, and complex morphology, which brings severe challenges to traditional automatic optical inspection (AOI) and detection methods based on deep learning.
[0003] The existing technology mainly has the following three interrelated technical bottlenecks:
[0004] (1) Edge details are weakened: In the convolution and downsampling process, the high-frequency edges and geometric details of micro-defects are easily degraded or lost, resulting in inaccurate positioning and missed detection;
[0005] (2) Long-range dependency modeling is insufficient: The local receptive field characteristics of convolutional neural networks make it difficult to capture the context association across regions within the dense wiring area of the PCB, such as distinguishing real defects from texture interference in complex wiring backgrounds;
[0006] (3) Low-resolution input leads to feature loss: In order to pursue detection speed, low-resolution (such as 640x640) input is generally used, which causes information loss due to insufficient sampling at the input stage, becoming a bottleneck for detection performance improvement.
[0007] Although existing improvement schemes (such as introducing complex attention mechanisms or improving feature fusion structures) have improved local indicators, they often come at the cost of significantly increasing model complexity and computational overhead, and have not been able to systematically and efficiently solve the above three core problems. In particular, within the lightweight model framework required by industrial quality inspection, simultaneously achieving high-precision edge detail preservation, efficient long-range dependency modeling, and low computational overhead is considered to be a mutually restrictive and mutually exclusive technical contradiction, and existing methods are difficult to make breakthroughs.
[0008] Therefore, improvements are needed. SUMMARY
[0009] In order to solve the problems of edge degradation, long-range dependency deficiency, and detail loss, the present application provides a PCB micro-defect detection method and system.
[0010] The invention purpose of the present application is achieved by the following technical solutions:
[0011] A PCB micro-defect detection method, comprising the following steps:
[0012] Acquire the PCB image to be inspected, and preprocess the PCB image into a high-resolution image;
[0013] The high-resolution image is input into the defect detection model;
[0014] Output the defect detection results of the PCB image.
[0015] In a preferred embodiment, inputting the high-resolution image into the defect detection model includes the following steps:
[0016] The defect detection model includes a feature extraction network, an attention enhancement module, a state space modeling module, and a detection head;
[0017] Based on the feature extraction network, multi-scale feature maps are extracted from the input high-resolution image;
[0018] Based on the attention enhancement module integrated in the feature extraction network, the expression of minute defect features in the multi-scale feature map is enhanced, and enhanced features are generated;
[0019] Based on the state space modeling module set after the feature extraction network, long-range dependency modeling is performed on the enhanced features to generate a spatial feature map;
[0020] Based on the detection head, the type and location of defects in the spatial feature map are predicted.
[0021] In a preferred embodiment, the step of enhancing the expression of minute defect features in the multi-scale feature map and generating enhanced features based on the attention enhancement module integrated in the feature extraction network includes the following steps:
[0022] The attention enhancement module includes a priori fusion feature enhancement module;
[0023] The prior fusion feature enhancement module is configured to fuse edge priors, small target priors, and multi-scale location priors.
[0024] Based on the fusion edge prior, the input multi-scale feature map is processed by a Laplacian convolution kernel to obtain the edge enhancement prior E;
[0025] Based on the prior knowledge of the small target, the channel-level spatial variance of the input multi-scale feature map is calculated, and the micro-target adaptive weight M is generated through an exponential decay function.
[0026] Based on the multi-scale location prior, the input multi-scale feature map is processed using a multi-scale depth-separable convolution kernel to obtain the multi-scale location prior P.
[0027] The edge enhancement prior E is multiplied element-wise by the micro-target adaptive weight M and then 1 is added to obtain the enhancement factor G;
[0028] The standard attention output of the multi-scale feature map is multiplied element-wise by the enhancement factor G, then fused with the multi-scale location prior P, and projected through a convolutional layer to output the enhanced features.
[0029] In a preferred embodiment, the step of calculating the channel-level spatial variance of the input multi-scale feature map based on the small target prior, and generating micro-target adaptive weights M through an exponential decay function, includes:
[0030] based on The adaptive weights M for the micro-targets are generated, where λ is a hyperparameter with a value ranging from 0.5 to 6.0. Let be the spatial variance of the multi-scale feature map of the c-th channel.
[0031] In a preferred embodiment, the step of performing long-range dependency modeling on the enhanced features and generating a spatial feature map based on the state space modeling module disposed after the feature extraction network includes:
[0032] The state space modeling module includes two sequentially connected first state space model layers and second state space model layers.
[0033] The state dimension d_state of the first state space model layer and the second state space model layer can be configured independently.
[0034] In a preferred embodiment, the step of performing long-range dependency modeling on the enhanced features and generating a spatial feature map based on the state space modeling module disposed after the feature extraction network further includes the following steps:
[0035] Flatten the enhanced features into a feature sequence;
[0036] The feature sequence is input into the first state space model layer to perform global context association and preliminary noise screening, generating the first-level output sequence.
[0037] The first-level output sequence is input into the second state space model layer to perform deep dependency modeling and semantic consistency enhancement, thereby generating the second-level output sequence.
[0038] The second-level output sequence is reconstructed into a spatial feature map and input into the detection head.
[0039] The second objective of this invention is achieved through the following technical solution:
[0040] First module: Acquire the PCB image to be inspected and preprocess the PCB image into a high-resolution image;
[0041] Second module: Input the high-resolution image into the defect detection model;
[0042] The third module outputs the defect detection results of the PCB image.
[0043] The third objective of this invention is achieved through the following technical solution:
[0044] A computer device includes a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the computer program to implement the steps of the aforementioned PCB micro-defect detection method.
[0045] The fourth objective of this invention is achieved through the following technical solution:
[0046] A computer-readable storage medium storing a computer program that, when executed by a processor, implements the steps of the aforementioned PCB micro-defect detection method.
[0047] In summary, this application has at least one of the following beneficial effects:
[0048] This application significantly improves the detection and localization capabilities of minute defects and enhances the discrimination performance under complex textures through the synergistic combination of a priori fusion feature enhancement module (PCBPSA), two sequentially connected first state space model layers and a second state space model layer (dual Mamba), and high-resolution image (HRI). It also achieves an excellent balance between accuracy and efficiency while maintaining the model's lightweight design. Attached Figure Description
[0049] Figure 1 A step diagram of an embodiment of this application;
[0050] Figure 2 An embodiment of step S203 of this application is illustrated in the following step diagram;
[0051] Figure 3 An embodiment of step S204 of this application is illustrated in the following step diagram;
[0052] Figure 4 A computer principle block diagram of this application. Detailed Implementation
[0053] The following is in conjunction with the appendix Figures 1-4 The present invention will be described in detail with reference to the embodiments.
[0054] In one embodiment, such as Figure 1As shown, a method for detecting micro-defects in a PCB includes the following steps:
[0055] S10: Acquire the PCB image to be detected, and preprocess the PCB image into a high-resolution image;
[0056] S20: Input the high-resolution image into the defect detection model;
[0057] S30: Output the defect detection results of the PCB image.
[0058] In this embodiment, the PCB image—a digital image of a printed circuit board—is the raw input for defect detection. Preprocessing—a series of operations performed on the raw image (such as denoising, contrast enhancement, super-resolution reconstruction, etc.)—aims to improve image quality, making it more suitable for subsequent model analysis. High-resolution image—an image obtained after preprocessing, with higher pixel density and clearer details, helps the model identify minute defects.
[0059] This embodiment outlines a general automated process for PCB defect detection. First (S10), the original image of the PCB is acquired through an image acquisition system, and image processing technology is used to transform it into high-quality, high-resolution input, which is fundamental to ensuring detection accuracy. Next (S20), the processed image is fed into an advanced defect detection model for deep analysis. Finally (S30), the model outputs the specific defect type (e.g., short circuit, open circuit, missing part) and its precise location in the image. This process combines computer vision with deep learning to achieve efficient and automated visual inspection of PCB defects.
[0060] S20 includes the following steps:
[0061] S201: The defect detection model includes a feature extraction network, an attention enhancement module, a state space modeling module, and a detection head;
[0062] S202: Based on the feature extraction network, extract multi-scale feature maps from the input high-resolution image;
[0063] S203: Based on the attention enhancement module integrated in the feature extraction network, enhance the expression of minute defect features in the multi-scale feature map and generate enhanced features;
[0064] S204: Based on the state space modeling module set after the feature extraction network, perform long-range dependency modeling on the enhanced features to generate a spatial feature map;
[0065] S205: Based on the detection head, predict the type and location of defects in the spatial feature map.
[0066] In this embodiment, S203 includes the following steps:
[0067] SA1: The attention enhancement module includes a priori fusion feature enhancement module;
[0068] SA2: The prior fusion feature enhancement module is configured to fuse edge priors, small target priors, and multi-scale location priors;
[0069] SA3: Based on the fusion edge prior, the input multi-scale feature map is processed by a Laplacian convolution kernel to obtain the edge enhancement prior E;
[0070] SA5: Based on the prior of the small target, calculate the channel-level spatial variance of the input multi-scale feature map, and generate the micro-target adaptive weight M through the exponential decay function;
[0071] SA6: Based on the multi-scale location prior, the input multi-scale feature map is processed using a multi-scale depth-separable convolution kernel to obtain the multi-scale location prior P;
[0072] SA7: Multiply the edge enhancement prior E element-wise with the micro-target adaptive weight M and add 1 to obtain the enhancement factor G;
[0073] SA8: Multiply the standard attention output of the multi-scale feature map element-wise with the enhancement factor G, then fuse it with the multi-scale location prior P, and project it through a convolutional layer to output the enhanced features.
[0074] S204 includes:
[0075] SE1: The state space modeling module includes two sequentially connected first state space model layers and second state space model layers;
[0076] SE2: The state dimension d_state of the first state space model layer and the second state space model layer can be configured independently.
[0077] S204 also includes the following steps:
[0078] SE3: Flatten the enhanced features into a feature sequence;
[0079] SE4: Input the feature sequence into the first state space model layer, perform global context association and preliminary noise screening, and generate the first-level output sequence;
[0080] SE5: Input the first-level output sequence into the second state space model layer to perform deep dependency modeling and semantic consistency enhancement, and generate the second-level output sequence;
[0081] SE6: Reconstruct the second-level output sequence into a spatial feature map and input it into the detection head.
[0082] like Figure 2 S203 includes the following steps:
[0083] SA1: The attention enhancement module includes a priori fusion feature enhancement module;
[0084] SA2: The prior fusion feature enhancement module is configured to fuse edge priors, small target priors, and multi-scale location priors;
[0085] SA3: Based on the fusion edge prior, the input multi-scale feature map is processed by a Laplacian convolution kernel to obtain the edge enhancement prior E;
[0086] SA5: Based on the prior of the small target, calculate the channel-level spatial variance of the input multi-scale feature map, and generate the micro-target adaptive weight M through the exponential decay function;
[0087] SA6: Based on the multi-scale location prior, the input multi-scale feature map is processed using a multi-scale depth-separable convolution kernel to obtain the multi-scale location prior P;
[0088] SA7: Multiply the edge enhancement prior E element-wise with the micro-target adaptive weight M and add 1 to obtain the enhancement factor G;
[0089] SA8: Multiply the standard attention output of the multi-scale feature map element-wise with the enhancement factor G, then fuse it with the multi-scale location prior P, and project it through a convolutional layer to output the enhanced features.
[0090] In this embodiment, the principle of the attention enhancement module is as follows: This module aims to solve the core problem of standard attention mechanisms in PCB defect detection, which are weak in response to small, low-contrast defect features and are easily affected by background interference. Its core design lies in the collaborative injection of three key prior knowledge elements—edge information, small target saliency, and multi-scale context—into the feature enhancement process in a learnable manner.
[0091] The module operates through a two-branch parallel structure:
[0092] Prior generation branch: This branch is dedicated to extracting multi-scale location priors (P). It uses a set of parallel (e.g., 1×1, 3×3, 5×5) depthwise separable convolutions to capture contextual information around defects from different receptive fields, providing multi-scale spatial guidance for accurate localization.
[0093] Feature modulation branch: This is the main pathway for attention enhancement. First, it computes two key factors in parallel:
[0094] Edge enhancement prior (E): Enhances edge and gradient features in the feature map by using Laplacian convolution kernels to highlight defect boundaries.
[0095] Micro-target adaptive weights (M): A weight map is dynamically generated by analyzing the spatial variance of each channel in the feature map. Channels with low variance (background or weak response) are suppressed, while channels with high variance (potentially containing small targets) are enhanced, thereby amplifying the feature signals of small targets. Next, E and M are combined to generate a dynamic enhancement factor (G). This factor modulates the output of the standard attention mechanism, targeting areas with clear edges and potential regions for small targets. Finally, the modulated result is fused with a multi-scale location prior (P) from another branch, and the final enhanced feature is output through convolutional projection.
[0096] Summary of principles: This module significantly improves the discriminative power and robustness of feature representations for minor defects by structurally fusing edge, scale, and saliency priors, enabling subsequent networks to more effectively identify key defect features from complex backgrounds.
[0097] SA5 includes:
[0098] SB: Based on The adaptive weights M for the micro-targets are generated, where λ is a hyperparameter with a value ranging from 0.5 to 6.0. Let be the spatial variance of the feature map of the c-th channel.
[0099] In this embodiment,
[0100] Channel-level spatial variance: For each channel in the feature map (which can be viewed as a feature response map), the variance of all pixel values is calculated. It measures the activity or dispersion of the channel's features in the spatial dimension. A large variance indicates drastic changes in the feature response (possibly indicating the presence of edges or small objects), while a small variance indicates a flat feature response (possibly a uniform background).
[0101] Exponential decay function: Here, it refers to the functional form in the formula. It is a function with the natural constant e as the base and the negative variance as the exponent of the hyperparameter λ.
[0102] Hyperparameter λ: A pre-defined constant used to control the decay rate. The larger the value of λ, the slower the weights decrease with variance, and the more gentle the suppression of low-variance features; conversely, the smaller the value, the stronger the suppression.
[0103] principle:
[0104] This step is used to generate adaptive weights M for micro-targets. The principle is based on an observation: in feature maps, channels with flat responses and weak changes (low spatial variance) often correspond to background or uninformative regions, while channels with drastic changes in response (high spatial variance) are more likely to contain key details such as small targets or edges.
[0105] The formula quantifies this observation using an exponential decay function. When the variance of the feature map space in a certain channel is large, the absolute value of the exponential term is small, and the function output value is close to 1 (or even greater than 1, resulting in an enhancement effect); when the variance is small, the absolute value of the exponential term is large, and the function output value approaches 0 (resulting in a suppression effect). Therefore, the weights M adaptively enhance feature channels that may contain small targets while suppressing background or noise channels, thereby improving the sensitivity of the feature map to small defects in the channel dimension. The hyperparameter λ is used to finely adjust this balance between enhancement and suppression.
[0106] S204 includes:
[0107] SE1: The state space modeling module includes two sequentially connected first state space model layers and second state space model layers;
[0108] SE2: The state dimension d_state of the first state space model layer and the second state space model layer can be configured independently.
[0109] In this embodiment, the state-space modeling module is a neural network module based on a structured state-space sequence model (such as Mamba), which is good at efficiently modeling long sequence data and capturing long-range dependencies.
[0110] First State Space Model Layer and Second State Space Model Layer: Two serial, parameter-independent state space model instances within the module.
[0111] State dimension (d_state): The dimension of the state vectors inside the state-space model, which is a key hyperparameter of the model.
[0112] principle:
[0113] This embodiment employs a hierarchical configuration and an incremental state dimension design. The first state space model layer's task is to perform preliminary, broad global context association and noise filtering. It acts like a "coarse sieve," efficiently scanning the entire feature sequence, establishing preliminary connections between distant feature points, and filtering out the most obvious irrelevant noise. Subsequently, the processed sequence is fed into the second state space model layer. Building upon the global context constructed in the previous layer, it performs more refined and in-depth dependency modeling and semantic integration. This cascaded design, moving from coarse to fine, enables a progressive understanding and enhancement of the feature sequence from global to local, and from shallow to deep layers, while controlling overall computational complexity, thus more effectively extracting highly discriminative feature representations for defect detection tasks.
[0114] like Figure 3 S204 also includes the following steps:
[0115] SE3: Flatten the enhanced features into a feature sequence;
[0116] SE4: Input the feature sequence into the first state space model layer, perform global context association and preliminary noise screening, and generate the first-level output sequence;
[0117] SE5: Input the first-level output sequence into the second state space model layer to perform deep dependency modeling and semantic consistency enhancement, and generate the second-level output sequence;
[0118] SE6: Reconstruct the second-level output sequence into a spatial feature map and input it into the detection head.
[0119] In this embodiment, the integration process and principle of the state-space modeling module are as follows:
[0120] This module does not operate in isolation, but rather serves as the core driving engine for the information refinement and fusion process of the Feature Pyramid Network (FPN), enabling the progressive enhancement of semantic information from top to bottom.
[0121] Process and Collaboration Principles:
[0122] Input and initialization: The feature extraction network outputs multi-scale features (shallow high-resolution details, mid-level balanced features, and deep strong semantic features). FPN constructs preliminary hierarchical connections for it.
[0123] Deep semantic refinement (first-level modeling): Deep within the FPN, the most semantically abstract enhanced features are flattened into sequences and input into the first state space model layer. This layer, with its selective state mechanism, performs efficient global scanning at a low-resolution, high-semantic level. Its core function is to perform contextual association and initial noise screening, identifying global patterns related to potential defects and outputting a semantically pure and highly consistent "refined blueprint."
[0124] Mid-level semantic injection and fusion (second-level modeling): The refined deep sequence described above is upsampled and fused with mid-level features in the mid-level of the FPN. This "injects" global semantics into mid-level features with richer spatial information. The fused sequence is then input into the second state space model layer. This layer performs deeper dependency modeling at a level that combines semantics and resolution, strengthens the association between local features and the global blueprint, ensures the contextual coherence of defective features, and outputs mid-level features with stronger semantic consistency.
[0125] Shallow detail enhancement and final fusion: The output of the second stage is reconstructed and upsampled, and finally fused with the shallowest, most detail-rich, high-resolution features from the FPN. This fusion achieves the ultimate unification of deeply refined global semantics and high-resolution spatial details, generating an enhanced feature map with extremely strong defect-aware capabilities.
[0126] Output Inspection: The final feature map is sent to a multi-scale inspection head, whose parallel branches can accurately locate and classify PCB defects across the entire size range, from micro solder joints and circuit breaks to large-area defects.
[0127] Principle Summary: This design leverages the powerful long-range modeling capabilities of the state-space model as an "engine for information purification and diffusion," driving high-level semantic information to flow downwards along the FPN path. At each layer, it undergoes deep fusion and refinement with features of the corresponding scale. This process gradually injects global, semantic "understanding" into local, detailed "observation," thereby generating a "smart feature map" that can grasp both the overall context and minute details, significantly improving the detection performance of multi-scale defects in complex backgrounds.
[0128] In another embodiment, an example of using the YOLOv11n network as a basic framework is used to construct a detection model called PMH-YOLOv11n.
[0129] 1. Data preparation and preprocessing:
[0130] We used the publicly available PCB defect dataset from the Peking University Intelligent Robotics Open Laboratory. Data augmentation was performed on the original images, including rotation, translation, brightness jitter, and horizontal flipping, expanding the dataset to 2772 images. These images were then divided into training, validation, and test sets in an 8:1:1 ratio. The input image resolution was preferably set to 1024×1024 pixels; this is a specific implementation of the high-resolution input strategy.
[0131] 2. Model Building:
[0132] Feature extraction network: The YOLOv11n feature extraction network is adopted. The C2PSA module in the original network is replaced with the PCBPSA module designed in this invention. The specific calculation process of this module is as described in the "Technical Solution" section above, where the hyperparameter λ is set to 2.0 in this embodiment.
[0133] State-space modeling module: In layer P4 of the Feature Pyramid Network (FPN), obtain the size of... (In this embodiment, the feature map F is 128×128×256).
[0134] (1) Serialization: Flatten the spatial dimensions of the feature map F and convert it into a sequence of length . Feature sequences To adapt to the input requirements of sequence models.
[0135] (2) First-level selective state-space modeling: The sequence X is input into the first Mamba layer. This layer dynamically scans and fuses global context information through a selective state-space mechanism. Its core function is to perform preliminary cross-regional association and suppress background texture noise caused by large-area continuous copper foil or regular wiring. In this embodiment, the state dimension d_state of this layer is set to 8, the expansion factor d_conv is set to 3, and the activation function is SiLU.
[0136] (3) Second-level selective state-space modeling: The intermediate sequence output from the first level is input into the second Mamba layer. Based on the preliminarily cleaned and associated context, this layer focuses on establishing a precise cognitive relationship between minor defects (such as spur tips and open breakpoints) and the surrounding normal circuit structure, further strengthening semantic consistency and filtering residual interference. In this embodiment, the state dimension d_state of this layer is also set to 8 to have stronger feature representation capabilities.
[0137] (4) Deserialization: The enhanced sequence output by the second stage is reconstructed into an enhanced feature map F' of size H×W×C according to its original spatial order, which is used for prediction by the subsequent detection head.
[0138] Detection head: The detection head of YOLOv11n is used for final object classification and bounding box regression.
[0139] 3. Model Training and Evaluation:
[0140] Hardware configuration: High-performance GPU (such as NVIDIA GeForce RTX 5090)
[0141] Training parameters: SGD optimizer was used, initial learning rate was 0.01, training was conducted for 150 epochs, and batch size was 16.
[0142] Evaluation metrics: mAP@0.5, recall, and number of parameters.
[0143] 4. Experimental Results:
[0144] To fully verify the effectiveness, advancement, and contribution of the technical solution of this invention and its internal components, this section reports from two levels: first, the necessity of the core module is verified through ablation experiments, and then the comprehensive performance of the complete model is demonstrated through comparative experiments.
[0145] 4.1 Ablation Experiment
[0146] The ablation experiments aimed to rigorously and systematically verify the independent contributions of the three core improvement modules in this invention and the necessity of their collaborative work. All experiments were conducted on the same dataset, with the same training parameters and hardware environment to ensure the fairness and comparability of the results.
[0147] Experimental Design: Using YOLOv11n as the baseline model, we sequentially added or replaced the three core modules described in this invention to construct a complete ablation experimental system. Key results are compared in Table 1 below:
[0148] Experimental model mAP@0.5 (%) Recall (%) Parameter quantity (M) Purpose of experimental setup ① Baseline model (YOLOv11n) 95.3 93.5 2.59 Performance benchmark ② + PCBPSA 95.8 94.2 2.59 Verify the independent contribution of the prior attention module ③ + Double Mamba module 95.9 94 2.7 Verify the independent contribution of the long-range modeling module ④ + HRI (1024x1024) 97.5 95.4 2.59 Verify the independent contribution of the high-resolution input module ⑤ The whole model of the present application 98 97.4 2.7 Verify the synergistic effect of the overall scheme
[0149] Note: The HRI strategy only increases the resolution of the input image and does not increase the number of model parameters; the PCBPSA module is a replacement for the original module in the baseline model, and the parameter increment is negligible.
[0150] Experimental Analysis:
[0151] The independent effectiveness of the modules was verified: The data from experiments A, B, and C show that each of the three modules, PCBPSA, dual Mamba, and HRI, can independently and significantly improve model performance, respectively enhancing detailed features, long-range context, and input information quality, effectively addressing the three major bottlenecks mentioned in the background technology.
[0152] The core of this invention lies in the synergy between the systems: A key finding of this invention is that when the three modules are implemented as a unified system (i.e., the "invention group"), they achieve performance superior to any single module. Crucially, the performance of the "invention group" is not a simple linear summation of the data from sets A, B, and C. This reveals a profound complementary and synergistic relationship between the three modules: HRI provides high-resolution information at the source, laying the foundation for subsequent processing; PCBPSA performs local refinement on this high-quality information, enhancing defect features and suppressing background noise; and dual Mamba performs efficient global sequence modeling of the refined features, completing the final discrimination.
[0153] This progressive and systematic design, encompassing "Source Protection (HRI) → Local Refinement (PCBPSA) → Global Discrimination (Dual Mamba)," allows each module to complement the others, ultimately resulting in an unexpected technical effect of "1+1+1 > 3." Experimental results show that the performance improvement achieved by the "full model of this invention" (mAP improvement of 2.7% and Recall improvement of 3.9%) is significantly higher than the arithmetic sum of the performance improvements of each individual module. This indicates that a synergistic effect exists among the three modules, jointly contributing to the unexpected technical effect.
[0154] 4.2 Comprehensive Performance Comparison Experiment
[0155] To further evaluate the advancement of the complete technical solution of this invention, it was compared with current mainstream detection models on the same test set. The results are shown in Table 2 below:
[0156] Model mAP@0.5 (%) Recall (%) Parameter quantity (M) Purpose of experimental setup YOLOv11n (baseline) 95.3 93.5 2.59 Original baseline to be improved YOLOv5n 95.2 91.8 2.5 Mainstream industrial lightweight model YOLOv8n 95.5 91.8 3 Mainstream industrial lightweight model YOLOv9t 94.9 91.9 2 Advanced lightweight model released at the same time YOLOv10n 95 89.8 2.7 Advanced lightweight model released at the same time The whole model of the present application 98 97.4 2.7 Show the overall advantage under the same complexity
[0157] Comprehensive comparative results show that, while maintaining similar model complexity (approximately 2.7M parameters) and inference efficiency to cutting-edge lightweight models (YOLOv5n, YOLOv8n, YOLOv9t, YOLOv10n), this invention achieves significant superiority in core metrics such as mAP, recall, and parameter count. In particular, it improves recall by 3.9 percentage points, fully demonstrating the comprehensive advancement of this invention in balancing accuracy and efficiency, and meeting the needs of industrial scenarios for high-precision, real-time detection.
[0158] It should be understood that the sequence number of each step in the above embodiments does not imply the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of this application.
[0159] In one embodiment, a PCB micro-defect detection system is provided, which corresponds one-to-one with the PCB micro-defect detection method described in the above embodiment. The PCB micro-defect detection system includes:
[0160] First module: Acquire the PCB image to be inspected and preprocess the PCB image into a high-resolution image;
[0161] Second module: Input the high-resolution image into the defect detection model;
[0162] The third module outputs the defect detection results of the PCB image.
[0163] For specific limitations regarding a PCB micro-defect detection system, please refer to the limitations of a PCB micro-defect detection method described above, which will not be repeated here. Each module in the aforementioned PCB micro-defect detection system can be implemented entirely or partially through software, hardware, or a combination thereof. These modules can be embedded in or independent of the processor in a computer device, or stored in the memory of a computer device as software, so that the processor can call and execute the corresponding operations of each module.
[0164] In one embodiment, a computer device is provided, which may be a server, and its internal structure diagram may be as follows: Figure 4 As shown, the computer device includes a processor, memory, network interface, and database connected via a system bus. The processor provides computing and control capabilities. The memory includes non-volatile storage media and internal memory. The non-volatile storage media stores the operating system, computer programs, and database. The internal memory provides an environment for the operation of the operating system and computer programs stored in the non-volatile storage media. The network interface is used for communication with external terminals via a network connection. When the computer program is executed by the processor, it implements a PCB micro-defect detection method.
[0165] In one embodiment, a computer device is provided, including a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the computer program to perform the following steps:
[0166] In one embodiment, a computer-readable storage medium is provided having a computer program stored thereon, the computer program performing the following steps when executed by a processor:
[0167] Those skilled in the art will understand that all or part of the processes in the methods of the above embodiments can be implemented by a computer program instructing related hardware. The computer program can be stored in a non-volatile computer-readable storage medium. When executed, the computer program can include the processes of the embodiments of the above methods. Any references to memory, storage, databases, or other media used in the embodiments provided in this application can include non-volatile and / or volatile memory. Non-volatile memory may include read-only memory (ROM), programmable ROM (PROM), electrically programmable ROM (EPROM), electrically erasable programmable ROM (EEPROM), or flash memory. Volatile memory may include random access memory (RAM) or external cache memory. By way of illustration and not limitation, RAM is available in a variety of forms, such as static RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), dual data rate SDRAM (DDRSDRAM), enhanced SDRAM (ESDRAM), synchronous link DRAM (SLDRAM), RAMbus direct RAM (RDRAM), direct memory bus dynamic RAM (DRDRAM), and memory bus dynamic RAM (RDRAM), etc.
[0168] Those skilled in the art will clearly understand that, for the sake of convenience and brevity, the above-described division of functional units and modules is used as an example. In practical applications, the above functions can be assigned to different functional units and modules as needed, that is, the internal structure of the device can be divided into different functional units or modules to complete all or part of the functions described above.
[0169] The above-described embodiments are only used to illustrate the technical solutions of this application, and are not intended to limit them. Although this application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of this application, and should all be included within the protection scope of this application.
Claims
1. A method for detecting micro-defects in a PCB, characterized in that, Includes the following steps: Acquire the PCB image to be inspected, and preprocess the PCB image into a high-resolution image; The high-resolution image is input into the defect detection model; Output the defect detection results of the PCB image.
2. The PCB micro-defect detection method according to claim 1, characterized in that, The process of inputting the high-resolution image into the defect detection model includes the following steps: The defect detection model includes a feature extraction network, an attention enhancement module, a state space modeling module, and a detection head; Based on the feature extraction network, multi-scale feature maps are extracted from the input high-resolution image; Based on the attention enhancement module integrated in the feature extraction network, the expression of minute defect features in the multi-scale feature map is enhanced, and enhanced features are generated; Based on the state space modeling module set after the feature extraction network, long-range dependency modeling is performed on the enhanced features to generate a spatial feature map; Based on the detection head, the type and location of defects in the spatial feature map are predicted.
3. The PCB micro-defect detection method according to claim 2, characterized in that, The step of enhancing the expression of minute defect features in the multi-scale feature map by using the attention enhancement module integrated in the feature extraction network to generate enhanced features includes the following steps: The attention enhancement module includes a priori fusion feature enhancement module; The prior fusion feature enhancement module is configured to fuse edge priors, small target priors, and multi-scale location priors. Based on the fusion edge prior, the input multi-scale feature map is processed by a Laplacian convolution kernel to obtain the edge enhancement prior E; Based on the prior knowledge of the small target, the channel-level spatial variance of the input multi-scale feature map is calculated, and the micro-target adaptive weight M is generated through an exponential decay function. Based on the multi-scale location prior, the input multi-scale feature map is processed using a multi-scale depth-separable convolution kernel to obtain the multi-scale location prior P. The edge enhancement prior E is multiplied element-wise by the micro-target adaptive weight M and then 1 is added to obtain the enhancement factor G; The standard attention output of the multi-scale feature map is multiplied element-wise by the enhancement factor G, then fused with the multi-scale location prior P, and projected through a convolutional layer to output the enhanced features.
4. The PCB micro-defect detection method according to claim 3, characterized in that, The step of calculating the channel-level spatial variance of the input multi-scale feature map based on the small target prior, and generating micro-target adaptive weights M through an exponential decay function, includes: based on The adaptive weights M for the micro-targets are generated, where λ is a hyperparameter with a value ranging from 0.5 to 6.
0. Let be the spatial variance of the multi-scale feature map of the c-th channel.
5. A PCB micro-defect detection method according to claim 2, characterized in that, The state-space modeling module, positioned after the feature extraction network, performs long-range dependency modeling on the enhanced features to generate a spatial feature map, including: The state space modeling module includes two sequentially connected first state space model layers and second state space model layers. The state dimension d_state of the first state space model layer and the second state space model layer can be configured independently.
6. The PCB micro-defect detection method according to claim 5, characterized in that, The step of modeling long-range dependencies of the enhanced features and generating a spatial feature map based on the state space modeling module set after the feature extraction network further includes the following steps: Flatten the enhanced features into a feature sequence; The feature sequence is input into the first state space model layer to perform global context association and preliminary noise screening, generating the first-level output sequence. The first-level output sequence is input into the second state space model layer to perform deep dependency modeling and semantic consistency enhancement, thereby generating the second-level output sequence. The second-level output sequence is reconstructed into a spatial feature map and input into the detection head.
7. A PCB micro-defect detection system, characterized in that, include: First module: Acquire the PCB image to be inspected and preprocess the PCB image into a high-resolution image; Second module: Input the high-resolution image into the defect detection model; The third module outputs the defect detection results of the PCB image.
8. A computer device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, characterized in that, When the processor executes the computer program, it implements the steps of the PCB micro-defect detection method as described in any one of claims 1 to 6.
9. A computer-readable storage medium storing a computer program, characterized in that, When the computer program is executed by the processor, it implements the steps of the PCB micro-defect detection method as described in any one of claims 1 to 6.