Can bus optical fiber transmission method, circuit, device and medium

Abstract

The application provides a CAN bus optical fiber transmission method, circuit, device and medium, relates to the technical field of communication, solves the problem that related technical solutions are difficult to stably realize long-distance communication, the scheme realizes hardware-level decoupling compensation to eliminate real-time dependence on a remote level, and provides a non-blocking forwarding architecture, logically isolates real-time reception of physical layer data from task transmission on the optical fiber side, and ensures that the system can efficiently and stably operate.

Description

CAN bus fiber optic transmission methods, circuits, equipment and media Technical Field

[0001] This application relates to the field of communication technology, and in particular to a CAN bus optical fiber transmission method, circuit, device and medium. Background Technology

[0002] Controller Area Network (CAN) buses are widely used in industrial automation, vehicle networks, and power systems. Their core communication mechanism relies on a "non-destructive bit-by-bit arbitration" mechanism. This mechanism requires all nodes on the bus to sense the network-wide level feedback before a specific "sampling point," creating a strong coupling constraint between the physical distribution distance of the bus and the communication baud rate. To achieve long-distance communication, the baud rate must be significantly reduced (e.g., only below 50kbps can be supported over a 10km distance), limiting the real-time data exchange capabilities of large distributed systems.

[0003] Related technologies employ optical transceivers or bus repeaters to convert the differential levels of the local bus into optical pulse signals for long-distance transmission. These signals are then restored in real-time at the receiving end, and the feedback signal from the remote node is transmitted back to the local transceiver's receiver via the physical path of the fiber optic link. The local controller then compares these signals to complete the arbitration process. However, this approach suffers from drawbacks such as real-time failure of physical layer arbitration feedback (i.e., the controller cannot detect the remote return signal level during the arbitration period), inter-channel concurrent interference, and insufficient robustness (i.e., invalid retransmissions are broadcast to all nodes in the network), making it difficult to stably achieve long-distance communication. Summary of the Invention

[0004] This application provides a CAN bus fiber optic transmission method, circuit, device, and medium, which solves the problem that related technical solutions are difficult to stably achieve long-distance communication. This solution implements hardware-level decoupling compensation to eliminate the real-time dependence on the remote end level and provides a non-blocking forwarding architecture to logically isolate the real-time reception of physical layer data from the task transmission on the fiber optic side, ensuring that the system can operate efficiently and stably.

[0005] In a first aspect, this application provides a CAN bus fiber optic transmission method applied to an electronic device. The electronic device is used to transmit data with another electronic device, and the electronic device is equipped with a logic gate chip. The logic gate chip is used to perform an AND operation between the TXD signal and the output signal of the fiber optic receiver to maintain the RXD signal at a dominant level when the TXD signal is at a dominant level. The method includes:

[0006] An interrupt response is triggered in response to receiving data from another electronic device;

[0007] During the interruption response process, destination filtering is performed based on a preset routing table to determine the corresponding target channel, and the received data is stored through an asynchronous message queue associated with the target channel;

[0008] When entering an asynchronous sending cycle, poll the asynchronous message queue to determine if there is still data to be processed stored in the asynchronous message queue;

[0009] If it is determined that there is data to be processed in the asynchronous message queue, the TXD signal is set to a dominant level to indicate that the electronic device is in the sending state and sends the data to be processed.

[0010] Secondly, this application also provides an optical fiber transmission control circuit, applied to the electronic equipment provided in the above aspects. The optical fiber transmission control circuit is used to connect the MCU and the optical fiber transmitter and to connect the MCU and the optical fiber receiver. The circuit includes a logic gate chip and an output control module.

[0011] The logic gate chip includes a first AND gate unit and a second AND gate unit. One input terminal of the first AND gate unit is connected to the first terminal of the first resistor. The second terminal of the first resistor is used to connect to the pin on the MCU that transmits the TXD signal. The other input terminal of the first AND gate unit is connected to the output terminal of the fiber optic receiver. The output terminal of the first AND gate unit is connected to the first terminal of the second resistor. The second terminal of the second resistor is used to connect to the pin on the MCU that receives the RXD signal.

[0012] One input terminal of the second AND gate unit is connected to the first terminal of the first resistor, and the other input terminal of the second AND gate unit is connected to the first terminal of the third resistor. The second terminal of the third resistor is connected to the working voltage, and the second terminal of the third resistor is also connected to the first terminal of the first capacitor. The second terminal of the first capacitor is grounded. The output terminal of the second AND gate unit is connected to the input terminal of the output control module. The output terminal of the output control module is connected to the fiber optic transmitter. The output control module is used to control the transmission signal of the fiber optic transmitter.

[0013] Thirdly, this application also provides an electronic device comprising:

[0014] One or more processors;

[0015] A storage device for storing one or more programs, which, when executed by one or more processors, enable the one or more processors to implement the CAN bus fiber optic transmission method of this application.

[0016] Fourthly, this application also provides a storage medium for storing computer-executable instructions, which, when executed by a processor, are used to execute the CAN bus fiber optic transmission method of this application.

[0017] This application's solution can decouple the baud rate and transmission distance through logical design, eliminating the controller's real-time timing dependence on remote physical feedback, and achieving error-free transparent transmission at the highest baud rate (1Mbps) even within the physical limits of optical fiber (e.g., over 20km). Furthermore, the introduction of a software asynchronous distribution architecture enables non-blocking and strong isolation in forwarding scheduling, helping to ensure microsecond-level real-time performance while isolating faults through asynchronous buffering mechanisms even if interference occurs in a single optical fiber branch, thus ensuring the efficient and stable operation of the entire control network. Attached Figure Description

[0018] Figure 1 is a schematic diagram of the steps of a CAN bus optical fiber transmission method provided in an embodiment of this application.

[0019] Figure 2 is a schematic diagram of the structure of an optical fiber transmission control circuit provided in an embodiment of this application.

[0020] Figure 3 is an interactive schematic diagram of CAN-to-fiber real-time forwarding provided in an embodiment of this application.

[0021] Figure 4 is a schematic diagram of the curves of baud rate versus maximum transmission distance provided in this application.

[0022] Figure 5 is a schematic diagram of the throughput curve under bus interference provided in this application.

[0023] Figure 6 is a schematic diagram of the structure of an electronic device provided in an embodiment of this application. Detailed Implementation

[0024] The embodiments of this application will be further described in detail below with reference to the accompanying drawings and examples. It should be understood that the specific embodiments described herein are merely illustrative of the embodiments of this application and are not intended to limit the scope of this application. Furthermore, it should be noted that, for ease of description, the accompanying drawings only show the parts related to the embodiments of this application, not all structures. Those skilled in the art, after reading this specification, should be able to conceive that any combination of technical features can constitute an optional implementation method, provided that the technical features do not contradict each other.

[0025] The terms "first," "second," etc., used in the specification and claims of this application are used to distinguish similar objects, not to describe a specific order or sequence. It should be understood that such use of data can be interchanged where appropriate so that embodiments of this application can be implemented in orders other than those illustrated or described herein, and the objects distinguished by "first," "second," etc., are generally of the same class, not limited in number; for example, a first object can be one or more. Furthermore, in the specification and claims, "and / or" indicates at least one of the connected objects, and the character " / " generally indicates that the preceding and following objects are in an "or" relationship. In the description of this application, "multiple" means two or more, and "several" means one or more.

[0026] Controller Area Network (CAN) buses are widely used in industrial automation, vehicle networks, and power systems. Their core communication mechanism is a "non-destructive bit-by-bit arbitration" mechanism. This mechanism requires all nodes on the bus to sense the network-wide level feedback before a specific "sampling point," creating a strong coupling constraint between the physical distribution distance of the bus and the communication baud rate. Traditional CAN FD-to-fiber optic devices typically only perform "electrical-optical-electrical" conversion at the physical layer, or use simple level transceivers. Furthermore, when TXD is low, RXD must also detect a low level. If the optical module responds slowly or the remote end fails to send a feedback, the MCU (Micro Controller Unit) will consider a BitError to have occurred on the bus, thus outputting an error frame or even entering a Bus-off state (i.e., a bus disconnection state in the CAN bus).

[0027] To achieve long-distance communication, the baud rate must be significantly reduced (e.g., only below 50kbps over a 10km distance), limiting the real-time data exchange capability of large distributed systems. Consequently, related technologies employ optical transceivers or bus repeaters to convert the differential levels of the local bus into optical pulse signals for long-distance transmission. These signals are then reconstructed in real-time at the receiving end, and the feedback signal from the remote node is transmitted back to the local transceiver via the physical path of the fiber optic link for comparison by the local controller to complete the arbitration process. However, this approach suffers from drawbacks such as real-time failure of physical layer arbitration feedback, inter-channel concurrent interference, and insufficient robustness, making it difficult to stably achieve long-distance communication. Specifically, due to the inherent round-trip time (RTT) of electrical / optical signal transmission, when the link length exceeds the sampling threshold of the message bit period, the controller cannot detect the level status returned from the remote end during the arbitration period. This timing misalignment causes continuous bit-filling errors in the local controller, directly triggering bus-off, making it impossible to achieve closed-loop high-speed long-distance communication at the physical topology level. Furthermore, if a remote branch experiences a physical failure or waveform jitter, the resulting invalid retransmissions will be broadcast indiscriminately to all nodes. This "synchronous blocking" characteristic means that the performance degradation of a single link can quickly transform into a deterministic disaster for the entire network.

[0028] To address this, this application provides a CAN bus fiber optic transmission method, circuit, device, and medium, applicable to data transmission scenarios involving CAN bus to fiber optic transmission. This solution, through logic design, decouples the baud rate from the transmission distance, eliminates the controller's real-time timing dependence on remote physical feedback, and achieves error-free transparent transmission at the highest baud rate (1Mbps) even within the physical limits of fiber optic distance (e.g., over 20km). Furthermore, the introduction of a software asynchronous distribution architecture enables non-blocking and strong isolation in forwarding scheduling, helping to ensure microsecond-level real-time performance while isolating faults through asynchronous buffering mechanisms even if interference occurs in a single fiber branch, thus ensuring the efficient and stable operation of the entire control network.

[0029] As shown in Figure 1, Figure 1 is a schematic diagram of the steps of a CAN bus fiber optic transmission method provided in an embodiment of this application. In one embodiment, the CAN bus fiber optic transmission method is applied to an electronic device (as the local end) to perform data communication with another electronic device (as the remote end). It is conceivable that both the local end and the remote end performing data communication are configured with the same hardware structure and are used to execute the CAN bus fiber optic transmission method provided in this embodiment to realize data transmission. Moreover, the aforementioned local end and remote end serve as different communication roles to distinguish the two electronic devices performing data communication. Based on this, a logic gate chip is provided in the electronic device. This logic gate chip is used to perform an AND logic operation between the TXD signal and the output signal of the fiber optic receiver to maintain the RXD signal at a dominant level when the TXD signal is at a dominant level. Here, the TXD signal and the RXD signal are both signals corresponding to the pins on the control module such as the MCU or controller of the electronic device used for controlling signal transmission and reception. The aforementioned dominant level is a low level, and the high level is a recessive level. The output signal of the fiber optic receiver is the RXD signal provided by the remote end. Based on this, the solution uses software-level logic design for interruption and asynchronous transmission to logically isolate the real-time reception of physical layer data from the task transmission on the fiber optic side, thereby eliminating systemic blockage. The specific steps include steps S110-S140.

[0030] Step S110: In response to receiving data sent by another electronic device, an interrupt response is triggered.

[0031] It is conceivable that communication between the local end and the remote end (i.e., another electronic device) is transmitted via CAN bus to fiber optic cable. Since the hardware layer of the electronic device (i.e., the local end) has already completed the above-mentioned logical conversion, the local end can maintain the connection of the line and will not report errors during the arbitration period. Furthermore, an interrupt service routine can be set in the system to respond to the arrival of signals from the remote end. Understandably, the local end is configured with several transmission channels, such as CAN 0, CAN 1, CAN 2, CAN 3, etc. Upon receiving data on any channel, a corresponding interrupt response is triggered, and the device runs the interrupt service routine to receive the data.

[0032] Step S120: During the interrupt response process, destination filtering is performed based on the preset routing table to determine the corresponding target channel, and the received data is stored through an asynchronous message queue associated with the target channel.

[0033] Furthermore, the electronic equipment in this solution is equipped with an asynchronous buffering mechanism. Since the fiber optic transmission channel may experience momentary busy periods or multiple tasks vying for CPU resources, the system does not directly perform blocking transmission during interrupt responses. Instead, it utilizes an asynchronous message queue for buffering. Consequently, during interrupt response, the received data is stored using an asynchronous message queue. This means that the local end stores data through the asynchronous message queue and sends it within the corresponding transmission cycle (i.e., the asynchronous transmission cycle). Optionally, the local end can set an asynchronous transmission cycle during the non-blocking phase to send data during this phase.

[0034] Furthermore, corresponding routing tables are maintained at both the local and remote ends. These routing tables are used to record the routing and forwarding relationships between various transmission channels in the device. For example, referring to the example above, the routing table can record the routing and forwarding relationships of data received from CAN 0 channel and forwarded through CAN 1 channel. That is, data received from CAN 0 channel is forwarded through CAN 1 channel, which is the target channel, and the data is stored through the asynchronous message queue associated with the channel.

[0035] Optionally, in one embodiment, the local end performs destination filtering through a routing table to determine the corresponding target channel. Specifically, the source channel for receiving data is determined, i.e., the transmission channel through which the data is received is taken as the source channel. Then, several transmission channels with forwarding relationships with the source channel are determined in the routing table and used as target channels. It is understood that there may be multiple transmission channels with forwarding relationships with the source channel. Therefore, the target channel is selected by traversing the routing table. The asynchronous message queue corresponding to the target channel is selected, and the received data is stored in the asynchronous message queue. The device stores data in a buffer through the message queue to achieve asynchronous transmission during the asynchronous transmission cycle.

[0036] Step S130: When entering an asynchronous sending cycle, poll the asynchronous message queue to determine whether there is still data to be processed stored in the asynchronous message queue.

[0037] It is conceivable that the local end can set up a background sending task to send data during an asynchronous sending cycle. In response to entering an asynchronous sending cycle, the local end accesses the asynchronous message queue via polling to check for any pending data. Optionally, for the asynchronous message queue, the device maintains the message queue through the kernel. Each message queue has a unique identifier and is associated with the transmission channel, and the number of bytes in the queue is also recorded by a corresponding counter. Therefore, when executing the background sending task, the device continuously checks the counter value of the asynchronous message queue to determine if there is any pending data. If the counter value is not zero, it is determined that there is pending data stored in the asynchronous message queue. Subsequently, corresponding hardware configurations, such as the MCU's signal pins, CAN transceiver, fiber optic transmitter, and fiber optic receiver, are used to trigger changes in the corresponding pin signals, thereby transmitting data through the fiber optic cable.

[0038] Step S140: If it is determined that there is data to be processed in the asynchronous message queue, set the TXD signal to a dominant level to determine that the electronic device is in the sending state and send the data to be processed.

[0039] The TXD signal is initially at a dominant level (i.e., low). After logical processing by the logic gate chip, the RXD signal is also low, enabling the device to enter the transmission state. Understandably, the logic gate chip performs an AND operation between the local TXD signal and the output signal of the fiber optic receiver. Therefore, even if there is a delay in the remote optical path transmission, the MCU's RXD pin will immediately sense the dominant level due to the local TXD signal being pulled low, thus simulating the physical layer detection logic within the MCU and ensuring it does not disconnect due to lack of response. To address this, this solution uses local hardware-level logic simulation to set the TXD signal to a dominant level, eliminating the controller's real-time timing dependence on remote physical feedback. During the arbitration period, bit sampling can be completed without waiting for the fiber optic round-trip delay, enabling data transmission.

[0040] As can be seen from the above scheme, this scheme uses software-level logic design of interruption and asynchronous transmission to logically isolate the real-time reception of physical layer data from the task transmission on the optical fiber side. It introduces a software asynchronous distribution architecture to achieve non-blocking and strong isolation of forwarding scheduling, eliminate systemic blocking, and help to isolate faults through asynchronous buffering mechanism while ensuring microsecond-level real-time performance, thus ensuring the efficient and stable operation of the entire network.

[0041] In one embodiment, an anomaly detection mechanism is also configured within the electronic device to monitor fiber optic communication, effectively providing real-time link fault diagnosis for the system and helping to maintain stable system communication. To this end, the device can embed and run low-priority maintenance tasks within the system. Furthermore, the device periodically polls the level state of the hardware probe pin, which is used to detect the presence of a carrier in the physical optical path. The signal from this pin is demodulated by the fiber optic receiver to directly reflect the carrier presence in the physical optical path. Specifically, in each detection cycle, the level signal of this pin can be read through a GPIO of the MCU. When the level is low, it is determined that the fiber optic link is in a signal interruption state or the light intensity attenuation exceeds a preset threshold, and an alarm indication signal is output. For example, the alarm indication signal can be output to trigger a corresponding indicator light to switch to the alarm state to alert the user. It is conceivable that a high level indicates the current link is intact. Furthermore, after a single monitoring and evaluation is completed, the task is suspended through a delay function to wait for the next cycle, achieving periodic polling.

[0042] This application also provides an optical fiber transmission control circuit. In one embodiment, the optical fiber transmission control circuit is provided in an electronic device. The optical fiber transmission control circuit is used to connect an MCU and an optical fiber transmitter, and the circuit is also used to connect an MCU and an optical fiber receiver. The optical fiber transmission control circuit includes a logic gate chip and an output control module. The logic gate chip is used to perform AND logic operations, and the output control module is used to control the optical fiber output.

[0043] Specifically, the logic gate chip includes a first AND gate unit and a second AND gate unit, where the AND gate unit serves as an internal logic circuit for implementing AND logic. It is conceivable that the logic gate chip used includes at least two AND gate units, which function as dual-input, single-output logic units. One input of the first AND gate unit is connected to the first terminal of a first resistor, while the second terminal of the first resistor is connected to the pin on the MCU that transmits the TXD signal. The other input of the first AND gate unit is connected to the output of the fiber optic receiver. The output of the first AND gate unit is connected to the first terminal of a second resistor, and the second terminal of the second resistor is connected to the pin on the MCU that receives the RXD signal. Furthermore, the MCU transmits the TXD signal to the first and second AND gate units through the first resistor. The two inputs of the first AND gate unit are respectively connected to the TXD signal and the output signal of the fiber optic receiver and perform AND logic operations. Through the AND logic operation, the RXD signal can be maintained at a dominant level (i.e., low level) when the TXD signal is at a dominant level (i.e., low level).

[0044] Furthermore, one input of the second AND gate is connected to the first terminal of the first resistor, and the other input is connected to the first terminal of the third resistor. The second terminal of the third resistor is connected to the operating voltage and is also connected to the first terminal of the first capacitor, the second terminal of which is grounded. The output of the second AND gate is connected to the input of the output control module, and the output of the output control module is connected to the fiber optic transmitter. The output control module is used to control the fiber optic transmitter to turn off when the second AND gate outputs a high level. It is conceivable that when one input of the second AND gate is kept at a high level through the third resistor, and a high-level TXD signal is applied to the other input of the second AND gate, the second AND gate outputs a high level to control the output control module to turn off the fiber optic transmitter. In other cases, the output control module keeps the fiber optic transmitter on to transmit signals.

[0045] As can be seen from the above scheme, this scheme eliminates the controller's real-time timing dependence on remote physical feedback through local hardware-level logic simulation, thereby removing the coupling constraint between baud rate and transmission distance. This allows users to directly initiate data requests without adjusting the original control program or reducing the baud rate. The electronic device can automatically perform synchronous echo locally and achieve error-free transparent transmission at the highest baud rate (1Mbps) even within the physical limits of optical fiber (such as over 20km).

[0046] In some embodiments, the output control module includes a fourth resistor, a fifth resistor, and an NMOS transistor. The first terminal of the fourth resistor is connected to the output of the second AND gate unit, the second terminal of the fourth resistor is connected to the gate of the NMOS transistor, the source of the NMOS transistor is grounded, the drain of the NMOS transistor is connected to the first terminal of the fifth resistor, and the drain of the NMOS transistor is also connected to the input of the fiber optic transmitter. The second terminal of the fifth resistor is connected to the operating voltage. It is understood that when the gate of the NMOS transistor is connected to the fourth resistor, and the output of the second AND gate unit is high, the gate of the NMOS transistor is high, satisfying the conduction condition, causing the NMOS transistor to conduct. This, in turn, grounds the input of the fiber optic transmitter, thus putting the fiber optic transmitter in an off state.

[0047] Optionally, the output control module also includes a sixth resistor. The first end of the sixth resistor is connected to the drain of the NMOS transistor, and the second end is connected to the source of the NMOS transistor. In the circuit, the output control module can provide a discharge path through the sixth resistor. When the NMOS transistor is turned off, this resistor provides a current discharge path to guide large currents to ground. Furthermore, after power failure, it can safely discharge the high-voltage charge stored in the capacitors across the DS terminals of the NMOS transistor. In some embodiments, the sixth resistor can be placed on one side of the NMOS transistor in the PCB layout, close to it. The source of the NMOS transistor is typically power ground or high-current ground. If the resistor is far from the NMOS transistor, the two long traces connecting the drain and source will form a large noise reception loop. Therefore, placing the sixth resistor on one side of the NMOS transistor in the PCB layout minimizes the critical loop area, helping to ensure the stability, accuracy, and electromagnetic compatibility of the circuit.

[0048] Figure 2 is a schematic diagram of the optical fiber transmission control circuit provided in an embodiment of this application. As shown in the figure, the circuit includes a logic gate chip U1, a first capacitor C1, a first resistor R1, a second resistor R2, a third resistor R3, a fourth resistor R4, a fifth resistor R5, a sixth resistor R6, and an NMOS transistor Q1. Specifically, the logic gate chip U1 includes a first AND gate unit and a second AND gate unit. One input terminal of the first AND gate unit is connected to the first terminal of the first resistor R1, and the second terminal of the first resistor R1 is used to connect to the pin on the MCU that transmits the TXD signal. The other input terminal of the first AND gate unit is connected to the output terminal of the optical fiber receiver FC2, and the output terminal of the first AND gate unit is connected to the first terminal of the second resistor R2. The second terminal of the second resistor R2 is used to connect to the pin on the MCU that receives the RXD signal. One input terminal of the second AND gate unit is connected to the first terminal of the first resistor R1, and the other input terminal of the second AND gate unit is connected to the first terminal of the third resistor R3. The second terminal of the third resistor R3 is connected to the operating voltage and is also connected to the first terminal of the first capacitor C1. The second terminal of the first capacitor C1 is grounded. The output terminal of the second AND gate unit is connected to the first terminal of the fourth resistor R4. The output control module 210 includes the fourth resistor R4, the fifth resistor R5, the sixth resistor R6, and the NMOS transistor Q1. The second terminal of the fourth resistor R4 is connected to the gate of the NMOS transistor Q1, the source of the NMOS transistor Q1 is grounded, the drain of the NMOS transistor Q1 is connected to the first terminal of the fifth resistor R5, and the drain of the NMOS transistor Q1 is also connected to the input terminal of the fiber optic transmitter FC1. The second terminal of the fifth resistor R5 is connected to the operating voltage. The first terminal of the sixth resistor R6 is connected to the drain of the NMOS transistor Q1, and the second terminal of the sixth resistor R6 is connected to the source of the NMOS transistor Q1.

[0049] Understandably, when a high-level (i.e., recessive) TXD signal is received, the output of the first AND gate is controlled by the output signal of the fiber optic receiver FC2. Since both inputs of the second AND gate are high, the second AND gate outputs a high level to control the NMOS transistor Q1 to turn on, thereby grounding the input of the fiber optic transmitter FC1. At this time, the device is in data receiving mode. Conversely, when a low-level (i.e., dominant) TXD signal is received, the first AND gate outputs a low level, and the second AND gate also outputs a low level, causing the NMOS transistor Q1 to turn off. This allows the input of the fiber optic transmitter FC1 to connect to a high level, enabling FC1 to transmit a high-level signal.

[0050] To address this, based on the AND logic operation mechanism provided in the fiber optic transmission control circuit, the level coupling relationship of four physical states between the local and remote ends during the photoelectric conversion process can be determined. Different states are defined through the hardware interaction truth table shown in Table 1, as follows:

[0051] Table 1 Hardware Interaction Truth Table

[0052]

[0053] Understandably, in state 1 (TXD_Local=0, RXD_Remote=0), both ends (i.e., the local end and the remote end) are simultaneously at dominant levels. The RXD signal output from the local end (i.e., RXD_Local mentioned above) remains dominant, conforming to the contention mechanism of dominant bits overriding recessive bits in the CAN(FD) protocol. In state 2 (TXD_Local=0, RXD_Remote=1), due to the logic characteristics corresponding to the AND gate units provided by the logic gate chips in the circuit, the dominant level of the local end TXD signal (i.e., TXD_Local mentioned above) directly drives the output end to generate synchronous echo, solving the feedback loss caused by the separation of the transmit and receive paths in a full-duplex physical link and ensuring the timing alignment of the bit monitoring logic inside the MCU. In state 3 (TXD_Local=1, RXD_Remote=0), the local end is in a recessive idle state, and the level of the output RXD signal is directly determined by the remote end (i.e., determined according to RXD_Remote mentioned above), realizing transparent transmission from the remote end to the local end. In state 4 (TXD_Local=1, RXD_Remote=1), the local RXD signal is recessive (i.e., high), which corresponds to the bus idle state.

[0054] Figure 3 is a schematic diagram of the interaction of CAN-to-fiber real-time forwarding according to an embodiment of this application. As shown in the figure, in one embodiment, the MCU in the electronic device receives the optical signal sent by the remote end (e.g., RXD_Remote=0) through the fiber optic transmission control circuit. It can be imagined that this signal can be obtained by the remote end through the transmission of data frames, so that the local end can receive the data frames and parse the signal. At this time, due to the logic gate chip configured in the fiber optic transmission control circuit, the RXD signal of the local end is set to a dominant level (i.e., low level, RXD_Local=0). Therefore, when the source channel (e.g., CAN 0) receives a data frame, a high-priority interrupt service routine is immediately triggered. In this stage, the local end queries the routing table, performs destination filtering according to the routing table to determine the target channel, and performs only memory copying in the interrupt context to push the data packet into the asynchronous message queue of the target channel and release the CPU. It can be understood that in this stage, the receiving and parsing and physical transmission are initially decoupled on the time axis through the enqueue operation, ensuring the immediacy of the front-end reception.

[0055] Furthermore, during the asynchronous transmission cycle, the device invokes a background transmission task to cyclically monitor the count value of the corresponding asynchronous message queue in a polling manner. Once it detects that there is data to be processed in the buffer, the task immediately transmits the data, for example, by calling the hardware transmission function (TxStartup) to drive the physical link to perform the transmission operation. It can be understood that by using the queue as an intermediate buffer, the mutual influence between different physical channels is isolated. Even if the transmission delay is caused by physical interference or abnormal feedback from the remote end at the transmitting fiber port, the blocking effect is limited to the message queue level and will not interfere with the real-time reception decision of the interrupt layer. Thus, high parallelism and low coupling of multi-channel forwarding are achieved at the system level.

[0056] Figure 4 is a schematic diagram of the baud rate versus maximum transmission distance provided in this application. As shown in the figure, the horizontal axis represents the baud rate, and the vertical axis represents the maximum transmission distance. Line segment L1 represents the maximum transmission distance of this scheme at different baud rates, while line segment L2 represents the maximum transmission distance of related technical solutions (standard CAN transmission) at different baud rates. In related technical solutions, the communication distance is strongly correlated with the bit period Tbit (i.e., the reciprocal of the baud rate). A higher baud rate inevitably leads to a shorter distance. Therefore, the maximum transmission distance of related technical solutions is limited by the following formula:

[0057]

[0058] Among them, D traditional T represents the maximum transmission distance of the relevant technical solution. bit Where is the bit period, c is the speed of light (corresponding to the speed of signal propagation in optical fiber), S is the proportion of effective time allocated to signal propagation in the bit period, and T is the signal propagation time.prop Let n be the fixed processing delay of the signal within the transceiver, interface, or node, and n be the refractive index of the optical fiber. It is evident that the maximum transmission distance of related technical solutions is limited. The higher the baud rate, the smaller the bit period, resulting in a smaller transmission distance corresponding to the numerator in the formula, thus shortening the maximum transmission distance. Referring to Figure 4, the maximum transmission distance of this solution at different baud rates is greater than that of related technical solutions. This indicates that this solution can utilize logic gate chips to achieve local instantaneous echo through hardware logic, decoupling the distance constraint, thereby achieving a fiber optic physical limit of over 20km at a rate of 1Mbps, increasing the communication distance from tens of meters.

[0059] Figure 5 is a schematic diagram of the throughput curve under bus interference provided in this application. The horizontal axis in the figure represents the invalid retransmission probability P. collision A higher invalid retransmission probability indicates stronger interference; the vertical axis represents throughput. Line segment L3 in the graph represents the throughput of this scheme, and line segment L4 represents the throughput of related technical schemes. The throughput formula is as follows:

[0060]

[0061] Where C is the throughput, L i The length of the data message being sent, in bits or bytes, f i Let i be the transmission frequency of port i. P represents the total amount of data sent across all ports. collision This represents the probability of invalid retransmission. As shown in Figure 5, current technology cannot isolate remote link fluctuations, leading to the P value in the denominator of the formula being [invalid retransmission probability]. collision The surge in throughput has led to a continuous decline in overall throughput. However, because this solution uses hardware arbitration to shield against link interference, it can operate in high-interference environments (P...). collision At a throughput of >0.3), the effective throughput of this solution is more than 1.5 times higher than that of related technical solutions.

[0062] Furthermore, this solution eliminates synchronous blocking and ensures deterministic scheduling response. Specifically, it eliminates the random blocking delays caused by round-trip time (RTT) in traditional solutions. The total forwarding delay consists only of the following deterministic components: ISR (Rx / Route), accounting for 5.0%, ensuring extremely fast core response; Queue Operation, accounting for 15.0%, achieving non-blocking isolation between the physical and software layers; OS Context Switch, accounting for 30.0%, ensuring controllable execution time in multi-tasking environments; and Tx Hardware Startup, accounting for 50.0%, a hardware response embedded in the CAN (FD) controller. Therefore, the forwarding delay in this solution does not include random waiting terms. Combined with the above formula, the system can minimize scheduling jitter and maintain a throughput gain of 35%~50% even under high load (>80%), ensuring real-time determinism in industrial control.

[0063] This application also provides an electronic device. Figure 6 is a schematic diagram of the structure of an electronic device provided in an embodiment of this application. This device is used to execute the CAN bus fiber optic transmission method provided in the above embodiments and has corresponding functional modules and beneficial effects for executing the method. As shown in the figure, the device includes a processor 301, a memory 302, an input device 303, and an output device 304. The number of processors 301 can be one or more; one processor 301 is used as an example in the figure. The processor 301, memory 302, input device 303, and output device 304 can be connected by a bus or other means; a bus connection is used as an example in the figure. The memory 302, as a computer-readable storage medium, can be used to store software programs, computer-executable programs, and modules, such as the program instructions / modules corresponding to the CAN bus fiber optic transmission method in the embodiments of this application. The processor 301 executes various corresponding functional applications and data processing by running the software programs, instructions, and modules stored in the memory 302, thereby realizing the above-mentioned CAN bus fiber optic transmission method.

[0064] The memory 302 may primarily include a program storage area and a data storage area. The program storage area may store the operating system and applications required for at least one function; the data storage area may store data recorded or created during use. Furthermore, the memory 302 may include high-speed random access memory and non-volatile memory, such as at least one disk storage device, flash memory device, or other non-volatile solid-state storage device. In some embodiments, the memory 302 may further include memory remotely located relative to the processor 301, which can be connected to the device via a network. Examples of such networks include, but are not limited to, the Internet, intranets, local area networks, mobile communication networks, and combinations thereof.

[0065] The input device 303 can be used to input corresponding digital or character information to the processor 301, and to generate key signal inputs related to the user settings and function control of the device; the output device 304 can be used to send or display key signal outputs related to the user settings and function control of the device.

[0066] In one embodiment, the electronic device further includes an optical fiber transmission control circuit as provided in the above embodiments.

[0067] This application also provides a storage medium storing computer-executable instructions, which, when executed by a processor, are used to perform related operations in the CAN bus fiber optic transmission method provided in any embodiment of this application.

[0068] Computer-readable storage media include both permanent and non-permanent, removable and non-removable media, and information storage can be achieved by any method or technology. Information can be computer-readable instructions, data structures, program modules, or other data. Examples of computer storage media include, but are not limited to, phase-change memory (PRAM), static random access memory (SRAM), dynamic random access memory (DRAM), other types of random access memory (RAM), read-only memory (ROM), electrically erasable programmable read-only memory (EEPROM), flash memory or other memory technologies, CD-ROM, digital versatile optical disc (DVD) or other optical storage, magnetic tape, disk storage or other magnetic storage devices, or any other non-transfer medium that can be used to store information accessible by a computing device.

[0069] It should also be noted that the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such process, method, article, or apparatus. Unless otherwise specified, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes that element.

[0070] Note that the above description is merely a preferred embodiment and the technical principles employed in this application. Those skilled in the art will understand that this application is not limited to the specific embodiments described herein, and various obvious changes, readjustments, and substitutions can be made without departing from the scope of protection of this application. Therefore, although this application has been described in detail through the above embodiments, this application is not limited to the above embodiments. Many other equivalent embodiments may be included without departing from the concept of this application, and the scope of this application is determined by the scope of the appended claims.

Claims

1. A CAN bus fiber optic transmission method, characterized in that, An electronic device is used for data transmission with another electronic device. The electronic device is equipped with a logic gate chip that performs an AND operation on a TXD signal and the output signal of an optical fiber receiver to maintain the RXD signal at a dominant level when the TXD signal is at a dominant level. The method includes: triggering an interrupt response in response to receiving data sent by another electronic device; during the interrupt response, performing destination filtering based on a preset routing table to determine the corresponding target channel, and storing the received data through an asynchronous message queue associated with the target channel; when entering an asynchronous transmission cycle, polling the asynchronous message queue to determine if there is still data to be processed stored in the asynchronous message queue; if it is determined that the data to be processed exists in the asynchronous message queue, setting the TXD signal to a dominant level to indicate that the electronic device is in a transmission state, and sending the data to be processed.

2. The CAN bus fiber optic transmission method according to claim 1, characterized in that, The routing table is used to record the routing and forwarding relationships between various transmission channels. The process of filtering destinations based on the preset routing table to determine the corresponding target channel and storing the received data through an asynchronous message queue associated with the target channel includes: determining the source channel of the received data; determining several transmission channels in the routing table that have a routing and forwarding relationship with the source channel and using them as the target channels; selecting the asynchronous message queue corresponding to the target channel and storing the received data in the asynchronous message queue.

3. The CAN bus fiber optic transmission method according to claim 1, characterized in that, The step of polling the asynchronous message queue to determine whether there is still data to be processed stored in the asynchronous message queue includes: cyclically checking the count value of the asynchronous message queue; and determining that the asynchronous message queue stores the data to be processed if the count value is not 0.

4. The CAN bus fiber optic transmission method according to any one of claims 1-3, characterized in that, Also includes: The voltage level of the hardware probe pin is periodically polled; the hardware probe pin is used to detect the presence of a carrier in the physical optical path. When the level is low, it is determined that the optical fiber link is in a signal interruption state or the light intensity attenuation is greater than a preset threshold, and an alarm indication signal is output.

5. A fiber optic transmission control circuit, characterized in that, An electronic device as described in any one of claims 1-4, wherein the fiber optic transmission control circuit is used to connect an MCU and a fiber optic transmitter, and to connect the MCU and a fiber optic receiver, the circuit comprising a logic gate chip and an output control module; the logic gate chip comprising a first AND gate unit and a second AND gate unit, one input terminal of the first AND gate unit being connected to a first terminal of a first resistor, the second terminal of the first resistor being used to connect to a pin on the MCU for transmitting a TXD signal, the other input terminal of the first AND gate unit being connected to the output terminal of the fiber optic receiver, the output terminal of the first AND gate unit being connected to a first terminal of a second resistor, the second terminal of the second resistor being used to connect to a pin on the MCU for receiving an RXD signal; one input terminal of the second AND gate unit being connected to the first terminal of the first resistor, the other input terminal of the second AND gate unit being connected to a first terminal of a third resistor, the second terminal of the third resistor being connected to a working voltage, and the second terminal of the third resistor also being connected to a first terminal of a first capacitor, the second terminal of the first capacitor being grounded, the output terminal of the second AND gate unit being connected to an input terminal of the output control module, the output terminal of the output control module being connected to the fiber optic transmitter, and the output control module being used to control the fiber optic transmitter to turn off when the second AND gate unit outputs a high level.

6. The optical fiber transmission control circuit according to claim 5, characterized in that, The output control module includes a fourth resistor, a fifth resistor, and an NMOS transistor; the first end of the fourth resistor is connected to the output of the second AND gate unit, the second end of the fourth resistor is connected to the gate of the NMOS transistor, the source of the NMOS transistor is grounded, the drain of the NMOS transistor is connected to the first end of the fifth resistor, the drain of the NMOS transistor is also connected to the input of the fiber optic transmitter, and the second end of the fifth resistor is connected to the operating voltage.

7. The optical fiber transmission control circuit according to claim 6, characterized in that, It also includes a sixth resistor, the first end of which is connected to the drain of the NMOS transistor, and the second end of which is connected to the source of the NMOS transistor.

8. An electronic device, characterized in that, include: One or more processors; A storage device for storing one or more programs, which, when executed by one or more processors, cause the one or more processors to implement the CAN bus fiber optic transmission method as described in any one of claims 1-4.

9. The electronic device according to claim 8, characterized in that, Includes the fiber optic transmission control circuit as described in any one of claims 5-7.

10. A storage medium for storing computer-executable instructions, characterized in that, The computer-executable instructions, when executed by a processor, are used to perform the CAN bus fiber optic transmission method as described in any one of claims 1-4.

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