Current detection amplifier and semiconductor device for current detection

Abstract

A current detection amplifier that amplifies a detection signal of a current flowing to a current detection resistor and outputs the amplified detection signal to an AD converter, the current detection amplifier comprising: a first noise removal filter connected to one end of the current detection resistor and configured to have a first capacitance and a first resistor; and a first capacitance connection switch provided between the first capacitance of the first noise removal filter and the first sampling capacitance of the AD converter.

Description

TECHNICAL FIELD

[0001] The present application relates to a current detection amplifier and a semiconductor device for current detection. BACKGROUND

[0002] In the past, in a case where a current detection resistor is used to detect a current, in order to suppress a power loss caused by the current detection resistor, low resistance of the current detection resistor is required. However, in a case where the current detection resistor is made low resistance, a detection signal becomes small, and an S / N ratio deteriorates, and thus low noise is required. As a method of low noise, for example, a method of performing chopping for suppressing 1 / f noise, a method of mounting a noise removal filter, and the like can be cited.

[0003] For example, in the following Patent Literature 1, a technology is disclosed in which, in a delta sigma type AD converter provided with a detection resistor and a delta sigma modulator that converts an analog signal detected by the detection resistor into a digital signal, an anti-aliasing filter for removing a high frequency component of a signal input to the delta sigma modulator is provided between the detection resistor and the delta sigma modulator.

[0004] PRIOR ART DOCUMENTS

[0005] PATENT LITERATURE

[0006] Patent Literature 1: Japanese Patent Application Publication No. 2009-260605 SUMMARY

[0007] PROBLEMS TO BE SOLVED BY THE INVENTION

[0008] However, in the technology of the above-described Patent Literature 1, when sampling is performed to the delta sigma modulator, charge redistribution occurs from the capacitance of the anti-aliasing filter to the delta sigma modulator, and thus it is necessary to make the capacitance of the anti-aliasing filter large.

[0009] Further, in the technology of the above-described Patent Literature 1, in a case where the current detection amplifier is configured to perform chopping (polarity inversion) of a signal input to the delta sigma modulator, chopping noise occurs at the time of polarity inversion, and thus, in order to suppress this chopping noise, it is also necessary to make the capacitance of the anti-aliasing filter large, and the anti-aliasing filter and the current detection amplifier cannot be mounted to the same semiconductor integrated circuit.

[0010] MEANS FOR SOLVING THE PROBLEMS

[0011] The current detection amplifier of one embodiment is a current detection amplifier that amplifies a detection signal of a current flowing to a current detection resistor and outputs the amplified signal to an AD converter, and includes a first noise removal filter connected to one end of the current detection resistor and configured to have a first capacitor and a first resistor, and a first capacitor connection switch provided between the first capacitor of the first noise removal filter and a first sampling capacitor of the AD converter.

[0012] Effects of Invention

[0013] According to the current detection amplifier of one embodiment, when sampling is performed on the AD converter, the first capacitor connection switch is turned off and the first capacitor of the first noise removal filter is disconnected from the AD converter, so that charge redistribution is not performed from the first capacitor, and thus the first capacitor can be made small.

[0014] Further, according to the current detection amplifier of one embodiment, in the case where the current detection amplifier is configured to perform chopping (polarity inversion) of a signal input to the AD converter, the first capacitor connection switch and the second capacitor connection switch are turned off at the time of chopping, and the first capacitor and the second capacitor are disconnected from the AD converter, so that noise generated at the time of polarity inversion does not overlap with the first capacitor and the second capacitor, and thus the first capacitor and the second capacitor can be made small. BRIEF DESCRIPTION OF DRAWINGS

[0015] Figure 1 is a diagram illustrating a circuit structure of a current detection device of one embodiment.

[0016] Figure 2 is a timing chart illustrating timings of the respective parts in the current detection device of one embodiment.

[0017] Figure 3 is a diagram illustrating a modification example of the circuit structure of the current detection device of one embodiment.

[0018] Figure 4 is a timing chart illustrating an example of output in the case where the anti-aliasing filter is connected to the capacitor at a fixed period at the time of startup of the current detection amplifier of one embodiment.

[0019] Figure 5 is a timing chart illustrating an example of output in the case where the anti-aliasing filter is connected to the capacitor at the time of startup of the current detection amplifier of one embodiment. DETAILED DESCRIPTION

[0020] One embodiment will be described below with reference to the drawings.

[0021] (Circuit structure of current detection device 100)

[0022] Figure 1 is a diagram showing a circuit structure of a current detection device 100 according to an embodiment. Figure 1 The current detection device 100 shown detects a current flowing through a wiring L1 as a detection target, amplifies and AD-converts a detection signal of the current, and outputs the AD-converted digital signal. The current detection device 100 can be used, for example, for a battery gauge or the like. However, the use of the current detection device 100 is not limited to this, and the current detection device 100 can be applied to any device as long as it is a device capable of detecting a low voltage in a low-noise use.

[0023] As shown in FIG. 1, the current detection device 100 includes a current detection resistor R1, a current detection amplifier 110, and a delta-sigma AD converter 120. Figure 1 As shown in FIG. 1, the current detection device 100 includes a current detection resistor R1, a current detection amplifier 110, and a delta-sigma AD converter 120.

[0024] The current detection resistor R1 is provided on the wiring L1 that is the target of current detection. The potential difference between both ends of the current detection resistor R1 changes according to the current flowing through the current detection resistor R1.

[0025] The current detection amplifier 110 is connected to both ends of the current detection resistor R1 and amplifies a detection signal of the potential difference between both ends of the current detection resistor R1.

[0026] The current detection amplifier 110 includes a resistor R21, a resistor R22, a resistor R23, and a resistor R24.

[0027] One end of the resistor R21 is connected to one end of the current detection resistor R1. The resistor R22 is connected to the other end of the current detection resistor R21. That is, the resistor R21 and the resistor R22 are connected in series with each other.

[0028] One end of the resistor R23 is connected to the other end of the current detection resistor R1. The resistor R24 is connected to the other end of the current detection resistor R23. That is, the resistor R23 and the resistor R24 are connected in series with each other.

[0029] In addition, the gain of the current detection amplifier 110 is R22 / R21 = R24 / R23. That is, the resistor R21, the resistor R22, the resistor R23, and the resistor R24 are an example of "gain determining resistors" that determine the gain of the current detection amplifier 110.

[0030] The current detection amplifier 110 includes a differential operational amplifier 111. The differential operational amplifier 111 amplifies a difference voltage between a -input terminal and a +input terminal and outputs from a -output terminal and a +output terminal.

[0031] The - input terminal of the differential operational amplifier 111 is connected between the resistor R21 and the resistor R22 via the chopper switch SW11. Further, the - input terminal of the differential operational amplifier 111 is connected between the resistor R23 and the resistor R24 via the chopper switch SW21.

[0032] The + input terminal of the differential operational amplifier 111 is connected between the resistor R21 and the resistor R22 via the chopper switch SW22. Further, the + input terminal of the differential operational amplifier 111 is connected between the resistor R23 and the resistor R24 via the chopper switch SW12.

[0033] The + output terminal of the differential operational amplifier 111 is connected to the first input terminal Vin+ of the ΔΣ AD converter 120 via the chopper switch SW13. Further, the + output terminal of the differential operational amplifier 111 is connected to the second input terminal Vin- of the ΔΣ AD converter 120 via the chopper switch SW23.

[0034] The - output terminal of the differential operational amplifier 111 is connected to the first input terminal Vin+ of the ΔΣ AD converter 120 via the chopper switch SW24. Further, the - output terminal of the differential operational amplifier 111 is connected to the second input terminal Vin- of the ΔΣ AD converter 120 via the chopper switch SW14.

[0035] Thus, the current detection amplifier 110 is able to chop (i.e., polarity-invert) the signal Vamp inputted from the differential operational amplifier 111 to the ΔΣ AD converter 120 by switching the chopper switches SW11 to SW14, SW21 to SW24.

[0036] Specifically, the current detection amplifier 110 is able to input the signal Vamp of the + polarity outputted from the differential operational amplifier 111 to the first input terminal Vin+ of the ΔΣ AD converter 120 and input the signal Vamp of the - polarity outputted from the differential operational amplifier 111 to the second input terminal Vin- of the ΔΣ AD converter 120 by simultaneously switching the chopper switches SW11 to SW14 to be on and simultaneously switching the chopper switches SW21 to SW24 to be off.

[0037] On the contrary, the current detection amplifier 110 is able to input the signal Vamp of the - polarity outputted from the differential operational amplifier 111 to the first input terminal Vin+ of the ΔΣ AD converter 120 and input the signal Vamp of the + polarity outputted from the differential operational amplifier 111 to the second input terminal Vin- of the ΔΣ AD converter 120 by simultaneously switching the chopper switches SW11 to SW14 to be off and simultaneously switching the chopper switches SW21 to SW24 to be on.

[0038] The current detection amplifier 110 is able to suppress the 1 / f noise of the signal Vamp input to the ΔΣ AD converter 120 by choppering the signal Vamp. Further, the chopper switches SW11 to SW14, SW21 to SW24 are an example of a "first chopper section" that chopper the signal Vamp input to the ΔΣ AD converter 120.

[0039] In addition, the current detection amplifier 110 includes a first anti-aliasing filter 112, a second anti-aliasing filter 113, a first capacitor connection switch SW1, and a second capacitor connection switch SW2.

[0040] The first anti-aliasing filter 112 is configured to have the above-described resistance R22 (an example of a "first resistance") and a first capacitor C1. The first capacitor C1 is connected in parallel to the resistance R22. In addition, the first capacitor C1 is connected to the first input terminal Vin+ of the ΔΣ AD converter 120. The first anti-aliasing filter 112 is a noise removal filter (i.e., a low-pass filter) that removes the high-frequency components of the detection signal Vout input to the first input terminal Vin+ of the ΔΣ AD converter 120 when sampling to the ΔΣ AD converter 120 is performed.

[0041] The second anti-aliasing filter 113 is configured to have the above-described resistance R24 (an example of a "second resistance") and a second capacitor C2. The second capacitor C2 is connected in parallel to the resistance R24. The second capacitor C2 is connected to the second input terminal Vin- of the ΔΣ AD converter 120. The second anti-aliasing filter 113 is a noise removal filter (i.e., a low-pass filter) that removes the high-frequency components of the detection signal Vout (i.e., a detection signal Vout having a polarity different from the detection signal Vout input to the first input terminal Vin+) input to the second input terminal Vin- of the ΔΣ AD converter 120 when sampling to the ΔΣ AD converter 120 is performed.

[0042] The first capacitor connection switch SW1 is provided between the first capacitor C1 of the first anti-aliasing filter 112 and the first input terminal Vin+ of the ΔΣ AD converter 120. The first capacitor connection switch SW1 is able to switch the first capacitor C1 of the first anti-aliasing filter 112 to a state of being connected to the first input terminal Vin+ of the ΔΣ AD converter 120 and a state of being cut off from the first input terminal Vin+ of the ΔΣ AD converter 120.

[0043] The second-capacitor connection switch SW2 is provided between the second capacitor C2 of the second anti-aliasing filter 113 and the second input terminal Vin- of the ΔΣ AD converter 120. The second-capacitor connection switch SW2 can switch the second capacitor C2 of the second anti-aliasing filter 113 between a state in which the second capacitor C2 is connected to the second input terminal Vin- of the ΔΣ AD converter 120 and a state in which the second capacitor C2 is disconnected from the second input terminal Vin- of the ΔΣ AD converter 120.

[0044] The ΔΣ AD converter 120 is provided at a stage subsequent to the current detection amplifier 110 and AD-converts a detection signal Vout (analog signal) output from the current detection amplifier 110 into a digital signal.

[0045] For example, the ΔΣ AD converter 120 is configured to have a ΔΣ modulator that AD-converts the detection signal Vout (analog signal) output from the current detection amplifier 110 and a digital filter that performs filter processing on the detection signal after AD-conversion by the ΔΣ modulator.

[0046] In addition, in Figure 1 , a part (input section) of the ΔΣ AD converter 120 is illustrated. As Figure 1 indicated, the part (input section) of the ΔΣ AD converter 120 is provided with a first input terminal Vin+, a second input terminal Vin-, a first sampling capacitor C31 connected to the first input terminal Vin+, and a second sampling capacitor C32 connected to the second input terminal Vin-.

[0047] Further, the part (input section) of the ΔΣ AD converter 120 is provided with a differential operational amplifier 121 connected to the first sampling capacitor C31 and the second sampling capacitor C32, a first integration capacitor C35 provided between a -input terminal and a +output terminal of the differential operational amplifier 121, a second integration capacitor C36 provided between a +input terminal and a -output terminal of the differential operational amplifier 121, sampling switches SW51 to SW56, and integration switches SW61 to SW64.

[0048] The ΔΣ AD converter 120 can be switched by switching the sampling switches SW51 to SW56 and the integration switches SW61 to SW64 to a state in which the detection signal Vout output from the current detection amplifier 110 is sampled by the first sampling capacitor C31 and the second sampling capacitor C32 and a state in which the charges sampled by the first sampling capacitor C31 and the second sampling capacitor C32 are integrated by the first integration capacitor C35 and the second integration capacitor C36.

[0049] Specifically, the ΔΣ AD converter 120 is capable of switching to a state in which the detection signal Vout output from the current detection amplifier 110 is sampled by the first sampling capacitor C31 and the second sampling capacitor C32 by simultaneously switching the sampling switches SW51 to SW56 to be on and simultaneously switching the integration switches SW61 to SW64 to be off.

[0050] In contrast, the ΔΣ AD converter 120 is capable of switching to a state in which the charges sampled by the first sampling capacitor C31 and the second sampling capacitor C32 are integrated by the first integration capacitor C35 and the second integration capacitor C36 by simultaneously switching the sampling switches SW51 to SW56 to be off and simultaneously switching the integration switches SW61 to SW64 to be on.

[0051] Further, in the present embodiment, the ΔΣ AD converter 120 is provided. Here, as an example, a ΔΣ AD converter is used, but any kind of AD converter can be applied as long as it is an AD converter provided with a sampling capacitor.

[0052] In addition, the current detection device 100 of the present embodiment is an example of a "semiconductor device for current detection", and the current detection amplifier 110 and the ΔΣ AD converter 120 are mounted on a single semiconductor integrated circuit. In particular, the current detection device 100 of the present embodiment is capable of miniaturizing the first capacitor C1 and the second capacitor C2 for removing high frequency components, and thus the first capacitor C1 and the second capacitor C2 can be mounted on the current detection amplifier 110, and the current detection amplifier 110 and the ΔΣ AD converter 120 can be mounted on a single semiconductor integrated circuit.

[0053] (Timing of each signal in the current detection device 100)

[0054] Figure 2 is a timing chart showing the timing of each part in the current detection device 100 of an embodiment.

[0055] Figure 2 The timing chart shown in FIG. 8 sequentially shows, from the top to the bottom, the switching timing of the capacitor connection switches SW1 and SW2 provided in the current detection amplifier 110, the switching timing of the sampling switches SW51 to SW56 provided in the ΔΣ AD converter 120, the switching timing of the integration switches SW61 to SW64 provided in the ΔΣ AD converter 120, the switching timing of the chopper switches SW11 to SW14 provided in the current detection amplifier 110, the switching timing of the chopper switches SW21 to SW24 provided in the current detection amplifier 110, and the voltage level of the signal Vamp output from the differential operational amplifier 111.

[0056] In Figure 2In the timing chart shown, timings T1, T4 indicate timings at which the signal Vamp output from the differential operational amplifier 111 is subjected to chopper.

[0057] Further, in Figure 2 In the timing chart shown, timings T2, T5 indicate timings at which the first sampling capacitor C31 and the second sampling capacitor C32 provided in the ΔΣ AD converter 120 start sampling.

[0058] Further, in Figure 2 In the timing chart shown, timings T3, T6 indicate timings at which the capacitors C1, C2 of the anti-aliasing filters 112, 113 are connected to the first sampling capacitor C31 and the second sampling capacitor C32 provided in the ΔΣ AD converter 120, and sampled by the first sampling capacitor C31 and the second sampling capacitor C32.

[0059] As Figure 2 As shown, in the current detection amplifier 110, the signal Vamp is subjected to chopper by switching the chopper switches SW11 to SW14 and the chopper switches SW21 to SW24 at a fixed period.

[0060] Further, as Figure 2 As shown, in the ΔΣ AD converter 120, the sampling switches SW51 to SW56 and the integration switches SW61 to SW64 are switched at a fixed period, so that the state in which the detection signal Vout output from the current detection amplifier 110 is sampled by the first sampling capacitor C31 and the second sampling capacitor C32 and the state in which the charges sampled by the first sampling capacitor C31 and the second sampling capacitor C32 are integrated by the first integration capacitor C35 and the second integration capacitor C36 are alternately switched.

[0061] Further, as Figure 2 As shown, the current detection amplifier 110 can sample the capacitors C1, C2 of the anti-aliasing filters 112, 113 to the first sampling capacitor C31 and the second sampling capacitor C32 by switching the capacitor connection switches SW1, SW2 to be on at a fixed period.

[0062] Here, as Figure 2 As shown, the capacitor connection switches SW1, SW2 are off at the timings T1, T4 at which chopper is performed. That is, the capacitors C1, C2 of the anti-aliasing filters 112, 113 are not connected at the timings T1, T4 at which chopper is performed.

[0063] Thus, the current detection amplifier 110 of one embodiment can make the noise generated in the detection signal Vout at the time of polarity inversion of the signal Vamp not overlap the capacitors C1, C2, so that the capacitors C1, C2 can be made small in capacity.

[0064] Further, asFigure 2 As shown, at timings T2 and T5 when sampling begins on the first sampling capacitor C31 and the second sampling capacitor C32, the capacitor connection switches SW1 and SW2 are also disconnected. That is, at the timings T2 and T5 when sampling begins, the capacitors C1 and C2 of the anti-aliasing filters 112 and 113 are also not connected.

[0065] Therefore, the current sensing amplifier 110 of one embodiment can redistribute the charge generated at the start of sampling from the differential operational amplifier 111, without redistributing the charge from capacitors C1 and C2, thus enabling the capacitance of capacitors C1 and C2 to be reduced.

[0066] Then, as Figure 3 As shown, after sampling begins, at time points T3 and T6 before the sampling switches SW51~SW56 are about to switch off, the capacitor connection switches SW1 and SW2 switch on, and the capacitors C1 and C2 of the anti-aliasing filters 112 and 113 are connected to the first sampling capacitor C31 and the second sampling capacitor C32. Thus, the current detection device 100 of one embodiment enables the ΔΣAD converter 120 to sample the signal after high-frequency noise has been removed by the anti-aliasing filters 112 and 113.

[0067] Thus, the current-sensing amplifier 110 of one embodiment can prevent noise during chopping from overlapping with capacitors C1 and C2, and can avoid charge redistribution from capacitors C1 and C2, thereby minimizing the capacitance of capacitors C1 and C2. Therefore, the current-sensing amplifier 110 of one embodiment can mount capacitors C1 and C2 on a single semiconductor integrated circuit.

[0068] For example, in the structure of Patent Document 1 above, the capacitor used as the anti-aliasing filter needs to be a capacitor of 0.01 to 0.1 μF, but in the present invention, the capacitor used as the anti-aliasing filter can be a capacitor of 100 pF or less, and can be built into a semiconductor integrated circuit.

[0069] (A modified example of the circuit structure of the current detection device 100)

[0070] Figure 3 This is a diagram showing a modified example of the circuit structure of a current detection device 100 according to one embodiment.

[0071] Figure 1 The current sensing device 100-2 shown is similar to the one that replaces the current sensing amplifier 110-2 in that it has a current sensing amplifier 110-2 instead of the current sensing amplifier 110. Figure 3 The current detection device 100 shown is different.

[0072] The current sense amplifier 110-2 includes resistor chopper switches SW31, SW32, SW33 and SW34 between the current sense resistor R1 and resistors R21 and R23.

[0073] Resistor chopper switch SW31 is positioned between one end of current sensing resistor R1 and resistor R21. Resistor chopper switch SW32 is positioned between one end of current sensing resistor R1 and resistor R23. Resistor chopper switch SW33 is positioned between the other end of current sensing resistor R1 and resistor R21. Resistor chopper switch SW34 is positioned between the other end of current sensing resistor R1 and resistor R23.

[0074] Therefore, the current sensing amplifier 110-2 can chop (i.e., reverse the polarity) the detection signal input from the current sensing resistor R1 to resistors R21 and R23 by switching the resistor chopping switches SW31~SW34.

[0075] In addition, Figure 2 In the current sense amplifier 110-2 shown, resistors R21 to R24 (resistors for gain determination) are polysilicon resistors. Therefore, in the current sense amplifier 110-2, 1 / f noise may be generated in resistors R21 to R24.

[0076] Therefore, the current sense amplifier 110-2 chops the detection signals input to resistors R21 and R23. Specifically, the current sense amplifier 110-2 chops the detection signals input to resistors R21 and R23. Figure 2 The switching timing of switches SW11~SW14 shown is the same as that of the timing switch SW31 and SW34 used for the resistor chopper, which are connected and disconnected at the same time. Figure 4 The switches SW21~SW24 shown have the same timing for switching on and off, and the switches SW32 and SW33 are used for the resistor chopper.

[0077] Therefore, the current sensing amplifier 110-2 can chop the sensing signals input to resistors R21 and R23, thereby suppressing the 1 / f noise generated in resistors R21 to R24 and the 1 / f noise generated in the differential operational amplifier 111.

[0078] In addition, the resistor chopper switches SW31~SW34 are examples of the "second chopper section" that chops the signal input to the gain detection resistor.

[0079] (An example of the output of current sense amplifier 110)

[0080] Figure 5This is a timing diagram showing an example of the output when the capacitors C1 and C2 of the anti-aliasing filters 112 and 113 are connected at a fixed period during startup of the current sense amplifier 110 in one embodiment. Figure 4 This is a timing diagram showing an example of the output when the capacitors C1 and C2 connected to the anti-aliasing filters 112 and 113 are maintained during the startup of the current sense amplifier 110 in one embodiment.

[0081] Figure 5 and Figure 5 The timing diagram shown, from top to bottom, represents the switching timing of the start signal (enable signal) of the current detection device 100, the switching timing of the capacitor connection switches SW1 and SW2 of the current detection amplifier 110, the switching timing of the sampling switches SW51 to SW56 of the ΔΣAD converter 120, the switching timing of the integration switches SW61 to SW64 of the ΔΣAD converter 120, the switching timing of the chopper switches SW11 to SW14 of the current detection amplifier 110, the switching timing of the chopper switches SW21 to SW24 of the current detection amplifier 110, and the charge of capacitors C1 and C2 of the anti-aliasing filters 112 and 113.

[0082] like Figure 4 As shown, in one embodiment, the current sensing amplifier 110 can also switch the capacitor connection switches SW1 and SW2 to the on state at startup (i.e., when the startup signal (enable signal) of the current sensing device 100 is switched on), connecting the capacitors C1 and C2 of the anti-aliasing filters 112 and 113 to the sampling capacitors C31 and C32 of the ΔΣAD converter 120 until a predetermined time has elapsed, or until the charge of the capacitors C1 and C2 of the anti-aliasing filters 112 and 113 reaches a predetermined threshold.

[0083] Thus, in one embodiment, the current sensing amplifier 110 is connected at startup with capacitors C1 and C2 of the anti-aliasing filters 112 and 113 and sampling capacitors C31 and C32 of the ΔΣAD converter 120 at a fixed period (see reference). ​ Compared to the previous method, the charging time for capacitors C1 and C2 of anti-aliasing filters 112 and 113 to reach a fixed amount during startup can be shortened, thus shortening the startup time.

[0084] The above describes one embodiment of the present invention in detail, but the present invention is not limited to these embodiments. Various modifications or alterations can be made within the scope of the spirit of the present invention as described in the scope of the claims.

[0085] For example, the present application can be applied not only to a differential type current detection amplifier but also to a single-ended type current detection amplifier.

[0086] This international application claims priority based on Japanese Patent Application No. 2023-141640 filed on August 31, 2023, the entire contents of which are incorporated into this international application.

[0087] Symbol explanation

[0088] 100, 100-2 current detection device (semiconductor device for current detection);

[0089] 110, 110-2 current detection amplifier;

[0090] 111 differential type operational amplifier;

[0091] 112 first anti-aliasing filter (first noise removal filter);

[0092] 113 second anti-aliasing filter (second noise removal filter);

[0093] 120 delta-sigma AD converter (AD converter);

[0094] 121 differential type operational amplifier;

[0095] L1 wiring;

[0096] R1 current detection resistor;

[0097] R21 to R24 resistors (resistors for gain determination);

[0098] SW11 to SW14, SW21 to SW24 chopping switches (first chopping section);

[0099] C1 first capacitor;

[0100] C2 second capacitor;

[0101] C31 first sampling capacitor;

[0102] C32 second sampling capacitor;

[0103] C35 first integration capacitor;

[0104] C36 second integration capacitor;

[0105] SW1 first capacitor connection switch;

[0106] SW2 second capacitor connection switch;

[0107] SW31 to SW34 resistance chopping switches (second chopping section);

[0108] SW51-SW56 sampling switches;

[0109] SW61-SW64 integration switches;

[0110] Vin+ first input terminal;

[0111] Vin- second input terminal.

Claims

1. A current-sensing amplifier, which amplifies the detection signal of the current flowing to a current-sensing resistor and outputs it to an AD converter, characterized in that, The current sensing amplifier includes: A first noise removal filter, connected to one end of the current sensing resistor, is configured to have a first capacitor and a first resistor; and A first capacitor connection switch is disposed between the first capacitor of the first noise removal filter and the first sampling capacitor of the AD converter.

2. The current sensing amplifier according to claim 1, characterized in that, When sampling of the detection signal output from the current-sensing amplifier begins in the first sampling capacitor of the AD converter, the switch for connecting the first capacitor is disconnected, and the first capacitor of the first noise removal filter is not connected to the first sampling capacitor of the AD converter.

3. The current sensing amplifier according to claim 2, characterized in that, After sampling of the detection signal output from the current-sensing amplifier begins in the first sampling capacitor of the AD converter, the switch for connecting the first capacitor is turned on, connecting the first capacitor of the first noise removal filter to the first sampling capacitor of the AD converter.

4. The current sensing amplifier according to claim 3, characterized in that, The current-sensing amplifier includes a first chopper section that chops the detection signal input from the current-sensing amplifier to the AD converter. When the detection signal is chopped by the first chopper section, the switch for connecting the first capacitor is disconnected, and the first capacitor of the first noise removal filter is not connected to the first sampling capacitor of the AD converter.

5. The current sensing amplifier according to claim 4, characterized in that, The current sensing amplifier includes: A second noise removal filter, connected to the other end of the current sensing resistor, is configured to have a second capacitor and a second resistor; and A switch for connecting a second capacitor is disposed between the second capacitor of the second noise removal filter and the second sampling capacitor of the AD converter. Disconnect the second capacitor connection using a switch, and do not connect the second capacitor of the second noise removal filter to the second sampling capacitor of the AD converter. The second capacitor is connected by a switch, and the second capacitor of the second noise removal filter is connected to the second sampling capacitor of the AD converter.

6. The current sensing amplifier according to claim 5, characterized in that, The current sensing amplifier includes: The gain is determined by a resistor, which in turn determines the gain of the current-sensing amplifier for the detected signal; and The second chopper section chops the detection signal input from the current sensing resistor to the gain-determining resistor.

7. The current sensing amplifier according to claim 2, characterized in that, At startup, the first capacitor is connected to the first sampling capacitor until a predetermined time has elapsed, or until the charge of the first sampling capacitor reaches a predetermined threshold.

8. A semiconductor device for current detection, characterized in that, The current-sensing amplifier and the AD converter as described in any one of claims 1 to 7 are included in a single semiconductor integrated circuit.

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