Capacitive load driving circuit and liquid ejecting apparatus

Abstract

The invention provides a capacitive load driving circuit and a liquid ejecting apparatus. The capacitive load driving circuit can reduce the possibility that the stability of the operation of the capacitive load driving circuit is reduced and the waveform precision of a driving signal is reduced. A capacitive load driving circuit in which an amplifier circuit that amplifies a base driving signal and outputs a driving signal for driving a capacitive load includes: a first transistor including a first surface and a second surface that face each other; the second transistor includes a third surface and a fourth surface located opposite each other, the heat dissipation performance of the first heat dissipation member is higher than the heat dissipation performance of the second heat dissipation member, the first surface and the third surface are thermally connected to the first heat dissipation member, the second surface and the fourth surface are thermally connected to the first substrate surface, and the second substrate surface is thermally connected to the second heat dissipation member.

Description

TECHNICAL FIELD

[0001] The present application relates to a capacitive load driving circuit and a liquid ejection apparatus. BACKGROUND

[0002] A liquid ejection apparatus is known, which includes a liquid ejection head including a capacitive load, and a capacitive load driving circuit that supplies a driving signal to the liquid ejection head, and ejects a liquid such as ink by driving the capacitive load with the driving signal. For example, a liquid ejection apparatus is disclosed in Patent Literature 1, which includes a driving signal generating circuit (capacitive load driving circuit) including an analog conversion circuit that specifies a waveform of a driving signal, and a transistor pair that outputs the driving signal based on an output from the analog conversion circuit.

[0003] PRIOR ART DOCUMENTS

[0004] PATENT LITERATURE

[0005] Patent Literature 1: Japanese Patent Application Publication No. 2018-099852 SUMMARY

[0006] PROBLEMS TO BE SOLVED BY THE INVENTION

[0007] The driving signal that drives the liquid ejection head is a signal with a large amplitude, and when the driving signal is supplied to the capacitive load, a large current that can stably drive the capacitive load is accompanied. By the current, sometimes the transistor pair that outputs the driving signal and the analog conversion circuit that specifies the waveform of the driving signal become high temperature, and if the transistor pair and the analog conversion circuit become high temperature, the stability of the operation of the capacitive load driving circuit including the transistor pair and the analog conversion circuit decreases, and the waveform precision of the output driving signal can decrease.

[0008] MEANS FOR SOLVING THE PROBLEMS

[0009] One embodiment of the capacitive load driving circuit according to the present application includes:

[0010] a basic driving signal output circuit that is input with a digital signal and outputs a basic driving signal;

[0011] an amplification circuit that amplifies the basic driving signal and outputs a driving signal that drives the capacitive load;

[0012] a wiring substrate that includes a first substrate surface and a second substrate surface that are located opposite to each other, and is provided with the basic driving signal output circuit and the amplification circuit; and

[0013] a first heat dissipation member and a second heat dissipation member that promote heat dissipation of the amplification circuit,

[0014] The amplification circuit outputs the drive signal through driving of the first transistor and the second transistor,

[0015] The first transistor includes a first surface and a second surface located at positions opposite to each other,

[0016] The second transistor includes a third surface and a fourth surface located at positions opposite to each other,

[0017] The first heat dissipation member has higher heat dissipation performance than the second heat dissipation member,

[0018] The first surface and the third surface are thermally connected to the first heat dissipation member,

[0019] The second surface and the fourth surface are thermally connected to the first substrate surface,

[0020] The second substrate surface is thermally connected to the second heat dissipation member.

[0021] One embodiment of a liquid ejecting apparatus according to the present application includes:

[0022] a liquid ejecting head that ejects liquid by driving a capacitive load; and

[0023] a capacitive load driving circuit that outputs a drive signal for driving the capacitive load,

[0024] The capacitive load driving circuit includes:

[0025] a base drive signal output circuit that is input with a digital signal and outputs a base drive signal;

[0026] an amplification circuit that amplifies the base drive signal and outputs the drive signal for driving the capacitive load;

[0027] a wiring substrate that includes a first substrate surface and a second substrate surface located at positions opposite to each other and is provided with the base drive signal output circuit and the amplification circuit; and

[0028] first and second heat dissipation members that promote heat dissipation of the amplification circuit,

[0029] The amplification circuit outputs the drive signal through driving of the first transistor and the second transistor,

[0030] The first transistor includes a first surface and a second surface located at positions opposite to each other,

[0031] The second transistor includes a third surface and a fourth surface located at positions opposite to each other,

[0032] The heat dissipation performance of the first heat dissipation component is higher than that of the second heat dissipation component.

[0033] The first surface and the third surface are thermally connected to the first heat dissipation component.

[0034] The second and fourth surfaces are thermally connected to the first substrate surface.

[0035] The second substrate surface is thermally connected to the second heat dissipation component. Attached Figure Description

[0036] Figure 1 This is a diagram showing the general structure of a liquid ejection device.

[0037] Figure 2 This is a diagram illustrating an example of the functional structure of an ejection unit.

[0038] Figure 3 This is a diagram showing the schematic structure of one of the multiple ejection sections in the ejection module.

[0039] Figure 4 This is a diagram showing an example of the signal waveforms of the drive signals COMA and COMB.

[0040] Figure 5 This is a diagram showing the functional structure of the drive signal selection circuit.

[0041] Figure 6 This is a diagram representing an example of the decoded content in the decoder.

[0042] Figure 7 This is a diagram showing an example of the structure of a selection circuit corresponding to an ejector section.

[0043] Figure 8 This is a diagram used to illustrate the operation of the drive signal selection circuit.

[0044] Figure 9 This is a diagram illustrating an example of the structure of a drive circuit.

[0045] Figure 10 This is a diagram illustrating an example of the operation of an amplifier control circuit.

[0046] Figure 11 This is a diagram illustrating an example of the structure of a head-driven module.

[0047] Figure 12 This is a diagram illustrating an example of the structure of a drive circuit board.

[0048] Figure 13 This is a diagram illustrating an example of a transistor's structure.

[0049] Figure 14FIG. 1 is a diagram for illustrating an example of a transistor and a heat connection of an integrated circuit and a heat sink.

[0050] Figure 15 FIG. 2 is a diagram showing an example of a cross section of a head driving module in a modification.

[0051] BRIEF DESCRIPTION OF DRAWINGS

[0052] 1: liquid discharge apparatus; 2: control unit; 3: liquid container; 4: conveyance unit; 5: discharge unit; 10: head driving module; 20: liquid discharge module; 23: discharge module; 30: wiring member; 41: conveyance motor; 42: conveyance roller; 50: drive signal output circuit; 52, 52a, 52b: drive circuit; 53: reference voltage output circuit; 60: piezoelectric element; 100: control circuit; 101: integrated circuit; 120: conversion circuit; 200: drive signal selection circuit; 210: selection control circuit; 212: shift register; 214: latch circuit; 216: decoder; 220: restoration circuit; 230: selection circuit; 232a, 232b: inverter; 234a, 234b: transmission gate; 500: integrated circuit; 510: amplification control circuit; 511: memory; 512: latch circuit; 513: adder; 514: latch circuit; 515: D / A converter; 520: drive circuit; 530: amplification circuit; 531: transistor; 531cp: semiconductor chip; 531fa, 531fb, 531fc: lead frame; 531mb, 531md, 531mf: face; 531mo: molding portion; 531ta, 531tb, 531tc: external connection terminal; 532: transistor; 532cp: semiconductor chip; 532fa, 532fb, 532fc: lead frame; 532mb, 532md, 532mf: face; 532mo: molding portion; 532ta, 532tb, 532tc: external connection terminal; 541 to 545: heat conduction member; 600: discharge portion; 601: piezoelectric body; 611, 612: electrode; 621: vibration plate; 631: chamber; 632: nozzle plate; 641: reservoir; 651: nozzle; 661: supply port; 710: heat sink; 711: recessed portion; 712: opening; 713: cooling fan; 715: water cooling mechanism; 720: heat sink; 721: recessed portion; 722 to 724: protruded portion; 800: drive circuit substrate; 810: wiring substrate; 811 to 814: side; 815, 816: face; CN1, CN2: connection portion; P: medium. DETAILED DESCRIPTION

[0053] The following describes preferred embodiments of the present application using the drawings. The drawings used are for ease of explanation. Note that the embodiments described below do not unduly limit the scope of the application described in the claims. Also, not all of the structures described below are essential components of the application.

[0054] 1. Structure of liquid discharge apparatus

[0055] Figure 1 is a diagram showing the schematic structure of a liquid discharge apparatus 1. As shown in Figure 1 , the liquid discharge apparatus 1 is a so-called line-type inkjet printer that forms a desired image on a medium P by discharging ink, which is an example of a liquid, onto the medium P at a desired timing by a transport unit 4. Note that the liquid discharge apparatus 1 is not limited to a line-type inkjet printer, and can be a serial-type inkjet printer. Also, the liquid discharge apparatus 1 is not limited to an inkjet printer, and can be a color material discharge apparatus used in the manufacture of a color filter for liquid crystal displays and the like, an electrode material discharge apparatus used in the formation of electrodes for organic EL displays and FEDs (Field Emission Displays) and the like, a biological organic matter discharge apparatus used in the manufacture of biochips, a stereolithography apparatus, a printing apparatus, and the like. Here, in the following description, the direction in which the medium P is transported is sometimes referred to as the transport direction, and the width direction of the medium P being transported is sometimes referred to as the main scanning direction.

[0056] As shown in Figure 1 , the liquid discharge apparatus 1 includes a control unit 2, a liquid container 3, the transport unit 4, and a plurality of discharge units 5.

[0057] The control unit 2 includes a processing circuit such as a CPU (Central Processing Unit) and an FPGA (Field Programmable Gate Array), and a storage circuit such as a semiconductor memory. The control unit 2 outputs signals that control each element of the liquid discharge apparatus 1 based on image data supplied from an external device such as a host computer not shown that is provided outside the liquid discharge apparatus 1.

[0058] In the liquid container 3, ink, which is an example of a liquid to be supplied to the discharge units 5, is stored. Specifically, in the liquid container 3, a plurality of colors of ink, such as black, cyan, magenta, yellow, red, gray, and the like, that are discharged onto the medium P are stored.

[0059] The conveyance unit 4 has a conveyance motor 41 and a conveyance roller 42. The conveyance control signal Ctrl-T output from the control unit 2 is input to the conveyance unit 4. The conveyance motor 41 operates based on the conveyance control signal Ctrl-T. The conveyance roller 42 is rotationally driven in conjunction with the operation of the conveyance motor 41. Thus, the medium P is conveyed in the conveyance direction.

[0060] The plurality of discharge units 5 each have a head drive module 10 and a liquid discharge module 20. The image information signal IP output from the control unit 2 is input to the discharge unit 5, and ink stored in the liquid container 3 is supplied. Then, the head drive module 10 controls the operation of the liquid discharge module 20 based on the input image information signal IP, and the liquid discharge module 20 discharges the ink supplied from the liquid container 3 toward the medium P. At this time, the liquid discharge modules 20 each possessed by the plurality of discharge units 5 are arranged in the main scanning direction in a manner so as to become wider than the medium P, whereby ink can be discharged to the entire area in the width direction of the conveyed medium P, and a line-type inkjet printer is configured.

[0061] Here, the functional structure of the discharge unit 5 will be described. Figure 2 is a view showing an example of the functional structure of the discharge unit 5. As shown in Figure 2 , the discharge unit 5 has the head drive module 10 and the liquid discharge module 20.

[0062] The head drive module 10 and the liquid discharge module 20 possessed by the discharge unit 5 are electrically connected via a wiring member 30. As the wiring member 30, for example, a flexible wiring substrate (FPC: Flexible Printed Circuits) and a flexible flat cable (FFC: Flexible Flat Cable) can be used. Note that the head drive module 10 and the liquid discharge module 20 can also be a structure in which the above-described FPC and FFC are electrically connected via a B to B (Board to Board) connector instead of or in addition to the above. That is, in the wiring member 30, in addition to the above-described FPC and FFC, a connection member such as a B to B (Board to Board) connector can also be included.

[0063] The head drive module 10 has a control circuit 100, a drive signal output circuit 50-1 to 50-m, and a conversion circuit 120.

[0064] The control circuit 100 has a CPU and an FPGA, or the like. The image information signal IP output from the control unit 2 is input to the control circuit 100. The control circuit 100 outputs a signal that controls each element of the discharge unit 5 based on the input image information signal IP.

[0065] Specifically, the control circuit 100 generates voltage variation amount data dDATA for controlling the operation of the liquid ejection module 20 based on the image information signal IP and outputs to the conversion circuit 120. The conversion circuit 120 converts the voltage variation amount data dDATA into a differential signal such as LVDS (Low Voltage Differential Signaling) and outputs to the liquid ejection module 20 as a data signal DATA. Note that the conversion circuit 120 can also convert the voltage variation amount data dDATA into a differential signal of a high-speed transmission system other than LVDS, such as LVPECL (Low Voltage Positive Emitter Coupled Logic) and CML (Current Mode Logic), and output to the liquid ejection module 20 as a data signal DATA. In addition, the conversion circuit 120 can output part or all of the input voltage variation amount data dDATA to the liquid ejection module 20 as a single-ended data signal DATA.

[0066] In addition, the control circuit 100 outputs digital waveform signals dA1, dB1 to the drive signal output circuit 50-1. The drive signal output circuit 50-1 has drive circuits 52a, 52b. The digital waveform signal dA1 is input to the drive circuit 52a. The drive circuit 52a performs digital / analog conversion on the input digital waveform signal dA1, and then performs AB stage amplification, thereby generating a drive signal COMA1 and outputting to the liquid ejection module 20. The digital waveform signal dB1 is input to the drive circuit 52b. The drive circuit 52b performs digital / analog conversion on the input digital waveform signal dB1, and then performs AB stage amplification, thereby generating a drive signal COMB1 and outputting to the liquid ejection module 20. That is, the digital waveform signals dA1, dB1 are digital signals that specify the signal waveform of the drive signals COMA1, COMB1, and the drive circuits 52a, 52b generate and output the drive signals COMA1, COMB1 by amplifying the signal waveforms specified by the digital waveform signals dA1, dB1.

[0067] Further, the drive signal output circuit 50-1 has a reference voltage output circuit 53. The reference voltage output circuit 53 generates a reference voltage signal VBS1 indicating a constant potential of a reference potential of the piezoelectric element 60 to be described later, which the liquid ejection module 20 has, and outputs to the liquid ejection module 20. The reference voltage signal VBS1 can be, for example, a ground potential, or a constant potential of 5.5 V and 6 V, or the like. Note that, in consideration of errors such as a variation in potential due to an operation of a peripheral circuit, a variation in potential due to a variation in a circuit element, a variation in potential due to a temperature characteristic of a circuit element, and the like, the constant potential includes a case where a potential is considered to be substantially constant.

[0068] The drive signal output circuits 50-2 to 50-m are different only in the signal inputted and the signal outputted, and are the same structure as the drive signal output circuit 50-1. That is, the drive signal output circuit 50-j (j is any one of 1 to m) includes a circuit corresponding to the drive circuits 52a, 52b and a circuit corresponding to the reference voltage output circuit 53. Further, the circuit corresponding to the drive circuits 52a, 52b generates the drive signals COMAj, COMBj based on the digital waveform signals dAj, dBj inputted from the control circuit 100, and outputs to the liquid ejection module 20, and the circuit corresponding to the reference voltage output circuit 53 generates the reference voltage signal VBSj, and outputs to the liquid ejection module 20.

[0069] The liquid ejection module 20 has a restoration circuit 220 and the ejection modules 23-1 to 23-m.

[0070] The data signal DATA outputted from the conversion circuit 120 is inputted to the restoration circuit 220. The restoration circuit 220 restores the inputted data signal DATA to a single-ended signal, and separates into signals corresponding to the ejection modules 23-1 to 23-m respectively, and outputs to the corresponding ejection modules 23-1 to 23-m.

[0071] Specifically, the restoration circuit 220 generates the clock signal SCK1, the print data signal SI1, and the latch signal LAT1 corresponding to the ejection module 23-1 by restoring and separating the data signal DATA, and outputs to the ejection module 23-1. Further, the restoration circuit 220 generates the clock signal SCKj, the print data signal SIj, and the latch signal LATj corresponding to the ejection module 23-j by restoring and separating the data signal DATA, and outputs to the ejection module 23-j.

[0072] That is, the restoration circuit 220 restores the data signal DATA of the differential signal output from the head driving module 10, and separates the restored signal into signals corresponding to the ejection modules 23-1 to 23-m. Thus, the restoration circuit 220 generates the clock signals SCK1 to SCKm, the print data signals SI1 to SIm, and the latch signals LAT1 to LATm each corresponding to the ejection modules 23-1 to 23-m, and outputs them to the corresponding ejection modules 23-1 to 23-m. Note that any one of the clock signals SCK1 to SCKm, the print data signals SI1 to SIm, and the latch signals LAT1 to LATm each corresponding to the ejection modules 23-1 to 23-m output from the restoration circuit 220 can also be a signal common to the ejection modules 23-1 to 23-m.

[0073] Here, in view of the fact that the restoration circuit 220 generates the clock signals SCK1 to SCKm, the print data signals SI1 to SIm, and the latch signals LAT1 to LATm by restoring and separating the data signal DATA, the data signal DATA output from the control circuit 100 is a differential signal corresponding to the clock signals SCK1 to SCKm, the print data signals SI1 to SIm, and the latch signals LAT1 to LATm, and, in addition, the voltage variation amount data dDATA on which the data signal DATA is based contains signals corresponding to the clock signals SCK1 to SCKm, the print data signals SI1 to SIm, and the latch signals LAT1 to LATm, respectively. That is, the voltage variation amount data dDATA contains signals for controlling the operation of the ejection modules 23-1 to 23-m possessed by the liquid ejection module 20. Note that the ejection unit 5 can also be a structure in which the control circuit 100 outputs the clock signals SCK1 to SCKm, the print data signals SI1 to SIm, and the latch signals LAT1 to LATm, respectively, without having the conversion circuit 120 and the restoration circuit 220.

[0074] The ejection module 23-1 has the drive signal selection circuit 200 and a plurality of ejection sections 600. In addition, the plurality of ejection sections 600 each include a piezoelectric element 60.

[0075] The drive signals COMAl, COMBl output from the drive signal output circuit 50-1, the reference voltage signal VBS 1, and the clock signal SCKl, the print data signal SI 1, and the latch signal LATl output from the restoration circuit 220 are input to the ejection module 23-1. The drive signals COMAl, COMBl, the clock signal SCKl, the print data signal SI 1, and the latch signal LATl are input to the drive signal selection circuit 200 possessed by the ejection module 23-1. The drive signal selection circuit 200 generates the drive signal VOUT by selecting or deselecting the signal waveforms included in each of the drive signals COMAl, COMBl based on the input clock signal SCKl, the print data signal SI 1, and the latch signal LATl, and supplies it to one end of the piezoelectric element 60 possessed by the corresponding ejection section 600. At this time, the reference voltage signal VBS 1 is supplied to the other end of the piezoelectric element 60. Then, the piezoelectric element 60 is driven by the potential difference between the drive signal VOUT supplied to the one end and the reference voltage signal VBS 1 supplied to the other end, and ink is ejected from the corresponding ejection section 600.

[0076] The ejection modules 23-2 to 23-m are different only in the signals input thereto and the signals output therefrom, and are the same structure as the ejection module 23-1. That is, the ejection module 23-j has the drive signal selection circuit 200 and a plurality of ejection sections 600, and the plurality of ejection sections 600 each include the piezoelectric element 60. In addition, the drive signals COMAj, COMBj, the reference voltage signal VBSj, the clock signal SCKj, the print data signal SIj, and the latch signal LATj are input to the ejection module 23-j. The drive signal selection circuit 200 generates the drive signal VOUT by selecting or deselecting the signal waveforms included in each of the drive signals COMAj, COMBj based on the input clock signal SCKj, the print data signal SIj, and the latch signal LATj, and supplies it to one end of the piezoelectric element 60 possessed by the corresponding ejection section 600. At this time, the reference voltage signal VBSj is supplied to the other end of the piezoelectric element 60. In addition, the piezoelectric element 60 is driven by the potential difference between the drive signal VOUT supplied to the one end and the reference voltage signal VBSj supplied to the other end, and ink is ejected from the corresponding ejection section 600.

[0077] As described above, in the liquid discharge device 1 of the present embodiment, the control unit 2 controls the conveyance of the medium P by the conveyance unit 4 and controls the discharge of the ink from the liquid discharge module 20 possessed by the discharge unit 5 based on the image data supplied from a host computer or the like not shown, so that a desired amount of ink is landed on a desired position of the medium P, and a desired image is formed on the medium P. That is, the liquid discharge device 1 is provided with the liquid discharge module 20 having the discharge modules 23-1 to 23-m that discharge the ink by driving of the piezoelectric elements 60, and the head drive module 10 having the drive signal output circuits 50-1 to 50-m that output the drive signals COMA1 to COMAm, COMB1 to COMBm that drive the piezoelectric elements 60.

[0078] Here, the drive signal output circuits 50-1 to 50-m are the same structure, and in the following description, the drive signal output circuits 50 are sometimes simply referred to without distinction. Also, in the following description, the drive circuits 52 included in the drive signal output circuits 50-1 to 50-m are sometimes simply referred to without distinction. In this case, a case where the drive circuits 52 input the digital waveform signals dO as the digital waveform signals dA1 to dAm, dB1 to dBm, and the drive circuits 52 generate and output the drive signals COM as the drive signals COMA1 to COMAm, COMB1 to COMBm based on the input digital waveform signals dO is described. On the other hand, in a case where the drive circuits 52a, 52b included in the drive signal output circuits 50-1 to 50-m are distinguished, in the following description, the drive circuits 52a, 52b included in the drive signal output circuit 50-j are sometimes referred to as the drive circuits 52aj, 52bj.

[0079] Also, the reference voltage output circuits 53 included in the drive signal output circuits 50-1 to 50-m are the same structure, and in the following description, the reference voltage output circuits 53 are sometimes simply referred to without distinction. In this case, a case where the reference voltage output circuits 53 generate and output the reference voltage signals VBS as the reference voltage signals VBS1 to VBSm is described. On the other hand, in a case where the reference voltage output circuits 53 included in the drive signal output circuits 50-1 to 50-m are distinguished, in the following description, the reference voltage output circuit 53 included in the drive signal output circuit 50-j is sometimes referred to as the reference voltage output circuit 53-j.

[0080] In addition, the ejection modules 23-1 to 23-m are the same structure, and in the following description, the ejection module 23 is sometimes simply referred to in cases where there is no need to distinguish. In this case, a case where the ejection module 23 is inputted with SCK as a clock signal SCK1 to SCKm, SI as a print data signal SI1 to SIm, LAT as a latch signal LAT1 to LATm, COMA as a drive signal COMA1 to COMAm, COMB as a drive signal COMB1 to COMBm, and VBS as a reference voltage signal VBS1 to VBSm as a clock signal SCK1 to SCKm is described.

[0081] Here, an example of the structure of the ejection section 600 possessed by the ejection module 23 is described. Figure 3 is a diagram showing the schematic structure of one of the plurality of ejection sections 600 possessed by the ejection module 23. As shown in Figure 3 , the ejection section 600 includes a piezoelectric element 60, a vibration plate 621, a chamber 631, and a nozzle 651.

[0082] In the chamber 631, ink supplied from a reservoir 641 is filled. In addition, ink is introduced to the reservoir 641 from the liquid container 3 via an ink tube and a supply port 661, which are not shown. That is, in the chamber 631, ink stored in the corresponding liquid container 3 is filled.

[0083] The vibration plate 621 is displaced by driving of the piezoelectric element 60 provided on the upper surface in Figure 3 . In addition, as the vibration plate 621 is displaced, the internal volume of the chamber 631 filled with ink expands and contracts. That is, the vibration plate 621 functions as a diaphragm that changes the internal volume of the chamber 631.

[0084] The nozzle 651 is an opening provided to a nozzle plate 632 and communicates with the chamber 631. By the change in the internal volume of the chamber 631, ink in an amount corresponding to the change in the internal volume is ejected from the nozzle 651.

[0085] The piezoelectric element 60 is a structure in which a piezoelectric body 601 is sandwiched by a pair of electrodes 611, 612. The piezoelectric body 601 of such a structure flexes the central portion of the electrodes 611, 612 together with the vibration plate 621 in the up-and-down direction in accordance with a potential difference of a signal supplied to the electrodes 611, 612. Ink in an amount corresponding to the deformation of the piezoelectric element 60 and the vibration plate 621 is ejected.

[0086] Specifically, one end of the piezoelectric element 60, i.e., one of the electrode 611 or the electrode 612 is supplied with the drive signal VOUT, and the other end of the piezoelectric element 60, i.e., the other of the electrode 611 or the electrode 612 is supplied with the reference voltage signal VBS. When the voltage value of the drive signal VOUT becomes high, the piezoelectric element 60 is deflected upward. In addition, by the piezoelectric element 60 being deflected upward, the vibrating plate 621 is displaced, and the internal volume of the chamber 631 is expanded. As a result, ink is introduced from the reservoir 641. On the other hand, when the voltage value of the drive signal VOUT becomes low, the piezoelectric element 60 is deflected downward. In addition, by the piezoelectric element 60 being deflected downward, the vibrating plate 621 is displaced, and the internal volume of the chamber 631 is reduced. As a result, an amount of ink corresponding to the degree of reduction is ejected from the nozzle 651. That is, the ejection section 600 includes the piezoelectric element 60 that is driven by the drive signal VOUT based on the drive signal COM, and ink is ejected by driving the piezoelectric element 60.

[0087] Note that the structure of the piezoelectric element 60 is only required to be a structure that can eject ink from the ejection section 600 by driving, and is not limited to Figure 3 the structure of the bending vibration shown in the drawing, and can be, for example, a structure using longitudinal vibration. In addition, the piezoelectric element 60 can be a structure that is deflected downward by the voltage value of the drive signal VOUT becoming high, and is deflected upward by the voltage value of the drive signal VOUT becoming low.

[0088] 2. Functional structure of drive signal selection circuit

[0089] Next, the structure and operation of the drive signal selection circuit 200 possessed by the ejection module 23 will be described. In describing the structure and operation of the drive signal selection circuit 200 possessed by the ejection module 23, first, an example of the signal waveform included in the drive signals COMA and COMB input to the drive signal selection circuit 200 will be described.

[0090] Figure 4 is a drawing showing an example of the signal waveform of the drive signals COMA and COMB. As Figure 4As illustrated, the drive signal COMA includes a drive waveform Adp disposed in the period T from the rise of the latch signal LAT to the rise of the next latch signal LAT. The drive waveform Adp is a signal waveform that causes a prescribed amount of ink to be ejected from the ejection section 600 corresponding to the piezoelectric element 60 by being supplied to one end of the piezoelectric element 60. The drive signal COMB includes a drive waveform Bdp disposed in the period T. The drive waveform Bdp is a signal waveform having a voltage amplitude smaller than that of the drive waveform Adp, and is a signal waveform that causes a smaller amount of ink than the prescribed amount to be ejected from the ejection section 600 corresponding to the piezoelectric element 60 by being supplied to one end of the piezoelectric element 60. Further, the voltage value of the drive waveform Adp, Bdp in each of the start timing and the end timing of the drive waveforms Adp, Bdp is the same at the voltage Vc. That is, the drive waveforms Adp, Bdp are signal waveforms that start at the voltage Vc and end at the voltage Vc, respectively.

[0091] Here, in the following description, the amount of ink ejected from the ejection section 600 corresponding to the piezoelectric element 60 is sometimes referred to as a large amount in the case where the drive waveform Adp is supplied to one end of the piezoelectric element 60, and is sometimes referred to as a small amount in the case where the drive waveform Bdp is supplied to one end of the piezoelectric element 60.

[0092] Note that the signal waveforms included in the drive signals COMA, COMB are not limited to Figure 4 The signal waveforms illustrated are examples, and various signal waveforms can be used depending on the kind of ink ejected from the ejection section 600, the number of piezoelectric elements 60 driven by the drive signals COMA, COMB, the length of the wiring through which the drive signals COMA, COMB are transmitted, and the like. For example, the drive signals COMA1 to COMAm can each include a different signal waveform, and the drive signals COMB1 to COMBm can each include a different signal waveform. Further, for example, each of the drive signals COMA, COMB can include two or more consecutive drive waveforms in the period T. In this case, the drive signal selection circuit 200 is inputted a signal that specifies the switching timing of the two or more drive waveforms, and the ejection section 600 ejects ink multiple times in the period T. Further, the ink ejected multiple times in the period T lands on the medium P and combines, thereby forming one dot on the medium P. Further, for example, the drive signals COMA, COMB are signal waveforms for vibrating the ink in the vicinity of the opening of the nozzle 651 in order to reduce the likelihood of an increase in the viscosity of the ink in the vicinity of the opening of the nozzle 651, and can include so-called micro-vibration waveforms.

[0093] Here, in the following explanation, the period T from the rise of the latch signal LAT to the rise of the next latch signal LAT is sometimes referred to as the point formation period for forming a point of the desired size on the medium P.

[0094] Next, the structure and operation of the drive signal selection circuit 200, which generates and outputs the drive signal VOUT by selecting or not selecting the signal waveforms contained in the drive signals COMA and COMB respectively, will be explained. Figure 5 This is a diagram illustrating the functional structure of the drive signal selection circuit 200. For example... Figure 5 As shown, the drive signal selection circuit 200 includes a selection control circuit 210 and multiple selection circuits 230. Here, in the following description, the case where the ejection module 23 has n ejection sections 600 is described as multiple ejection sections 600.

[0095] The selection control circuit 210 receives the printing data signal SI, the latch signal LAT, and the clock signal SCK. Furthermore, the selection control circuit 210 has a group of shift registers (S / R) 212, latch circuits 214, and decoders 216 corresponding to each of the n ejector sections 600. That is, the drive signal selection circuit 200 includes the same number of n shift registers 212, n latch circuits 214, and n decoders 216 as the number of ejector sections 600.

[0096] The printing data signal SI is a signal synchronized with the clock signal SCK, and contains 2 bits of printing data [SIH, SIL] for specifying the dot size formed by ink ejected from each of the n ejector units 600 in any of the three options: "large dot LD", "small dot SD", and "non-ejection ND". This printing data signal SI is maintained in shift register 212 corresponding to the ejector unit 600 in 2-bit increments of printing data [SIH, SIL].

[0097] Specifically, n shift registers 212 corresponding to the ejector section 600 are cascaded together. The serially input printing data signal SI is sequentially transmitted to the next stage of the cascaded shift registers 212 according to the clock signal SCK. Furthermore, by stopping the supply of the clock signal SCK, two bits of printing data [SIH, SIL] corresponding to the ejector section 600 of that shift register 212 are held in the n shift registers 212. It should be noted that... Figure 5 In order to distinguish the cascaded n shift registers 212, they are labeled as level 1, level 2, ..., level n from the upstream side of the input printed data signal SI toward the downstream side.

[0098] Each of the n latching circuits 214 latches together the 2 bits of printed data [SIH, SIL] held by the corresponding shift register 212 on the rising edge of the latch signal LAT.

[0099] Each of the n decoders 216 decodes the 2-bit printed data [SIH, SIL] latched by the corresponding latch circuit 214, and outputs a selection signal S1, S2 of a logic level corresponding to the decoded content per cycle T. Figure 6 is a view showing an example of the decoded content in the decoder 216. The decoder 216 outputs a selection signal S1, S2 of a logic level specified by the decoded content of the latched 2-bit printed data [SIH, SIL] and Figure 6 For example, the decoder 216 sets the logic levels of the respective selection signals S1, S2 to L and H levels in cycle T in the case where the 2-bit printed data [SIH, SIL] latched by the corresponding latch circuit 214 is [1, 0]. Note that in Figure 6 , the printed data [SIH, SIL] = [0, 0] and the printed data [SIH, SIL] = [0, 1] are collectively shown as the printed data [SIH, SIL] = [0, *].

[0100] The selection circuit 230 is provided corresponding to each of the n ejection sections 600. That is, the drive signal selection circuit 200 has n selection circuits 230. The selection signals S1, S2 output from the decoders 216 corresponding to the same ejection section 600 and the drive signals COMA, COMB are input to the selection circuit 230. Then, the selection circuit 230 generates a drive signal VOUT by selecting or not selecting the signal waveforms included in the respective drive signals COMA, COMB according to the selection signals S1, S2, and outputs the drive signal VOUT to the corresponding ejection section 600.

[0101] Figure 7 is a view showing an example of the structure of the selection circuit 230 corresponding to one ejection section 600. As shown in Figure 7 , the selection circuit 230 has inverters 232a, 232b and transmission gates 234a, 234b.

[0102] The selection signal S1 is input to the positive control terminal of the transmission gate 234a on which no circular mark is marked, and on the other hand, is input to the negative control terminal of the transmission gate 234a on which a circular mark is marked, after being logically inverted by the inverter 232a. In addition, the drive signal COMA is supplied to the input terminal of the transmission gate 234a. The transmission gate 234a makes the input terminal and the output terminal conductive in the case where the input selection signal S1 is at the H level, and makes the input terminal and the output terminal non-conductive in the case where the input selection signal S1 is at the L level. That is, the transmission gate 234a outputs the drive signal COMA to the output terminal in the case where the selection signal S1 is at the H level, and does not output the drive signal COMA to the output terminal in the case where the selection signal S1 is at the L level.

[0103] The selection signal S2 is input to the positive control terminal of the transmission gate 234b which is not marked with a circle, and on the other hand, is logically inverted by the inverter 232b and is input to the negative control terminal of the transmission gate 234b which is marked with a circle. In addition, the drive signal COMB is supplied to the input terminal of the transmission gate 234b. The transmission gate 234b makes the input terminal and the output terminal conductive in the case where the input selection signal S2 is at the H level, and makes the input terminal and the output terminal non-conductive in the case where the input selection signal S2 is at the L level. That is, the transmission gate 234b outputs the drive signal COMB to the output terminal in the case where the selection signal S2 is at the H level, and does not output the drive signal COMB to the output terminal in the case where the selection signal S2 is at the L level.

[0104] The output terminals of the transmission gates 234a, 234b are commonly connected. The drive signals COMA, COMB which are selected or non-selected by the selection signals S1, S2 are supplied to the output terminals of the commonly connected transmission gates 234a, 234b. The selection circuit 230 outputs the signal supplied to the commonly connected output terminals as the drive signal VOUT to the corresponding ejection section 600.

[0105] The operation of the drive signal selection circuit 200 will be described. Figure 8 is a view for explaining the operation of the drive signal selection circuit 200. The print data signal SI is serially input in synchronization with the clock signal SCK, and is sequentially transferred by the shift register 212 corresponding to the ejection section 600. Also, by stopping the input of the clock signal SCK, the 2-bit print data [SIH, SIL] corresponding to each of the ejection sections 600 is held in the corresponding shift register 212.

[0106] Then, when the latch signal LAT rises, the 2-bit print data [SIH, SIL] held in the shift register 212 are all latched by the latch circuit 214. Note that, in Figure 8 in FIG. 8, the 2-bit print data [SIH, SIL] corresponding to the 1st, 2nd,..., nth shift registers 212 which are latched by the latch circuit 214 are illustrated as LT1, LT2,..., LTn.

[0107] The decoder 216 outputs the selection signals S1, S2 of the logic level in accordance with the dot size specified by the latched 2-bit print data [SIH, SIL].

[0108] Specifically, the decoder 216 outputs the logic levels of the selection signals S1, S2 as H, L levels to the selection circuit 230 in the period T in the case where the print data [SIH, SIL] = [1, 1]. As a result, the selection circuit 230 selects the drive waveform Adp in the period T and outputs the drive signal VOUT corresponding to the "large dot LD". In addition, the decoder 216 outputs the logic levels of the selection signals S1, S2 as L, H levels to the selection circuit 230 in the period T in the case where the print data [SIH, SIL] = [1, 0]. As a result, the selection circuit 230 selects the drive waveform Bdp in the period T and outputs the drive signal VOUT corresponding to the "small dot SD". Furthermore, the decoder 216 outputs the logic levels of the selection signals S1, S2 as L, L levels to the selection circuit 230 in the period T in the case where the print data [SIH, SIL] = [0, 1] and in the case where the print data [SIH, SIL] = [0, 0]. As a result, the selection circuit 230 does not select any one of the drive waveforms Adp, Bdp in the period T and outputs the drive signal VOUT corresponding to the constant "no ejection ND" at the voltage Vc.

[0109] Here, in the case where the selection circuit 230 does not select any one of the drive waveforms Adp, Bdp, the voltage Vc previously supplied to the piezoelectric element 60 is maintained by the capacitive component of the piezoelectric element 60 at one end of the corresponding piezoelectric element 60. That is, the selection circuit 230 outputs the constant drive signal VOUT at the voltage Vc, including the case where the previous voltage Vc maintained by the capacitive component of the piezoelectric element 60 is supplied to the piezoelectric element 60 as the drive signal VOUT in the case where none of the drive waveforms Adp, Bdp is selected as the drive signal VOUT.

[0110] As described above, the drive signal selection circuit 200 generates the drive signals VOUT corresponding to the plurality of ejection sections 600 respectively by selecting or not selecting the drive signals COMA, COMB on the basis of the print data signal SI, the latch signal LAT, and the clock signal SCK, and outputs them to the corresponding ejection sections 600. Thereby, the amounts of ink ejected from the plurality of ejection sections 600 respectively are individually controlled.

[0111] 3. Structure of drive circuit

[0112] Next, the structure and operation of the drive circuit 52 that outputs the drive signals COMA, COMB will be described. Figure 9 is a diagram showing an example of the structure of the drive circuit 52. As shown in Figure 9 the drive circuit 52 has an amplification control circuit 510, a drive circuit 520, and an amplification circuit 530.

[0113] The amplification control circuit 510 has a memory 511, a latch circuit 512, an adder 513, a latch circuit 514, and a D / A converter 515. In addition, in the amplification control circuit 510, the digital waveform signal dO output from the control circuit 100, the voltage variation amount data dDATA, a latch signal dLAT, and a clock signal dCK are input.

[0114] The voltage variation amount data dDATA is input to the memory 511. The memory 511 holds the voltage variation amount information Dv contained in the input voltage variation amount data dDATA. The latch signal dLAT is input to the latch circuit 512. The latch circuit 512 latches the voltage variation amount information Dv held by the memory 511 at the rising edge of the input latch signal dLAT. Then, the latch circuit 512 outputs the latched voltage variation amount information Dv to the adder 513.

[0115] In the adder 513, in addition to the voltage variation amount information Dv output from the latch circuit 512, a signal output from the latch circuit 514 described later is input. The adder 513 calculates and holds added voltage variation amount information obtained by adding the voltage variation amount information Dv and the signal output from the latch circuit 514.

[0116] The clock signal dCK is input to the latch circuit 514. The latch circuit 514 latches the added voltage variation amount information held by the adder 513 at the rising edge of the clock signal dCK. Then, the latch circuit 514 outputs the latched added voltage variation amount information to the adder 513 and the D / A converter 515. That is, the adder 513 calculates and holds new added voltage variation amount information by adding the voltage variation amount information Dv latched by the latch circuit 512 and the added voltage variation amount information latched by the latch circuit 514.

[0117] The D / A converter 515 converts the added voltage variation amount information output from the latch circuit 514 into an analog signal, and outputs it as a drive waveform signal WS to the drive circuit 520. The drive waveform signal WS output from the D / A converter 515, that is, a signal waveform obtained by amplifying the voltage value of the drive waveform signal WS output from the amplification control circuit 510 corresponds to the signal waveform of the drive signal COM.

[0118] Here, the operation of the amplification control circuit 510 outputting the drive waveform signal WS will be described. Figure 10 is a view showing an example of the operation of the amplification control circuit 510. As shown in FIG. 10, the voltage variation amount data dDATA is input to the memory 511. The memory 511 holds the voltage variation amount information Dv contained in the input voltage variation amount data dDATA. Figure 10As shown, at time tO, the control circuit 100 generates, as a digital waveform signal dO, voltage change amount data dDATA containing voltage change amount information Dvl for changing the voltage value by a voltage AVl, and outputs it to the memory 511. As a result, the voltage change amount information Dvl is held in the memory 511.

[0119] Then, at time tl, the control circuit 100 sets the logic level of the latch signal dLAT as the digital waveform signal dO to the high level. As a result, the voltage change amount information Dvl held in the memory 511 is latched by the latch circuit 512. At a later time t3, the control circuit 100 outputs, as the digital waveform signal dO, voltage change amount data dDATA containing voltage change amount information Dvo for maintaining the voltage value constant, to the memory 511. That is, in the memory 511, the voltage change amount information Dvl is replaced by the voltage change amount information Dvo.

[0120] The voltage change amount information Dvl latched by the latch circuit 512 at time tl is input to the adder 513. The adder 513 adds the voltage change amount information Dvl latched by the latch circuit 512 to the addition voltage change amount information output from the latch circuit 514, and holds it as new addition voltage change amount information.

[0121] In addition, the control circuit 100 generates, as the digital waveform signal dO, a clock signal dCK which becomes the H level every period ΔT, and outputs it to the latch circuit 514. Then, at times t2, t4, t5, when the clock signal dCK of the H level is input to the latch circuit 514, the latch circuit 514 latches the addition voltage change amount information in which the voltage value is increased by the voltage AVl every time the clock signal dCK of the H level is input, and outputs it to the D / A converter 515. As a result, the D / A converter 515 generates and outputs, at times t2, t4, t5, the drive waveform signal WS in which the voltage value is increased by the voltage AVl.

[0122] At a later time t6, the control circuit 100 sets the logic level of the latch signal dLAT as the digital waveform signal dO to the high level. As a result, the voltage change amount information Dvo for maintaining the voltage value held in the memory 511 constant is latched by the latch circuit 512. In addition, at a later time t8, the control circuit 100 generates, as the digital waveform signal dO, voltage change amount data dDATA containing voltage change amount information Dv2 for changing the voltage value by a voltage -ΔV2, and outputs it to the memory 511. That is, in the memory 511, the voltage change amount information Dvo is replaced by the voltage change amount information Dv2.

[0123] The voltage change amount information Dv0 latched by the latch circuit 512 is input to the adder 513. The adder 513 adds the voltage change amount information Dv0 latched by the latch circuit 512 to the added voltage change amount information output from the latch circuit 514, and holds it as new added voltage change amount information.

[0124] In addition, at times t7, t9, the clock signal dCK of the H level is input to the latch circuit 514. At this time, the voltage change amount information Dv0 latched by the latch circuit 512 is information for holding the voltage value constant. Therefore, the latch circuit 514 latches the added voltage change amount information in which the voltage value does not change even if the clock signal dCK of the H level is input, and outputs it to the D / A converter 515. Thereby, the D / A converter 515 generates and outputs the drive waveform signal WS of which the voltage value is constant at times t7, t9.

[0125] Then, at time t10, the control circuit 100 sets the logic level of the latch signal dLAT to the high level as the digital waveform signal dO. Thereby, the voltage change amount information Dv2 for making the voltage value of the voltage -ΔV2 held in the memory 511 change is latched by the latch circuit 512.

[0126] The voltage change amount information Dv2 latched by the latch circuit 512 is input to the adder 513. Then, the adder 513 adds the voltage change amount information Dv2 latched by the latch circuit 512 to the added voltage change amount information output from the latch circuit 514, and holds it as new added voltage change amount information.

[0127] In addition, the control circuit 100 generates the clock signal dCK of the H level per cycle ΔT as the digital waveform signal dO, and outputs it to the latch circuit 514. Then, at times t11, t12, if the clock signal dCK of the H level is input to the latch circuit 514, the latch circuit 514 latches the added voltage change amount information in which the voltage value is decreased by the voltage ΔV2 every time the clock signal dCK of the H level is input, and outputs it to the D / A converter 515. Thereby, the D / A converter 515 generates and outputs the drive waveform signal WS of which the voltage value is decreased by the voltage ΔV2 at times t11, t12.

[0128] As described above, the amplification control circuit 510 outputs the drive waveform signal WS of which the voltage value is increased, the drive waveform signal WS of which the voltage value is decreased, and the drive waveform signal WS of which the voltage value is constant, based on the digital waveform signal dO. That is, the amplification control circuit 510 can output the drive waveform signal WS of which the signal waveform corresponds to the digital waveform signal dO output by the control circuit 100.

[0129] Here, in the liquid ejecting apparatus 1 of the present embodiment, the case where the voltage variation amount data dDATA included in the digital waveform signal dO input to the amplification control circuit 510 is data indicating the variation amount of the voltage value of the drive waveform signal WS in each period of the clock signal dCK is described, but the voltage variation amount data dDATA included in the digital waveform signal dO can also be data indicating the absolute value of the voltage value of the drive waveform signal WS in each period of the clock signal dCK.

[0130] By setting the voltage variation amount data dDATA included in the digital waveform signal dO as data indicating the variation amount of the voltage value of the drive waveform signal WS in each period of the clock signal dCK, the data amount of the voltage variation amount data dDATA included in the digital waveform signal dO can be reduced, as a result of which the transmission speed of the voltage variation amount data dDATA included in the digital waveform signal dO can be accelerated. On the other hand, in the case where the voltage variation amount data dDATA included in the digital waveform signal dO is set as data indicating the absolute value of the voltage value of the drive waveform signal WS in each period of the clock signal dCK, the amplification control circuit 510 does not need to have the adder 513 and the latch circuit 514, as a result of which the miniaturization of the amplification control circuit 510 can be achieved.

[0131] Returning to Figure 9 , the drive circuit 520 inputs the drive waveform signal WS output from the amplification control circuit 510 and a voltage signal Vamp of a prescribed voltage value input to the amplification circuit 530. Here, the voltage value of the voltage signal Vamp is equal to or greater than the maximum value of the voltage values of the drive waveforms Adp, Bdp included in the drive signals COMA, COMB, and is, for example, a direct current voltage of 42 V. The drive circuit 520 voltage-amplifies the voltage value of the input drive waveform signal WS based on the voltage signal Vamp, thereby generating an amplified drive waveform signal. The waveform shape of this amplified drive waveform signal becomes the waveform shape of the drive waveforms Adp, Bdp included in the drive signals COMA, COMB. Then, the drive circuit 520 generates the amplification control signals Hdr, Ldr based on the generated amplified drive waveform signal, and outputs to the amplification circuit 530.

[0132] Specifically, the drive circuit 520 generates an amplification control signal Hdr obtained by adding a bias voltage of a prescribed voltage value to the amplification drive waveform signal, and an amplification control signal Ldr obtained by subtracting the bias voltage of the prescribed voltage value from the amplification drive waveform signal, and outputs them to the amplification circuit 530. Here, the voltage value of the bias voltage added by the drive circuit 520 to the amplification drive waveform signal is determined in accordance with the voltage value of the base-emitter saturation voltage of the transistor 531 possessed by the amplification circuit 530 described later, and the voltage value of the bias voltage subtracted by the drive circuit 520 from the amplification drive waveform signal is determined in accordance with the voltage value of the base-emitter saturation voltage of the transistor 532 possessed by the amplification circuit 530 described later. As a result, the possibility of distortion occurring in the signal waveform of the drive signal COM output from the drive circuit 52 is reduced. Such a drive circuit 520 is constituted, for example, by an operational amplifier or the like that voltage-amplifies the voltage value of the drive waveform signal WS based on the voltage signal Vamp.

[0133] The amplification circuit 530 includes a transistor 531 and a transistor 532. The transistor 531 is an NPN-type bipolar transistor, and the transistor 532 is a PNP-type bipolar transistor. At this time, it is preferable for the transistor 531 and the transistor 532 to constitute a complementary pair.

[0134] The voltage signal Vamp is input to the collector terminal of the transistor 531. The amplification control signal Hdr is input to the base terminal of the transistor 531. The emitter terminal of the transistor 531 is electrically connected to the emitter terminal of the transistor 532. The amplification control signal Ldr is input to the base terminal of the transistor 532. The ground potential Gnd is input to the collector terminal of the transistor 532. Furthermore, the amplification circuit 530 outputs, as the drive signal COM, the signal of the connection point Cout that connects the emitter terminal of the transistor 531 and the emitter terminal of the transistor 532.

[0135] In such an amplification circuit 530, in the case where the voltage value of the drive waveform signal WS rises, that is, in the case where the voltage value of the amplification drive waveform signal generated by the drive circuit 520 rises, the collector terminal and the emitter terminal of the transistor 531 are controlled to be in conduction, and the emitter terminal and the collector terminal of the transistor 532 are controlled to be in non-conduction. As a result, a current based on the voltage signal Vamp is supplied to the plurality of piezoelectric elements 60 connected to the connection point Cout via the transistor 531. As a result, the voltage value of the connection point Cout, that is, the voltage value of the drive signal COM output from the amplification circuit 530, rises in a manner that follows the voltage value of the amplification drive waveform signal generated by the drive circuit 520, by the capacitive component of the piezoelectric elements 60.

[0136] In addition, in a case where the voltage value of the drive waveform signal WS is reduced, that is, in a case where the voltage value of the amplified drive waveform signal generated by the drive circuit 520 is reduced, the collector terminal and the emitter terminal of the transistor 531 are controlled to be non-conductive, and the emitter terminal and the collector terminal of the transistor 532 are controlled to be conductive. Thereby, the electric charge accumulated in the plurality of piezoelectric elements 60 connected to the connection point Cout is discharged to the ground potential Gnd via the transistor 532. As a result, the voltage value of the connection point Cout, that is, the voltage value of the drive signal COM output by the amplification circuit 530, is reduced in a manner to follow the voltage value of the amplified drive waveform signal generated by the drive circuit 520.

[0137] In addition, in a case where the voltage value of the drive waveform signal WS is constant, that is, in a case where the voltage value of the amplified drive waveform signal generated by the drive circuit 520 is constant, the collector terminal and the emitter terminal of the transistor 531 are controlled to be non-conductive, and the emitter terminal and the collector terminal of the transistor 532 are controlled to be non-conductive. Thereby, the voltage value of the connection point Cout, that is, the voltage value of the drive signal COM output by the amplification circuit 530, is maintained by the capacitive component of the piezoelectric element 60 connected to the connection point Cout. That is, the voltage value of the connection point Cout, that is, the voltage value of the drive signal COM output by the amplification circuit 530, is maintained as a voltage value equivalent to the voltage value of the amplified drive waveform signal generated by the drive circuit 520.

[0138] As described above, in the liquid ejecting apparatus 1 of the present embodiment, the drive circuit 52 has the amplification control circuit 510, the drive circuit 520, and the amplification circuit 530, the amplification control circuit 510 outputs the drive waveform signal WS of the signal waveform of the prescribed drive signal COM based on the digital waveform signal dO as a digital signal, the drive circuit 520 generates the amplified drive waveform signal by voltage-amplifying the drive waveform signal WS. Then, the amplification circuit 530 outputs as the drive signal COM by current-amplifying the amplified drive waveform signal. Thereby, even in a case where the ejecting module 23 has a plurality of piezoelectric elements 60, the drive circuit 52 can output the drive signal COM capable of supplying an amount of electric current that can stably drive the plurality of piezoelectric elements 60 to that extent.

[0139] That is, the drive circuit 52al has an amplification control circuit 510 to which the digital waveform signal dAl is input and which outputs a drive waveform signal WS, and an amplification circuit 530 that amplifies the drive waveform signal WS and outputs a drive signal COMAl, and the drive circuit 52bl has an amplification control circuit 510 to which the digital waveform signal dB 1 is input and which outputs a drive waveform signal WS, and an amplification circuit 530 that amplifies the drive waveform signal WS and outputs a drive signal COMB 1. Similarly, the drive circuits 52a2 to 52am each have an amplification control circuit 510 to which a corresponding digital waveform signal dA2 to dAm is input and which outputs a drive waveform signal WS, and an amplification circuit 530 that amplifies the drive waveform signal WS and outputs a corresponding drive signal COMA2 to COMAm, and the drive circuits 52b2 to 52bm each have an amplification control circuit 510 to which a corresponding digital waveform signal dB2 to dBm is input and which outputs a drive waveform signal WS, and an amplification circuit 530 that amplifies the drive waveform signal WS and outputs a corresponding drive signal COMB2 to COMBm. That is, the head drive module 10 is provided with a plurality of amplification control circuits 510 and a plurality of amplification circuits 530.

[0140] At this time, the plurality of amplification circuits 530 included in the head drive module 10 each include transistors 531, 532 that are bipolar transistors, and the drive waveform signal WS is amplified by the transistors 531, 532 to output a drive signal COM. That is, the plurality of amplification circuits 530 included in the liquid ejecting apparatus 1 of the present embodiment each constitute an AB stage amplification circuit.

[0141] In this case, in the liquid ejecting apparatus 1 of the present embodiment, the drive circuit 520 included in the drive circuit 52 and the amplification control circuit 510 are configured as one integrated circuit 500. By this, the drive circuit 52 can be made small in size. At this time, a part of the circuit configuring the amplification control circuit 510 and the drive circuit 520 can also be configured outside the integrated circuit 500. In this case, the amplification control circuit 510 and the drive circuit 520 included in one drive circuit 52 and the amplification control circuit 510 and the drive circuit 520 included in a different drive circuit 52 can also be mounted in one integrated circuit 500, among the plurality of drive circuits 52 included in the head drive module 10. That is, the amplification control circuit 510 and the drive circuit 520 included in the drive circuit 52a included in the drive signal output circuit 50-j and the amplification control circuit 510 and the drive circuit 520 included in the drive circuit 52b included in the drive signal output circuit 50-j can also be configured by one integrated circuit 500, and the amplification control circuit 510 and the drive circuit 520 included in the drive circuit 52a included in the drive signal output circuit 50-1 and the amplification control circuit 510 and the drive circuit 520 included in the drive circuit 52a included in the drive signal output circuit 50-j can also be configured by one integrated circuit 500. In the liquid ejecting apparatus 1 of the present embodiment, the case where the amplification control circuit 510 and the drive circuit 520 included in the drive circuit 52a included in the drive signal output circuit 50-j and the amplification control circuit 510 and the drive circuit 520 included in the drive circuit 52b included in the drive signal output circuit 50-j are configured by one integrated circuit 500 is exemplified.

[0142] 4. Configuration of head drive module

[0143] In the drive circuit 52 configured as described above, in the case where the number of piezoelectric elements 60 driven by the drive signal COM increases, the amount of current generated in conjunction with the transmission of the drive signal COM increases, and the amount of heat generated increases. In particular, in the head drive module 10 having a plurality of drive circuits 52 as in the liquid ejecting apparatus 1 of the present embodiment, since the plurality of drive circuits 52 are densely arranged, the heat generated by the plurality of drive circuits 52 concentrates, and a local temperature increase can occur. The temperature increase generated by such a head drive module 10 can decrease the stability of the operation of the head drive module 10 including the plurality of drive circuits 52, and in the case where the stability of the operation of the head drive module 10 decreases, the stability of the operation of the liquid ejecting module 20 controlled to operate by the head drive module 10 also decreases, as a result, the ejection precision of the ink from the liquid ejecting module 20 decreases.

[0144] In the liquid ejecting apparatus 1 of the present embodiment, in order to address this problem, the head driving module 10 has a characteristic structure in which the heat dissipation performance of efficiently discharging the heat generated by the driving circuits 52 is excellent. Thus, the likelihood of the operation stability of the head driving module 10 being reduced due to the heat generated by the plurality of driving circuits 52 is reduced. As a result, the likelihood of the operation stability of the liquid ejecting module 20 being reduced is reduced, and the likelihood of the precision of ejecting ink from the liquid ejecting module 20 being reduced is also reduced.

[0145] A specific example of the structure of the head driving module 10 having excellent heat dissipation performance will be described. Figure 11 is a diagram showing an example of the structure of the head driving module 10. Here, in the following description, a case in which the liquid ejecting module 20 is six ejecting modules 23, i.e., the ejecting modules 23-1 to 23-6, will be described. Thus, a case in which the head driving module 10 has the driving signal output circuits 50-1 to 50-6 corresponding to the ejecting modules 23-1 to 23-6, respectively, will be described. In addition, in the following description, the X axis, the Y axis, and the Z axis that are orthogonal to each other will be described. At this time, the side of the starting point of the arrow along the X axis shown in the drawing will be sometimes referred to as the -X side, and the front end side will be referred to as the +X side. The side of the starting point of the arrow along the Y axis shown in the drawing will be sometimes referred to as the -Y side, and the front end side will be referred to as the +Y side. The side of the starting point of the arrow along the Z axis shown in the drawing will be sometimes referred to as the -Z side, and the front end side will be referred to as the +Z side.

[0146] As shown in Figure 11 , the head driving module 10 has a driving circuit substrate 800 and heat sinks 710, 720.

[0147] The driving circuit substrate 800 has a wiring substrate 810 and various circuits including the connection portions CN1, CN2, the integrated circuit 101, and the driving signal output circuits 50-1 to 50-6 mounted on the wiring substrate 810.

[0148] The heat sink 710 has a recess 711 that is open at the -Z side, and is located at the +Z side of the drive circuit board 800. The heat sink 720 has a recess 721 that is open at the -Z side, and is located at the -Z side of the drive circuit board 800. In addition, the drive circuit board 800 is housed in a space formed by the recess 711 of the heat sink 710 and the recess 721 of the heat sink 720. In other words, the drive circuit board 800, which includes the wiring board 810, and the various circuits including the connection portions CN1, CN2, the integrated circuit 101, and the drive signal output circuits 50-1 to 50-6 mounted on the wiring board 810, is housed in the space formed by the recess 711 of the heat sink 710 and the recess 721 of the heat sink 720. The drive circuit board 800 and the various circuits included in the drive circuit board 800 are cooled by both the heat sink 710 and the heat sink 720. In other words, the cooling of the drive circuit board 800 and the various circuits included in the drive circuit board 800 is promoted by both the heat sink 710 and the heat sink 720. Therefore, heat generated by the drive circuit board 800 is efficiently dissipated. As such a heat sink 710, 720, from the viewpoint of efficiently dissipating heat generated by the drive circuit board 800, it is preferable that a material made of a metal having high thermal conductivity, such as aluminum, iron, copper, or the like, be used.

[0149] In addition, the heat sink 710 has an opening 712 that communicates a surface at the +Z side with the recess 711, and a cooling fan 713 mounted on the opening 712. The cooling fan 713 sends an air current to the recess 711 of the heat sink 710 via the opening 712. Thus, the cooling fan 713 promotes the cooling of the drive circuit board 800 housed in the space formed by the recess 711 and the recess 721. That is, since the heat sink 710 has the cooling fan 713, the heat dissipation of the heat sink 710 is higher than that of the heat sink 720. Here, the heat dissipation of the heat sink 710 is higher than that of the heat sink 720, and is not limited to the structure in which the cooling fan 713 is used, for example, a case in which the thermal conductivity of a material used for the heat sink 710 is higher than that of a material used for the heat sink 720, a case in which an area that contributes to heat dissipation in the heat sink 710 is larger than an area that contributes to heat dissipation in the heat sink 720, a case in which a heat capacity that contributes to heat dissipation in the heat sink 710 is larger than a heat capacity that contributes to heat dissipation in the heat sink 720, and the like.

[0150] As described above, the head driving module 10 has the various circuits provided on the drive circuit board 800, that is, the plurality of amplification control circuits 510 included in the drive signal output circuits 50-1 to 50-6 included in the drive circuit board 800, and the heat sink 710 and the heat sink 720 that promote the heat dissipation of the plurality of amplification circuits 530.

[0151] Here, a specific example of the structure of the drive circuit board 800 including the wiring substrate 810, the connection portions CN1, CN2, the integrated circuit 101, and the drive signal output circuits 50-1 to 50-6 mounted on the wiring substrate 810 will be described. Figure 12 is a view showing an example of the structure of the drive circuit board 800. As shown in Figure 12 , the drive circuit board 800 has the wiring substrate 810, the drive signal output circuits 50-1 to 50-6, the connection portions CN1, CN2, and the integrated circuit 101.

[0152] The wiring substrate 810 is a substantially rectangular plate-like member including an edge 811 extending along the Y axis, an edge 812 located on the +X side of the edge 811 and extending along the Y axis, an edge 813 intersecting the edges 811, 812 and extending along the X axis, and an edge 814 located on the -Y side of the edge 813 and intersecting the edges 811, 812 and extending along the X axis. The drive signal output circuits 50-1 to 50-6, the connection portions CN1, CN2, and the integrated circuit 101 are mounted on the wiring substrate 810. In the following description, in the wiring substrate 810 which is a plate-like member extending in a plane formed by the X axis and the Y axis, a face located on the +Z side is referred to as a face 815, and a face located on the -Z side is referred to as a face 816. That is, the head driving module 10 has the wiring substrate 810 including the faces 815 and 816 located at positions opposite to each other along the Z axis, and the drive circuit 52a, 52b included in the drive signal output circuits 50-1 to 50-6 each has the amplification control circuit 510 and the amplification circuit 530.

[0153] The connection portion CN1 is provided on the face 815 of the wiring substrate 810 at a position along the edge 811. An unillustrated cable electrically connected to the control unit 2 is mounted on the connection portion CN1. Thus, various signals including the image information signal IP output from the control unit 2 are supplied to the head driving module 10 via the connection portion CN1. Note that the connection portion CN1 is not limited to the structure in which the cable transmitting the various signals including the image information signal IP is mounted, and may, for example, be a BtoB connector directly electrically connecting the head driving module 10 and the control unit 2.

[0154] The connection portion CN2 is provided on the face 815 of the wiring substrate 810 at a position along the edge 812. One end of the wiring member 30 is mounted on the connection portion CN2. The other end of the wiring member 30 is connected to the liquid ejecting module 20. Thus, various signals including the drive signals COMA1 to COMA6, COMB1 to COMB6 and the data signal DATA output from the head driving module 10 are supplied to the liquid ejecting module 20 via the connection portion CN2.

[0155] The integrated circuit 101 is provided on the face 815 of the wiring substrate 810 on the +X side of the connection portion CN1, that is, on the -X side of the connection portion CN2. In the integrated circuit 101, a part or all of the control circuit 100 described above is mounted. That is, the image information signal IP input via the connection portion CN1 is input to the integrated circuit 101, and the integrated circuit 101 generates and outputs various signals based on the input image information signal IP. Here, in the integrated circuit 101, a part or all of the conversion circuit 120 described above can be mounted in addition to the control circuit 100. Note that, in the liquid ejecting apparatus 1 of the present embodiment, a case in which all of the control circuit 100 and all of the conversion circuit 120 are mounted in the integrated circuit 101 is described.

[0156] The drive signal output circuits 50-1 to 50-6 are arranged between the integrated circuit 101 and the connection portion CN2 in the wiring substrate 810.

[0157] Specifically, the drive signal output circuits 50-1 to 50-3 among the drive signal output circuits 50-1 to 50-6 are arranged in order of the drive signal output circuit 50-1, the drive signal output circuit 50-2, and the drive signal output circuit 50-3 along the X axis between the integrated circuit 101 and the connection portion CN2 from the edge 811 toward the edge 812. In addition, the drive signal output circuits 50-4 to 50-6 among the drive signal output circuits 50-1 to 50-6 are arranged in order of the drive signal output circuit 50-4, the drive signal output circuit 50-5, and the drive signal output circuit 50-6 along the X axis between the integrated circuit 101 and the connection portion CN2, that is, on the edge 813 side of the drive signal output circuits 50-1 to 50-3 from the edge 811 toward the edge 812.

[0158] In the drive signal output circuit 50-1, the transistors 531, 532 included in the drive circuit 52a are arranged on the face 815 of the wiring substrate 810 along the X axis with the transistor 531 on the edge 811 side and the transistor 532 on the edge 812 side, and the transistors 531, 532 included in the drive circuit 52b are arranged on the face 815 of the wiring substrate 810 on the +Y side of the transistors 531, 532 included in the drive circuit 52a along the X axis with the transistor 531 on the edge 811 side and the transistor 532 on the edge 812 side.

[0159] In addition, in the drive signal output circuit 50-1, the integrated circuit 500 including the drive circuit 520 and the amplification control circuit 510 included in the drive circuit 52a and the drive circuit 520 and the amplification control circuit 510 included in the drive circuit 52b are mounted, and in a case where the wiring substrate 810 is viewed in a direction along the Z axis, the integrated circuit 500 is disposed on the face 816 of the wiring substrate 810 between the transistor 531 and the transistor 532 included in the drive circuit 52a of the drive signal output circuit 50-1, that is, between the transistor 531 and the transistor 532 included in the drive circuit 52b of the drive signal output circuit 50-1. That is, the integrated circuit 500 included in the drive signal output circuit 50-1 and the transistors 531, 532 included in the drive circuit 52a and the transistors 531, 532 included in the drive circuit 52b included in the drive signal output circuit 50-1 are mounted on different faces of the wiring substrate 810, and the integrated circuit 500 included in the drive signal output circuit 50-1 is disposed between the transistors 531, 532 included in the drive circuit 52a included in the drive signal output circuit 50-1, that is, between the transistors 531, 532 included in the drive circuit 52b included in the drive signal output circuit 50-1.

[0160] In other words, the amplification circuit 530 included in the drive circuit 52a including the transistors 531, 532 is disposed on the face 815 of the wiring substrate 810, and the amplification control circuit 510 included in the drive circuit 52a mounted on the integrated circuit 500 is disposed on the face 816 of the wiring substrate 810. At this time, the integrated circuit 500 including the amplification control circuit 510 is disposed between the transistors 531, 532 included in the amplification circuit 530 in a normal direction of the wiring substrate 810, that is, in a case where the wiring substrate 810 is viewed in a direction along the Z axis.

[0161] Similarly, in each of the drive signal output circuits 50-2 to 50-6, the transistors 531, 532 included in the drive circuit 52a are disposed on the face 815 of the wiring substrate 810 in a manner that the transistor 531 is on the side of the edge 811 and the transistor 532 is on the side of the edge 812, and are arranged along the X axis, and the transistors 531, 532 included in the drive circuit 52b are disposed on the face 815 of the wiring substrate 810 on the +Y side of the transistors 531, 532 included in the drive circuit 52a in a manner that the transistor 531 is on the side of the edge 811 and the transistor 532 is on the side of the edge 812, and are arranged along the X axis.

[0162] In addition, in each of the drive signal output circuits 50-2 to 50-6, the integrated circuit 500 including the drive circuit 520 and the amplification control circuit 510 included in the drive circuit 52a and the integrated circuit 500 including the drive circuit 520 and the amplification control circuit 510 included in the drive circuit 52b are mounted between the transistor 531 and the transistor 532 included in the drive circuit 52a possessed by the corresponding drive signal output circuit 50-2 to 50-6, that is, between the transistor 531 and the transistor 532 included in the drive circuit 52b possessed by the corresponding drive signal output circuit 50-2 to 50-6, on the face 816 of the wiring substrate 810 when the wiring substrate 810 is viewed in the direction along the Z axis. That is, in each of the drive signal output circuits 50-2 to 50-6, the integrated circuit 500 and the transistors 531, 532 included in the drive circuit 52a and the transistors 531, 532 included in the drive circuit 52b possessed by the corresponding drive signal output circuit 50-2 to 50-6 are mounted on different faces of the wiring substrate 810, and the integrated circuit 500 is located between the transistors 531, 532 included in the drive circuit 52a possessed by the corresponding drive signal output circuit 50-2 to 50-6, that is, between the transistors 531, 532 included in the drive circuit 52b.

[0163] In other words, the transistors 531, 532 possessed by the amplification circuit 530 included in each of the plurality of drive circuits 52 possessed by the head driving module 10 are provided on the face 815 of the wiring substrate 810, and not on the face 816 of the wiring substrate 810, and the integrated circuit 500 including the amplification control circuit 510 included in each of the plurality of drive circuits 52 possessed by the head driving module 10 is provided on the face 816 of the wiring substrate 810, and not on the face 815 of the wiring substrate 810. That is, in the liquid ejecting apparatus 1 of the present embodiment, the transistors 531, 532 possessed by the amplification circuit 530 included in each of the plurality of drive circuits 52 possessed by the head driving module 10 are all provided on the face 815 of the wiring substrate 810, and the integrated circuit 500 including the amplification control circuit 510 included in each of the plurality of drive circuits 52 possessed by the head driving module 10 are all provided on the face 816 of the wiring substrate 810.

[0164] In the drive circuit substrate 800 configured as described above, the image information signal IP input via the connection portion CN1 is supplied to the integrated circuit 101. The control circuit 100 and the conversion circuit 120 included in the integrated circuit 101 generate the digital waveform signals dA1 to dA6, dB1 to dB6 and the data signal DATA based on the image information signal IP, and output from the integrated circuit 101. The digital waveform signals dA1 to dA6, dB1 to dB6 output from the integrated circuit 101 are transmitted in a not-illustrated wiring pattern included in the wiring substrate 810, and input to the corresponding drive circuits 52. The drive circuits 52 generate and output the corresponding drive signals COMA1 to COMA6, COMB1 to COMB6 based on the input digital waveform signals dA1 to dA6, dB1 to dB6, respectively. In addition, a plurality of signals including the drive signals COMA1 to COMA6, COMB1 to COMB6 output by the plurality of drive circuits 52 and the data signal DATA output by the integrated circuit 101 are supplied to the liquid ejection module 20 via the connection portion CN2. Thereby, the operation of the liquid ejection module 20 is controlled by the head drive module 10, that is, the ejection of ink from the liquid ejection module 20.

[0165] Here, in the liquid ejection apparatus 1 of the present embodiment, a case where the integrated circuit 101 including the control circuit 100 is mounted on the wiring substrate 810 together with the plurality of drive circuits 52 is exemplified, but the integrated circuit 101 can be mounted on a not-illustrated substrate different from the drive circuits 52. In a case where the integrated circuit 101 and the plurality of drive circuits 52 are mounted on a common substrate as in the liquid ejection apparatus 1 of the present embodiment, it is possible to shorten the wiring length of signals transmitted between the plurality of drive circuits 52 and the integrated circuit 101. Thereby, the possibility of noise and the like being superimposed on signals transmitted between the plurality of drive circuits 52 and the integrated circuit 101 is reduced, and the waveform accuracy of various signals including the drive signals COM output by the plurality of drive circuits 52 is improved. On the other hand, the amount of heat generated by the plurality of drive circuits 52 is larger than the amount of heat generated by the integrated circuit 101. By mounting the plurality of drive circuits 52 and the integrated circuit 101 having such a large amount of heat generated thereon on different substrates, the possibility of heat generated by the plurality of drive circuits 52 acting on the integrated circuit 101 is reduced. As a result, the possibility of the stability of the operation of the integrated circuit 101 being reduced is reduced.

[0166] In addition, in the head drive module 10 included in the liquid ejection apparatus 1 of the present embodiment, Figure 12The drive circuit board 800 shown in this way is housed in a space formed by a recess 711 of the heat sink 710 located on the +Z side of the drive circuit board 800 and a recess 721 of the heat sink 720 located on the -Z side of the drive circuit board 800. At this time, heat generated by the drive circuit board 800, including heat generated by the transistors 531, 532 and the integrated circuit 500 possessed by the drive circuit board 800, is emitted from both the +Z side and the -Z side of the drive circuit board 800 via the heat sinks 710, 720. Thus, in the liquid ejecting apparatus 1 of the present embodiment, the likelihood of a decrease in the stability of the operation of the head driving module 10 due to heat generated by the plurality of drive circuits 52 possessed by the head driving module 10 is reduced. Therefore, the likelihood of a decrease in the stability of the operation of the liquid ejecting module 20 controlled by the head driving module 10 is also reduced, and the likelihood of a decrease in the precision of the ejection of ink from the liquid ejecting module 20 is also reduced.

[0167] Here, an example of the heat dissipation structure of the drive circuit 52 in the head driving module 10 possessed by the liquid ejecting apparatus 1 of the present embodiment, i.e., an example of the thermal connection of the transistors 531, 532 and the integrated circuit 500 in the head driving module 10 to the heat sink 710 and the heat sink 720, will be described. Here, "thermal connection" includes, in addition to a state in which two or more components are connected in a manner that promotes the movement of heat, i.e., a state in which the two components are in physical contact with each other, a state in which one or more inclusions having excellent thermal conductivity are provided between the two components and connected via the inclusions, i.e., a state in which a gap of 100 μm or less exists between the two components, and the like. In addition, as the "inclusion having excellent thermal conductivity" for thermal connection, any substance having high thermal conductivity can be used, but a substance having high thermal conductivity in addition to flame retardancy, electrical insulation, and concave-convex followability is preferable, and, for example, a conductive grease and a gel sheet, a rubber sheet, or the like containing silicone and an acrylic resin and having high thermal conductivity can be used.

[0168] In describing a specific example of the thermal connection relationship of the transistors 531, 532 and the integrated circuit 500 in the head driving module 10 to the heat sink 710 and the heat sink 720, first, an example of the structure of the transistors 531, 532 included in the drive circuit 52 will be described. As described above, in the liquid ejecting apparatus 1 of the present embodiment, the transistor 531 is an NPN-type bipolar transistor, the transistor 532 is a PNP-type bipolar transistor, and the transistor 531 and the transistor 532 constitute a complementary pair. Therefore, the transistor 531 and the transistor 532 differ only in the type of semiconductor element mounted thereon, and have the same structure. In the following description, only the structure of the transistor 531 will be described in detail using the drawings, the structure of the transistor 532 will be omitted from the drawings, and the description thereof will be simplified or omitted.

[0169] Figure 13 is a diagram showing an example of the structure of the transistor 531. As shown in Figure 13 , the transistor 531 has a molded portion 531mo, lead frames 531fa, 531fb, 531fc, a semiconductor chip 531cp, and external connection terminals 531ta, 531tb, 531tc.

[0170] The molded portion 531mo has a face 531mb having the largest area in the molded portion 531mo and a face 531mf located at a position opposite to the face 531mb and having an area equal to or next to that of the face 531mb in the molded portion 531mo. That is, the transistor 531 includes the face 531mb and the face 531mf, the face 531mb has a larger area than the face 531mf, and the face 531mb and the face 531mf are located at positions opposite to each other. Further, the lead frames 531fa, 531fb, 531fc and the semiconductor chip 531cp are provided inside the molded portion 531mo. That is, the molded portion 531mo is formed so as to cover the lead frames 531fa, 531fb, 531fc and the semiconductor chip 531cp. Such a molded portion 531mo is composed of, for example, a flame-retardant epoxy resin and functions as a protection member for protecting the semiconductor chip 531cp provided inside from external gases and impacts. Note that the molded portion 531mo is not limited to the case where it is composed of a single material, and for example, the face 531mb can be composed of a tin-based alloy material and a copper-based alloy material from the viewpoint of improving heat dissipation, in which case the tin-based alloy material and the copper-based alloy material constituting the face 531mb can be integrally composed with the lead frame 531fb described later.

[0171] The lead frame 531fb is composed of a material with a copper alloy material as a base material. The lead frame 531fb includes a flat plate extending along a plane formed by at least one of the surface 531mb and the surface 531mf inside the molding portion 531mo, the flat plate being located in a position closer to the surface 531mb than to the surface 531mf. That is, the lead frame 531fb is located in a position where the thermal resistance between the lead frame 531fb and the surface 531mb is smaller than the thermal resistance between the lead frame 531fb and the surface 531mf. On the lead frame 531fb, the semiconductor chip 531cp as an NPN type bipolar transistor element is mounted. At this time, the semiconductor chip 531cp is fixed to the lead frame 531fb, for example, by a high melting point solder or the like. Thus, the semiconductor chip 531cp is electrically connected to the lead frame 531fb. That is, the transistor 531 includes the semiconductor chip 531cp, and inside the molding portion 531mo, the semiconductor chip 531cp is fixed to the lead frame 531fb, so that the thermal resistance between the semiconductor chip 531cp and the surface 531mb becomes smaller than the thermal resistance between the semiconductor chip 531cp and the surface 531mf.

[0172] In addition, the lead frame 531fa and the lead frame 531fc provided inside the molding portion 531mo are each composed of a material with a copper alloy material as a base material. The lead frame 531fa and the lead frame 531fc are each electrically connected to the semiconductor chip 531cp by an unillustrated bonding wire such as an aluminum wire and a gold wire. Thus, inside the molding portion 531mo, the base electrode, the collector electrode, and the emitter electrode of the semiconductor chip 531cp as an NPN type bipolar transistor element are each electrically connected to the corresponding lead frame 531fa, 531fb, 531fc.

[0173] The external connection terminals 531ta, 531tb, 531tc are connection terminals provided outside the molding portion 531mo in order to mount the transistor 531 on the wiring substrate 810, and are composed of a material with a copper alloy material as a base material.

[0174] The external connection terminal 531ta is integrally formed with the lead frame 531fa, and extends from the face 531md of the molding portion 531mo to the outside of the molding portion 531mo. The external connection terminal 531tb is integrally formed with the lead frame 531fb, and extends from the face 531md to the outside of the molding portion 531mo. The external connection terminal 531tc is integrally formed with the lead frame 531fc, and extends from the face 531md to the outside of the molding portion 531mo. That is, the external connection terminals 531ta, 531tb, 531tc function as the base terminal, the collector terminal, and the emitter terminal of the transistor 531, and extend from the face 531md of the molding portion 531mo to the direction away from the molding portion 531mo. At this time, on the external connection terminals 531ta, 531tb, 531tc, the faces extending along the face 531mf are subjected to the molding process to extend in the direction away from the molding portion 531mo, as shown in FIG. 30. Figure 13

[0175] Here, in the liquid ejecting apparatus 1 of the present embodiment, the case where the base electrode of the semiconductor chip 531cp is electrically connected to the lead frame 531fa, the collector electrode of the semiconductor chip 531cp is electrically connected to the lead frame 531fb, and the emitter electrode of the semiconductor chip 531cp is electrically connected to the lead frame 531fc is described. That is, the case where the external connection terminal 531ta corresponds to the base terminal of the transistor 531, the external connection terminal 531tb corresponds to the collector terminal of the transistor 531, and the external connection terminal 531tc corresponds to the emitter terminal of the transistor 531 is described. Note that the relationship of each of the external connection terminals 531ta, 531tb, 531tc to the base terminal, the emitter terminal, and the collector terminal of the transistor 531 is not limited to this.

[0176] As described above, in the liquid ejecting apparatus 1 of the present embodiment, the transistor 531 included in each of the drive circuits 52a, 52b possessed by each of the drive signal output circuits 50-1 to 50-6 is a so-called SIP (Single In-line Package) type bipolar transistor in which the external connection terminals 531ta, 531tb, 531tc electrically connected to the wiring substrate 810 are arranged in a row on the face 531md of the molding portion 531mo, and is molded into a prescribed shape on the external connection terminals 531ta, 531tb, 531tc extending from the face 531md of the molding portion 531mo to the direction away from the molding portion 531mo, and is mounted on the face 815 of the wiring substrate 810.

[0177] ​In this case, as described above, the transistor 531 and the transistor 532 have the same structure. That is, the transistor 532 has a molded portion 532mo, a face 532mb, 532mf, 532md, a lead frame 532fa, 532fb, 532fc, a semiconductor chip 532cp, and external connection terminals 532ta, 532tb, 532tc, which respectively correspond to the molded portion 531mo, the faces 531mb, 531mf, 531md, the lead frames 531fa, 531fb, 531fc, the semiconductor chip 531cp, and the external connection terminals 531ta, 531tb, 531tc of the transistor 531. At this time, the area of the face 532mb included in the transistor 532 is larger than the area of the face 532mf, and the face 532mb and the face 532mf are located at positions opposite to each other. In addition, the transistor 532 includes the semiconductor chip 532cp inside the molded portion 532mo, and the semiconductor chip 532cp is fixed to the lead frame 532fb inside the molded portion 532mo, whereby the thermal resistance between the semiconductor chip 532cp and the face 532mb becomes smaller than the thermal resistance between the semiconductor chip 532cp and the face 532mf. In addition, the external connection terminals 532ta, 532tb, 532tc electrically connected to the wiring substrate 810 of the transistor 532 are arranged in a row on the face 532md of the molded portion 532mo. That is, the transistor 532 is a SIP-type bipolar transistor. In addition, the transistor 532 is molded into a prescribed shape on the external connection terminals 532ta, 532tb, 532tc extending from the face 532md of the molded portion 532mo, and is mounted on the face 815 of the wiring substrate 810.

[0178] Figure 14 is a view for explaining an example of the thermal connection of the transistor 531, 532, and the integrated circuit 500 to the heat sink 710 and the heat sink 720. In this case, Figure 14 is a cross-sectional view in the case where the head driving module 10 is cut in a manner that the transistor 531, 532, and the integrated circuit 500 of one of the plurality of driving circuits 52 included in the head driving module 10 are cut.

[0179] As shown in Figure 14 , in the head driving module 10, the driving circuit substrate 800 is housed in the space formed by the recess 711 and the recess 721 in a manner that the face 815 of the wiring substrate 810 is the +Z side and the face 816 of the wiring substrate 810 is the -Z side. In addition, the transistor 531, 532, and the integrated circuit 500 are mounted on the wiring substrate 810 included in the driving circuit substrate 800.

[0180] The transistor 531 is disposed on the face 815 of the wiring board 810 with the molded portion 531mo on the -X side, the external connection terminals 531ta, 531tb, 531tc on the +X side, and at least a portion of the face 531mf in contact with the face 815. In addition, the external connection terminals 531ta, 531tb, 531tc are electrically connected to the wiring board 810 by solder or the like, and thus the transistor 531 is mounted on the wiring board 810. The transistor 532 is disposed on the face 815 of the wiring board 810 with the molded portion 532mo on the +X side, the external connection terminals 532ta, 532tb, 532tc on the -X side, and at least a portion of the face 532mf in contact with the face 815. In addition, the external connection terminals 532ta, 532tb, 532tc are electrically connected to the wiring board 810 by solder or the like, and thus the transistor 532 is mounted on the wiring board 810. That is, the transistor 531 and the transistor 532 are mounted on the face 815 of the wiring board 810 with the external connection terminals 531ta, 531tb, 531tc and the external connection terminals 532ta, 532tb, 532tc facing each other.

[0181] At least a portion of the integrated circuit 500 is disposed between the transistor 531 and the transistor 532 from the direction along the Z axis, and is mounted on the face 816 of the wiring board 810. At this time, the integrated circuit 500 is mounted on the face 816 of the wiring board 810 with at least a portion of the integrated circuit 500 overlapping at least a portion of the transistor 531 and at least a portion of the transistor 532 from the direction along the Z axis.

[0182] Here, the transistor 531 and the transistor 532 are mounted on the face 815 of the wiring board 810 with the external connection terminals 531ta, 531tb, 531tc and the external connection terminals 532ta, 532tb, 532tc facing each other. Therefore, the integrated circuit 500 is mounted on the face 816 of the wiring board 810 with the external connection terminals 531ta, 531tb, 531tc and the external connection terminals 532ta, 532tb, 532tc therebetween from the direction along the Z axis. Thus, it is possible to shorten the wiring length of the amplification control signal Hdr output from the integrated circuit 500 to the transistor 531 and the wiring length of the amplification control signal Ldr output from the integrated circuit 500 to the transistor 532. As a result, the possibility of noise or the like overlapping the amplification control signals Hdr, Ldr is reduced, and the drive control of the transistors 531, 532 is improved. Therefore, the waveform accuracy of the drive signal COM output from the drive circuit 52 is improved, and the accuracy of the ink ejected from the liquid ejection module 20 is improved.

[0183] The heat sink 720 is located on the -Z side of the drive circuit board 800, that is, on the side of the face 816 of the wiring board 810. The heat sink 720 includes protrusions 722, 723, 724 that protrude toward the +Z side.

[0184] The protrusion 722 is formed in correspondence with the transistor 531. Specifically, in a case where the head driving module 10 is viewed in a direction along the Z axis, the protrusion 722 is located at a position at which at least a portion thereof overlaps at least a portion of the face 531mf of the transistor 531. In addition, in the direction along the Z axis, the heat conduction member 543 that is the above-described interposed member is located between the wiring board 810 and the protrusion 722. In addition, in a state in which the drive circuit board 800 is housed in the space formed by the recess 711 and the recess 721, the protrusion 722 is in contact with one face of the heat conduction member 543, the other face of the heat conduction member 543 is in contact with the face 816 of the wiring board 810, and the face 531mf of the transistor 531 is in contact with a region of the face 815 that opposes the face 816 along the Z axis with which the heat conduction member 543 is in contact. That is, the protrusion 722, the face 531mf, and the heat conduction member 543 are located at a position at which at least a portion thereof overlaps, as viewed in the direction along the Z axis. Thus, the protrusion 722 and the face 531mf of the transistor 531 are thermally connected via the heat conduction member 543 and the wiring board 810. Therefore, heat generated by the transistor 531 is efficiently transmitted to the heat sink 720 via the wiring board 810 and the heat conduction member 543. Thus, the heat dissipation efficiency of the heat generated by the transistor 531 is improved.

[0185] Here, as described above, the heat conduction member 543 that is the interposed member is a substance that has a high thermal conductivity and that has flame retardancy, electrical insulation, and concave-convex followability, and, for example, a conductive grease and a gel sheet, a rubber sheet, or the like is preferably used. Thus, the heat conduction member 543 functions not only as a heat conduction member that transmits heat generated by the transistor 531 to the heat sink 720 but also as a member that insulates the wiring board 810 from the heat sink 720 and a member that improves the tightness between the wiring board 810 and the heat sink 720.

[0186] As described above, the surface 531mf of transistor 531 is thermally connected to the surface 815 of wiring substrate 810, and the surface 816 of wiring substrate 810 is thermally connected to heat sink 720. Therefore, heat sink 720 is thermally connected to amplifier circuit 530 including transistor 531 via wiring substrate 810. Thus, the heat generated by transistor 531, i.e., the heat generated by amplifier circuit 530 including transistor 531, is efficiently transferred to heat sink 720 and released to the outside. At this time, the liquid ejection device 1 of this embodiment has a heat conduction member 543, which is located between heat sink 720 and wiring substrate 810, i.e., between the protrusion 722 of heat sink 720 and surface 816 of wiring substrate 810, and is in contact with both heat sink 720 and wiring substrate 810. That is, surface 816 of wiring substrate 810 and heat sink 720 are thermally and physically connected via the insulating heat conduction member 543. This improves the heat dissipation efficiency between the surface 816 of the wiring substrate 810 and the heat sink 720, and also improves the insulation performance between the surface 816 of the wiring substrate 810 and the heat sink 720.

[0187] More preferably, when the drive circuit board 800 is housed in the space formed by the recesses 711 and 721, and when viewing the head drive module 10 from the Z-axis direction, the entire protrusion 722 is located at a position that overlaps with at least a portion of the surface 531mf of the transistor 531, or at least a portion of the protrusion 722 is located at a position that completely overlaps with the surface 531mf of the transistor 531. As a result, the heat generated by the transistor 531 is transferred to the heat sink 720 more efficiently via the wiring board 810 and the heat conduction member 543. Consequently, the heat dissipation efficiency generated by the transistor 531 is further improved.

[0188] In addition, such as Figure 12 As shown, multiple transistors 531 are arranged side-by-side along the Y-axis on surface 815 of the wiring substrate 810. The heat sink 720 may include either a protrusion 722 corresponding to each of the multiple transistors 531 arranged side-by-side along the Y-axis, or several common protrusions 722 for the multiple transistors 531 arranged side-by-side along the Y-axis. Alternatively, continuous cuts and through holes may be formed on the protrusions 722 along the X-axis from the -X side to the +X side. This allows gas, including the airflow from the cooling fan 713, to circulate efficiently within the space formed by the recesses 711 and 721. Therefore, the cooling efficiency in the head drive module 10 is improved.

[0189] The protrusion 723 is formed in correspondence with the transistor 532. Specifically, in a case where the head driving module 10 is viewed in a direction along the Z-axis, the protrusion 723 is located at a position at which at least a portion thereof overlaps at least a portion of the face 532mf of the transistor 532. In addition, in the direction along the Z-axis, the heat conduction member 544, which is the above-described inclusions, is located between the wiring substrate 810 and the protrusion 723. Also, in a state in which the driving circuit substrate 800 is housed in the space formed by the recess 711 and the recess 721, the protrusion 723 is in contact with one face of the heat conduction member 544, the other face of the heat conduction member 544 is in contact with the face 816 of the wiring substrate 810, and the face 532mf of the transistor 532 is in contact with the region of the face 815 of the transistor 532 which opposes the face 816 along the Z-axis which is in contact with the heat conduction member 544. That is, the protrusion 723, the face 532mf, and the heat conduction member 544 are located at a position at which at least a portion thereof overlaps, as viewed in the direction along the Z-axis. Due to this, the protrusion 723 and the face 532mf of the transistor 532 are thermally connected via the heat conduction member 544 and the wiring substrate 810. Therefore, the heat generated by the transistor 532 is efficiently transmitted to the heat sink 720 via the wiring substrate 810 and the heat conduction member 544. Therefore, the emission efficiency of the heat generated by the transistor 532 is improved.

[0190] Here, as described above, the heat conduction member 544, which is the inclusions, is a substance having a high thermal conductivity, and has flame retardancy, electrical insulation, and concave-convex following properties, and, for example, a conductive grease and a gel sheet, a rubber sheet, or the like is preferably used. Due to this, the heat conduction member 544 functions as a member which insulates between the wiring substrate 810 and the heat sink 720, and a member which improves the tightness between the wiring substrate 810 and the heat sink 720, in addition to functioning as a member which transmits the heat generated by the transistor 532 to the heat sink 720.

[0191] As described above, the surface 532mf of transistor 532 is thermally connected to the surface 815 of wiring substrate 810, and the surface 816 of wiring substrate 810 is thermally connected to heat sink 720. Therefore, heat sink 720 is thermally connected to amplifier circuit 530 including transistor 532 via wiring substrate 810. Thus, the heat generated by transistor 532, i.e., the heat generated by amplifier circuit 530 including transistor 532, is efficiently transferred to heat sink 720 and released to the outside. At this time, the liquid ejection device 1 of this embodiment has a heat conduction member 544, which is located between heat sink 720 and wiring substrate 810, i.e., between the protrusion 723 of heat sink 720 and surface 816 of wiring substrate 810, and is in contact with both heat sink 720 and wiring substrate 810. That is, surface 816 of wiring substrate 810 and heat sink 720 are thermally and physically connected via the insulating heat conduction member 544. This improves the heat dissipation efficiency between the surface 816 of the wiring substrate 810 and the heat sink 720, and also improves the insulation performance between the surface 816 of the wiring substrate 810 and the heat sink 720.

[0192] More preferably, when the drive circuit board 800 is housed in the space formed by the recesses 711 and 721, and when viewing the head drive module 10 in the Z-axis direction, the entire protrusion 723 is located at a position that overlaps with at least a portion of the surface 532mf of the transistor 532, or at least a portion of the protrusion 723 is located at a position that completely overlaps with the surface 532mf of the transistor 532. As a result, the heat generated by the transistor 532 is transferred to the heat sink 720 more efficiently via the wiring board 810 and the heat conduction member 544. Consequently, the heat dissipation efficiency generated by the transistor 532 is further improved.

[0193] In addition, such as Figure 12 As shown, multiple transistors 532 are arranged side-by-side along the Y-axis on surface 815 of the wiring substrate 810. The heat sink 720 may include either a protrusion 723 corresponding to each of the multiple transistors 532 arranged side-by-side along the Y-axis, or several common protrusions 723 for the multiple transistors 532 arranged side-by-side along the Y-axis. Alternatively, continuous cuts and through holes along the X-axis from the -X side to the +X side of the protrusion 723 may be formed on the protrusion 723. This allows gas, including the airflow delivered by the cooling fan 713, to circulate efficiently within the space formed by the recesses 711 and 721. Therefore, the cooling efficiency in the head drive module 10 is improved.

[0194] The protrusion 724 is formed in correspondence with the integrated circuit 500. Specifically, the protrusion 724 is positioned between the protrusion 722 and the protrusion 723 when the head driving module 10 is viewed in the direction along the Y-axis, that is, at least a portion of the protrusion 724 overlaps at least a portion of the integrated circuit 500 when the head driving module 10 is viewed in the direction along the Z-axis. In addition, in the direction along the Z-axis, the heat conduction member 545 as the above-described intercalation is positioned between the integrated circuit 500 and the protrusion 724. Also, in a state where the driving circuit substrate 800 is housed in the space formed by the recess 711 and the recess 721, the protrusion 724 is in contact with one face of the heat conduction member 545, and the other face of the heat conduction member 545 is in contact with the integrated circuit 500. That is, the protrusion 724, the integrated circuit 500, and the heat conduction member 545 are positioned at least in a portion thereof overlaps when viewed in the direction along the Z-axis. Thus, the protrusion 724 and the integrated circuit 500 are thermally connected via the heat conduction member 545. Therefore, the heat generated by the integrated circuit 500 is efficiently transferred to the heat sink 720 via the heat conduction member 545. Thus, the heat generated by the integrated circuit 500 is improved in the efficiency of emission.

[0195] Here, as described above, the heat conduction member 545 as the intercalation is a substance having high thermal conductivity, and having flame retardancy, electrical insulation, and concave-convex following properties, and for example, it is preferable to use a conductive grease and a gel sheet, a rubber sheet, or the like. Thus, the heat conduction member 545 functions as a member that insulates between the integrated circuit 500 and the heat sink 720, and a member that improves the tightness between the integrated circuit 500 and the heat sink 720, in addition to functioning as a heat conduction member that transfers the heat generated by the integrated circuit 500 to the heat sink 720.

[0196] As described above, the integrated circuit 500 is thermally connected to the heat sink 720. In other words, the head driving module 10 has the heat sink 720 thermally connected to the amplification control circuit 510 included in the integrated circuit 500. Thus, the heat generated by the integrated circuit 500, that is, the heat generated by the amplification control circuit 510 mounted in the integrated circuit 500 is efficiently transferred to the heat sink 720, and emitted to the outside. At this time, in the liquid ejecting apparatus 1 of the present embodiment, the heat conduction member 545 is positioned between the heat sink 720 and the integrated circuit 500, that is, between the protrusion 724 of the heat sink 720 and the integrated circuit 500, and in contact with both the heat sink 720 and the integrated circuit 500. That is, the integrated circuit 500 and the heat sink 720 are thermally and physically connected via the heat conduction member 545 having insulation properties. Thus, it is possible to improve the heat dissipation efficiency between the integrated circuit 500 and the heat sink 720, and to improve the insulation performance between the integrated circuit 500 and the face 816 of the wiring substrate 810 on which the integrated circuit 500 is provided, and the heat sink 720.

[0197] More preferably, when the drive circuit board 800 is housed in the space formed by the recesses 711 and 721, and when viewing the head drive module 10 from the Z-axis direction, the entire protrusion 724 is located at a position overlapping at least a portion of the integrated circuit 500, or at least a portion of the protrusion 724 is located at a position completely overlapping the integrated circuit 500. This allows the heat generated by the integrated circuit 500 to be transferred to the heat sink 720 more efficiently via the heat conduction member 545. As a result, the heat dissipation efficiency of the transistor 532 is improved.

[0198] In addition, such as Figure 12 As shown, multiple integrated circuits 500 are arranged side-by-side along the Y-axis on surface 816 of the wiring substrate 810. The heat sink 720 may include either a protrusion 724 corresponding to each of the multiple integrated circuits 500 arranged side-by-side along the Y-axis, or several common protrusions 724 shared by the multiple integrated circuits 500 arranged side-by-side along the Y-axis. Furthermore, continuous cuts and through holes along the X-axis from the -X side to the +X side of the protrusion 724 may be formed on the protrusion 724. This allows gas, including the airflow delivered by the cooling fan 713, to circulate efficiently within the space formed by the recesses 711 and 721. As a result, the overall cooling efficiency of the drive circuit substrate 800 is improved.

[0199] As described above, the heat sink 720 includes: a protrusion 724 protruding towards the +Z side and thermally connected to the amplification control circuit 510 included in the integrated circuit 500; a protrusion 722 protruding towards the +Z side and thermally connected to the transistor 531 included in the amplification circuit 530; and a protrusion 723 protruding towards the +Z side and thermally connected to the transistor 532 included in the amplification circuit 530. In other words, the heat sink 720 includes recesses between the protrusions 722 and 724, and between the protrusions 723 and 724. Therefore, the possibility of heat from the amplification control circuit 510 included in the integrated circuit 500 radiating through the protrusion 724 affecting the transistors 531 and 532 included in the amplification circuit 530 is reduced, and the possibility of heat from the transistors 531 included in the amplification circuit 530 radiating through the protrusion 722 and the transistors 532 included in the amplification circuit 530 radiating through the protrusion 723 affecting the amplification control circuit 510 included in the integrated circuit 500 is also reduced. Furthermore, since the heat sink 720 includes recesses between protrusions 722 and 724, and between protrusions 723 and 724, large electronic components along the Z-axis can be mounted on the surface 816 of the wiring substrate 810. This increases the variety of electronic components that can be mounted on the wiring substrate 810, and improves the versatility of the drive circuit board 800, including the wiring substrate 810.

[0200] The heat sink 710 is located on the +Z side of the drive circuit board 800, that is, on the side of the face 815 of the wiring board 810. In addition, in the direction along the Z axis, the heat conduction member 541 as the above-described inclusions is located between the heat sink 710 and the face 531mb of the transistor 531, and the heat conduction member 542 as the above-described inclusions is located between the heat sink 710 and the face 532mb of the transistor 532. Also, in a state in which the drive circuit board 800 is housed in the space formed by the recess 711 and the recess 721, the face 531mb of the transistor 531 is in contact with one face of the heat conduction member 541, the other face of the heat conduction member 541 is in contact with the heat sink 710, the face 532mb of the transistor 532 is in contact with one face of the heat conduction member 542, and the other face of the heat conduction member 542 is in contact with the heat sink 710. That is, the heat sink 710 and the face 531mf of the transistor 531 are thermally connected via the heat conduction member 541, and the heat sink 710 and the face 532mf of the transistor 532 are thermally connected via the heat conduction member 542. Thus, the transistor 531 is thermally connected to the heat sink 710, and the transistor 532 is thermally connected to the heat sink 710. Therefore, the heat generated by the transistor 531 is efficiently transferred to the heat sink 710 via the heat conduction member 541, and the heat generated by the transistor 532 is efficiently transferred to the heat sink 710 via the heat conduction member 542. Thus, the heat generated by the transistors 531, 532, and the heat dissipation efficiency of the heat generated by the amplification circuit 530 including the transistors 531, 532 are improved.

[0201] Here, as described above, the heat conduction members 541, 542 as the inclusions are a substance having high thermal conductivity, and having flame retardancy, electrical insulation, and concave-convex following properties, and, for example, a conductive grease and a gel sheet, a rubber sheet, or the like are preferably used. Thus, the heat conduction members 541, 542 function as a member that insulates between the transistors 531, 532 and the heat sink 710, and a member that improves the tightness between the transistors 531, 532 and the heat sink 710, in addition to functioning as a heat conduction member that transfers the heat generated by the transistors 531, 532 to the heat sink 710.

[0202] As described above, the face 531mb of the transistor 531 and the face 532mb of the transistor 532 are thermally connected to the heat sink 710. In other words, the amplification circuit 530 including the transistor 531 and the transistor 532 is thermally connected to the heat sink 710. Thus, heat generated by the transistor 531, 532, i.e., heat generated by the amplification circuit 530 including the transistor 531, 532 is efficiently transferred to the heat sink 710 and emitted to the outside. At this time, the liquid ejecting apparatus 1 of the present embodiment has the heat conduction member 541 which is located between the heat sink 710 and the face 531mb of the transistor 531 and which is in contact with both the heat sink 710 and the face 531mb of the transistor 531, and the heat conduction member 542 which is located between the heat sink 710 and the face 532mb of the transistor 532 and which is in contact with both the heat sink 710 and the face 532mb of the transistor 532. That is, the heat sink 710 and the face 531mb of the transistor 531 are thermally and physically connected via the heat conduction member 541 having insulation, and the heat sink 710 and the face 532mb of the transistor 532 are thermally and physically connected via the heat conduction member 542 having insulation. Thus, it is possible to improve the heat dissipation efficiency between the transistor 531, 532 and the heat sink 710, and it is possible to improve the insulation performance between the transistor 531, 532 and the heat sink 710.

[0203] In addition, in the liquid ejecting apparatus 1 of the present embodiment, as described above, the heat dissipation performance of the heat sink 710 is higher than that of the heat sink 720. Such a heat sink 710 having excellent heat dissipation performance emits heat generated in the transistor 531, 532 without passing through the wiring substrate 810, and thus it is possible to further improve the heat dissipation efficiency for the transistor 531, 532.

[0204] In addition, at this time, in the liquid ejecting apparatus 1 of the present embodiment, the heat sink 710 having excellent heat dissipation performance is thermally connected to the face 531mb having small thermal resistance from the semiconductor chip 531cp without passing through the wiring substrate 810 in the transistor 531, and is thermally connected to the face 532mb having small thermal resistance from the semiconductor chip 532cp without passing through the wiring substrate 810 in the transistor 532. Thus, it is possible to efficiently emit heat generated by the semiconductor chip 531cp, 532cp which generates particularly large heat among the transistor 531, 532 via the heat sink 710. Therefore, the heat dissipation efficiency for the transistor 531, 532 is further improved.

[0205] Note that, in the present embodiment, the heat sink 710 is thermally connected to the face 531mb of the transistor 531 and the face 532mb of the transistor 532. However, the present embodiment is not limited to this. For example, the heat sink 710 can be thermally connected to the face 531mb of the transistor 531 and the face 532mb of the transistor 532 via the heat conduction member 541, 542 having insulation. Figure 14In the present embodiment, the heat sink 710 is exemplified as not having the protrusions, but the heat sink 710 can have the protrusion corresponding to the face 531mb of the transistor 531 and the protrusion corresponding to the face 532mb of the transistor 532, like the heat sink 720. In addition, the heat sinks 710 and 720 can be configured to have a plurality of fins formed toward the outside of the head driving module 10. Thereby, the area of the heat sinks 710 and 720 is increased, and the heat dissipation efficiency in the heat sinks 710 and 720 is further improved.

[0206] Here, the amplification control circuit 510 is an example of a basic drive signal output circuit, the digital waveform signal dO input to the amplification control circuit 510 is an example of a digital signal, the drive waveform signal WS output from the amplification control circuit 510 is an example of a basic drive signal, the amplification circuit 530 is an example of an amplification circuit, the drive signal COM output from the amplification circuit 530 is an example of a drive signal, the transistor 531 included in the amplification circuit 530 is an example of a first transistor, the transistor 532 included in the amplification circuit 530 is an example of a second transistor, the piezoelectric element driven by the drive signal COM is an example of a capacitive load, at least one of the liquid ejection module 20 and the ejection module 23 is an example of an ejection head, and the head driving module 10 including the drive circuit 52 is an example of a capacitive load drive circuit. In addition, the face 531mb of the transistor 531 is an example of a first face, the face 531mf of the transistor 531 is an example of a second face, the face 532mb of the transistor 532 is an example of a third face, the face 532mf of the transistor 532 is an example of a fourth face, the semiconductor chip 531cp is an example of a first semiconductor chip, and the semiconductor chip 532cp is an example of a second semiconductor chip. In addition, the face 815 of the wiring substrate 810 is an example of a first substrate face, the face 815 of the wiring substrate 810 is an example of a second substrate face, the heat sink 710 is an example of a first heat sink member, the heat sink 720 is an example of a second heat sink member, the space formed by the recess 711 of the heat sink 710 and the recess 721 of the heat sink 720 is an example of a housing portion, the cooling fan 713 is an example of an air cooling mechanism, the heat conduction member 541 is an example of a first heat conduction member, the heat conduction member 542 is an example of a second heat conduction member, and at least one of the heat conduction member 543 and the heat conduction member 544 is an example of a third heat conduction member.

[0207] 5. Effects

[0208] As described above, in the liquid ejecting apparatus 1 of the present embodiment, the head driving module 10 has the heat sinks 710, 720 and the driving circuit substrate 800, the driving circuit substrate 800 has the amplification control circuit 510 which inputs the digital waveform signal dO and outputs the driving waveform signal WS, the amplification circuit 530 which includes transistors 531, 532, amplifies the driving waveform signal WS by driving of the transistors 531, 532, and outputs the driving signal COM which drives the piezoelectric element 60, and the wiring substrate 810 which provides the amplification control circuit 510 and the amplification circuit 530.

[0209] In addition, in the head driving module 10, the face 531mb of the transistor 531 and the face 532mb of the transistor 532 are thermally connected to the heat sink 710, and the face 531mf of the transistor 531 which is located at a position opposite to the face 531mb and the face 532mf of the transistor 532 which is located at a position opposite to the face 532mb are thermally connected to the face 815 of the wiring substrate 810, and further, the face 816 which is located at a position opposite to the face 815 of the wiring substrate 810 is thermally connected to the heat sink 720. Thereby, the heat generated by the transistor 531 and the transistor 532 is emitted from the face 531mb and the face 532mb through the heat sink 710, and is also emitted from the face 531mf and the face 532mf through the heat sink 720 via the wiring substrate 810. That is, the heat generated by the transistors 531, 532 is emitted from both faces of the transistors 531, 532 through the heat sinks 710, 720. Thereby, the emission efficiency of the heat from the transistors 531, 532 is improved, and the possibility that the transistors 531, 532 become high temperature is reduced. Therefore, the possibility that the stability of the operation of the driving circuit 52 including the amplification circuit 530 is reduced is reduced. Thus, the possibility that the waveform accuracy of the driving signal COM outputted from the driving circuit 52 and the head driving module 10 including the driving circuit 52 is reduced is reduced.

[0210] At this time, by making the heat dissipation of the heat sink 710 which is thermally connected to the transistors 531, 532 without passing through the wiring substrate 810 higher than the heat dissipation of the heat sink 720 which is thermally connected to the transistors 531, 532 via the wiring substrate 810, the emission efficiency of the heat from the transistors 531, 532 is further improved. Therefore, the possibility that the transistors 531, 532 become high temperature is further reduced. As a result, the possibility that the stability of the operation of the driving circuit 52 including the amplification circuit 530 is reduced is further reduced, and the possibility that the waveform accuracy of the driving signal COM outputted from the driving circuit 52 and the head driving module 10 including the driving circuit 52 is reduced is further reduced.

[0211] Further, by making the area of the face 531mb in the transistor 531 larger than the area of the face 531mf, and making the area of the face 532mb in the transistor 532 larger than the area of the face 532mf, the heat dissipation efficiency of the transistors 531, 532 of the heat sink 710 is further improved. Therefore, the possibility of the transistors 531, 532 becoming high temperature is further reduced. As a result, the possibility of the stability of the operation of the drive circuit 52 including the amplification circuit 530 being reduced is further reduced, and the possibility of the waveform accuracy of the drive signal COM output from the drive circuit 52 and the head driving module 10 including the drive circuit 52 being reduced is further reduced.

[0212] Further, by making the thermal resistance of the semiconductor chip 531cp to the face 531mb smaller than the thermal resistance of the semiconductor chip 531cp to the face 531mf in the transistor 531, and making the thermal resistance of the semiconductor chip 532cp to the face 532mb smaller than the thermal resistance of the semiconductor chip 532cp to the face 532mf in the transistor 532, the heat dissipation efficiency of the transistors 531, 532 of the heat sink 710 is further improved. Therefore, the possibility of the transistors 531, 532 becoming high temperature is further reduced. As a result, the possibility of the stability of the operation of the drive circuit 52 including the amplification circuit 530 being reduced is further reduced, and the possibility of the waveform accuracy of the drive signal COM output from the drive circuit 52 and the head driving module 10 including the drive circuit 52 being reduced is further reduced.

[0213] Further, by providing the heat conduction member 541 having flame retardancy, electrical insulation, and concave-convex followability in addition to high thermal conductivity between the face 531mb of the transistor 531 and the heat sink 710, and providing the heat conduction member 542 having flame retardancy, electrical insulation, and concave-convex followability in addition to high thermal conductivity between the face 532mb of the transistor 532 and the heat sink 710, and providing the heat conduction members 543, 544 having flame retardancy, electrical insulation, and concave-convex followability in addition to high thermal conductivity between the face 816 of the wiring substrate 810 and the heat sink 720, the insulation performance between the heat sinks 710, 720 and the wiring substrate 810 is improved, and the tightness of the heat sinks 710, 720 and the transistors 531, 532 and the wiring substrate 810 is improved, and therefore the heat dissipation efficiency of the transistors 531, 532 of the heat sinks 710, 720 is further improved. Therefore, the possibility of the transistors 531, 532 becoming high temperature is further reduced. As a result, the possibility of the stability of the operation of the drive circuit 52 including the amplification circuit 530 being reduced is further reduced, and the possibility of the waveform accuracy of the drive signal COM output from the drive circuit 52 and the head driving module 10 including the drive circuit 52 being reduced is further reduced.

[0214] In addition, by providing the amplification circuit 530 including the transistor 531 and the transistor 532 on the face 815 of the wiring substrate 810 and providing the amplification control circuit 510 outputting the drive waveform signal WS on the face 816 of the wiring substrate 810, the heat generated by the amplification circuit 530 and the heat generated by the amplification control circuit 510 affect each other, and the possibility of temperature rise of the drive circuit 52 is reduced. Therefore, the possibility of reduction in stability of the operation of the drive circuit 52 and the possibility of reduction in accuracy of the waveform of the drive signal COM output from the drive circuit 52 and the head driving module 10 including the drive circuit 52 are reduced.

[0215] At this time, by providing all of the amplification circuits 530 included in the plurality of drive circuits 52 on the face 815 of the wiring substrate 810 and providing all of the amplification control circuits 510 included in the plurality of drive circuits 52 on the face 816 of the wiring substrate 810, the possibility of the heat generated by the amplification circuit 530 and the heat generated by the amplification control circuit 510 affecting each other is further reduced, and the possibility of temperature rise of the drive circuit 52 is further reduced. Therefore, the possibility of reduction in stability of the operation of each of the plurality of drive circuits 52 and the possibility of reduction in accuracy of the waveform of the drive signal COM output from the plurality of drive circuits 52 and the head driving module 10 including the plurality of drive circuits 52 are reduced.

[0216] In addition, by thermally connecting the heat sink 720 that promotes heat dissipation of the amplification circuit 530 from the face 816 side of the wiring substrate 810, which promotes heat dissipation of the amplification circuit 530, to the amplification control circuit 510, the heat dissipation efficiency of the amplification control circuit 510 is also improved. Therefore, the possibility of the amplification control circuit 510 becoming high temperature in addition to the transistors 531 and 532 is reduced. As a result, the possibility of reduction in stability of the operation of the drive circuit 52 including the amplification circuit 530 and the amplification control circuit 510 and the possibility of reduction in accuracy of the waveform of the drive signal COM output from the drive circuit 52 and the head driving module 10 including the drive circuit 52 are further reduced.

[0217] 6. Modification

[0218] Here, in the liquid ejecting apparatus 1 of the above-described embodiment, a case where the heat sink 710 has a cooling fan 713 that promotes cooling of the drive circuit substrate 800 by air flow sent out by the cooling fan 713 is described, but is not limited thereto.

[0219] Figure 15 is a drawing showing an example of a cross section of the head driving module 10 in a modification. As Figure 15As shown, the heat sink 710 can also have a water cooling mechanism 715 that promotes cooling of the drive circuit board 800. In the water cooling mechanism 715, cooling water is circulated by the power of a pump or the like, not shown. Thus, the heat dissipation from the heat sink 710 is further improved, and the heat dissipation efficiency of the transistors 531, 532, for which heat dissipation is promoted by the heat sink 710, is improved.

[0220] In addition, the heat sinks 710, 720 can also be provided with an insulating coating layer formed of an epoxy resin or the like. Thus, the heat sinks 710, 720 can be used as the material of the heat conduction member 541 provided between the transistor 531 and the heat sink 710, the heat conduction member 542 provided between the transistor 532 and the heat sink 710, the heat conduction members 543, 544 provided between the wiring board 810 and the heat sink 720, and the heat conduction member 545 provided between the integrated circuit 500 and the heat sink 720, and the heat sinks 710, 720 can promote the dissipation of heat generated by the drive circuit 52 without using the heat conduction members 541 to 545. Therefore, the heat dissipation efficiency of the heat sinks 710, 720 for heat generated by the drive circuit 52 is further improved. Note that the heat sinks 710, 720 can be formed of an insulating ceramic or the like instead of the insulating coating layer formed of an epoxy resin or the like, as long as they have insulating properties.

[0221] The above-described embodiments and modified examples can be appropriately combined.

[0222] The present application includes structures substantially the same as those described in the embodiments (for example, structures having the same functions, methods, and results, or structures having the same objects and effects). In addition, the present application includes structures in which non-essential parts of the structures described in the embodiments are replaced. In addition, the present application includes structures that have the same effects as the structures described in the embodiments or structures that can achieve the same objects. In addition, the present application includes structures to which known technologies are added to the structures described in the embodiments.

[0223] The following can be derived from the above-described embodiments.

[0224] One embodiment of a capacitive load drive circuit includes:

[0225] a basic drive signal output circuit that is input with a digital signal and outputs a basic drive signal;

[0226] an amplification circuit that amplifies the basic drive signal and outputs a drive signal that drives a capacitive load;

[0227] A wiring substrate includes a first substrate surface and a second substrate surface located opposite each other, and is provided with the basic drive signal output circuit and the amplification circuit.

[0228] A first heat dissipation member and a second heat dissipation member promote heat dissipation of the amplification circuit,

[0229] The amplification circuit outputs the drive signal through driving of a first transistor and a second transistor,

[0230] The first transistor includes a first surface and a second surface located opposite each other,

[0231] The second transistor includes a third surface and a fourth surface located opposite each other,

[0232] The first heat dissipation member has a higher heat dissipation property than the second heat dissipation member,

[0233] The first surface and the third surface are thermally connected to the first heat dissipation member,

[0234] The second surface and the fourth surface are thermally connected to the first substrate surface,

[0235] The second substrate surface is thermally connected to the second heat dissipation member.

[0236] According to the capacitive load drive circuit, the first transistor included in the amplification circuit includes a first surface and a second surface located opposite each other, the second transistor included in the amplification circuit includes a third surface and a fourth surface located opposite each other, the first surface and the third surface are thermally connected to the first heat dissipation member, the second surface and the fourth surface are thermally connected to the first substrate surface, and the second substrate surface is thermally connected to the second heat dissipation member. Thus, heat dissipation is promoted from both the first surface and the second surface for the first transistor, and heat dissipation is promoted from both the third surface and the fourth surface for the second transistor. Therefore, heat generated by the amplification circuit including the first transistor and the second transistor is efficiently dissipated. Thus, the possibility of the first transistor and the second transistor becoming high temperature is reduced, and the possibility of the stability of the capacitive load drive circuit including the first transistor and the second transistor being reduced is also reduced. Therefore, the possibility of the waveform accuracy of the drive signal output by the capacitive load drive circuit being reduced is reduced.

[0237] Further, according to the capacitive load driving circuit, by making the heat dissipation property of the first heat dissipation member, which promotes dissipation of heat from the first face of the first transistor and the third face of the second transistor without passing through the wiring substrate, higher than the heat dissipation property of the second heat dissipation member, which promotes dissipation of heat from the third face of the first transistor and the fourth face of the second transistor passing through the wiring substrate, heat generated by the amplification circuit including the first transistor and the second transistor can be dissipated more efficiently. Therefore, the possibility of the first transistor and the second transistor becoming high temperature further decreases, and the possibility of the stability of the capacitive load driving circuit including the first transistor and the second transistor decreasing further decreases. Thus, the possibility of the waveform accuracy of the driving signal output from the capacitive load driving circuit decreasing further decreases.

[0238] Also, in one embodiment of the capacitive load driving circuit,

[0239] The first heat dissipation member has a water cooling mechanism.

[0240] According to the capacitive load driving circuit, by the first heat dissipation member having a water cooling mechanism, the heat dissipation property of the first heat dissipation member further increases, and heat generated by the amplification circuit including the first transistor and the second transistor can be dissipated more efficiently.

[0241] Also, in one embodiment of the capacitive load driving circuit,

[0242] The first heat dissipation member has an air cooling mechanism.

[0243] According to the capacitive load driving circuit, by the first heat dissipation member having an air cooling mechanism, the heat dissipation property of the first heat dissipation member further increases, and heat generated by the amplification circuit including the first transistor and the second transistor can be dissipated more efficiently.

[0244] Also, in one embodiment of the capacitive load driving circuit,

[0245] The wiring substrate is housed in a housing portion configured by the first heat dissipation member and the second heat dissipation member.

[0246] According to the capacitive load driving circuit, by the first heat dissipation member and the second heat dissipation member, heat of the amplification circuit including the first transistor and the second transistor can be dissipated efficiently, and the possibility of ink mist and the like adhering to the amplification circuit including the first transistor and the second transistor can be reduced.

[0247] Also, in one embodiment of the capacitive load driving circuit,

[0248] The area of the first face is larger than the area of the second face,

[0249] The area of the third face is larger than the area of the fourth face.

[0250] According to the capacitive load driving circuit, heat generated by the amplification circuit including the first transistor and the second transistor is efficiently dissipated by the first heat dissipation member having high heat dissipation properties and by the first face and the second face having large areas.

[0251] Also, in one embodiment of the capacitive load driving circuit,

[0252] The first transistor includes a first semiconductor chip,

[0253] The second transistor includes a second semiconductor chip,

[0254] The thermal resistance between the first semiconductor chip and the first face is smaller than the thermal resistance between the first semiconductor chip and the second face,

[0255] The thermal resistance between the second semiconductor chip and the third face is smaller than the thermal resistance between the second semiconductor chip and the fourth face.

[0256] According to the capacitive load driving circuit, heat generated by the amplification circuit including the first transistor and the second transistor is efficiently dissipated by the first heat dissipation member having high heat dissipation properties and by the first face and the second face having small thermal resistance with the first semiconductor chip and the second semiconductor chip, respectively.

[0257] Also, in one embodiment of the capacitive load driving circuit,

[0258] An insulating coating is applied to the first heat dissipation member.

[0259] According to the capacitive load driving circuit, the thermal resistance between the first heat dissipation member and the first transistor and the second transistor can be reduced, and heat generated by the amplification circuit including the first transistor and the second transistor can be efficiently dissipated.

[0260] Also, in one embodiment of the capacitive load driving circuit,

[0261] The first face is connected to the first heat dissipation member via a first heat conduction member having insulating properties, the third face is connected to the first heat dissipation member via a second heat conduction member having insulating properties, and the second substrate face is connected to the second heat dissipation member via a third heat conduction member having insulating properties.

[0262] According to the capacitive load driving circuit, thermal resistance between the first heat dissipation member and the first transistor and the second transistor can be reduced, and insulation performance between the first heat dissipation member and the first transistor and the second transistor can be improved. Thus, heat generated by an amplification circuit including the first transistor and the second transistor can be dissipated more efficiently, and waveform accuracy of an output driving signal can be improved.

[0263] Also, in one embodiment of the capacitive load driving circuit,

[0264] The first transistor and the second transistor are bipolar transistors,

[0265] The amplification circuit is an AB class amplification circuit.

[0266] Also, in one embodiment of the capacitive load driving circuit,

[0267] The first transistor and the second transistor are SIP-type bipolar transistors.

[0268] One embodiment of a liquid ejecting apparatus includes:

[0269] A liquid ejecting head that ejects liquid by driving a capacitive load; and

[0270] A capacitive load driving circuit that outputs a driving signal for driving the capacitive load,

[0271] The capacitive load driving circuit includes:

[0272] A base driving signal output circuit that is input with a digital signal and outputs a base driving signal;

[0273] An amplification circuit that amplifies the base driving signal and outputs the driving signal for driving the capacitive load;

[0274] A wiring substrate that includes a first substrate surface and a second substrate surface located opposite each other, and is provided with the base driving signal output circuit and the amplification circuit; and

[0275] A first heat dissipation member and a second heat dissipation member that promote heat dissipation of the amplification circuit,

[0276] The amplification circuit outputs the driving signal by driving a first transistor and a second transistor,

[0277] The first transistor includes a first surface and a second surface located opposite each other,

[0278] The second transistor includes a third surface and a fourth surface located opposite each other,

[0279] the first heat dissipation member has a higher heat dissipation property than the second heat dissipation member,

[0280] the first face and the third face are thermally connected to the first heat dissipation member,

[0281] the second face and the fourth face are thermally connected to the first substrate face,

[0282] the second substrate face is thermally connected to the second heat dissipation member.

[0283] According to the liquid discharge apparatus, by including, in the capacitive load driving circuit, the first transistor included in the amplification circuit including the first face and the second face located at positions opposite to each other, the second transistor included in the amplification circuit including the third face and the fourth face located at positions opposite to each other, the first face and the third face being thermally connected to the first heat dissipation member, the second face and the fourth face being thermally connected to the first substrate face, and the second substrate face being thermally connected to the second heat dissipation member, heat dissipation from both the first face and the second face of the first transistor and heat dissipation from both the third face and the fourth face of the second transistor are promoted. Therefore, heat generated by the amplification circuit including the first transistor and the second transistor is efficiently dissipated. Therefore, the possibility of the first transistor and the second transistor becoming high temperature is reduced, and the possibility of the stability of the capacitive load driving circuit including the first transistor and the second transistor being reduced is reduced. Therefore, the possibility of the waveform accuracy of the driving signal output from the capacitive load driving circuit being reduced is reduced.

[0284] Further, according to the liquid discharge apparatus, by including, in the capacitive load driving circuit, the first heat dissipation member having a higher heat dissipation property for promoting heat dissipation from the first face of the first transistor and the third face of the second transistor than the second heat dissipation member having a lower heat dissipation property for promoting heat dissipation from the third face of the first transistor and the fourth face of the second transistor via the wiring substrate, heat generated by the amplification circuit including the first transistor and the second transistor is more efficiently dissipated. Therefore, the possibility of the first transistor and the second transistor becoming high temperature is further reduced, and the possibility of the stability of the capacitive load driving circuit including the first transistor and the second transistor being reduced is further reduced. Therefore, the possibility of the waveform accuracy of the driving signal output from the capacitive load driving circuit being reduced is further reduced.

[0285] Also, in one embodiment of the liquid discharge apparatus,

[0286] the first heat dissipation member has a water cooling mechanism.

[0287] According to the liquid ejecting apparatus, the first heat dissipation member has a water cooling mechanism, and thus the heat dissipation property of the first heat dissipation member is further improved, and heat generated by the amplification circuit including the first transistor and the second transistor can be dissipated more efficiently.

[0288] Also, in one embodiment of the liquid ejecting apparatus,

[0289] The first heat dissipation member has an air cooling mechanism.

[0290] According to the liquid ejecting apparatus, the first heat dissipation member has an air cooling mechanism, and thus the heat dissipation property of the first heat dissipation member is further improved, and heat generated by the amplification circuit including the first transistor and the second transistor can be dissipated more efficiently.

[0291] Also, in one embodiment of the liquid ejecting apparatus,

[0292] The wiring substrate is housed in a housing portion including the first heat dissipation member and the second heat dissipation member.

[0293] According to the liquid ejecting apparatus, the first heat dissipation member and the second heat dissipation member can efficiently dissipate heat of the amplification circuit including the first transistor and the second transistor, and can reduce the possibility that ink mist or the like adheres to the amplification circuit including the first transistor and the second transistor.

[0294] Also, in one embodiment of the liquid ejecting apparatus,

[0295] The area of the first face is larger than the area of the second face,

[0296] The area of the third face is larger than the area of the fourth face.

[0297] According to the liquid ejecting apparatus, the first heat dissipation member having a high heat dissipation property promotes heat dissipation of the first transistor and the second transistor from the first face and the second face having a large area, and thus heat generated by the amplification circuit including the first transistor and the second transistor can be dissipated more efficiently.

[0298] Also, in one embodiment of the liquid ejecting apparatus,

[0299] The first transistor includes a first semiconductor chip,

[0300] The second transistor includes a second semiconductor chip,

[0301] The thermal resistance between the first semiconductor chip and the first face is smaller than the thermal resistance between the first semiconductor chip and the second face,

[0302] The thermal resistance between the second semiconductor chip and the third face is smaller than the thermal resistance between the second semiconductor chip and the fourth face.

[0303] According to the liquid ejecting apparatus, the first heat radiating member with high heat radiating property promotes heat radiation of the first transistor and the second transistor from the first face with small thermal resistance to the first semiconductor chip and the second face with small thermal resistance to the second semiconductor chip, and thus heat of the first semiconductor chip and the second semiconductor chip which can be heat sources is efficiently radiated. Thus, heat generated by the amplifying circuit including the first transistor and the second transistor is more efficiently radiated.

[0304] Also, in one embodiment of the liquid ejecting apparatus,

[0305] The first heat radiating member is provided with an insulating coating.

[0306] According to the liquid ejecting apparatus, the first heat radiating member with high heat radiating property promotes heat radiation of the first transistor and the second transistor from the first face with small thermal resistance to the first semiconductor chip and the second face with small thermal resistance to the second semiconductor chip, and thus heat of the first semiconductor chip and the second semiconductor chip which can be heat sources is efficiently radiated. Thus, heat generated by the amplifying circuit including the first transistor and the second transistor is more efficiently radiated.

[0307] Also, in one embodiment of the liquid ejecting apparatus,

[0308] The first face is connected to the first heat radiating member via a first heat conducting member having insulating property, the third face is connected to the first heat radiating member via a second heat conducting member having insulating property, and the second substrate face is connected to the second heat radiating member via a third heat conducting member having insulating property.

[0309] According to the liquid ejecting apparatus, the thermal resistance between the first heat radiating member and the first transistor and the second transistor can be reduced, and the insulating property between the first heat radiating member and the first transistor and the second transistor can be improved. Thus, heat generated by the amplifying circuit including the first transistor and the second transistor can be more efficiently radiated, and the waveform precision of the output driving signal can be improved.

[0310] Also, in one embodiment of the liquid ejecting apparatus,

[0311] The first transistor and the second transistor are bipolar transistors,

[0312] The amplifying circuit is an AB class amplifying circuit.

[0313] Also, in one embodiment of the liquid ejecting apparatus,

[0314] The first transistor and the second transistor are SIP-type bipolar transistors.

Claims

1. A capacitive load driving circuit, characterized in that, have: The basic drive signal output circuit takes a digital signal as input and outputs a basic drive signal. An amplifier circuit amplifies the basic drive signal and outputs a drive signal to drive the capacitive load. The wiring substrate includes a first substrate surface and a second substrate surface located opposite each other, and is provided with the basic drive signal output circuit and the amplification circuit. as well as The first and second heat dissipation components facilitate heat dissipation from the amplifier circuit. The amplifier circuit outputs the drive signal by driving the first transistor and the second transistor. The first transistor includes a first surface and a second surface located opposite each other. The second transistor includes a third surface and a fourth surface located opposite each other. The heat dissipation performance of the first heat dissipation component is higher than that of the second heat dissipation component. The first surface and the third surface are thermally connected to the first heat dissipation component. The second and fourth surfaces are thermally connected to the first substrate surface. The second substrate surface is thermally connected to the second heat dissipation component.

2. The capacitive load driving circuit according to claim 1, characterized in that, The first heat dissipation component has a water cooling mechanism.

3. The capacitive load driving circuit according to claim 1, characterized in that, The first heat dissipation component has an air cooling mechanism.

4. The capacitive load driving circuit according to claim 1, characterized in that, The wiring substrate is housed in a housing portion comprising the first heat dissipation component and the second heat dissipation component.

5. The capacitive load driving circuit according to claim 1, characterized in that, The area of ​​the first face is larger than the area of ​​the second face. The area of ​​the third surface is larger than the area of ​​the fourth surface.

6. The capacitive load driving circuit according to claim 1, characterized in that, The first transistor includes a first semiconductor chip. The second transistor includes a second semiconductor chip. The thermal resistance between the first semiconductor chip and the first surface is smaller than the thermal resistance between the first semiconductor chip and the second surface. The thermal resistance between the second semiconductor chip and the third surface is smaller than the thermal resistance between the second semiconductor chip and the fourth surface.

7. The capacitive load driving circuit according to claim 1, characterized in that, An insulating coating is applied to the first heat dissipation component.

8. The capacitive load driving circuit according to claim 1, characterized in that, The first surface is connected to the first heat dissipation component via a first heat conduction component that is insulated. The third surface is connected to the first heat dissipation component via a second heat conduction component that is insulated. The second substrate surface is connected to the second heat dissipation component via a third heat conduction component that is insulated.

9. The capacitive load drive circuit according to any one of claims 1 to 8, characterized in that, The first transistor and the second transistor are bipolar transistors. The amplifier circuit is an AB-level amplifier circuit.

10. The capacitive load driving circuit according to claim 9, characterized in that, The first transistor and the second transistor are SIP type bipolar transistors, i.e., single in-line package type.

11. A liquid ejection device, characterized in that, have: The nozzle ejects liquid via a capacitive load; and A capacitive load driving circuit outputs a driving signal to drive the capacitive load. The capacitive load drive circuit includes: The basic drive signal output circuit takes a digital signal as input and outputs a basic drive signal. An amplifier circuit amplifies the basic drive signal and outputs the drive signal that drives the capacitive load. The wiring substrate includes a first substrate surface and a second substrate surface located opposite each other, and is provided with the basic drive signal output circuit and the amplification circuit. as well as The first and second heat dissipation components facilitate heat dissipation from the amplifier circuit. The amplifier circuit outputs the drive signal by driving the first transistor and the second transistor. The first transistor includes a first surface and a second surface located opposite each other. The second transistor includes a third surface and a fourth surface located opposite each other. The heat dissipation performance of the first heat dissipation component is higher than that of the second heat dissipation component. The first surface and the third surface are thermally connected to the first heat dissipation component. The second and fourth surfaces are thermally connected to the first substrate surface. The second substrate surface is thermally connected to the second heat dissipation component.

12. The liquid ejection device according to claim 11, characterized in that, The first heat dissipation component has a water cooling mechanism.

13. The liquid ejection device according to claim 11, characterized in that, The first heat dissipation component has an air cooling mechanism.

14. The liquid ejection device according to claim 11, characterized in that, The wiring substrate is housed in a housing portion comprising the first heat dissipation component and the second heat dissipation component.

15. The liquid ejection device according to claim 11, characterized in that, The area of ​​the first face is larger than the area of ​​the second face. The area of ​​the third surface is larger than the area of ​​the fourth surface.

16. The liquid ejection device according to claim 11, characterized in that, The first transistor includes a first semiconductor chip. The second transistor includes a second semiconductor chip. The thermal resistance between the first semiconductor chip and the first surface is smaller than the thermal resistance between the first semiconductor chip and the second surface. The thermal resistance between the second semiconductor chip and the third surface is smaller than the thermal resistance between the second semiconductor chip and the fourth surface.

17. The liquid ejection device according to claim 11, characterized in that, An insulating coating is applied to the first heat dissipation component.

18. The liquid ejection device according to claim 11, characterized in that, The first surface is connected to the first heat dissipation component via a first heat conduction component that is insulated. The third surface is connected to the first heat dissipation component via a second heat conduction component that is insulated. The second substrate surface is connected to the second heat dissipation component via a third heat conduction component that is insulated.

19. The liquid ejection device according to any one of claims 11 to 18, characterized in that, The first transistor and the second transistor are bipolar transistors. The amplifier circuit is an AB-level amplifier circuit.

20. The liquid ejection device according to claim 19, characterized in that, The first transistor and the second transistor are SIP type bipolar transistors, i.e., single in-line package type.

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