Optimization method for three-dimensional junction temperature analysis of semiconductor device
By establishing two-dimensional and three-dimensional thermal models of semiconductor devices and combining Raman spectroscopy and Gaussian heat source models, junction temperature analysis was optimized, solving the problems of low accuracy and long cycle time in existing technologies, and achieving high-precision and efficient junction temperature prediction.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-12-18
- Publication Date
- 2026-03-27
AI Technical Summary
Existing technologies for measuring junction temperature in semiconductor devices suffer from low accuracy and long simulation cycles. Two-dimensional electrothermal coupling simulation ignores the third dimension of heat generation and dissipation, leading to estimation errors. Furthermore, experimental methods are costly and time-consuming.
By establishing initial two-dimensional and three-dimensional thermal models of semiconductor devices, combined with Raman spectroscopy measurements and Gaussian heat source models, the thermal conductivity of materials and heat source parameters are adjusted to optimize the simulation model, thereby improving accuracy and shortening the cycle time.
It achieves high-precision junction temperature prediction, shortens the simulation cycle, saves computing resources, and the simulation results are consistent with the actual operating junction temperature of the device, with high accuracy and reliability.
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Figure CN121744775A_ABST
Abstract
Description
Technical Field
[0001] This invention belongs to the field of three-dimensional junction temperature analysis technology for semiconductor devices, and specifically relates to an optimized method for three-dimensional junction temperature analysis of semiconductor devices. Background Technology
[0002] As chip integration density continues to increase, chip thermal management becomes increasingly important. Among these efforts, improving device-level junction temperature has received widespread attention. Experimentally, commonly used methods for measuring device junction temperature can be divided into optical and electrical methods. Optical methods require the construction of specialized test platforms, while electrical methods require the selection of temperature-dependent electrical parameters and often yield average junction temperatures, potentially underestimating the device's self-heating effects. Furthermore, experimental testing methods require the fabrication of actual devices for testing, which is time-consuming and costly.
[0003] Predicting and optimizing the junction temperature of a device using finite element method (FEM) simulation is a highly efficient and low-cost approach. However, accurate three-dimensional electrothermal coupling simulations of devices are computationally intensive and time-consuming, while two-dimensional FEM simulations, which neglect the third dimension of heat generation and dissipation, can also introduce estimation errors.
[0004] Therefore, a new method for optimizing device junction temperature is needed to improve the accuracy of junction temperature prediction while shortening the simulation cycle. Summary of the Invention
[0005] The purpose of this invention is to provide an optimized method for three-dimensional junction temperature analysis of semiconductor devices, which simplifies existing junction temperature characterization and simulation techniques, improves the accuracy of junction temperature prediction, and shortens the simulation cycle.
[0006] The technical solution adopted in this invention is: An optimized method for three-dimensional junction temperature analysis of semiconductor devices is described below: Step 1: Use finite element software to establish the initial two-dimensional and three-dimensional thermal models of the device; Step 2: Set multiple marker points in the channel layer region between the source and drain of the semiconductor device and in the vertical direction of the semiconductor device, and simultaneously measure the Raman data of each marker point to determine the three-dimensional measurement temperature of the semiconductor device. Step 3: Compare the simulated junction temperature with the measured temperature and modify the 3D thermal model to ensure that the error between the simulated junction temperature and the measured temperature is less than 5%. Step 4: Introduce the modified three-dimensional heat source model into the two-dimensional thermal simulation model and compare it with the three-dimensional thermal simulation results. Modify the temperature coefficient of the material thermal conductivity in the two-dimensional thermal simulation model so that the temperature obtained by the two-dimensional thermal model simulation is less than 5% different from the temperature obtained by the three-dimensional thermal model simulation. Determine the two-dimensional thermal simulation model of the semiconductor device and complete the junction temperature analysis of the semiconductor device.
[0007] The invention is further characterized by: The specific method for step 1 is as follows: Based on the semiconductor device structure, material characteristics of each layer, and device size characteristics, an initial two-dimensional thermal model and a three-dimensional thermal model of the semiconductor device were established using COMSOL finite element software.
[0008] The characteristics of each layer of material include thermal conductivity, mass density, and specific heat capacity.
[0009] Device size characteristics include the number of gates, gate length, gate width, gate-drain spacing, gate-source spacing, substrate thickness, buffer layer thickness, and barrier layer thickness.
[0010] The specific process of step 2 is as follows: Step 2.1: Measure the Raman spectra of each layer of material inside the semiconductor device in the range of 25~275℃; Step 2.2: Fit the Raman peaks at each temperature to obtain the peak positions; plot the relationship curve between the peak value and temperature for each material, make a linear approximation, and the slope is the Raman temperature coefficient χ for each material; Step 2.3: Set multiple marker points in the channel layer region between the source and drain of the semiconductor device and in the vertical direction of the semiconductor device; wherein the coordinates of each point are different; Step 2.4: With the device off, acquire the Raman spectrum at each point in the device channel region to obtain the reference peak position ω. ref A bias voltage is applied, and Raman spectra are acquired again at the exact same location to obtain the peak position ω. heated For each location, peak positions are fitted to the two spectra, and the Raman peak shift at each location is calculated. Combining this with the temperature coefficient χ of the material at each location from step 2.2, the temperature change at each location is calculated. ΔT=(ω heated -ω ref ) / χ; Step 2.5: Acquire two Raman spectra of each layer of material inside the device to obtain the longitudinal Raman peak shift; combine the temperature coefficient χ of each layer of material to calculate the temperature change ΔT, and obtain the temperature T of the device along the depth direction. measured = T ref + ΔT yields the three-dimensional temperature distribution of the device.
[0011] The specific process of step 3 is as follows: In a single-finger gate structure of a semiconductor device, the heat source approximates a single Gaussian heat distribution. The initial parameters μ and σ of the Gaussian function are set... 2 Three-dimensional thermal simulation was performed, and the simulated temperature was compared with the actual operating temperature of the device. The parameters μ and σ of the Gaussian distribution were then adjusted. 2The modification of the three-dimensional heat source model was completed; in the multi-finger gate structure of semiconductor devices, the heat source is approximated as the superposition of multiple Gaussian heat distributions, and the μ and σ of each Gaussian distribution are adjusted. 2 Parameters are used to modify the three-dimensional heat source model; Compare the 3D simulation temperature with the actual operating temperature of the device until the error is less than 5%, then the 3D model is successfully calibrated.
[0012] The specific process of step 4 is as follows: Step 4.1: Integrate the corrected three-dimensional heat source model along the thickness direction to obtain the two-dimensional heat distribution curve; Step 4.2: Introduce a two-dimensional thermal distribution curve into the two-dimensional thermal simulation model and compare it with the three-dimensional thermal simulation results. Modify the temperature coefficient of the material thermal conductivity in the two-dimensional thermal simulation model to determine the two-dimensional thermal simulation model of the semiconductor device.
[0013] The specific method for modifying the temperature coefficient of the material's thermal conductivity in the two-dimensional thermal simulation model in step 4.2 is as follows: Introducing a correction factor β changes the thermal conductivity of the material in the two-dimensional model from k0×T -α Modified to β(k0×T) -α This ensures that the temperature obtained from the simulation of the corrected two-dimensional thermal model has an error of less than 5% compared to the temperature obtained from the simulation of the corrected three-dimensional thermal model, thus determining the two-dimensional thermal simulation model of the semiconductor device.
[0014] The beneficial effects of this invention are: The present invention provides an optimization method for the three-dimensional junction temperature of semiconductor devices. By combining a three-dimensional model and a two-dimensional model, and by measuring the actual operating data of the device, the three-dimensional model and the two-dimensional model are calibrated to obtain a highly accurate and fast-calculating model. This improves the accuracy of junction temperature prediction while shortening the simulation cycle. It uses less computation and can obtain simulation results consistent with the actual operating junction temperature of the device, saving time and computing resources. Moreover, the simulation accuracy is high and the results are reliable. Attached Figure Description
[0015] Figure 1 This is a flowchart of the method for optimizing the three-dimensional junction temperature of semiconductor devices according to the present invention. Detailed Implementation
[0016] The present invention will now be described in detail with reference to the accompanying drawings and specific embodiments.
[0017] The optimized method for three-dimensional junction temperature analysis of semiconductor devices according to the present invention, such as... Figure 1 As shown, the specific method is as follows: Step 1: Use finite element software to establish the initial two-dimensional and three-dimensional thermal models of the device; the specific method is as follows: Based on the semiconductor device structure, material characteristics of each layer, and device size characteristics, an initial two-dimensional thermal model and a three-dimensional thermal model of the semiconductor device were established using COMSOL finite element software.
[0018] The material characteristics of each layer include thermal conductivity, mass density, and specific heat capacity. Device size characteristics include the number of gates, gate length, gate width, gate-drain spacing, gate-source spacing, substrate thickness, buffer layer thickness, and barrier layer thickness.
[0019] Step 2: Set multiple marker points in the channel layer region between the source and drain of the semiconductor device and in the vertical direction of the semiconductor device, and simultaneously measure the Raman data of each marker point to determine the three-dimensional measurement temperature of the semiconductor device; the specific process is as follows: Step 2.1: Measure the Raman spectra of each layer of material inside the semiconductor device in the range of 25~275℃; Step 2.2: Fit the Raman peaks at each temperature to obtain the peak positions; plot the relationship curve between the peak value and temperature for each material, make a linear approximation, and the slope is the Raman temperature coefficient χ for each material; Step 2.3: Set multiple marker points in the channel layer region between the source and drain of the semiconductor device and in the vertical direction of the semiconductor device; wherein the coordinates of each point are different; Step 2.4: With the device off, acquire the Raman spectrum at each point in the device channel region to obtain the reference peak position ω. ref A bias voltage is applied, and Raman spectra are acquired again at the exact same location to obtain the peak position ω. heated For each location, peak positions are fitted to the two spectra, and the Raman peak shift at each location is calculated. Combining this with the temperature coefficient χ of the material at each location from step 2.2, the temperature change at each location is calculated. ΔT=(ω heated -ω ref ) / χ; Step 2.5: Acquire two Raman spectra of each layer of material inside the device to obtain the longitudinal Raman peak shift; combine the temperature coefficient χ of each layer of material to calculate the temperature change ΔT, and obtain the temperature T of the device along the depth direction. measured = T ref + ΔT yields the three-dimensional temperature distribution of the device.
[0020] Step 3: Compare the simulated junction temperature with the measured temperature and modify the three-dimensional thermal model, that is, adjust the peak value and position of each Gaussian distribution so that the error between the simulated junction temperature and the measured temperature is less than 5%; use experimental data to directly calibrate the most uncertain heat source model.
[0021] The specific process is as follows: In a single-finger gate structure of a semiconductor device, the heat source approximates a single Gaussian heat distribution. The initial parameters μ and σ of the Gaussian function are set... 2 Three-dimensional thermal simulation was performed, and the simulated temperature was compared with the actual operating temperature of the device. The parameters μ and σ of the Gaussian distribution were then adjusted. 2 The modification of the three-dimensional heat source model was completed; in the multi-finger gate structure of semiconductor devices, the heat source is approximated as the superposition of multiple Gaussian heat distributions, and the μ and σ of each Gaussian distribution are adjusted. 2 Parameters are used to modify the three-dimensional heat source model; Compare the 3D simulation temperature with the actual operating temperature of the device until the error is less than 5%, then the 3D model is successfully calibrated.
[0022] Step 4: Introduce the corrected three-dimensional heat source model into the two-dimensional thermal simulation model and compare it with the three-dimensional thermal simulation results. Modify the temperature coefficient of the material's thermal conductivity in the two-dimensional thermal simulation model to ensure that the temperature error between the two-dimensional and three-dimensional thermal simulation models is less than 5%. This determines the two-dimensional thermal simulation model for the semiconductor device and completes the junction temperature analysis. Introducing the calibrated three-dimensional heat source model into the two-dimensional model significantly improves computational efficiency while maintaining accuracy.
[0023] The specific process is as follows: Step 4.1: Integrate the corrected three-dimensional heat source model along the thickness direction to obtain the two-dimensional heat distribution curve; Step 4.2: Introduce a two-dimensional heat distribution curve into the two-dimensional thermal simulation model and compare it with the three-dimensional thermal simulation results. Modify the temperature coefficient of the material's thermal conductivity in the two-dimensional thermal simulation model. Specifically, introduce a correction factor β to adjust the material's thermal conductivity in the two-dimensional model from k0×T. -α Modified to β(k0×T) -α This ensures that the temperature obtained from the simulation of the corrected two-dimensional thermal model has an error of less than 5% compared to the temperature obtained from the simulation of the corrected three-dimensional thermal model, thus determining the two-dimensional thermal simulation model of the semiconductor device.
[0024] Example 1 The optimization method for the three-dimensional junction temperature of the AlGaN / GaN HEMT device in this embodiment is as follows: Step 1: Construct a three-dimensional geometric model in COMSOL. Starting from the substrate, according to the device structure, stack an AlN buffer layer, a GaN channel layer, and an AlGaN barrier layer on it. Construct the source electrode, drain electrode, and gate electrode on the surface of the barrier layer. Apply a constant heat source to the gate electrode.
[0025] Step 2: Place the sample on a platform with precise temperature control and measure the Raman spectrum of each layer of material within the range of 25~275°C to obtain the Raman temperature coefficient of each layer of material.
[0026] The Raman peaks at each temperature are fitted to obtain the peak positions; for each material, the relationship curve between the peak value and temperature is plotted and approximated linearly, and the slope is the Raman temperature coefficient χ for each material.
[0027] Multiple marker points are set along the device channel region. When the device is off, i.e., V... ds = 0 V, V gs <V th At that time, the Raman spectrum of each point was collected to obtain the reference peak position ω. ref Apply bias voltage V ds =10 V, V gs ≥V th Raman spectra were collected again at the exact same location, and the peak position ω was obtained. heated Simultaneously, peak position fitting is performed for each pair of spectra, the Raman peak shift at each point is calculated, and the temperature change ΔT = (ω) at each point is calculated using the Raman temperature coefficient χ of GaN material. heated -ω ref The temperature at the marked point under a specific bias condition is obtained by calculating () / χ. Multiple test points are set on each layer of the device material. By adjusting the focusing position of the Raman laser beam, the Raman spectra of each layer of the device are detected to obtain the longitudinal Raman peak shift information. Combined with the temperature coefficients of each layer, the temperature along the depth direction of the device is calculated. Finally, the three-dimensional temperature distribution of the device is obtained.
[0028] Step 3: The initial model uses a uniform heat source distribution, which does not match the actual situation. By comparing the initial three-dimensional simulation temperature and the measured temperature, the initial three-dimensional heat source model is modified by introducing a Gaussian heat source model, so that the error between the simulated temperature and the measured temperature is less than 5%.
[0029] For a single-finger grid structure, the heat source expression is set as a single Gaussian function: the parameters of the Gaussian function are adjusted, where the initial total heat power is adjusted to be equal to I. d ×V ds To get closer to the point where the initial peak value μ of the Gaussian distribution is located, adjust the position μ to the point where the electric field is strongest, which is the gate side near the drain. Adjust the initial variance σ of the Gaussian distribution. 2 A 3D thermal simulation was performed to control the lateral expansion width of the heat source. The simulated temperature was compared with the actual device temperature, and various parameters of the Gaussian function were adjusted until the error was less than 5%, indicating successful 3D model calibration. For multi-finger grid structures, the heat source expression is a superposition of multiple Gaussian functions; the adjusted parameters include μ and σ for each Gaussian distribution. 2 .
[0030] Step 4: In the two-dimensional model, the simplification of dimensions leads to a discrepancy between the heat distribution and reality. By modifying the temperature coefficient of the material's thermal conductivity, the error between the two-dimensional and three-dimensional models can be reduced to less than 5%.
[0031] The heat distribution corresponding to the three-dimensional heat source model is integrated along the thickness direction to obtain a two-dimensional heat distribution curve. This two-dimensional heat distribution curve is then introduced into the two-dimensional thermal simulation model and compared with the three-dimensional thermal simulation results. The temperature coefficient of the material's thermal conductivity in the two-dimensional thermal simulation model is modified; specifically, a correction factor β is introduced to adjust the material's thermal conductivity in the two-dimensional model from k0×T. -α Modified to β(k0×T) -α The goal is to ensure that the temperature obtained from the two-dimensional thermal model simulation is less than 5% different from that obtained from the three-dimensional thermal model simulation, thus determining the two-dimensional thermal simulation model of the device.
[0032] Example 2 The optimization method for the three-dimensional junction temperature of the Ga2O3 device in this embodiment is as follows: Step 1: Construct a three-dimensional geometric model in COMSOL, starting from the substrate. According to the device structure, stack a buffer layer and a Ga2O3 semiconductor layer on it. Construct the source electrode, drain electrode and gate electrode on the surface of the semiconductor layer. Apply a constant heat source to the gate electrode.
[0033] Step 2: Place the sample on a platform with precise temperature control and measure the Raman spectrum of each layer of material within the range of 25~275°C to obtain the Raman temperature coefficient of each layer of material.
[0034] The Raman peaks at each temperature are fitted to obtain the peak positions; for each material, the relationship curve between the peak value and temperature is plotted and approximated linearly, and the slope is the Raman temperature coefficient of each material.
[0035] Multiple marker points are set along the device channel region. When the device is off, i.e., V... ds = 0 V, V gs <V th At that time, the Raman spectrum of each point was collected to obtain the reference peak position ω. ref Apply bias voltage V ds =10 V, V gs ≥V th Raman spectra were collected again at the exact same location, and the peak position ω was obtained. heated Simultaneously, peak position fitting was performed on each pair of spectra, the Raman peak shift at each point was calculated, and the temperature change ΔT = (ω) at each point was calculated using the Raman temperature coefficient χ of Ga2O3 material. heated -ω ref The temperature at the marked point under a specific bias condition is obtained by calculating () / χ. Multiple test points are set on each layer of the device material. By adjusting the focusing position of the Raman laser beam, the Raman spectra of each layer of the device are detected to obtain the longitudinal Raman peak shift information. Combined with the temperature coefficients of each layer, the temperature along the depth direction of the device is calculated. Finally, the three-dimensional temperature distribution of the device is obtained.
[0036] Step 3: The initial model uses a uniform heat source distribution, which does not match the actual situation. By comparing the initial three-dimensional simulation temperature and the measured temperature, the initial three-dimensional heat source model is modified by introducing a Gaussian heat source model, so that the error between the simulated temperature and the measured temperature is less than 5%.
[0037] For a single-finger grid structure, the heat source expression is set as a single Gaussian function: the parameters of the Gaussian function are adjusted, where the initial total heat power is adjusted to be equal to I. d ×V ds To get closer to the point where the initial peak value μ of the Gaussian distribution is located, adjust the position μ to the point where the electric field is strongest, which is the gate side near the drain. Adjust the initial variance σ of the Gaussian distribution. 2 A 3D thermal simulation was performed to control the lateral expansion width of the heat source. The simulated temperature was compared with the actual device temperature, and various parameters of the Gaussian function were adjusted until the error was less than 5%, indicating successful 3D model calibration. For multi-finger grid structures, the heat source expression is a superposition of multiple Gaussian functions; the adjusted parameters include μ and σ for each Gaussian distribution. 2 .
[0038] Step 4: In the two-dimensional model, the simplification of dimensions leads to a discrepancy between the heat distribution and reality. By modifying the temperature coefficient of the material's thermal conductivity, the error between the two-dimensional and three-dimensional models can be reduced to less than 5%.
[0039] The heat distribution corresponding to the three-dimensional heat source model is integrated along the thickness direction to obtain a two-dimensional heat distribution curve. This two-dimensional heat distribution curve is then introduced into the two-dimensional thermal simulation model and compared with the three-dimensional thermal simulation results. The temperature coefficient of the material's thermal conductivity in the two-dimensional thermal simulation model is modified; specifically, a correction factor β is introduced to adjust the material's thermal conductivity in the two-dimensional model from k0×T. -α Modified to β(k0×T) -α The goal is to ensure that the temperature obtained from the two-dimensional thermal model simulation is less than 5% different from that obtained from the three-dimensional thermal model simulation, thus determining the two-dimensional thermal simulation model of the device.
[0040] Example 3 The optimization method for three-dimensional junction temperature analysis of semiconductor devices in this embodiment is as follows: Step 1: Use finite element software to establish the initial two-dimensional and three-dimensional thermal models of the device; the specific method is as follows: Based on the semiconductor device structure, material characteristics of each layer, and device size characteristics, an initial two-dimensional thermal model and a three-dimensional thermal model of the semiconductor device were established using COMSOL finite element software.
[0041] The material characteristics of each layer include thermal conductivity, mass density, and specific heat capacity. Device size characteristics include the number of gates, gate length, gate width, gate-drain spacing, gate-source spacing, substrate thickness, buffer layer thickness, and barrier layer thickness.
[0042] Step 2: Set multiple marker points in the channel layer region between the source and drain of the semiconductor device and in the vertical direction of the semiconductor device, and simultaneously measure the Raman data of each marker point to determine the three-dimensional measurement temperature of the semiconductor device. Step 3: Compare the simulated junction temperature with the measured temperature and modify the 3D thermal model, specifically adjusting the peak value and position of each Gaussian distribution to ensure that the error between the simulated junction temperature and the measured temperature is less than 5%. Step 4: Introduce the modified three-dimensional heat source model into the two-dimensional thermal simulation model and compare it with the three-dimensional thermal simulation results. Modify the temperature coefficient of the material thermal conductivity in the two-dimensional thermal simulation model so that the temperature obtained by the two-dimensional thermal model simulation is less than 5% different from the temperature obtained by the three-dimensional thermal model simulation. Determine the two-dimensional thermal simulation model of the semiconductor device and complete the junction temperature analysis of the semiconductor device.
[0043] Example 4 The optimization method for three-dimensional junction temperature analysis of semiconductor devices in this embodiment, based on Embodiment 3, further includes the following specific steps in step 2: Step 2.1: Measure the Raman spectra of each layer of material inside the semiconductor device in the range of 25~275℃; Step 2.2: Fit the Raman peaks at each temperature to obtain the peak positions; plot the relationship curve between the peak value and temperature for each material, make a linear approximation, and the slope is the Raman temperature coefficient χ for each material; Step 2.3: Set multiple marker points in the channel layer region between the source and drain of the semiconductor device and in the vertical direction of the semiconductor device; wherein the coordinates of each point are different; Step 2.4: With the device off, acquire the Raman spectrum at each point in the device channel region to obtain the reference peak position ω. ref A bias voltage is applied, and Raman spectra are acquired again at the exact same location to obtain the peak position ω. heated For each point, the two spectra are fitted with peak positions, and the Raman peak shift at each point is calculated. Step 2.5: Combining the temperature coefficient χ of the material at each point from Step 2.2, calculate the temperature change at each point: ΔT=(ω heated -ω ref ) / χ; Raman spectra of each layer of material inside the device are collected to obtain the longitudinal Raman peak shift information of the device; combined with the temperature coefficient of each layer of material, the temperature of the device along the depth direction is calculated to obtain the three-dimensional temperature distribution of the device.
[0044] Example 5 The optimization method for three-dimensional junction temperature analysis of semiconductor devices in this embodiment, based on Embodiment 3, further includes the following specific steps in step 3: In a single-finger gate structure of a semiconductor device, the heat source approximates a single Gaussian heat distribution. The initial parameters μ and σ of the Gaussian function are set... 2 Three-dimensional thermal simulation was performed, and the simulated temperature was compared with the actual operating temperature of the device. The parameters μ and σ of the Gaussian distribution were then adjusted. 2 The modification of the three-dimensional heat source model was completed; in the multi-finger gate structure of semiconductor devices, the heat source is approximated as the superposition of multiple Gaussian heat distributions, and the μ and σ of each Gaussian distribution are adjusted. 2 Parameters are used to modify the three-dimensional heat source model; Compare the 3D simulation temperature with the actual operating temperature of the device until the error is less than 5%, then the 3D model is successfully calibrated.
[0045] Example 6 The optimization method for three-dimensional junction temperature analysis of semiconductor devices in this embodiment, based on Embodiment 3, further includes the following specific steps in step 4: Step 4.1: Integrate the corrected three-dimensional heat source model along the thickness direction to obtain the two-dimensional heat distribution curve; Step 4.2: Introduce a two-dimensional heat distribution curve into the two-dimensional thermal simulation model and compare it with the three-dimensional thermal simulation results. Modify the temperature coefficient of the material's thermal conductivity in the two-dimensional thermal simulation model. Specifically, introduce a correction factor β to adjust the material's thermal conductivity in the two-dimensional model from k0×T. -α Modified to β(k0×T) -α This ensures that the temperature obtained from the simulation of the corrected two-dimensional thermal model has an error of less than 5% compared to the temperature obtained from the simulation of the corrected three-dimensional thermal model, thus determining the two-dimensional thermal simulation model of the semiconductor device.
Claims
1. An optimized method for three-dimensional junction temperature analysis of semiconductor devices, characterized in that, The specific method is as follows: Step 1: Use finite element software to establish the initial two-dimensional and three-dimensional thermal models of the device; Step 2: Set multiple marker points in the channel layer region between the source and drain of the semiconductor device and in the vertical direction of the semiconductor device, and simultaneously measure the Raman data of each marker point to determine the three-dimensional measurement temperature of the semiconductor device. Step 3: Compare the simulated junction temperature with the measured temperature and modify the 3D thermal model to ensure that the error between the simulated junction temperature and the measured temperature is less than 5%. Step 4: Introduce the modified three-dimensional heat source model into the two-dimensional thermal simulation model and compare it with the three-dimensional thermal simulation results. Modify the temperature coefficient of the material thermal conductivity in the two-dimensional thermal simulation model so that the temperature obtained by the two-dimensional thermal model simulation is less than 5% different from the temperature obtained by the three-dimensional thermal model simulation. Determine the two-dimensional thermal simulation model of the semiconductor device and complete the junction temperature analysis of the semiconductor device.
2. The optimization method for three-dimensional junction temperature analysis of semiconductor devices according to claim 1, characterized in that, The specific method for step 1 is as follows: Based on the semiconductor device structure, material characteristics of each layer, and device size characteristics, an initial two-dimensional thermal model and a three-dimensional thermal model of the semiconductor device were established using COMSOL finite element software.
3. The optimization method for three-dimensional junction temperature analysis of semiconductor devices according to claim 2, characterized in that, The material characteristics of each layer include thermal conductivity, mass density, and specific heat capacity.
4. The optimization method for three-dimensional junction temperature analysis of semiconductor devices according to claim 2, characterized in that, The device size characteristics include the number of gates, gate length, gate width, gate-drain spacing, gate-source spacing, substrate thickness, buffer layer thickness, and barrier layer thickness.
5. The optimization method for three-dimensional junction temperature analysis of semiconductor devices according to claim 1, characterized in that, The specific process of step 2 is as follows: Step 2.1: Measure the Raman spectra of each layer of material inside the semiconductor device in the range of 25~275℃; Step 2.2: Fit the Raman peaks at each temperature to obtain the peak positions; plot the relationship curve between the peak value and temperature for each material, make a linear approximation, and the slope is the Raman temperature coefficient χ for each material; Step 2.3: Set multiple marker points in the channel layer region between the source and drain of the semiconductor device and in the vertical direction of the semiconductor device; wherein the coordinates of each point are different; Step 2.4: With the device off, acquire the Raman spectrum at each point in the device channel region to obtain the reference peak position ω. ref A bias voltage is applied, and Raman spectra are acquired again at the exact same location to obtain the peak position ω. heated For each location, peak positions are fitted to the two spectra, and the Raman peak shift at each location is calculated. Combining this with the temperature coefficient χ of the material corresponding to each location described in step 2.2, the temperature change at each location is calculated. ΔT=(ω heated -oh ref ) / x; Finally, the temperature T_ of the marked point under a specific bias condition is obtained. measured = T_ ref + ΔT; Step 2.5: Acquire two Raman spectra of each layer of material inside the device to obtain the longitudinal Raman peak shift; combine the temperature coefficient χ of each layer of material to calculate the temperature change ΔT, and obtain the temperature T of the device along the depth direction. measured = T ref + ΔT yields the three-dimensional temperature distribution of the device.
6. The optimization method for three-dimensional junction temperature analysis of semiconductor devices according to claim 1, characterized in that, The specific process of step 3 is as follows: In a single-finger gate structure of a semiconductor device, the heat source approximates a single Gaussian heat distribution. The initial parameters μ and σ of the Gaussian function are set... 2 Three-dimensional thermal simulation was performed, and the simulated temperature was compared with the actual operating temperature of the device. The parameters μ and σ of the Gaussian distribution were then adjusted. 2 The modification of the three-dimensional heat source model was completed; in the multi-finger gate structure of semiconductor devices, the heat source is approximated as the superposition of multiple Gaussian heat distributions, and the μ and σ of each Gaussian distribution are adjusted. 2 Parameters are used to modify the three-dimensional heat source model; Compare the 3D simulation temperature with the actual operating temperature of the device until the error is less than 5%, then the 3D model is successfully calibrated.
7. The optimization method for three-dimensional junction temperature analysis of semiconductor devices according to claim 1, characterized in that, The specific process of step 4 is as follows: Step 4.1: Integrate the corrected three-dimensional heat source model along the thickness direction to obtain the two-dimensional heat distribution curve; Step 4.2: Introduce a two-dimensional thermal distribution curve into the two-dimensional thermal simulation model and compare it with the three-dimensional thermal simulation results. Modify the temperature coefficient of the material thermal conductivity in the two-dimensional thermal simulation model to determine the two-dimensional thermal simulation model of the semiconductor device.
8. The optimization method for three-dimensional junction temperature analysis of semiconductor devices according to claim 7, characterized in that, The specific method for modifying the temperature coefficient of the material's thermal conductivity in step 4.2 is as follows: Introducing a correction factor β changes the thermal conductivity of the material in the two-dimensional model from k0×T -α Modified to β(k0×T) -α This ensures that the temperature obtained from the simulation of the corrected two-dimensional thermal model has an error of less than 5% compared to the temperature obtained from the simulation of the corrected three-dimensional thermal model, thus determining the two-dimensional thermal simulation model of the semiconductor device.