Harmonic shaping oscillator circuit
By employing a specific combination of inductors and capacitors in the oscillator circuit, third harmonic impedance expansion and dual common-mode resonance were achieved, solving the problems of decreased common-mode Q value and poor noise suppression, thus improving the performance and efficiency of the oscillator.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-11-21
- Publication Date
- 2026-03-27
Smart Images
Figure CN121749903A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of integrated circuit technology, and more particularly to a harmonic shaping oscillator circuit. Background Technology
[0002] With the rapid rise of wireless communication applications such as the Internet of Things (IoT) and the Internet of Vehicles (IoV), communication systems are increasingly reliant on low-power wide-area network (LPWAN) technologies, which in turn places higher demands on the performance of wireless communication systems. As a core module in wireless communication systems, the oscillator's performance directly affects the system's transmission quality and efficiency. In mobile terminals, portable devices, and high-speed wireless communication and radar systems, oscillators not only need to possess low power consumption characteristics to extend device battery life, but also need to have a compact size to meet the design requirements of high integration and low cost; furthermore, they must have low phase noise to ensure communication stability and reliability.
[0003] Existing solutions utilize harmonic shaping techniques to improve the phase noise performance and resonant quality factor (Q) of LC oscillators. One solution utilizes a resonant circuit to provide inherent common-mode resonance at twice the oscillation frequency, thus avoiding the need for an additional tail inductor. However, this solution suffers from a low common-mode Q-value due to common-mode flux cancellation. Furthermore, this solution requires manual harmonic tuning using a single-ended capacitor to maintain stable performance over a wide tuning range, which further reduces the Q-value of the resonant cavity. To avoid manual harmonic tuning, a second solution introduces a head resonator to broaden the common-mode resonant bandwidth, but this consumes additional chip area. A third solution proposes a dual-core F23 class oscillator with common-mode noise self-cancellation and isolation capabilities, but its second harmonic common-mode resonance and third harmonic differential-mode resonance exhibit narrow bands, reducing its suppression of flicker and thermal noise.
[0004] Therefore, existing technologies still need to be improved and developed. Summary of the Invention
[0005] In view of the shortcomings of the prior art, the purpose of this invention is to provide a harmonic shaping oscillator circuit to solve the problems of decreased common-mode Q value, need for additional chip area, and reduced suppression effect on flicker noise and thermal noise in existing oscillator circuits.
[0006] The technical solution of the present invention is as follows: A harmonic shaping oscillator circuit includes: a PMOS cross-coupled pair, an NMOS cross-coupled pair, a first source inductor unit, a second source inductor unit, a drain inductor unit, a first adjustable capacitor pair, a second adjustable capacitor pair, a first differential fixed capacitor unit, and a second differential fixed capacitor unit; wherein... The first source inductor unit is used to connect to the power supply voltage, and the two ends of the first source inductor unit are respectively connected to the two source terminals of the PMOS cross-coupled pair; the second source inductor unit is used to ground, and the two ends of the second source inductor unit are respectively connected to the two source terminals of the NMOS cross-coupled pair. The two ends of the drain inductor unit are respectively connected to the two drain terminals of the PMOS cross-coupled pair and the two drain terminals of the NMOS cross-coupled pair; The two ends of the first adjustable capacitor pair are respectively connected to the two ends of the first source inductor unit; the two ends of the second adjustable capacitor pair are respectively connected to the two ends of the second source inductor unit. The two ends of the first differential fixed capacitor unit are respectively connected to the two ends of the first source inductor unit; the two ends of the second differential fixed capacitor unit are respectively connected to the two ends of the second source inductor unit.
[0007] In a further embodiment of the present invention, the harmonic shaping oscillator circuit further includes: a differential tuning capacitor; one end of the differential tuning capacitor is connected to one end of the drain inductor unit, and the other end of the differential tuning capacitor is connected to the other drain terminal of the PMOS cross-coupled pair and the other end of the drain inductor unit.
[0008] In a further embodiment of the present invention, the PMOS cross-coupled pair includes a first PMOS transistor and a second PMOS transistor; The source of the first PMOS transistor is connected to one end of the first source inductor unit, the drain of the first PMOS transistor is connected to one end of the drain inductor unit, and the gate of the first PMOS transistor is connected to one drain end of the NMOS cross-coupled unit. The source of the second PMOS transistor is connected to the other end of the first source inductor unit, the drain of the second PMOS transistor is connected to the other end of the drain inductor unit, and the gate of the second PMOS transistor is connected to the other drain end of the NMOS cross-coupled pair.
[0009] In a further embodiment of the present invention, the NMOS cross-coupled pair includes a first NMOS transistor and a second NMOS transistor; The source of the first NMOS transistor is connected to one end of the second source inductor unit, the drain of the first NMOS transistor is connected to one end of the drain inductor unit, and the gate of the first NMOS transistor is connected to the drain of the second PMOS transistor. The source of the second NMOS transistor is connected to the other end of the second source inductor unit, the drain of the second NMOS transistor is connected to the other end of the drain inductor unit, and the gate of the second NMOS transistor is connected to the drain of the first PMOS transistor.
[0010] In a further embodiment of the present invention, the first source inductor unit includes a first inductor and a second inductor; one end of the first inductor is connected to the source of the first PMOS transistor, and the other end of the first inductor is connected to one end of the second inductor; the other end of the second inductor is connected to the source of the second PMOS transistor; the common connection of the first inductor and the second inductor is connected to a power supply voltage. The second source inductor unit includes a third inductor and a fourth inductor; one end of the third inductor is connected to the source of the first NMOS transistor, the other end of the third inductor is connected to one end of the fourth inductor, and the other end of the fourth inductor is connected to the source of the second NMOS transistor; the common terminal of the third inductor and the fourth inductor is grounded.
[0011] In a further embodiment of the present invention, the drain inductor unit includes a fifth inductor and a sixth inductor; one end of the fifth inductor is connected to the drain of the first PMOS transistor and the drain of the first NMOS transistor, and the other end of the fifth inductor is connected to one end of the sixth inductor; the other end of the sixth inductor is connected to the drain of the second PMOS transistor and the drain of the second NMOS transistor.
[0012] In a further embodiment of the present invention, the first adjustable capacitor pair includes a first adjustable capacitor and a second adjustable capacitor; one end of the first adjustable capacitor is connected to one end of the first source inductor unit, and the other end of the first adjustable capacitor is connected to one end of the second adjustable capacitor; the other end of the second adjustable capacitor is connected to the other end of the first source inductor unit; the common terminal of the first adjustable capacitor and the second adjustable capacitor is grounded. The second adjustable capacitor pair includes a third adjustable capacitor and a fourth adjustable capacitor; one end of the third adjustable capacitor is connected to one end of the second source inductor unit, the other end of the third adjustable capacitor is connected to one end of the fourth adjustable capacitor, and the other end of the fourth adjustable capacitor is connected to the other end of the second source inductor unit; the common terminal of the third adjustable capacitor and the fourth adjustable capacitor is grounded.
[0013] In a further embodiment of the present invention, the first differential fixed capacitor unit includes a first differential fixed capacitor and a second differential fixed capacitor; one end of the first differential fixed capacitor is connected to one end of the first source inductor unit, the other end of the first differential fixed capacitor is connected to one end of the second differential fixed capacitor, and the other end of the second differential fixed capacitor is connected to the other end of the first source inductor unit. The second differential fixed capacitor unit includes a third differential fixed capacitor and a fourth differential fixed capacitor; one end of the third differential fixed capacitor is connected to one end of the second source inductor unit, the other end of the third differential fixed capacitor is connected to one end of the fourth differential fixed capacitor, and the other end of the fourth differential fixed capacitor is connected to the other end of the second source inductor unit.
[0014] In a further embodiment of the present invention, under differential-mode excitation, the first source inductor unit and the second source inductor unit are coupled and resonate with the first differential fixed capacitor unit and the second differential fixed capacitor unit to achieve third harmonic impedance expansion; under common-mode excitation, the resonance formed by the coupling of the first source inductor unit and the second source inductor unit and the first differential fixed capacitor unit and the second differential fixed capacitor unit forms a dual common-mode resonant impedance at the second and fourth harmonic frequencies.
[0015] In a further embodiment of the present invention, the first source inductor unit, the second source inductor unit, and the drain inductor unit constitute a transformer; wherein, the first source inductor unit is coupled to the drain inductor unit, and the second source inductor unit is coupled to the drain inductor unit and constitutes transformer feedback.
[0016] The present invention provides a harmonic shaping oscillator circuit, which includes: a PMOS cross-coupled pair, an NMOS cross-coupled pair, a first source inductor unit, a second source inductor unit, a drain inductor unit, a first adjustable capacitor pair, a second adjustable capacitor pair, a first differential fixed capacitor unit, and a second differential fixed capacitor unit. The first source inductor unit is used to connect to the power supply voltage, and its two ends are respectively connected to the two source terminals of the PMOS cross-coupled pair; the second source inductor unit is used to ground, and its two ends are respectively connected to the two source terminals of the NMOS cross-coupled pair; the two ends of the drain inductor unit are respectively connected to the two drain terminals of the PMOS cross-coupled pair and the two drain terminals of the NMOS cross-coupled pair; the two ends of the first adjustable capacitor pair are respectively connected to the two ends of the first source inductor unit; the two ends of the second adjustable capacitor pair are respectively connected to the two ends of the second source inductor unit; the two ends of the first differential fixed capacitor unit are respectively connected to the two ends of the first source inductor unit; and the two ends of the differential fixed capacitor unit are respectively connected to the two ends of the second source inductor unit. The transformer constructed by the present invention, consisting of a first source inductor unit, a second source inductor unit, and a drain inductor unit, can simultaneously achieve differential mode third harmonic impedance expansion and second and fourth harmonic dual common-mode resonance. This reduces flicker noise and phase noise while avoiding the introduction of additional inductors, thus not occupying additional chip area, and improving the Q value of the resonant cavity. Attached Figure Description
[0017] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on the structures shown in these drawings without creative effort.
[0018] Figure 1 This is a circuit diagram of the harmonic shaping oscillator circuit in this invention.
[0019] Figure 2 This is the layout of the transformer in this invention.
[0020] Figure 3 This is a layout of the differential-mode transformer and its equivalent circuit diagram, along with differential-mode third-order impedance bandwidth extension, in one embodiment of the present invention.
[0021] Figure 4 This is a layout of a common-mode transformer and its equivalent circuit diagram, along with a fourth-order dual common-mode impedance, in one embodiment of the present invention.
[0022] Figure 5 This is a schematic diagram of a common-mode transformer in one embodiment of the present invention, and the coupling coefficients of the differential-mode drain inductor unit and the first and second source inductor units of the common-mode transformer.
[0023] Figure 6 These are the pulse sensitivity functions and effective sensitivity functions of PMOS and NMOS simulated in one embodiment of the present invention.
[0024] Figure 7 This is a voltage waveform diagram of an oscillator in one embodiment of the present invention.
[0025] The following labels in the attached diagram represent the following inductance values: L1, drain inductor unit; L11, fifth inductor; L12, sixth inductor; L2, first source inductor unit; L21, first inductor; L22, second inductor; L3, second source inductor unit; L31, third inductor; L32, fourth inductor; C1, differential tuning capacitor; C2, first adjustable capacitor pair; C21, first adjustable capacitor; C22, second adjustable capacitor; C3, first differential fixed capacitor unit; C31, first differential... Fixed capacitor; C32, second differential fixed capacitor; C4, second differential fixed capacitor unit; C41, third differential fixed capacitor; C42, fourth differential fixed capacitor; C5, second adjustable capacitor pair; C51, third adjustable capacitor; C52, fourth adjustable capacitor; 10, PMOS cross-coupled pair; M1, first PMOS transistor; M2, second PMOS transistor; 20, NMOS cross-coupled pair; M3, first NMOS transistor; M4, second NMOS transistor. Detailed Implementation
[0026] This invention provides a harmonic shaping oscillator circuit. To make the objectives, technical solutions, and effects of this invention clearer and more explicit, the invention will be further described in detail below with reference to the accompanying drawings and examples. It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention.
[0027] In the implementation methods and claims, unless otherwise specified in the text, the terms "a," "an," "the," and "the" may also include plural forms. If the embodiments of the present invention involve descriptions of "first," "second," etc., such descriptions are for descriptive purposes only and should not be construed as indicating or implying their relative importance or implicitly specifying the number of indicated technical features. Therefore, a feature defined with "first" or "second" may explicitly or implicitly include at least one of those features.
[0028] It should be further understood that the term "comprising" as used in this specification means the presence of the stated features, integers, steps, operations, elements, and / or components, but does not exclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and / or groups thereof. It should be understood that when an element is referred to as "connected" or "coupled" to another element, it can be directly connected or coupled to the other element, or there may be intermediate elements present. Furthermore, "connected" or "coupled" as used herein can include wireless connections or wireless coupling. The term "and / or" as used herein includes all or any of the units and all combinations thereof of one or more associatedly listed items.
[0029] It will be understood by those skilled in the art that, unless otherwise defined, all terms used herein (including technical and scientific terms) have the same meaning as commonly understood by one of ordinary skill in the art to which this invention pertains. It should also be understood that terms such as those defined in general dictionaries should be understood to have the same meaning as in the context of the prior art, and should not be interpreted in an idealized or overly formal sense unless specifically defined as herein.
[0030] Furthermore, the technical solutions of the various embodiments can be combined with each other, but only if they are feasible for those skilled in the art. If the combination of technical solutions is contradictory or cannot be implemented, it should be considered that such combination of technical solutions does not exist and is not within the scope of protection claimed by this invention.
[0031] Please also refer to Figures 1 to 7 The present invention provides a preferred embodiment of a harmonic shaping oscillator circuit.
[0032] In some embodiments, such as Figure 1 and Figure 2 As shown, the present invention provides a harmonic shaping oscillator circuit, which includes: a PMOS cross-coupled pair 10, an NMOS cross-coupled pair 20, a first source inductor unit L2, a second source inductor unit L3, a drain inductor unit L1, a first adjustable capacitor pair C2, a second adjustable capacitor pair C5, a first differential fixed capacitor unit C3, and a second differential fixed capacitor unit C4. Wherein, the first source inductor unit L2 is used to connect to the power supply voltage VCC, and the two ends of the first source inductor unit L2 are respectively connected to the two source terminals of the PMOS cross-coupled pair 10; the second source inductor unit L3 is used to ground, and the two ends of the second source inductor unit L3 are respectively connected to the two source terminals of the NMOS cross-coupled pair 20; the two ends of the drain inductor unit L1 are respectively connected to the two drain terminals of the PMOS cross-coupled pair 10 and the two drain terminals of the NMOS cross-coupled pair 20; the two ends of the first adjustable capacitor pair C2 are respectively connected to the two ends of the first source inductor unit L2; the two ends of the second adjustable capacitor pair C5 are respectively connected to the two ends of the second source inductor unit L3; the two ends of the first differential fixed capacitor unit C3 are respectively connected to the two ends of the first source inductor unit L2; the two ends of the second differential fixed capacitor unit C4 are respectively connected to the two ends of the second source inductor unit L3.
[0033] In this embodiment, the first source inductor L2, the second source inductor L3, and the drain inductor L1 constitute a three-turn coupled transformer or a two-turn coupled transformer. In this embodiment, the transformer formed by the first source inductor L2, the second source inductor L3, and the drain inductor L1 is a three-turn coupled transformer, wherein the coupling coefficient between the drain inductor L1 and the first source inductor L2 is K12, the coupling coefficient between the drain inductor L1 and the second source inductor L3 is K13, and the coupling coefficient between the first source inductor L2 and the second source inductor L3 is K23. The PMOS cross-coupled pair 10 and the NMOS cross-coupled pair 20 form a complementary architecture, which can reduce power consumption. The first adjustable capacitor pair C2 and the second adjustable capacitor pair C5 can adjust the frequency of the oscillation circuit.
[0034] Under differential mode (DM) excitation, the first source inductor unit L2 and the second source inductor unit L3 are coupled and resonate with the first differential fixed capacitor unit C3 and the second differential fixed capacitor unit C4 to achieve third harmonic impedance expansion. Figure 3 As shown, where Figure 3 In this context, 'a' represents the layout of the differential-mode transformer and its equivalent circuit diagram. Figure 3 In this context, 'b' represents the differential-mode third impedance bandwidth extension. The above architecture can automatically calibrate the fundamental and third harmonics without the need for an additional capacitor array, thus effectively resisting the effects of PVT (process, voltage, and temperature) variations.
[0035] Under common-mode (CM) excitation, the first source inductor unit L2 and the second source inductor unit L3, coupled with the resonance formed by the first differential fixed capacitor unit C3 and the second differential fixed capacitor unit C4, create a dual common-mode resonant impedance at the second and fourth harmonic frequencies, which can improve flashover noise and phase noise. Figure 4 As shown, where, Figure 4 In this context, 'a' represents the layout of a common-mode transformer and its equivalent circuit diagram. Figure 4 The 'b' in the figure represents the fourth-order dual common-mode impedance, which eliminates the need for an additional inductor, resulting in a more compact overall chip area. Furthermore, the aforementioned resonance method is implicit resonance (secondary common-mode resonance does not require an additional transformer in the main resonant transformer), thus breaking the common-mode resonance quality factor. This trade-off with the coupling coefficient of the resonant coil improves the Q value of the resonant cavity. It should be noted that... k refers to the self-coupling coefficient, and there is no 1-k in this embodiment.
[0036] In this embodiment, because the first source inductor unit L2, the second source inductor unit L3, and the drain inductor unit L1 have opposite coupling characteristics, the power supply noise and ground noise produce opposite effects in the drain inductor unit L1, thereby canceling each other out and significantly reducing the total noise current injected into the oscillator, achieving common-mode noise self-cancellation. Figure 5 As shown, where Figure 5 In this diagram, 'a' represents a schematic diagram of a common-mode transformer. Figure 5 In this paper, b represents the coupling coefficient between the differential-mode drain inductor unit and the common-mode first and second source inductor units. This invention achieves an extremely low differential-mode to common-mode coupling coefficient.
[0037] Furthermore, in this embodiment, the first source inductor unit L2 and the second source inductor unit L3 are coupled to form transformer feedback. When current multiplexing is implemented in a complementary architecture, transformer feedback can significantly enhance the gate-source voltage swing, such as... Figure 7 As shown, in Figure 7 In the middle, V G V represents the gate voltage. S V represents the source voltage. DS V represents the drain-source voltage. GS This represents the gate-source voltage, which can improve transconductance and power efficiency, thereby effectively reducing oscillator power.
[0038] In the above technical solution, the present invention adopts a complementary architecture of PMOS cross-coupled pair 10 and NMOS cross-coupled pair 20, and uses a transformer composed of first source inductor unit L2, second source inductor unit L3 and drain inductor unit L1 to simultaneously realize differential mode third harmonic impedance expansion and second and fourth harmonic dual common mode resonance, as well as transformer feedback swing enhancement mechanism. Under the premise of maintaining a compact chip area, a low power consumption, low phase noise and high power efficiency oscillator structure is realized.
[0039] In some embodiments, such as Figure 1 As shown, the harmonic shaping oscillator circuit further includes: a differential tuning capacitor C1; one end of the differential tuning capacitor C1 is connected to one end of the drain inductor unit L1, and the other end of the differential tuning capacitor C1 is connected to the other drain terminal of the PMOS cross-coupled pair 10 and the other end of the drain inductor unit L1.
[0040] In this embodiment, the differential tuning capacitor C1 is a variable capacitor. By connecting a differential tuning capacitor C1 in parallel with the drain inductor unit L1, the frequency of the resonant cavity can be adjusted.
[0041] In some embodiments, such as Figure 1 As shown, the PMOS cross-coupled pair 20 includes a first PMOS transistor M1 and a second PMOS transistor M2; the source of the first PMOS transistor M1 is connected to one end of the first source inductor unit L2, the drain of the first PMOS transistor M1 is connected to one end of the drain inductor unit L1, and the gate of the first PMOS transistor M1 is connected to one drain terminal of the NMOS cross-coupled unit; the source of the second PMOS transistor M2 is connected to the other end of the first source inductor unit L2, the drain of the second PMOS transistor is connected to the other end of the drain inductor unit L1, and the gate of the second PMOS transistor M2 is connected to the other drain terminal of the NMOS cross-coupled pair 20.
[0042] Further, the NMOS cross-coupled pair 20 includes a first NMOS transistor M3 and a second NMOS transistor M4; the source of the first NMOS transistor M3 is connected to one end of the second source inductor unit L3, the drain of the first NMOS transistor M3 is connected to one end of the drain inductor unit L1, and the gate of the first NMOS transistor M3 is connected to the drain of the second PMOS transistor M2; the source of the second NMOS transistor M4 is connected to the other end of the second source inductor unit L3, the drain of the second NMOS transistor M4 is connected to the other end of the drain inductor unit L1, and the gate of the second NMOS transistor M4 is connected to the drain of the first PMOS transistor M1.
[0043] In this embodiment, the first PMOS transistor M1 and the second PMOS transistor M2 are cross-coupled to form a PMOS cross-coupled pair, and the first NMOS transistor M3 and the second NMOS transistor M4 are cross-coupled to form an NMOS cross-coupled pair. The PMOS cross-coupled pair 10 and the NMOS cross-coupled pair 20 form a complementary architecture, which can reduce the power consumption of the oscillator circuit.
[0044] In some embodiments, such as Figure 1 As shown, the first source inductor unit L2 includes a first inductor L21 and a second inductor L22; one end of the first inductor L21 is connected to the source of the first PMOS transistor M1, and the other end of the first inductor L21 is connected to one end of the second inductor L22; the other end of the second inductor L22 is connected to the source of the second PMOS transistor M2; the common terminal of the first inductor L21 and the second inductor L22 is connected to the power supply voltage VCC; the second source inductor unit L3 includes a third inductor L31 and a fourth inductor L32; one end of the third inductor L31 is connected to the source of the first NMOS transistor M3, and the other end of the third inductor L31 is connected to one end of the fourth inductor L32; the other end of the fourth inductor L32 is connected to the source of the second NMOS transistor M4; the common terminal of the third inductor L31 and the fourth inductor L32 is grounded to GND.
[0045] Furthermore, the drain inductor unit L1 includes a fifth inductor L11 and a sixth inductor L12; one end of the fifth inductor L11 is connected to the drain of the first PMOS transistor M1 and the drain of the first NMOS transistor M3, and the other end of the fifth inductor L11 is connected to one end of the sixth inductor L12; the other end of the sixth inductor L12 is connected to the drain of the second PMOS transistor M2 and the drain of the second NMOS transistor M4.
[0046] In this embodiment, the first inductor L21 and the second inductor L22 are the source inductors of the PMOS cross-coupled pair 10, the third inductor L31 and the fourth inductor L32 are the source inductors of the NMOS cross-coupled pair 20, and the fifth inductor L11 and the sixth inductor L12 are the drain inductors of the PMOS cross-coupled pair 10 and the NMOS cross-coupled pair 20. The first inductor L21, the second inductor L22, and the third inductor L31 and the fourth inductor L32 have opposite coupling characteristics. Power supply noise and ground noise produce opposite reactions in the fifth inductor L11 and the sixth inductor L12, thereby canceling each other out and reducing the total noise current injected into the oscillator. Figure 5As shown, the oscillator circuit provided by this invention achieves an extremely low differential-to-common-mode coupling coefficient. Furthermore, in terms of circuit structure, the common-mode current path is optimized to the shortest path, bringing the transformer's power supply and ground close together, which helps maintain low flicker noise corners and phase noise levels. Figure 6 As shown, Figure 6 In this context, 'a' represents the simulated PMOS and NMOS pulse sensitivity functions. Figure 6 In this context, 'b' represents the effective pulse sensitivity function of the simulated PMOS and NMOS, from... Figure 6 As can be seen, the effective pulse sensitivity function exhibits good symmetry and achieves low flicker noise.
[0047] In some embodiments, such as Figure 1 As shown, the first adjustable capacitor pair C2 includes a first adjustable capacitor C21 and a second adjustable capacitor C22; one end of the first adjustable capacitor C21 is connected to one end of the first source inductor unit L2, and the other end of the first adjustable capacitor C21 is connected to one end of the second adjustable capacitor C22; the other end of the second adjustable capacitor C22 is connected to the other end of the first source inductor unit L2; the common terminal of the first adjustable capacitor C21 and the second adjustable capacitor C22 is grounded; the second adjustable capacitor pair C5 includes a third adjustable capacitor C51 and a fourth adjustable capacitor C52; one end of the third adjustable capacitor C51 is connected to one end of the second source inductor unit L3, and the other end of the third adjustable capacitor C51 is connected to one end of the fourth adjustable capacitor C52; the other end of the fourth adjustable capacitor C52 is connected to the other end of the second source inductor unit L3; the common terminal of the third adjustable capacitor C51 and the fourth adjustable capacitor C52 is grounded.
[0048] In this embodiment, the first adjustable capacitor C21, the second adjustable capacitor C22, the third adjustable capacitor C51, and the fourth adjustable capacitor C52 are variable capacitors, which can adjust the frequency of the oscillator.
[0049] In some embodiments, such as Figure 1As shown, the first differential fixed capacitor unit C3 includes a first differential fixed capacitor C31 and a second differential fixed capacitor C32; one end of the first differential fixed capacitor C31 is connected to one end of the first source inductor unit L2, and the other end of the first differential fixed capacitor C31 is connected to one end of the second differential fixed capacitor C32, and the other end of the second differential fixed capacitor C32 is connected to the other end of the first source inductor unit L2; the second differential fixed capacitor unit C4 includes a third differential fixed capacitor C41 and a fourth differential fixed capacitor C42; one end of the third differential fixed capacitor C41 is connected to one end of the second source inductor unit L3, and the other end of the third differential fixed capacitor C41 is connected to one end of the fourth differential fixed capacitor C42, and the other end of the fourth differential fixed capacitor C42 is connected to the other end of the second source inductor unit L3.
[0050] In this embodiment, the first source inductor unit L2 resonates with the first differential fixed capacitor C31 and the second differential fixed capacitor C32, while the second source inductor unit L3 resonates with the third differential fixed capacitor C41 and the fourth differential fixed capacitor C42, thereby achieving third harmonic impedance extension. In this embodiment, automatic alignment of the fundamental frequency and the third harmonic can be achieved without the need for an additional capacitor array.
[0051] In summary, the harmonic shaping oscillator circuit provided by this invention has the following beneficial effects: A single three-turn transformer is used to simultaneously achieve differential mode third harmonic impedance extension and second and fourth harmonic dual common-mode resonance. This reduces flicker noise and phase noise while avoiding the introduction of additional inductance, thus ensuring a compact chip area. The proposed implicit resonance method breaks through the common-mode limitation. The trade-off between the Q value and the coil coupling coefficient effectively improves the Q value of the resonant cavity; In a three-turn transformer, the PMOS and NMOS source inductors have opposite coupling effects, which causes noise from the power supply and ground to cancel each other out in the differential mode drain inductor, thereby significantly reducing the total noise current injected into the oscillator. The complementary architecture enables current reuse, and the combination of transformer feedback significantly enhances the gate-source voltage swing, thereby increasing transconductance and reducing power consumption.
[0052] It should be understood that the application of the present invention is not limited to the examples above. Those skilled in the art can make improvements or modifications based on the above description, and all such improvements and modifications should fall within the protection scope of the appended claims.
Claims
1. A harmonic shaping oscillator circuit, characterized in that, include: The system comprises a PMOS cross-coupled pair, an NMOS cross-coupled pair, a first source inductor unit, a second source inductor unit, a drain inductor unit, a first adjustable capacitor pair, a second adjustable capacitor pair, a first differential fixed capacitor unit, and a second differential fixed capacitor unit; wherein... The first source inductor unit is used to connect to the power supply voltage, and the two ends of the first source inductor unit are respectively connected to the two source terminals of the PMOS cross-coupled pair; the second source inductor unit is used to ground, and the two ends of the second source inductor unit are respectively connected to the two source terminals of the NMOS cross-coupled pair. The two ends of the drain inductor unit are respectively connected to the two drain terminals of the PMOS cross-coupled pair and the two drain terminals of the NMOS cross-coupled pair; The two ends of the first adjustable capacitor pair are respectively connected to the two ends of the first source inductor unit; the two ends of the second adjustable capacitor pair are respectively connected to the two ends of the second source inductor unit. The two ends of the first differential fixed capacitor unit are respectively connected to the two ends of the first source inductor unit; the two ends of the second differential fixed capacitor unit are respectively connected to the two ends of the second source inductor unit.
2. The harmonic shaping oscillator circuit according to claim 1, characterized in that, Also includes: Differential tuning capacitor; One end of the differential tuning capacitor is connected to one end of the drain inductor unit, and the other end of the differential tuning capacitor is connected to the other drain terminal of the PMOS cross-coupled pair and the other end of the drain inductor unit.
3. The harmonic shaping oscillator circuit according to claim 1, characterized in that, The PMOS cross-coupled pair includes a first PMOS transistor and a second PMOS transistor; The source of the first PMOS transistor is connected to one end of the first source inductor unit, the drain of the first PMOS transistor is connected to one end of the drain inductor unit, and the gate of the first PMOS transistor is connected to one drain end of the NMOS cross-coupled unit. The source of the second PMOS transistor is connected to the other end of the first source inductor unit, the drain of the second PMOS transistor is connected to the other end of the drain inductor unit, and the gate of the second PMOS transistor is connected to the other drain end of the NMOS cross-coupled pair.
4. The harmonic shaping oscillator circuit according to claim 3, characterized in that, The NMOS cross-coupled pair includes a first NMOS transistor and a second NMOS transistor; The source of the first NMOS transistor is connected to one end of the second source inductor unit, the drain of the first NMOS transistor is connected to one end of the drain inductor unit, and the gate of the first NMOS transistor is connected to the drain of the second PMOS transistor. The source of the second NMOS transistor is connected to the other end of the second source inductor unit, the drain of the second NMOS transistor is connected to the other end of the drain inductor unit, and the gate of the second NMOS transistor is connected to the drain of the first PMOS transistor.
5. The harmonic shaping oscillator circuit according to claim 4, characterized in that, The first source inductor unit includes a first inductor and a second inductor; one end of the first inductor is connected to the source of the first PMOS transistor, and the other end of the first inductor is connected to one end of the second inductor; the other end of the second inductor is connected to the source of the second PMOS transistor; the first inductor and the second inductor share a common connection point with the power supply voltage. The second source inductor unit includes a third inductor and a fourth inductor; one end of the third inductor is connected to the source of the first NMOS transistor, the other end of the third inductor is connected to one end of the fourth inductor, and the other end of the fourth inductor is connected to the source of the second NMOS transistor; the common terminal of the third inductor and the fourth inductor is grounded.
6. The harmonic shaping oscillator circuit according to claim 5, characterized in that, The drain inductor unit includes a fifth inductor and a sixth inductor; one end of the fifth inductor is connected to the drain of the first PMOS transistor and the drain of the first NMOS transistor, and the other end of the fifth inductor is connected to one end of the sixth inductor; the other end of the sixth inductor is connected to the drain of the second PMOS transistor and the drain of the second NMOS transistor.
7. The harmonic shaping oscillator circuit according to claim 1, characterized in that, The first adjustable capacitor pair includes a first adjustable capacitor and a second adjustable capacitor; one end of the first adjustable capacitor is connected to one end of the first source inductor unit, and the other end of the first adjustable capacitor is connected to one end of the second adjustable capacitor; the other end of the second adjustable capacitor is connected to the other end of the first source inductor unit; the common terminal of the first adjustable capacitor and the second adjustable capacitor is grounded; The second adjustable capacitor pair includes a third adjustable capacitor and a fourth adjustable capacitor; one end of the third adjustable capacitor is connected to one end of the second source inductor unit, the other end of the third adjustable capacitor is connected to one end of the fourth adjustable capacitor, and the other end of the fourth adjustable capacitor is connected to the other end of the second source inductor unit; the common terminal of the third adjustable capacitor and the fourth adjustable capacitor is grounded.
8. The harmonic shaping oscillator circuit according to claim 1, characterized in that, The first differential fixed capacitor unit includes a first differential fixed capacitor and a second differential fixed capacitor; one end of the first differential fixed capacitor is connected to one end of the first source inductor unit, the other end of the first differential fixed capacitor is connected to one end of the second differential fixed capacitor, and the other end of the second differential fixed capacitor is connected to the other end of the first source inductor unit. The second differential fixed capacitor unit includes a third differential fixed capacitor and a fourth differential fixed capacitor; one end of the third differential fixed capacitor is connected to one end of the second source inductor unit, the other end of the third differential fixed capacitor is connected to one end of the fourth differential fixed capacitor, and the other end of the fourth differential fixed capacitor is connected to the other end of the second source inductor unit.
9. The harmonic shaping oscillator circuit according to claim 1, characterized in that, Under differential-mode excitation, the first source inductor unit and the second source inductor unit are coupled and resonate with the first differential fixed capacitor unit and the second differential fixed capacitor unit to achieve third harmonic impedance expansion; under common-mode excitation, the resonance formed by the coupling of the first source inductor unit and the second source inductor unit and the first differential fixed capacitor unit and the second differential fixed capacitor unit forms a dual common-mode resonant impedance at the second and fourth harmonic frequencies.
10. The harmonic shaping oscillator circuit according to claim 1, characterized in that, The first source inductor unit, the second source inductor unit, and the drain inductor unit constitute a transformer; wherein, the first source inductor unit is coupled to the drain inductor unit, and the second source inductor unit is coupled to the drain inductor unit and constitutes transformer feedback.