Over-current protection circuit, semiconductor device, electronic apparatus, and vehicle

Abstract

An overcurrent protection circuit (34) is provided with: a sensing signal generation circuit (50) that generates a sensing signal (Vsns1) on the basis of a current (IOUT) to be monitored; a count expiration value setting circuit (60) that sets a count expiration value (Cmax) on the basis of the result of comparison between a second sensing signal (Vsns2) corresponding to the sensing signal (Vsns1) and a threshold value (Vth (0)-Vth (n)); and a counter (70) that counts up the count value (CNT) when the current to be monitored (IOUT) is greater than a count start threshold (Ith (0)) (when Vsns2 is less than Vth1 (0) in the graph), and forcibly stops the current to be monitored (IOUT) when the count value (CNT) reaches a count expiration value (Cmax).

Description

Technical Field

[0001] This disclosure relates to overcurrent protection circuits, semiconductor devices, electronic equipment, and vehicles. Background Technology

[0002] Regarding semiconductor devices referred to as IPD (intelligent power device) and SPS (smart power switch), the applicant of this application has proposed many new technologies to date (for example, see Patent Document 1).

[0003] Existing technical documents

[0004] Patent documents

[0005] Patent Document 1: International Publication No. 2017 / 187785 Summary of the Invention

[0006] However, in the overcurrent protection circuits assembled in conventional semiconductor devices, it is difficult to ensure the necessary current while protecting the current-carrying wires (wire harnesses).

[0007] For example, the overcurrent protection circuit disclosed herein includes: a sensing signal generation circuit configured to generate a sensing signal based on the current of a monitored object; a count completion value setting circuit configured to set a count completion value based on a comparison result of the sensing signal or a corresponding signal with a plurality of threshold values; and a counter configured to count upwards when the current of the monitored object is greater than a count start threshold, and to forcibly stop the current of the monitored object when the count value reaches the count completion value. Attached Figure Description

[0008] Figure 1 This is a diagram illustrating a structural example of an electronic device equipped with semiconductor devices.

[0009] Figure 2 It is a circuit block diagram that represents the electrical structure of a semiconductor device.

[0010] Figure 3 This is a diagram illustrating an example of an electronic device equipped with a mechanical fuse.

[0011] Figure 4 This is a diagram illustrating an example of a semiconductor device that replaces a mechanical fuse.

[0012] Figure 5 It is a diagram showing the cross-section of a conductor.

[0013] Figure 6 It is a diagram representing the equivalent model of an insulator.

[0014] Figure 7 It is a graph representing the general current-time characteristics.

[0015] Figure 8 This is a diagram illustrating one embodiment of an overcurrent protection circuit.

[0016] Figure 9 This is a diagram illustrating a structural example of a counter.

[0017] Figure 10 This is a diagram illustrating an example of overcurrent protection operation.

[0018] Figure 11 It is a graph showing the relationship between the count value and the output current.

[0019] Figure 12 This is a graph showing the current-time characteristics in this embodiment.

[0020] Figure 13 This is a graph showing the current-time characteristics in the modified example.

[0021] Figure 14 This is a diagram illustrating a first structural example of a sensing signal generation circuit.

[0022] Figure 15 This is a diagram illustrating a second structural example of a sensing signal generation circuit.

[0023] Figure 16 This is a diagram showing a variation of the circuit for setting the count threshold.

[0024] Figure 17 It is a diagram showing the exterior of a vehicle.

[0025] Figure 18 This is a diagram representing the vehicle's signal system. Detailed Implementation

[0026] <Electronic Devices>

[0027] Figure 1 This is a diagram illustrating a structural example of an electronic device equipped with a semiconductor device. The electronic device A in this structural example includes a semiconductor device 1, a DC power supply 2, and a load 3.

[0028] Semiconductor device 1 is a high-side switching IC (a type of IPD) that turns on / off between DC power supply 2 and load 3, and integrates power MISFET (metal insulator semiconductor field effect transistor) 9 and controller 10.

[0029] In addition, the semiconductor device 1 has multiple external electrodes as units for establishing electrical connections with the outside of the device. As described in this figure, the semiconductor device 1 has a drain electrode 11 (equivalent to the power supply electrode VBB), a source electrode 12 (equivalent to the output electrode OUT), an input electrode 13 (equivalent to the input electrode IN), and a reference voltage electrode 14 (equivalent to the ground electrode GND).

[0030] The power MISFET9 is an example of an insulated-gate power transistor (=output switch) that functions as a high-side switching element that turns the drain electrode 11 on / off with the source electrode 12.

[0031] The controller 10 includes various functional circuits that implement a variety of functions. For example, various types of functional circuits include circuits that generate a gate control signal VG for driving the power control MISFET 9 based on an external electrical signal.

[0032] The drain electrode 11 transmits the power supply voltage VB to the drain of the power MISFET 9 and various circuits of the controller 10. The source electrode 12 is connected to the source of the power MISFET 9 and transmits the output voltage VOUT and output current IOUT to the load 3. Furthermore, the wiring (wiring harness) laid between the source electrode 12 and the load 3 generally includes an inductive component L (and a resistive component). The input electrode 13 transmits the input voltage (=input signal IN) used to drive the controller 10. The reference voltage electrode 14 transmits a reference voltage (e.g., ground voltage) to the controller 10. Additionally, a resistive component R is generally present between the reference voltage electrode 14 and the ground terminal.

[0033] Semiconductor Devices

[0034] Figure 2 It means Figure 1 The circuit block diagram showing the electrical structure of the semiconductor device 1 is illustrated below. The following description will take the case where the semiconductor device 1 is mounted on a vehicle X as an example. Furthermore, when mounted on the vehicle X, the semiconductor device 1 can be used as a high-side switch for controlling the power supply to light sources such as bulbs or LEDs (light emitting diodes), or other types of electronic control devices.

[0035] Semiconductor device 1 includes a drain electrode 11, a source electrode 12, an input electrode 13, a reference voltage electrode 14, an enable electrode 15, a sensing electrode 16, a gate control wiring 17, a power MISFET 9, and a controller 10.

[0036] The drain electrode 11 (= power supply electrode VBB) is connected to the DC power supply 2. The drain electrode 11 provides the power supply voltage VB to the power MISFET 9 and the controller 10. The power supply voltage VB can also be above 10V and below 20V. On the other hand, the source electrode 12 (= output electrode OUT) is connected to the load 3.

[0037] Input electrode 13 (=Input electrode IN) can also be connected to an MCU (microcontroller unit), DC / DC converter, LDO (low dropout) regulator, etc. Input electrode 13 provides input voltage to controller 10. The input voltage can be above 1V and below 10V. Reference voltage electrode 14 is connected to the reference voltage wiring (ground terminal). Reference voltage electrode 14 provides reference voltage to power MISFET 9 and controller 10.

[0038] Enable electrode 15 can also be connected to an MCU. An electrical signal is input to enable or disable some or all of the functions of controller 10. Sensing electrode 16 transmits an electrical signal used to detect abnormalities in controller 10 to an external device. Furthermore, sensing electrode 16 can also be pulled up or pulled down by a resistor.

[0039] The gate of the power MISFET 9 is connected to the controller 10 (in particular, the gate control circuit 25 described later) via gate control wiring 17. The drain of the power MISFET 9 is connected to the drain electrode 11. The source of the power MISFET 9 is connected to the controller 10 (in particular, the current detection circuit 27 described later) and the source electrode 12.

[0040] The controller 10 includes a sensor MISFET 21, an input circuit 22, a current / voltage control circuit 23, a protection circuit 24, a gate control circuit 25, an active clamping circuit 26, a current detection circuit 27, a power supply reverse connection protection circuit 28, and an abnormality detection circuit 29.

[0041] The gate of sensor MISFET 21 is connected to the gate control circuit 25. The drain of sensor MISFET 21 is connected to the drain electrode 11. The source of sensor MISFET 21 is connected to the current detection circuit 27.

[0042] Input circuit 22 is connected to input electrode 13 and current / voltage control circuit 23. Input circuit 22 may also include a Schmitt trigger circuit. Input circuit 22 shapes the waveform of the electrical signal applied to input electrode 13. The signal generated by input circuit 22 is input to current / voltage control circuit 23.

[0043] The current / voltage control circuit 23 is connected to the protection circuit 24, the gate control circuit 25, the reverse power connection protection circuit 28, and the abnormality detection circuit 29. The current / voltage control circuit 23 may also include logic circuitry.

[0044] The current / voltage control circuit 23 generates various voltages based on the electrical signals from the input circuit 22 and the protection circuit 24. In this configuration, the current / voltage control circuit 23 includes a drive voltage generation circuit 30, a first constant voltage generation circuit 31, a second constant voltage generation circuit 32, and a reference voltage / reference current generation circuit 33.

[0045] The drive voltage generation circuit 30 generates a drive voltage for driving the gate control circuit 25. The drive voltage can also be set to a value obtained by subtracting a predetermined value from the power supply voltage VB. Alternatively, the drive voltage generation circuit 30 can generate a drive voltage between 5V and 15V, obtained by subtracting 5V from the power supply voltage VB. The drive voltage is input to the gate control circuit 25.

[0046] The first constant voltage generating circuit 31 generates a first constant voltage for driving the protection circuit 24. The first constant voltage generating circuit 31 may also include a Zener diode or a voltage regulator circuit (in this case, a Zener diode). The first constant voltage can be above 1V and below 5V. The first constant voltage is input to the protection circuit 24 (more specifically, the load open-circuit detection circuit 35, etc., described later).

[0047] The second constant voltage generating circuit 32 generates a second constant voltage for driving the protection circuit 24. The second constant voltage generating circuit 32 may also include a Zener diode or a voltage regulator circuit (in this case, a voltage regulator circuit). The second constant voltage can be above 1V and below 5V. The second constant voltage is input to the protection circuit 24 (more specifically, the overheat protection circuit 36 ​​and the low voltage malfunction suppression circuit 37, described later).

[0048] The reference voltage / reference current generation circuit 33 generates reference voltages and reference currents for various circuits. The reference voltage can be above 1V and below 5V. The reference current can be above 1mA and below 1A. The reference voltage and reference current are input to various circuits. If the circuit includes a comparator, the reference voltage and reference current can also be input to that comparator.

[0049] Protection circuit 24 is connected to current / voltage control circuit 23, gate control circuit 25, abnormal detection circuit 29, the source of power MISFET 9, and the source of sensor MISFET 21. Protection circuit 24 includes overcurrent protection circuit 34, load open circuit detection circuit 35, overheat protection circuit 36, and low voltage malfunction suppression circuit 37.

[0050] Overcurrent protection circuit 34 protects power MISFET 9 from overcurrent. Overcurrent protection circuit 34 is connected to the gate control circuit 25 and the source of sensor MISFET 21. Overcurrent protection circuit 34 may also include current monitoring circuitry. The signal generated by overcurrent protection circuit 34 is input to gate control circuit 25 (more specifically, drive signal output circuit 40, described later).

[0051] The load open-circuit detection circuit 35 detects the short-circuit and open-circuit states of the power MISFET 9. The load open-circuit detection circuit 35 is connected to the current / voltage control circuit 23 and the source of the power MISFET 9. The signal generated by the load open-circuit detection circuit 35 is input to the current / voltage control circuit 23.

[0052] The overheat protection circuit 36 ​​monitors the temperature of the power MISFET 9 and protects it from excessive temperature rise. The overheat protection circuit 36 ​​is connected to the current / voltage control circuit 23. The overheat protection circuit 36 ​​may also include temperature-sensing devices such as temperature-sensing diodes or thermistors. The signal generated by the overheat protection circuit 36 ​​is input to the current / voltage control circuit 23.

[0053] When the power supply voltage VB is less than a predetermined value, the low-voltage malfunction suppression circuit 37 suppresses the malfunction of the power MISFET 9. The low-voltage malfunction suppression circuit 37 is connected to the current / voltage control circuit 23. The signal generated by the low-voltage malfunction suppression circuit 37 is input to the current / voltage control circuit 23.

[0054] The gate control circuit 25 controls the on and off states of the power MISFET 9 and the sensor MISFET 21, respectively. The gate control circuit 25 is connected to the current / voltage control circuit 23, the protection circuit 24, the gate of the power MISFET 9, and the gate of the sensor MISFET 21.

[0055] The gate control circuit 25 outputs a gate control signal VG to the gate control wiring 17 based on the electrical signals from the current / voltage control circuit 23 and the protection circuit 24. The gate control signal VG is input to the gate of the power MISFET 9 and the gate of the sensor MISFET 21 via the gate control wiring 17. Specifically, the gate control circuit 25 controls the gate control signal VG according to the electrical signal (input signal) applied to the input electrode 13, thereby turning the power MISFET 9 on / off.

[0056] More specifically, the gate control circuit 25 includes an oscillation circuit 38, a charge pump circuit 39, and a drive signal output circuit 40. The oscillation circuit 38 oscillates according to an electrical signal from the current / voltage control circuit 23 to generate a predetermined electrical signal. The electrical signal generated by the oscillation circuit 38 is input to the charge pump circuit 39. The charge pump circuit 39 generates a boost voltage VCP according to the electrical signal from the oscillation circuit 38. The boost voltage VCP generated by the charge pump circuit 39 is input to the drive signal output circuit 40.

[0057] The drive signal output circuit 40 operates by receiving the boost voltage VCP output from the charge pump circuit 39 and generates a gate control signal VG based on the electrical signal from the protection circuit 24 (more specifically, the overcurrent protection circuit 34). The gate control signal VG is input to the gate of the power MISFET 9 and the gate of the sensor MISFET 21 via the gate control wiring 17. The sensor MISFET 21 and the power MISFET 9 are simultaneously controlled by the gate control circuit 25.

[0058] The active clamping circuit 26 protects the power MISFET 9 from back electromotive force. The active clamping circuit 26 is connected to the drain electrode 11, the gate of the power MISFET 9, and the gate of the sensor MISFET 21. The active clamping circuit 26 may also include multiple diodes.

[0059] The active clamping circuit 26 may also include multiple diodes connected in a forward bias. The active clamping circuit 26 may also include multiple diodes connected in a reverse bias. The active clamping circuit 26 may also include multiple diodes connected in a forward bias and multiple diodes connected in a reverse bias.

[0060] The multiple diodes may include pn junction diodes, Zener diodes, or a combination of pn junction diodes and Zener diodes. The active clamping circuit 26 may also include multiple Zener diodes connected in a mutually biased manner. The active clamping circuit 26 may also include Zener diodes and pn junction diodes connected in a reverse biased manner.

[0061] Current detection circuit 27 detects the current flowing through power MISFET 9 and sensor MISFET 21. Current detection circuit 27 is connected to protection circuit 24, abnormality detection circuit 29, the source of power MISFET 9, and the source of sensor MISFET 21. Current detection circuit 27 generates a current detection signal based on the electrical signal generated by power MISFET 9 (= output current IOUT) and the electrical signal generated by sensor MISFET 21 (= current signal representing the same behavior as output current IOUT). The current detection signal is input to abnormality detection circuit 29.

[0062] When the DC power supply 2 is reverse-connected, the reverse connection protection circuit 28 protects the current / voltage control circuit 23, power MISFET 9, etc., from the effects of reverse voltage. The reverse connection protection circuit 28 is connected to the reference voltage electrode 14 and the current / voltage control circuit 23.

[0063] Anomaly detection circuit 29 monitors the voltage of protection circuit 24. Anomaly detection circuit 29 is connected to current / voltage control circuit 23, protection circuit 24, and current detection circuit 27. In the event of an anomaly (voltage fluctuation, etc.) occurring in any of the overcurrent protection circuit 34, load open circuit detection circuit 35, overheat protection circuit 36, and undervoltage malfunction suppression circuit 37, the anomaly detection circuit 29 generates an anomaly detection signal corresponding to the voltage of protection circuit 24 and outputs it externally.

[0064] More specifically, the anomaly detection circuit 29 includes a first multiplexer circuit 41 and a second multiplexer circuit 42. The first multiplexer circuit 41 includes two input sections, one output section, and a selection control input section. A protection circuit 24 and a current detection circuit 27 are respectively connected to the input sections of the first multiplexer circuit 41. The second multiplexer circuit 42 is connected to the output section of the first multiplexer circuit 41. A current / voltage control circuit 23 is connected to the selection control input section of the first multiplexer circuit 41.

[0065] The first multiplexer circuit 41 generates an abnormality detection signal based on the electrical signal from the current / voltage control circuit 23, the voltage detection signal from the protection circuit 24, and the current detection signal from the current detection circuit 27. The abnormality detection signal generated by the first multiplexer circuit 41 is input to the second multiplexer circuit 42.

[0066] The second multiplexer circuit 42 includes two input sections and one output section. The input sections of the second multiplexer circuit 42 are respectively connected to the output section and the enable electrode 15. The output section of the second multiplexer circuit 42 is connected to a sensing electrode 16.

[0067] When an MCU is connected to the enable electrode 15 and a pull-up or pull-down resistor is connected to the sensing electrode 16, an enable signal is input from the MCU to the enable electrode 15, and an abnormality detection signal is extracted from the sensing electrode 16. The abnormality detection signal is converted into an electrical signal by the resistor connected to the sensing electrode 16. An abnormality in the state of the semiconductor device 1 is detected based on this electrical signal.

[0068] <Topics of Mechanical Fuses>

[0069] Figure 3This diagram illustrates an example of an electronic device equipped with a mechanical fuse. The electronic device B in this example includes a control unit B10, a battery B20, a load B30, and a fuse box B40.

[0070] Control unit B10 drives load B30 by receiving power supply voltage VB from battery B20 via fuse box B40. As described in this figure, control unit B10 includes a DC / DC converter B11, a microcomputer B12, an upper switch B13, a power supply electrode B14, an output electrode B15, and a reference voltage electrode B16. Control unit B10 may also be, for example, an ECU (electronic control unit).

[0071] DC / DC converter B11 generates the desired internal power supply voltage based on the power supply voltage VB and outputs it to various parts of control unit B10 (microcomputer B12, etc.).

[0072] The microcomputer B12 controls the on / off switching of the upper switch B13 by receiving the internal power supply voltage from the DC / DC converter B11.

[0073] The upper switch B13 is connected between the power supply electrode B14 and the output electrode B15, and controls the on / off state according to the instructions from the microcomputer B12.

[0074] The power supply electrode B14 receives the power supply voltage VB from the battery B20 via the fuse box B40. The output electrode B15 is connected to the load B30, for example, via the wire W3. The reference voltage electrode B16 is connected to the ground terminal, for example.

[0075] The fuse box B40 contains n fuses B41(1) to B41(n), input electrode B42 and output electrode B43(1) to B43(n).

[0076] Fuse B41(i) (where i = 1, 2, ..., n) is connected between input electrode B42 and output electrode B43(i). Fuse B41(i) is a so-called mechanical fuse, which will melt due to Joule heating if a current exceeding its rated value flows through it, thus protecting the circuit.

[0077] The input electrode B42 is connected, for example, to the positive terminal (the terminal where the power supply voltage VB is applied) of the battery B20 via wire W1. The output electrode B43 (1) is connected, for example, to the power supply electrode B14 of the control unit B10 via wire W2.

[0078] In electronic device B using fuse box B40, two problems exist. First, the reaction time (time required for fuse B41(i) to blow) is unclear and inaccurate. Therefore, damage to control unit B10, the object of protection, often becomes a problem. Second, it requires replacing blown fuse B41(i). In most cases, a complete system replacement (i.e., replacement of fuse box B40) is necessary.

[0079] In addition, to address the aforementioned issues, one could consider using IPD-based electronic fuses (so-called e-fuse) instead of mechanical fuses.

[0080] <Replacement of Mechanical Fuses>

[0081] Figure 4 This diagram illustrates an example of a semiconductor device replacing a mechanical fuse. In the electronic device B of this structural example, the previously... Figure 3 Based on this, fuse box B40 is replaced with semiconductor device 1.

[0082] Electronic device B can also be mounted on vehicle X. Battery B20 acts as a DC power source supplying power to electronic device B. A wire W11, serving as the current path from battery B20 to electronic device B, can be laid between battery B20 and electronic device B. Alternatively, a wire W12, serving as the current path from electronic device B to control unit B10, can be laid between electronic device B and control unit B10. Also, a wire W13, serving as the current path from control unit B10 to ground, can be laid between control unit B10 and ground wire (grounding terminal).

[0083] Furthermore, from the perspective of semiconductor device 1, the control unit B10, externally located at the source electrode 12 (=output electrode OUT) of semiconductor device 1, functions as a capacitive load with a large capacitance value. Therefore, control unit B10 is equivalently described as a parallel circuit of capacitor C1 and resistor R1. Additionally, in this figure, resistor R2 is shown for pulling the sensing electrode 16 down to ground.

[0084] Semiconductor device 1 is basically the same as the previous one. Figure 2 The same structure. Therefore, for the existing constituent elements, they are labeled and... Figure 2 The same reference numerals are used in the accompanying drawings, but repeated descriptions are omitted. The focus is on the main constituent elements and the constituent elements associated with them.

[0085] The power MISFET9 is an output switch that turns the drain electrode 11 and the source electrode 12 on / off according to the gate control signal VG.

[0086] The overcurrent protection circuit 34 controls the gate control signal VG by detecting the monitored current and applying overcurrent protection. The monitored current can be the output current IOUT flowing through the power MISFET 9. For example, the overcurrent protection circuit 34 can also limit the output current IOUT below the overcurrent protection threshold Iocp (so-called current limiting operation). Furthermore, whenever the output current IOUT increases to the overcurrent protection threshold Iocp, the overcurrent protection circuit 34 can repeatedly force the power MISFET 9 to disconnect and restart (so-called hiccup control).

[0087] The overheat protection circuit 36 ​​controls the gate control signal VG in a manner that detects the temperature of the monitored object and applies overheat protection. For example, the overheat protection circuit 36 ​​can also repeatedly force the power MISFET 9 to disconnect and restart whenever the temperature of the monitored object rises to the overheat protection threshold Ttsd.

[0088] The monitored temperature can be a first temperature Temp1 detected in the power element formation region containing the power MISFET9. Alternatively, the first temperature Temp1 can also be, for example, the pn junction temperature Tj1 of the power element formation region.

[0089] Furthermore, the temperature of the monitored object mentioned above can also be the temperature difference ΔTemp (=Temp1-Temp2) between the first temperature Temp1 and the second temperature Temp2 detected outside the power element formation area. In addition, the second temperature Temp2 can be, for example, the pn junction temperature Tj2 of the analog circuit formation area or the logic circuit formation area, or the case temperature Tc of the semiconductor device 1 or the ambient temperature Ta.

[0090] Thus, in the electronic device B of this structural example, the previous fuse box B40 is replaced by the semiconductor device 1. That is, in the event of an excessively large output current IOUT (e.g., tens to 100A), the output current IOUT is limited or cut off at high speed and with high precision by forcibly disconnecting the power MISFET 9. Therefore, both the semiconductor device 1 and the control unit B10 can be safely protected. In addition, unlike the structure using a mechanical fuse, even in the event of a fault, the replacement of the blown fuse B41(i) is not required.

[0091] <An Investigation into the Protective Function of Conductors>

[0092] Semiconductor device 1 is an electronic circuit for controlling high power. Therefore, semiconductor device 1 possesses sufficient capability and robustness not only to protect its own internal circuitry but also to protect the load (control unit B10) and the surrounding environment. Semiconductor device 1 is a state-of-the-art form of electronic relay. Intelligent protection functions are installed internally in semiconductor device 1. In automotive environments, semiconductor device 1 is preferably used to control various loads 3 (e.g., light sources such as bulbs or LEDs, or other types of electronic control devices).

[0093] However, the load (control unit B10) that drives the semiconductor device 1 is connected to the battery B20 and ground via wires W11 to W13. Therefore, the semiconductor device 1, which functions as an electronic fuse, preferably has the function of protecting not only its internal circuitry, the load (control unit B10), and the surrounding environment, but also the function of protecting the wires W11 to W13.

[0094] Modern electrical / electronic equipment or systems (such as vehicles, industrial equipment, and home appliances) place increasingly stringent requirements on power distribution and energy management architectures. The more complex the architecture, the more electronic circuits and loads are controlled and driven, and the higher the required robustness, i.e., a higher level of security.

[0095] Even the most basic wire-fuse fuses (mechanical fuses) are insufficient to meet these requirements. To improve system fault tolerance and add short-circuit or overload protection, alternatives to wire-fuse fuses are needed. Furthermore, due to other requirements arising from increasingly complex power distribution architectures, such as self-resetting functions, using only wire-fuse fuses becomes inappropriate. Additionally, in vehicles with advanced autonomous driving features, standard fuses or fuse boxes need to be replaced or supplemented.

[0096] In modern applications, it is essential to keep the thermal history (thermal profile) of the insulation material applied to the wire harness within acceptable limits to protect the wire harness, connectors, and PCB (printed circuit board) traces. Therefore, new types of electronic circuit breakers or electronic fuses (e-fuse) are needed.

[0097] If an IPD (Integrated Circuit Distributor) can continuously monitor the current flowing through the wiring harness to estimate / simulate the temperature of the conductors, it can interrupt the flow of energy from the harness to the load at any time. Furthermore, such an IPD can resume current supply after a suitable cooling period, thus functioning as a self-resetting fuse. In this way, the wiring harness is protected, and the system's fault tolerance is improved.

[0098] Furthermore, if the IPD has an analog or digital interface, the protection parameters of the wiring harness (such as conductor area and the upper limit of the conductor's allowable temperature for the insulation material) can be programmed in advance. Therefore, by using such an IPD as an electronic fuse, the overall cost of the device or system can be reduced.

[0099] Furthermore, by using multiple IPDs in series or in conjunction with conventional wire-fuse fuses, architectural flexibility is improved. Thus, by using the electronic fuses disclosed herein, architectural flexibility can be increased at the system level without any limitations.

[0100] Figure 5 This is a diagram showing the cross-section of conductor W. Conductor W can be understood as the previous conductors W11 to W13. Typically, conductor W includes conductor Wa and an insulator Wb covering conductor Wa. Conductor Wa can also be annealed copper wire. Insulator Wb can also be a polymer such as XLPE (cross-linked polyethylene). The maximum heat dissipation of insulator Wb is limited. Therefore, conductor W needs to be protected. Furthermore, the thermal resistance of insulator Wb is set as Rth. Furthermore, the heat capacity of insulator Wb is set as Cth.

[0101] Figure 6 This is a diagram representing the equivalent model of insulator Wb. As shown in the diagram, insulator Wb can be modeled as a time constant τ (=Rth×Cth) based on thermal resistance Rth and heat capacity Cth. The heat source is represented as the product of the resistance Rel of conductor Wa and the square of the current I(t) flowing through wire W (=Rell×I 2 (t)). Where thermal resistance Rth, heat capacity Cth, and resistance Rel are the values ​​per unit length of the wire W.

[0102] By using a simple frequency range method with respect to the temperature T(s) of conductor W using an equivalent model of insulator Wb, the following equation (1) is obtained. Additionally, Tamb in equation (1) represents the ambient temperature of conductor W.

[0103] [Formula 1]

[0104]

[0105] Furthermore, if the above equation (1) is transformed back into the time domain using the inverse Laplace transform, the following equation (2) is obtained.

[0106] [Formula 2]

[0107]

[0108] The heat capacity Cth (and consequently the time constant τ) is very large. Therefore, even if excessive current flows in short pulses, it is not a major problem. However, when the overload condition (overcurrent condition) persists for a long time, the insulator Wb becomes overheated, exceeding the upper limit of the permissible temperature. Therefore, overcurrent protection is required. Furthermore, the cooling of the insulator Wb after heating is also slow. Therefore, not only the peak value of the current I flowing through the conductor W is important, but also the actual RMS (root mean square) value.

[0109] Given the cooling of the insulator Wb after heating, the above equation (2) is rewritten as the following equation (3). Furthermore, Tinit in equation (3) represents the conductor temperature before the current pulse is applied.

[0110] [Formula 3]

[0111]

[0112] According to equation (3) above, heating is caused by the Joule effect of the resistance Rel of conductor Wa (and thus the loss). In addition, cooling is caused by the thermal resistance of insulator Wb.

[0113] In addition, from Figure 5 and Figure 6 It can be seen that, under thermal equilibrium, i.e., when the heat capacity Cth is neglected, cooling is caused by the heat flux (per unit length) from the conductor Wa to the surroundings. Therefore, the flow of electricity is given by {T(t) - Tamb} / Rth (=dT / Rth). Furthermore, the internal electrical input or loss of the conductor W is determined by I. 2 (t) × Rel is given. These two terms need to be equal. Therefore, we get the following equation (4).

[0114] [Formula 4]

[0115]

[0116] Equation (4) above can be defined as the allowable current of conductor W.

[0117] Figure 7 This is a graph representing the general current-time characteristics. The horizontal axis (logarithmic axis) represents the magnitude of the current flowing through the wire harness. The vertical axis (logarithmic axis) represents the current supply time.

[0118] Curve L1 represents the relationship between the current flowing through the wiring harness to drive the load (=load current) and the current supply time. Curve L2 represents the relationship between the current that causes the wiring harness to fuse (=wiring harness fusing current) and the current supply time. Curve L3 represents the relationship between the upper limit current set to protect the wiring harness (=wiring harness protection current) and the current supply time. Curves L4 and L5 both represent the relationship between the current applied by previous overcurrent protection or overheat protection operations (=protection current) and the current supply time. Curve L4 represents the protection current for an output switch with a switching resistance of 4mΩ (=4mΩIPD). Curve L5 represents the protection current for an output switch with a switching resistance of 8mΩ (8mΩIPD).

[0119] A comparison of curves L1 and L4 shows that a 4mΩ IPD protection current is sufficient for the load current. However, a comparison of curves L3 and L4 (especially referring to dashed box α) reveals that a 4mΩ IPD protection current is insufficient for the harness protection current. On the other hand, a comparison of curves L3 and L5 shows that an 8mΩ IPD protection current is sufficient for the harness protection current. However, a comparison of curves L1 and L5 (especially referring to dashed boxes β and γ) shows that an 8mΩ IPD protection current is insufficient for the load current.

[0120] Thus, in the past, it was difficult to ensure the current required to drive the load while protecting the current-carrying wires (wire harnesses) that were carrying current.

[0121] Furthermore, if the harness protection current of curve L3 can be installed in the IPD by simulating the previous equation (2), the current required for harness protection and load drive can be ensured. However, in order to simulate the temperature T(t) of conductor W, the square of the current I flowing through conductor W must be integrated. Therefore, the RMS value of the current I flowing through conductor W needs to be measured.

[0122] In addition, in order to calculate the temperature rise of wire W based on the previous equation (1), expensive silicon solutions (ADCs, squaring, filtering, multiplication, integration, and digital memory, etc.) and / or microcontrollers that can digitize information and perform complex data processing are required.

[0123] In view of the above considerations, the following implementation method is proposed: by simulating the thermal behavior of wire W (= previous equation (2)) with a lower cost circuit structure, it is possible to balance the protection of the wire harness and the current required to drive the load.

[0124] <Overcurrent Protection Circuit>

[0125] Figure 8 This diagram illustrates one embodiment of the overcurrent protection circuit 34. The overcurrent protection circuit 34 in this embodiment includes, for example, a sensing signal generation circuit 50, a count threshold setting circuit 60, and a counter 70.

[0126] The sensing signal generation circuit 50 sets the output current IOUT flowing through the power MISFET 9 (corresponding to the output switch) as the current to be monitored. The sensing signal generation circuit 50 generates a first sensing voltage Vsns1 (equivalent to the sensing signal) based on the output current IOUT.

[0127] If described according to this figure, the sensing signal generation circuit 50 includes a sensor MISFET 51 (e.g., an N-channel MISFET), a bias circuit 52, and a resistor 53.

[0128] The gate of sensor MISFET 51 is connected to the gate of power MISFET 9 (i.e., the application terminal of the gate control signal VG). The drain of sensor MISFET 51 is connected to the drain of power MISFET 9 (i.e., drain electrode 11). The source of sensor MISFET 51 is connected to bias circuit 52 (details to be described later). Sensor MISFET 51, connected in this way, functions as a sensor switch that generates a first sensing current Isns1 corresponding to the output current IOUT, synchronously controlled with power MISFET 9. Power MISFET 9 can be, for example, a device with an on-resistance of 4mΩ. That is, semiconductor device 1 can also be equivalent to a 4mΩ IPD.

[0129] The bias circuit 52 makes the source voltage Vs (51) of the sensor MISFET 51 match the source voltage (= output voltage VOUT) of the power MISFET 9. If described according to this figure, the bias circuit 52 includes an amplifier 521 and a transistor 522 (e.g., a P-channel MISFET).

[0130] Amplifier 521 performs gate control of transistor 522, so that the source voltage Vs (51) input to the non-inverting input terminal (+) is consistent with the output voltage VOUT input to the inverting input terminal (-).

[0131] The source of transistor 522 is connected to the terminal where the source voltage Vs (51) is applied. The drain of transistor 522 is connected to the terminal where the first sense voltage Vsns1 is applied. The gate of transistor 522 is connected to the output terminal of amplifier 521.

[0132] Resistor 53 (resistance value: Ra) functions as a current / voltage conversion element that converts the first sensing current Isns1 flowing through sensor MISFET 51 into a first sensing voltage Vsns1 (=Isns1×Ra). Sensing signal generation circuit 50 outputs the first sensing voltage Vsns1 as the sensing signal.

[0133] The count completion value setting circuit 60 sets the count completion value Cmax based on the comparison result between the first sensing voltage Vsns1 (in this figure, the corresponding second sensing voltage Vsns2) and a plurality of threshold voltages Vth1(0) to Vth1(n). As described in this figure, the count completion value setting circuit 60 includes a signal conditioning circuit 61, a threshold voltage generation circuit 62, and a comparison circuit 63.

[0134] The signal conditioning circuit 61 generates a second sensing voltage Vsns2 based on the power supply voltage VB by performing gain and level adjustments on the first sensing voltage Vsns1. As described in this figure, the signal conditioning circuit 61 includes an amplifier 611, a transistor 612 (e.g., an N-channel MISFET), a resistor 613, an external electrode 614, and a resistor 615.

[0135] Amplifier 611 performs gate control of transistor 612, so that the first sense voltage Vsns1 input to the non-inverting input terminal (+) is consistent with the node voltage Va input to the inverting input terminal (-).

[0136] The source of transistor 612 is connected to the terminal where the node voltage Va is applied. The drain of transistor 612 is connected to the terminal where the second sense voltage Vsns2 is applied. The gate of transistor 612 is connected to the output terminal of amplifier 611.

[0137] Resistor 613 (resistance value: Rb) is a voltage / current conversion element that converts node voltage Va into a second sensing current Isns2 (=Va / Rb).

[0138] The external electrode 614 is connected to the application terminal of the second sensing voltage Vsns2.

[0139] Resistor 615 (resistance value: Rc) is externally placed between drain electrode 11 (the terminal where the power supply voltage VB is applied) and external electrode 614. Resistor 615 is a current / voltage conversion element that converts the second sensing current Isns2 into the second sensing voltage Vsns2 (=VB-Isns2×Rc).

[0140] For example, the larger the output current IOUT, the larger the first sensing current Isns1. Therefore, the node voltage Va becomes higher, and the second sensing current Isns2 becomes larger. As a result, the second sensing voltage Vsns2 becomes lower. Conversely, the smaller the output current IOUT, the smaller the first sensing current Isns1. Therefore, the node voltage Va becomes lower, and the second sensing current Isns2 becomes smaller. As a result, the second sensing voltage Vsns2 becomes higher.

[0141] The threshold voltage generation circuit 62 generates threshold voltages Vth1(0) to Vth1(n) based on the power supply voltage VB. As described in this figure, the threshold voltage generation circuit 62 includes resistors 621(0) to 621(n+1) connected in series between the drain electrode 11 (the terminal where the power supply voltage VB is applied) and the terminal where the reference voltage Vref is applied. Furthermore, the reference voltage Vref can, for example, be a floating voltage (=VB-5V) that is 5V lower than the power supply voltage VB.

[0142] The threshold voltage Vth1(i) (where i = 0, 1, ..., n) is derived from the connection node between resistors 621(i) and 621(i+1). Furthermore, Vth1(0) > Vth1(1) > ... > Vth1(n) holds true.

[0143] The comparator circuit 63 compares the second sensed voltage Vsns2 with multiple threshold voltages Vth1(0) to Vth1(n) and generates multiple comparison signals D0 to Dn respectively. If described according to this figure, the comparator circuit 63 includes multiple comparators 631(0) to 631(n).

[0144] Comparator 631(i) (where i = 0, 1, ..., n) compares the second sensed voltage Vsns2 input to the inverting input (-) and the threshold voltage Vth1(i) input to the non-inverting input (+), generating a comparison signal Di. Comparison signal Di is low when the second sensed voltage Vsns2 is higher than the threshold voltage Vth1(i). Comparison signal Di is high when the second sensed voltage Vsns2 is lower than the threshold voltage Vth1(i).

[0145] The previous count completion value Cmax was set, for example, by using multiple comparison signals D0~Dn as digital signals Dn…D1D0 for each bit. That is, the count completion value setting circuit 60 can be understood as a simple analog / digital conversion circuit.

[0146] Counter 70 receives the count completion value Cmax (= comparison signals D0~Dn), input signal IN, power-on reset signal POR, and clock signal CLK to generate counter output signal CO. Counter output signal CO is output to drive signal output circuit 40 as a forced stop signal (= overcurrent protection signal) for output current IOUT.

[0147] For example, counter 70 counts up the count value CNT when the comparison signal D0 is high. Then, when the count value CNT reaches the full count value Cmax, counter 70 causes the counter output signal CO to rise from low to high, forcibly stopping the output current IOUT.

[0148] <Counter>

[0149] Figure 9 This is a diagram illustrating a structural example of a counter 70. The counter 70 in this structural example includes latch circuits 71(0) to 71(n), an AND gate 72, inverters 73 and 74, and an up / down counter 75.

[0150] The latch circuit 71(i) (where i = 0, 1, ..., n) latches the comparison signal Di to generate the latch signal Zi. If described according to this figure, the latch circuit 71(i) can also be a D flip-flop, which, when the comparison signal Di input to the clock input terminal (>) rises to a high level, takes a high-level signal (e.g., internal power supply voltage VDD) input to the data input terminal (D) and outputs it as the latch signal Zi from the output terminal (Q).

[0151] Furthermore, latch circuit 71(i) can also be reset by the power-on reset signal POR. Additionally, latch circuit 71(0) can also be reset when the counter output signal CO rises to a high level.

[0152] The AND gate 72 generates a logical AND signal AO between the latch signal Z0 and the input signal IN. The logical AND signal AO is low when at least one of the latch signal Z0 and the input signal IN is low. Conversely, the logical AND signal AO is high when both the latch signal Z0 and the input signal IN are high.

[0153] Inverter 73 inverts the logic level of the AND signal AO, generating a down-counting signal DN. When the AND signal AO is high, the down-counting signal DN is low. When the AND signal AO is low, the down-counting signal DN is high.

[0154] Inverter 74 inverts the logic level of the down-counting signal DN, generating the up-counting signal UP. When the down-counting signal DN is high, the up-counting signal UP is low. When the down-counting signal DN is low, the up-counting signal UP is high.

[0155] The up / down counter 75 counts the value CNT up or down synchronously with the clock signal CLK. Furthermore, when the count value CNT reaches the full count value Cmax, the up / down counter 75 causes the counter output signal CO to rise from a low level to a high level.

[0156] Furthermore, the up / down counter 75 counts the value CNT upwards when the up counting signal UP is high. On the other hand, when the down counting signal DN is high, the up / down counter 75 counts the value CNT downwards. That is, the up / down counter 75 switches between counting upwards and downwards of the value CNT based on the latch signal Z0 corresponding to the least significant bit (= comparison signal D0) of the digital signals Dn…D0 in the latch signals Z0~Zn.

[0157] In addition, the up / down counter 75 sets the count threshold Cmax based on the remaining latch signals Z1~Zn.

[0158] Furthermore, although not explicitly shown in this figure, counter 70 may also have an analog or digital interface for receiving an external input counter adjustment signal. With this configuration, the user can arbitrarily adjust the relationship between the output current IOUT and the current supply time (e.g., the oscillation frequency of the clock signal CLK, or the number of cascaded stages of the flip-flops forming the up / down counter 75, etc.). Therefore, the user can predefine the insulators forming wires, PCB traces, or other electrical interfaces (refer to the previous...). Figure 5 The maximum temperature rise is dT. As a result, the flexibility of application design is improved. In addition, according to this structure, it is also easy to adapt the operation of electronic fuses to that of mechanical fuses.

[0159] Figure 10 It means Figure 8 A diagram illustrating an example of overcurrent protection operation of the overcurrent protection circuit 34. In this diagram, from top to bottom, the input signal IN, output current IOUT, count value CNT, count threshold Cmax, and counter output signal CO are depicted.

[0160] At time t1, when the input signal IN rises to a high level, the power MISFET 9 becomes ON. As a result, the output current IOUT flows. Furthermore, the normal output current IOUT is less than the count start threshold Ith(0). The count start threshold Ith(0) can be understood as the current value corresponding to the previous threshold voltage Vth1(0). Therefore, the comparison signal D0 (and consequently the latch signal Z0) becomes low, so the upward counting of the count value CNT does not begin. In addition, the comparison signals D1~Dn also become low, so the count completion value Cmax is set to the highest set value Cmax(0). Furthermore, since the count value CNT has not reached the count completion value Cmax, the counter output signal CO is maintained at a low level.

[0161] At time t2, when the output current IOUT is greater than the counting start threshold Ith (0), the comparison signal D0 (and consequently the latch signal Z0) becomes high. As a result, since the up-counting signal UP becomes high, the counting of the count value CNT begins. In addition, when the output current IOUT is lower than the threshold Ith (1), the comparison signals D1~Dn remain low. Therefore, the count completion value Cmax remains at the previously set value Cmax (0). The threshold Ith (1) can be understood as the current value corresponding to the previous threshold voltage Vth1 (1). In addition, since the count value CNT has not reached the count completion value Cmax, the counter output signal CO remains low.

[0162] At time t3, when the output current IOUT is greater than the threshold Ith (1), the comparison signal D1 (and consequently the latch signal Z1) becomes high. As a result, the count threshold Cmax decreases to the set value Cmax (1), which is one level smaller than the set value Cmax (0). The threshold Ith (2) can be understood as the current value corresponding to the previous threshold voltage Vth1 (2). In addition, since the count value CNT has not reached the count threshold Cmax, the counter output signal CO remains low.

[0163] At time t4, when the output current IOUT is greater than the threshold Ith (2), the comparison signal D2 (and consequently the latch signal Z2) becomes high. As a result, the count threshold Cmax decreases to the set value Cmax (2), which is one level smaller than the set value Cmax (1). In addition, since the count value CNT has not reached the count threshold Cmax, the counter output signal CO remains low.

[0164] At time t5, when the count value CNT reaches the full count value Cmax, the counter output signal CO rises to a high level. As a result, the output current IOUT is forcibly stopped (turned off). When the latch signal Z0 is reset to a low level during the rising timing of the counter output signal CO, the down-counting signal DN becomes a high level. Therefore, the down-counting of the count value CNT begins.

[0165] Thus, the larger the output current IOUT, the lower the count threshold Cmax will be. That is, when the output current IOUT is greater than the count start threshold Ith (0), the larger the output current IOUT, the shorter the time it will be latched. Conversely, the smaller the output current IOUT, the longer it can be supplied.

[0166] Figure 11 This is a graph showing the relationship between the count value CNT and the output current IOUT. The horizontal axis represents the count value CNT of counter 70. The vertical axis represents the output current IOUT, normalized to the RMS allowable current relative to the conductor W.

[0167] Furthermore, the count value CNT on the horizontal axis can also be understood as the count completion value Cmax, and thus as the current supply time of the output current IOUT. As shown in this figure, it can be seen that the larger the output current IOUT is, the lower the count value CNT (count completion value Cmax).

[0168] Figure 12 This is a graph showing the current-time characteristics in this embodiment. The horizontal axis (logarithmic axis) represents the magnitude of the current flowing through the wire harness. The vertical axis (logarithmic axis) represents the current supply time.

[0169] Curves L1~L5 and the previous Figure 7 Similarly, the values ​​represent the load current, wiring harness fusing current, 4mΩ IPD protection current, and 8mΩ IPD protection current. Curve L6 represents the relationship between the magnitude of the current (=protection current) required for the overcurrent protection operation in this embodiment and the current supply time.

[0170] Comparing curves L1 and L6, it can be seen that the protection current of this embodiment can meet the load current requirement. Furthermore, comparing curves L3 and L6, it can also be seen that the protection current of this embodiment can meet the wiring harness protection current requirement.

[0171] Thus, if it is the overcurrent protection circuit 34 of this embodiment, there is no need for expensive silicon solutions and / or microcontrollers. By simulating the thermal behavior of the wire W (= previous equation (2)) with a lower cost circuit structure, it is possible to ensure both the protection of the wire harness and the current required to drive the load.

[0172] In addition, by installing a wire harness protection function in the semiconductor device 1, the load on the MCU can also be reduced.

[0173] Figure 13 This is a graph showing the current-time characteristics in a variation of this embodiment. As shown by curve L7 in this graph, multiple protection functions can be combined in a manner that prioritizes the smaller of the protection current based on the previous overcurrent protection and overheat protection (curve L4) and the protection current of this embodiment (curve L6). For example, the output current IOUT can be forcibly stopped based on the logic OR signal of the first abnormal protection signal generated by the previous overcurrent protection and overheat protection and the second abnormal protection signal (=counter output signal CO) generated by the overcurrent protection circuit 34 of this embodiment.

[0174] <Sensing Signal Generation Circuit (First Configuration Example)>

[0175] Figure 14 This diagram illustrates a first configuration example of the sensing signal generation circuit 50. The sensing signal generation circuit 50 in this configuration example is based on the previously... Figure 8 Based on this, with some modifications.

[0176] As a first change, the sensing signal generation circuit 50 and the current detection circuit 27 share an amplifier (equivalent to the previous amplifier 521) that forms the bias circuit 52. If described according to this figure, the current detection circuit 27 includes a bias circuit 271.

[0177] The bias circuit 271 makes the source voltage Vs (21) of the sensor MISFET 21, which generates the current signal Ics corresponding to the output current IOUT, match the source voltage (= output voltage VOUT) of the power MISFET 9. If described according to this figure, the bias circuit 271 includes an amplifier 271a and a transistor 271b (e.g., a P-channel MISFET).

[0178] Amplifier 271a performs gate control of transistor 271b, so that the source voltage Vs (21) input to the non-inverting input terminal (+) is consistent with the output voltage VOUT input to the inverting input terminal (-).

[0179] The source of transistor 271b is connected to the terminal where the source voltage Vs (21) is applied. The drain of transistor 271b is connected to the sensing electrode 16 (the terminal where the current detection signal Vcs is applied). The gate of transistor 271b is connected to the output terminal of amplifier 271a.

[0180] Furthermore, in the sensing signal generation circuit 50 of this configuration, the gate of transistor 522 is also connected to the output terminal of amplifier 271a. That is, the bias circuit 52 shares the amplifier 271a of the bias circuit 271. In this configuration, since the previous amplifier 521 is omitted, the circuit size of the sensing signal generation circuit 50 is reduced.

[0181] As a second modification, the sensing signal generation circuit 50 of this configuration includes an external electrode 54 connected to the drain of transistor 522 (= the application terminal of the first sensing voltage Vsns1). The previously used resistor 53 is externally placed between the external electrode 54 and the ground terminal. According to this configuration, the detection gain of the output current IOUT can be arbitrarily adjusted according to the resistance value of resistor 53.

[0182] <Sensing Signal Generation Circuit (Second Configuration Example)>

[0183] Figure 15 This is a diagram illustrating a second configuration example of the sensing signal generation circuit 50. The sensing signal generation circuit 50 in this configuration example is different from the previous first configuration example (…). Figure 14 Unlike other circuits, bias circuits 52 and 271 each have individual amplifiers 521 and 271a. According to this configuration, the first sensing current Isns1 (and consequently the first sensing voltage Vsns1) can be generated with higher accuracy.

[0184] <Counting threshold setting circuit (variant example)>

[0185] Figure 16 This diagram illustrates a modified example of the count completion value setting circuit 60. The count completion value setting circuit 60 in this modified example is based on the previous... Figure 8 Based on this, the level adjustment function is omitted. That is, in the counter threshold setting circuit 60 of this variant, the reference potential is changed from the power supply voltage VB to the ground voltage GND.

[0186] The signal conditioning circuit 61 generates a second sensing voltage Vsns2 based on the ground voltage GND by adjusting the gain of the first sensing voltage Vsns1. As described in this figure, the signal conditioning circuit 61 includes an amplifier 616, resistors 617 and 618.

[0187] Amplifier 616 generates a second sensing voltage Vsns2, such that the first sensing voltage Vsns1 input to the non-inverting input terminal (+) is consistent with the node voltage Vb input to the inverting input terminal (-).

[0188] Resistors 617 and 618 are connected between the application terminal of the second sensed voltage Vsns2 and the ground terminal (= the application terminal of the ground voltage GND). Resistors 617 and 618 function as a resistor divider circuit that outputs the node voltage Vb (= the voltage divided by the second sensed voltage Vsns2) from the connection node between them.

[0189] Threshold voltage generation circuit 62 generates threshold voltages Vth2(0) to Vth2(n) based on ground voltage GND. As described in this figure, threshold voltage generation circuit 62 includes resistors 622(0) to 622(n+1) connected in series between the ground terminal (= the application terminal of ground voltage GND) and the application terminal of reference voltage Vref.

[0190] The threshold voltage Vth2(i) (where i = 0, 1, ..., n) is derived from the connection node between resistors 622(i) and 622(i+1). Furthermore, Vth2(0) < Vth2(1) < ... < Vth2(n) holds true.

[0191] The comparator circuit 63 compares the second sensed voltage Vsns2 with multiple threshold voltages Vth2(0) to Vth2(n) and generates multiple comparison signals D0 to Dn respectively. If described according to this figure, the comparator circuit 63 includes multiple comparators 632(0) to 632(n).

[0192] Comparator 632(i) (where i = 0, 1, ..., n) compares the second sensed voltage Vsns2 input to the non-inverting input (+) with the threshold voltage Vth2(i) input to the inverting input (-), generating a comparison signal Di. Comparison signal Di is low when the second sensed voltage Vsns2 is lower than the threshold voltage Vth2(i). Comparison signal Di is high when the second sensed voltage Vsns2 is higher than the threshold voltage Vth2(i).

[0193] In this way, the count completion value setting circuit 60 does not need to have a level adjustment function.

[0194] <Applied to vehicles>

[0195] Figure 17 This is a diagram showing the exterior of vehicle X. The vehicle X in this structural example is equipped with various electronic devices (not shown) that operate by receiving power from a battery.

[0196] In addition to engine vehicles, vehicle X also includes electric vehicles (BEV [battery electric vehicle], HEV [hybrid electric vehicle], PHEV / PHV (plug-in hybrid electric vehicle), or FCEV / FCV (fuel cell electric vehicle) etc.).

[0197] Furthermore, the previously described semiconductor device 1 can be assembled into any of the electronic devices mounted on the vehicle X.

[0198] Figure 18 This diagram represents the signal system of vehicle X. As shown in the diagram, vehicle X has a central ECU 80 and multiple regional ECUs 81-86. The regional ECUs 81-86 are located in various parts of vehicle X and communicate with the central ECU 80.

[0199] For example, area ECU 81 is located on the front right side of vehicle X, controlling the right headlight and turn signal, etc. Area ECU 82 is located on the front left side of vehicle X, controlling the left headlight and turn signal, etc. Area ECU 83 is located on the side right side of vehicle X, controlling the right power side mirror, etc. Area ECU 84 is located on the side left side of vehicle X, controlling the left power side mirror, etc. Area ECU 85 is located on the rear right side of vehicle X, controlling the right taillight and turn signal, etc. Area ECU 86 is located on the rear left side of vehicle X, controlling the left taillight and turn signal, etc.

[0200] The previous semiconductor device 1 can be used as an electronic fuse, and multiple units can be set up so that each of the regional ECUs 81-86 is a load. This structure allows for optimization of the wiring harness length and diameter. Furthermore, optimal power supply can be achieved through the cooperation of the central ECU 80 and the regional ECUs 81-86.

[0201] <Postscript>

[0202] The following is a note regarding the above disclosure.

[0203] For example, the overcurrent protection circuit disclosed herein is configured to include: a sensing signal generation circuit configured to generate a sensing signal based on the current of the monitored object; a count completion value setting circuit configured to set a count completion value based on a comparison result of the sensing signal or a corresponding signal with a plurality of thresholds; and a counter configured to count upwards when the current of the monitored object is greater than a count start threshold, and to forcibly stop the current of the monitored object when the count value reaches the count completion value (first structure).

[0204] Alternatively, in the overcurrent protection circuit of the first structure described above, it can also be configured such that the larger the current of the monitored object, the lower the count threshold value (second structure).

[0205] Alternatively, in the overcurrent protection circuit of the first or second structure described above, the count completion value setting circuit may also be configured to include: a signal adjustment circuit configured to generate a second sensing signal by performing at least one of gain adjustment and level adjustment of the sensing signal; and a comparison circuit configured to compare the second sensing signal with the plurality of thresholds to generate a plurality of comparison signals respectively, wherein the count completion value is set to a digital signal of each bit of the plurality of comparison signals (third structure).

[0206] Furthermore, in the overcurrent protection circuit of the third structure described above, the counter may also be configured to include: a plurality of latch circuits configured to latch the plurality of comparison signals to generate a plurality of latch signals respectively; and an up / down counter configured to count the count value up or down synchronously with a clock signal, wherein the up / down counter switches the up and down counting of the count value according to the latch signal corresponding to the least significant bit of the digital signal among the plurality of latch signals, and sets the count completion value (fourth structure) according to the remaining latch signals.

[0207] Additionally, for example, the semiconductor device disclosed herein includes: an output switch; and an overcurrent protection circuit of any of the first to fourth structures described above, wherein the overcurrent protection circuit detects the output current flowing through the output switch as the monitored current (fifth structure).

[0208] Furthermore, in the semiconductor device of the fifth structure described above, the sensing signal generation circuit may also be configured such that: a sensor switch is configured to be controlled synchronously with the output switch to generate a sensing current corresponding to the output current; a bias circuit is configured to make the node voltage of the sensor switch consistent with the node voltage of the output switch; and a current / voltage conversion circuit is configured to convert the sensing current into a sensing voltage, and the sensing signal generation circuit outputs the sensing voltage as the sensing signal (sixth structure).

[0209] The semiconductor device according to the sixth structure can also be configured to further include a current detection circuit, which is configured to generate a current detection signal corresponding to the output current, wherein the sensing signal generation circuit and the current detection circuit share an amplifier (seventh structure) forming the bias circuit.

[0210] Additionally, for example, the electronic device of the present invention is configured to include: a semiconductor device with any of the structures of the fifth to seventh described above; and a load configured to operate by receiving the supply of the output current from the semiconductor device (eighth structure).

[0211] Additionally, for example, the vehicle disclosed herein is configured to include: an electronic device of the eighth structure described above; a battery configured to supply power to the electronic device; and a wire configured as a current path from the battery to the electronic device (ninth structure).

[0212] According to the ninth structure, a vehicle may include: a central ECU; and a plurality of regional ECUs disposed in various parts of the vehicle and configured to communicate with the central ECU, wherein a plurality of semiconductor devices are provided, such that each of the plurality of regional ECUs serves as the load (tenth structure).

[0213] According to this disclosure, it is possible to ensure the necessary current while protecting the conductor (wire harness) through which the current flows.

[0214] <Other>

[0215] Furthermore, the various technical features disclosed in this specification, in addition to the embodiments described above, can be modified in various ways without departing from the spirit of the technical inventiveness. That is, the embodiments described above should be considered illustrative rather than restrictive in all respects. Moreover, the scope of this disclosure is defined by the scope of the patent claim and should be understood to include the same meaning as the scope of the patent claim and all modifications within that scope.

[0216] Symbol Explanation

[0217] 1. Semiconductor device (high-side switching IC)

[0218] 2 DC power supplies

[0219] 3 loads

[0220] 9-Power MISFET (Output Switch)

[0221] 10 controllers

[0222] 11. Drain electrode (power supply electrode)

[0223] 12 Source electrodes (output electrodes)

[0224] 13 input electrodes

[0225] 14 reference voltage electrodes

[0226] 15 Enable Electrodes

[0227] 16 sensing electrodes

[0228] 17 Gate control wiring

[0229] 21-sensor MISFET

[0230] 22-input circuit

[0231] 23 Current / Voltage Control Circuit

[0232] 24 protection circuits

[0233] 25 Gate control circuit

[0234] 26 Active Clamping Circuit

[0235] 27 Current Detection Circuit

[0236] 271 bias circuit

[0237] 271a amplifier

[0238] 271b transistor (P-channel MISFET)

[0239] 28 Power supply reverse connection protection circuit

[0240] 29. Anomaly Detection Circuit

[0241] 30 Drive Voltage Generation Circuit

[0242] 31 First Constant Voltage Generating Circuit

[0243] 32 Second Constant Voltage Generating Circuit

[0244] 33 Reference Voltage / Reference Current Generation Circuit

[0245] 34 Overcurrent Protection Circuit

[0246] 35 Load Open Circuit Detection Circuit

[0247] 36 Overheat Protection Circuit

[0248] 37 Low Voltage Malfunction Suppression Circuit

[0249] 38 oscillator circuit

[0250] 39 Charge Pump Circuit

[0251] 40 drive signal output circuit

[0252] 41 First Multiplexer Circuit

[0253] 42 Second Multiplexer Circuit

[0254] 50 Sensing Signal Generation Circuit

[0255] 51 sensor MISFET

[0256] 52 bias circuit

[0257] 521 amplifier

[0258] 522 transistors (P-channel MISFET)

[0259] 53 resistor

[0260] 54 External Electrodes

[0261] 60 Count Full Value Setting Circuit

[0262] 61 signal conditioning circuit

[0263] 611 amplifier

[0264] 612 transistors (N-channel MISFET)

[0265] 613 resistor

[0266] 614 External Electrode

[0267] 615 resistor

[0268] 616 amplifier

[0269] 617 and 618 resistors

[0270] 62 Threshold Voltage Generation Circuit

[0271] 621(0)~621(n+1) resistors

[0272] 622(0)~622(n+1) resistors

[0273] 63 Comparator Circuit

[0274] 631(0) to 631(n) comparators

[0275] 632(0) to 632(n) comparators

[0276] 70 counter

[0277] 71(0)~71(n) latch circuit

[0278] 72 AND gate

[0279] 73, 74 inverters

[0280] 75 Up / Down Counter

[0281] 80 Central ECU

[0282] ECU in region 81~86

[0283] A electronic device

[0284] B electronic devices

[0285] B10 Control Unit (ECU)

[0286] B11 DC / DC Converter

[0287] B12 Microcomputer

[0288] B13 Upper Switch

[0289] B14 power electrode

[0290] B15 Output Electrode

[0291] B16 Reference Voltage Electrode

[0292] B20 battery

[0293] B30 load

[0294] B40 fuse box

[0295] Fuse B41(1)~B41(n)

[0296] B42 Input Electrode

[0297] B43(1)~B43(n) Output electrodes

[0298] C1 capacitor

[0299] L-inductance components

[0300] R resistance components

[0301] resistor R1

[0302] W, W1~W3, W11~W13 wires

[0303] Wa conductor

[0304] Wb insulator

[0305] Vehicle X.

Claims

1. An overcurrent protection circuit, characterized in that, have: The sensing signal generation circuit is configured to generate a sensing signal based on the current of the monitored object. The count completion value setting circuit is configured to set the count completion value based on the comparison result of the sensing signal or its corresponding signal with multiple thresholds; as well as The counter is configured to count upwards when the current of the monitored object is greater than the counting start threshold, and to forcibly stop the current of the monitored object when the count value reaches the counting full value.

2. The overcurrent protection circuit according to claim 1, characterized in that, The higher the current of the monitored object, the lower the count threshold value.

3. The overcurrent protection circuit according to claim 1 or 2, characterized in that, The count completion value setting circuit includes: A signal conditioning circuit configured to generate a second sensing signal by performing at least one of gain adjustment and level adjustment of the sensing signal; and The comparison circuit is configured to compare the second sensing signal with the plurality of thresholds to generate a plurality of comparison signals respectively. The count completion value is set as a digital signal that sets the plurality of comparison signals to bits.

4. The overcurrent protection circuit according to claim 3, characterized in that, The counter includes: Multiple latching circuits are configured to latch the multiple comparison signals and generate multiple latching signals respectively; and An up / down counter, configured to count the count value up or down in sync with a clock signal. The up / down counter switches the count value up and down based on the latch signal corresponding to the least significant bit of the digital signal among the plurality of latch signals, and sets the count threshold value based on the remaining latch signals.

5. A semiconductor device, characterized in that, have: Output switch; as well as The overcurrent protection circuit according to any one of claims 1 to 4, The overcurrent protection circuit detects the output current flowing through the output switch as the monitored current.

6. The semiconductor device according to claim 5, characterized in that, The sensing signal generation circuit includes: A sensor switch is configured to be controlled synchronously with the output switch to generate a sensing current corresponding to the output current; A biasing circuit configured to make the node voltage of the sensor switch match the node voltage of the output switch; and A current / voltage conversion circuit is configured to convert the sensed current into a sensed voltage. The sensing signal generation circuit outputs the sensing voltage as the sensing signal.

7. The semiconductor device according to claim 6, characterized in that, The semiconductor device further includes a current detection circuit configured to generate a current detection signal corresponding to the output current. The sensing signal generation circuit and the current detection circuit share an amplifier that forms the bias circuit.

8. An electronic device, characterized in that, have: The semiconductor device according to any one of claims 5 to 7; and The load is configured to operate by receiving the output current from the semiconductor device.

9. A vehicle, characterized in that, have: The electronic device according to claim 8; A battery configured to supply power to the electronic device; and The wires form a current path from the battery to the electronic device.

10. The vehicle according to claim 9, characterized in that, The vehicle has the following features: Central ECU; and Multiple regional ECUs are located in various parts of the vehicle and configured to communicate with the central ECU. The semiconductor device is provided in a plurality of such that each of the plurality of regional ECUs serves as the load.

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