Control device and program for three-level inverter

By setting the drive mode and adjusting the occurrence of zero-voltage drive state in the three-level inverter, the problem of load concentration on specific switches is solved, and the reliability of the switches is improved.

CN121753239APending Publication Date: 2026-03-27DENSO CORP
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-07-29
Publication Date
2026-03-27

AI Technical Summary

Technical Problem

In existing three-level inverters, the load tends to concentrate on a specific switch, leading to reduced switch reliability.

Method used

By setting the drive mode and adjusting the occurrence period of zero-voltage drive state, the switching control of each switch is controlled to avoid load concentration on specific switches.

Benefits of technology

It effectively controls switch losses, suppresses load concentration, and improves switch reliability.

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Abstract

A control device (50) is applied to a system including a first power storage unit (21) and a second power storage unit (22), a rotating electrical machine (10) having armature windings (11U, 11V, 11W) corresponding to three phases, and a three-level inverter (30) having switches (SUH-SWL, QU1-QW2), and performs switching control of each switch. The control device includes: a setting unit that sets a drive pattern formed by a combination of drive states of each switch and an occurrence period of each drive state on the basis of a command voltage for controlling a control amount of the rotating electric machine to a command value; and a control unit that performs switching control on the basis of the set driving mode and the occurrence period of each driving state. The setting section sets the driving mode to include at least two of three different zero voltage driving states. The control unit adjusts an occurrence period of each zero-voltage driving state included in the driving mode during the switching control.
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Description

[0001] Reference to Related Applications

[0002] This application is based on Japanese Patent Application No. 2023-138400 filed August 28, 2023, the contents of which are incorporated herein by reference. TECHNICAL FIELD

[0003] The present disclosure relates to a control device and program of a three-level inverter. BACKGROUND

[0004] Conventionally, a three-level inverter including two capacitors connected in series and switches electrically connected to an armature winding of a rotating electric machine and each of the capacitors is known (see Patent Literature 1).

[0005] Prior Art Documents

[0006] Patent Literature

[0007] Patent Literature 1: Japanese Patent Application Publication No. H8-98540 SUMMARY

[0008] It is desirable to suppress a situation in which a load is concentrated in a particular switch among the switches provided corresponding to each phase, on the basis of suppressing a decrease in reliability of the switches.

[0009] A main object of the present disclosure is to provide a control device and program of a three-level inverter capable of suppressing a situation in which a load is concentrated in a particular switch.

[0010] The present disclosure is a control device of a three-level inverter applied to a system including: a first power storage unit and a second power storage unit connected in series; a rotating electric machine having an armature winding corresponding to three phases; and a three-level inverter having a switch electrically connecting the armature winding with any one of a positive electrode side of the first power storage unit, a negative electrode side of the first power storage unit, and a negative electrode side of the second power storage unit in each phase, the control device of the three-level inverter performing switch control of each of the switches and including: a setting unit that sets a drive pattern formed by a combination of drive states of each of the switches and an occurrence period of each of the drive states, based on a command voltage for controlling a control amount of the rotating electric machine to a command value; and a control unit that performs the switch control based on the set drive pattern and occurrence period of each of the drive states, three different drive states in which the armature winding of each phase is electrically connected to the positive electrode side of the first power storage unit, the neutral point, or the negative electrode side of the second power storage unit are set as zero-voltage drive states, The setting unit sets the drive mode to include at least two of the zero-voltage drive states, The control unit adjusts the occurrence of each of the zero-voltage drive states included in the drive mode during the switching control.

[0011] Based on an instruction voltage for controlling a control amount of a rotating electric machine to an instruction value, a drive mode formed by a combination of drive states of each switch and an occurrence period of each drive state are set. Also, based on the set drive mode and the occurrence period of each drive state, switching control of each switch is performed. In this case, a load is sometimes concentrated on a specific switch among the switches. In this regard, in a three-level inverter, it is possible to output three different zero-voltage drive states. In each zero-voltage drive state, a current path is different, and a switch that generates conduction loss is different.

[0012] Therefore, in the present disclosure, in the switching control of each switch, the occurrence period of each zero-voltage drive state included in the drive mode is adjusted. In this case, it is possible to control the loss generated in each switch within a range in which the occurrence period of each zero-voltage drive state can be adjusted. Thus, it is possible to perform switching control in such a manner that the loss is not concentrated on a specific switch among the switches. Therefore, it is possible to suppress a situation in which the load is concentrated on the specific switch. BRIEF DESCRIPTION OF DRAWINGS

[0013] The above objects, other objects, features, and advantages of the present disclosure will become more clearly apparent from the following detailed description taken in conjunction with the accompanying drawings. The accompanying drawings are as follows.

[0014] Figure 1 is a whole configuration diagram of a control system of a first embodiment.

[0015] Figure 2 is a functional block diagram of torque control processing performed by a control device.

[0016] Figure 3 is a diagram showing a vector space.

[0017] Figure 4 is a diagram showing a first section.

[0018] Figure 5 is a timing chart for explaining processing performed by an adjustment unit.

[0019] Figure 6 is a timing chart for explaining processing performed by an adjustment unit.

[0020] Figure 7This is a flowchart illustrating the control processing steps performed by the control device.

[0021] Figure 8 This is a timing diagram illustrating the switch control of a comparative example.

[0022] Figure 9 This is a timing diagram illustrating an example of switch control.

[0023] Figure 10 This is a diagram used to illustrate the switching configuration of each switch in phase U.

[0024] Figure 11 This is a diagram used to illustrate the switching configuration of each switch in phase U.

[0025] Figure 12 This is a diagram used to illustrate the switching configuration of each switch in phase U.

[0026] Figure 13 This is a diagram used to illustrate the switching configuration of each switch in phase U.

[0027] Figure 14 This is a timing diagram used to explain the processing performed by the adjustment unit in the second embodiment.

[0028] Figure 15 This is a flowchart illustrating the control processing steps performed by the control device.

[0029] Figure 16 This is a diagram showing the power loss generated by each switch in phase U.

[0030] Figure 17 This is a flowchart illustrating the control processing steps performed by a control device according to other embodiments. Detailed Implementation

[0031] Hereinafter, several embodiments will be described with reference to the accompanying drawings. In several embodiments, functionally and / or structurally corresponding and / or related parts are sometimes labeled with the same reference numerals or with more than one hundred different reference numerals. For corresponding and / or related parts, reference can be made to the description of other embodiments.

[0032] <First Implementation>

[0033] Hereinafter, a first embodiment of the control device of the present disclosure will be described with reference to the accompanying drawings. In this embodiment, the control device is installed in an electric vehicle such as an electric car or a hybrid electric vehicle.

[0034] like Figure 1As shown, the vehicle-mounted system includes a rotary motor 10, a battery 20, and an inverter 30. The rotary motor 10 is the vehicle-mounted main unit, capable of transmitting power to drive wheels (not shown). In this embodiment, the rotary motor 10 is a three-phase synchronous machine, including a U-phase winding 11U, a V-phase winding 11V, and a W-phase winding 11W as armature windings. The phase windings 11U, 11V, and 11W are connected in a star configuration. The phase windings 11U, 11V, and 11W are arranged with their electrical angles offset by 120°. The rotary motor 10 is, for example, a permanent magnet synchronous machine.

[0035] The battery 20 is electrically connected to the rotating motor 10 via the inverter 30. The battery 20 is, for example, a battery pack comprising battery cells connected in series. The battery 20 is a rechargeable secondary battery, such as a lithium-ion battery or a nickel-metal hydride battery.

[0036] The inverter 30 is a power conversion circuit that converts the DC power supplied from the battery 20 into three-phase AC power via a switch control, and then supplies the converted AC power to the rotating motor 10. The system includes a first capacitor 21 as a first energy storage unit and a second capacitor 22 as a second energy storage unit on the input side of the inverter 30. The first capacitor 21 and the second capacitor 22 are connected in series. The series connection of the first capacitor 21 and the second capacitor 22 is connected in parallel with the battery 20. In this embodiment, the electrostatic capacitance of the first capacitor 21 and the electrostatic capacitance of the second capacitor 22 are the same value. Furthermore, the first capacitor 21 and the second capacitor 22 can be disposed outside the inverter 30 or built into the inverter 30.

[0037] Inverter 30 is a T-type three-level inverter, comprising a series connection of upper arm switches SUH, SVH, SWH and lower arm switches SUL, SVL, SWL corresponding to the three. Each switch SWH to SWL is a voltage-controlled semiconductor switching element, specifically an IGBT. In each switch SUH to SWL, the high-potential side terminal is the collector, and the low-potential side terminal is the emitter. Each switch SUH, SVH, SWH, SUL, SVL, SWL is connected in reverse parallel with freewheeling diodes DUH, DVH, DWH, DUL, DVL, DWL.

[0038] The emitter of the upper U-phase switch SUH is connected to the collector of the lower U-phase switch SUL. The connection point between the upper U-phase switch SUH and the lower U-phase switch SUL is connected to the first terminal of the U-phase winding 11U. The emitter of the upper V-phase switch SVH is connected to the collector of the lower V-phase switch SVL. The connection point between the upper V-phase switch SVH and the lower V-phase switch SVL is connected to the first terminal of the V-phase winding 11V. The emitter of the upper W-phase switch SWH is connected to the collector of the lower W-phase switch SWL. The connection point between the upper W-phase switch SWH and the lower W-phase switch SWL is connected to the first terminal of the W-phase winding 11W. The second terminals of each phase winding 11U, 11V, and 11W are interconnected at the motor neutral point.

[0039] The collectors of each upper arm switch SUH to SWH are connected via a positive-side busbar 31, which serves as a conductive component. The positive-side busbar 31 is connected to the positive terminal of the battery 20 and the first terminal of the first capacitor 21. The second terminal of the first capacitor 21 is connected to the first terminal of the second capacitor 22 via the capacitor neutral point O. The emitters of each lower arm switch SUL to SWL are connected via a negative-side busbar 32, which serves as a conductive component. The negative-side busbar 32 is connected to the negative terminal of the battery 20 and the second terminal of the second capacitor 22.

[0040] The inverter 30 includes three corresponding intermediate switches QU1, QU2, QV1, QV2, QW1, and QW2 for switching on and off current in both directions. In this embodiment, each intermediate switch QU1, QU2, QV1, QV2, QW1, and QW2 is a voltage-controlled semiconductor switching element, specifically an IGBT.

[0041] Specifically, taking phase U as an example, the emitters of phase U's first intermediate switch QU1 and phase U's second intermediate switch QU2 are connected to each other. The collector of phase U's second intermediate switch QU2 is connected to the connection point of phase U's upper arm switch SUH and phase U's lower arm switch SUL. The collector of phase U's first intermediate switch QU1 is connected to the neutral point O of the capacitor.

[0042] In each phase, the first diodes DU1, DV1, and DW1, which act as freewheeling diodes, are connected in reverse parallel with the first intermediate switches QU1, QV1, and QW1. In each phase, the second diodes DU2, DV2, and DW2, which act as freewheeling diodes, are connected in reverse parallel with the second intermediate switches QU2, QV2, and QW2.

[0043] The motor control system includes a first voltage sensor 41, a second voltage sensor 42, a phase current sensor 43, a rotation angle sensor 44, and a temperature sensor 45. The first voltage sensor 41 detects the terminal voltage of the first capacitor 21. The second voltage sensor 42 detects the terminal voltage of the second capacitor 22. The phase current sensor 43 detects the U-phase current, V-phase current, and W-phase current flowing through each phase winding 11U, 11V, and 11W. Furthermore, the phase current sensor 43 only needs to be able to detect the current of at least two of the three phases. The rotation angle sensor 44 is, for example, a resolver, which detects the electrical angle of the rotating motor 10. The temperature sensor 45 detects the temperature of the inverter 30. For example, the temperature sensor 45 detects the temperature of the cooling water cooling the inverter 30 and at least one of the temperatures of each switch SUH-SWL and QU1-QW2. The detection values ​​of each sensor 41-45 are input to the control device 50 included in the system.

[0044] The control device 50 is an electronic control unit primarily composed of a microcomputer 51. The microcomputer 51 includes a CPU (Central Processing Unit). The functions provided by the microcomputer 51 can be provided by software recorded in a physical memory device and a computer executing that software, software only, hardware only, or a combination thereof. For example, if the microcomputer 51 is provided by electronic circuitry as hardware, it can be provided by digital or analog circuitry including multiple logic circuits. For example, the microcomputer 51 executes a program stored in a non-transitory tangible storage medium included within itself as storage. The program includes, for example, the following... Figure 7 , Figure 15 , Figure 17 The process is as shown. The method corresponding to the program is executed by executing the instruction set that constitutes the program. The storage unit is, for example, non-volatile memory. Furthermore, the program stored in the storage unit can be updated, for example, via OTA (Over-The-Air) or communication networks such as the Internet.

[0045] The control device 50 performs control to adjust the control quantity of the rotating motor 10 to the command value, that is, the switching control of each switch SUH~SWL, QU1~QW2 of the inverter 30. Figure 2 This explains the switching control of the control device 50. Figure 2 In the example shown, current feedback control is performed in the switch control. The control quantity is the torque of the rotating motor 10, and the command value is the command torque Trq input from the higher-level control device. .

[0046] In the control device 50, the command current setting unit 60 is based on the command torque Trq. To set the d-axis command current Id and q-axis command current Iq For example, the command current setting unit 60 is based on the command torque Trq. With d-axis command current Id and q-axis command current Iq Associated mapping information or mathematical formula information to set the d-axis command current Id. and q-axis command current Iq That's all.

[0047] The two-phase conversion unit 61 converts the U-phase, V-phase, and W-phase currents in the three-phase fixed coordinate system into the d-axis current Idr and the q-axis current Iqr in the two-phase rotating coordinate system (dq coordinate system) based on the detection value of the phase current sensor 43 and the electrical angle θe detected by the rotation angle sensor 44.

[0048] The d-axis deviation calculation unit 62a calculates the deviation from the d-axis by means of the command current Id. The d-axis current deviation ΔId is calculated by subtracting the d-axis current Idr. The q-axis deviation calculation unit 62b calculates the deviation from the q-axis command current Iq. The q-axis current deviation ΔIq is calculated by subtracting the q-axis current Iqr from the q-axis current.

[0049] As a means to feed back and control the d-axis current Idr into the d-axis command current Id The d-axis command voltage calculation unit 63a calculates the d-axis command voltage Vd based on the d-axis current deviation ΔId. This is used to feed back and control the q-axis current Iqr into the q-axis command current Iq. The q-axis command voltage calculation unit 63b calculates the q-axis command voltage Vq based on the q-axis current deviation ΔIq. Furthermore, the feedback control used in the d-axis command voltage calculation unit 63a and the q-axis command voltage calculation unit 63b can be, for example, proportional-integral control.

[0050] The d-axis command voltage Vd and q-axis command voltage Vq output by the d-axis command voltage calculation unit 63a and the q-axis command voltage calculation unit 63b, along with the electrical angle θe detected by the rotation angle sensor 44, are input to the fixed coordinate transformation unit 64. Based on the d-axis command voltage Vd, q-axis command voltage Vq, and electrical angle θe, the fixed coordinate transformation unit 64 converts the d-axis command voltage Vd and q-axis command voltage Vq in the two-phase rotating coordinate system into the α-axis command voltage Vα and β-axis command voltage Vβ in the two-phase fixed coordinate system.

[0051] The modulation unit 65 calculates the command voltage vector Vαβ, which is determined by the α-axis command voltage Vα and the β-axis command voltage Vβ. The command voltage vector Vαβ is a voltage vector used to control the control quantity of the rotary motor 10 to the command value.

[0052] The modulation unit 65 determines the segment in the vector space where the leading edge of the command voltage vector Vαβ extending from the origin is located. The segment is a region that divides the vector space where the command voltage vector Vαβ may exist into six parts according to the deflection angle of Vαβ. The deflection angle of the command voltage vector Vαβ is the angle between the command voltage vector Vαβ and the U-phase axis, specifically the electrical angle θe. The sign of the electrical angle θe is positive when it is left-handed (counterclockwise). Figure 3 The diagram illustrates the first through sixth segments, dividing the vector space into six sections. In this vector space, the axes of the U, V, and W phases are arranged with their electrical angles offset by 120°. Each segment is a region sandwiched between the axes of two phases with an electrical angle difference of 60 degrees. Figure 3 In the middle, the shaded points are marked within the area representing the first section.

[0053] The first to sixth segments are further divided into four regions. Specifically, the endpoint of the segment on the smaller-angled first axis L1, which divides each segment, is designated as the first endpoint, and the endpoint of the segment on the larger-angled second axis L2 is designated as the second endpoint. Furthermore, the midpoint between the origin and the first endpoint is designated as the first midpoint, the midpoint between the origin and the second endpoint is designated as the second midpoint, and the midpoint between the first and second endpoints is designated as the middle endpoint. In this case, the first region R1 is enclosed by triangles with the origin, the first midpoint, and the second midpoint as vertices. The second region R2 is enclosed by triangles with the first midpoint, the second midpoint, and the middle endpoint as vertices. The third region R3 is enclosed by triangles with the second endpoint, the second midpoint, and the middle endpoint as vertices. The fourth region R4 is enclosed by triangles with the first endpoint, the first midpoint, and the middle endpoint as vertices. Furthermore, Figure 4 The first section is shown as an example, from the first region R1 to the fourth region R4.

[0054] Go back to the beginning Figure 2 For example, when the modulation unit 65 is 0°≤θe<60°, it determines that the front end of the command voltage vector Vαβ exists in the first segment.

[0055] The modulation unit 65 determines a sub-region based on the magnitude of the command voltage vector Vαβ and the angle α within the segment. The sub-region is the region where the front end of the command voltage vector Vαβ is located in the first region R1 to the fourth region R4 that constitute the determined segment. The angle α within the segment is the angle formed by the command voltage vector Vαβ and the first axis L1 extending from the origin to the first endpoint within the segment being targeted.

[0056] Based on the determined segment and the sub-region within that segment, the modulation unit 65 selects the driving state of each switch SUH~SWL, QU1~QW2. As the driving state of each switch SUH~SWL, QU1~QW2, the driving state corresponding to the three vertices constituting the sub-region is selected.

[0057] like Figure 4 As shown, in the first segment, the first endpoint is "HLL", the second endpoint is "HHL", the first intermediate point is "MLL" and "HMM", the second intermediate point is "HHM" and "MML", and the intermediate endpoint is "HML".

[0058] The symbols “HML” and the like represent the output voltage level of each phase through three voltage levels H, M and L, which correspond to the driving states of each switch SUH~SWL and QU1~QW2.

[0059] A phase voltage of level H is output by electrically connecting the winding of the phase to the first terminal of the first capacitor 21. In this case, the upper arm switch is turned on and the lower arm switch is turned off in the phase to be output. Furthermore, the first intermediate switch is turned on and the second intermediate switch is turned off in the phase to be output. The second intermediate switch is turned off in the phase to be output when the phase voltage of level H is output in order to prevent the two ends of the first capacitor 21 from being short-circuited through the upper arm switch, the second intermediate switch, and the first diode.

[0060] A phase voltage of level M is output by electrically connecting the winding of the phase to the neutral point O of the capacitor. In this case, the first and second intermediate switches of the phase are turned on, and the upper and lower arm switches are turned off.

[0061] A phase voltage of level L is output by electrically connecting the winding of the phase to the second terminal of the second capacitor 22. In this case, the lower arm switch is turned on and the upper arm switch is turned off in the phase to be output. Furthermore, the second intermediate switch is turned on and the first intermediate switch is turned off in the phase to be output. Turning off the first intermediate switch in the phase to be output when the phase voltage of level L is being output is to prevent a short circuit across the two terminals of the second capacitor 22 through the lower arm switch, the first intermediate switch, and the second diode.

[0062] In addition, when the voltage of the storage battery 20 is set to Vdc and the second terminal of the second capacitor 22 is set to the reference potential (0V), the phase voltage of level H is "Vdc", the phase voltage of level M is "Vdc / 2", and the phase voltage of level L is "0".

[0063] For example, "HML" represents the driving state of switches SUH~SWL and QU1~QW2, where the U-phase voltage is at level H, the V-phase voltage is at level M, and the W-phase voltage is at level L. In driving state HML, the U-phase upper arm switch SUH, the U-phase first intermediate switch QU1, the V-phase first intermediate switch QV1, the V-phase second intermediate switch QV2, the W-phase lower arm switch SWL, and the W-phase second intermediate switch QW2 are connected, while the V-phase upper arm switch SVH, the W-phase upper arm switch SWH, the U-phase second intermediate switch QU2, the W-phase first intermediate switch QW1, the U-phase lower arm switch SUL, and the V-phase lower arm switch SVL are disconnected.

[0064] "HHH" represents the zero-voltage drive state of all switches SUH~SWL and QU1~QW2, with the output voltage level of all three phases set to H. In the zero-voltage drive state HHH, the upper arm switches SUH, SVH, and SWH of each phase, as well as the first intermediate switches QU1, QV1, and QW1 of each phase, are closed, while the lower arm switches SUH, SVL, and SWL of each phase, as well as the second intermediate switches QU2, QV2, and QW2 of each phase, are open. In this condition, the windings 11U, 11V, and 11W of each phase are electrically connected through the upper arm switches SUH, SVH, and SWH of each phase.

[0065] "MMM" refers to the zero-voltage drive state of all three-phase output voltage levels set to M for switches SUH~SWL and QU1~QW2. In the zero-voltage drive state MMM, the first intermediate switches QU1, QV1, and QW1 of each phase, and the second intermediate switches QU2, QV2, and QW2 of each phase are closed, while the upper arm switches SUH, SVH, and SWH of each phase, and the lower arm switches SUL, SVL, and SWL of each phase are open. In this condition, the windings 11U, 11V, and 11W of each phase are electrically connected through the first intermediate switches QU1, QV1, and QW1 of each phase, and the second intermediate switches QU2, QV2, and QW2 of each phase.

[0066] "LLL" represents the zero-voltage drive state of all switches SUH~SWL and QU1~QW2, with the output voltage level of all three phases set to L. In the zero-voltage drive state LLL, the lower arm switches SUL, SVL, and SWL of each phase, as well as the second intermediate switches QU2, QV2, and QW2 of each phase, are closed, while the upper arm switches SUH, SVH, and SWH of each phase, as well as the first intermediate switches QU1, QV1, and QW1 of each phase, are open. In this condition, the windings 11U, 11V, and 11W of each phase are electrically connected through the lower arm switches SUL, SVL, and SWL of each phase.

[0067] In this embodiment, the driving states other than the zero-voltage driving states HHH, MMM, and LLL among the driving states of each switch SUH~SWL and QU1~QW2 are referred to as effective voltage driving states.

[0068] "MLL" and "HMM" are in the same position in vector space, and the line-to-line voltages applied to each winding 11U to 11W are equivalent in these two effective voltage drive states. Furthermore, "MML" and "HHM", "LML" and "MHM", "LMM" and "MHH", "LLM" and "MMH", and "MLM" and "HMH" are also the same as "MLL" and "HMM". In this embodiment, "MLL", "MML", "LML", "LMM", "LLM", and "MLM" are referred to as Mid-Lo drive states, and "HMM", "HHM", "MHM", "MHH", "MMH", and "HMH" are referred to as Hi-Mid drive states.

[0069] In the switch control, the voltage change direction of the capacitor neutral point O is opposite during the occurrence of the Mid-Lo drive state and the Hi-Mid drive state. The modulation unit 65 acquires the detection voltage V1r of the first voltage sensor 41 and the detection voltage V2r of the second voltage sensor 42. In the switch control, the modulation unit 65 can select either the Mid-Lo drive state or the Hi-Mid drive state based on the acquired detection voltages V1r and V2r, in a manner that keeps the voltage of the capacitor neutral point O within a specified range.

[0070] Based on the determined segment and the sub-regions within that segment, the modulation unit 65 sets a driving mode consisting of combinations of the driving states of each switch SUH~SWL and QU1~QW2. For example, when the command voltage vector Vαβ exists in the first region R1 of the first segment, the modulation unit 65 sets the driving mode of each switch SUH~SWL and QU1~QW2 in the order MMM→MML→MLL→LLL→MLL→MML→MMM, or sets the driving mode of each switch SUH~SWL and QU1~QW2 in the order MMM→HMM→HHM→HHH→HHM→HMM→MMM.

[0071] When switching is controlled in the set drive mode, the modulation unit 65 sets the occurrence period of the drive state of each switch SUH~SWL, QU1~QW2.

[0072] Specifically, for such Figure 4The case where the command voltage vector Vαβ exists in the first region R1 of the first segment will be explained. The modulation unit 65 decomposes the command voltage vector Vαβ into a first voltage vector Vt1 along the first axis L1 and a second voltage vector Vt2 along the second axis L2. The first voltage vector Vt1 is a vector that is ta times (0 < ta < 1) of the voltage vector corresponding to the first intermediate point. The second voltage vector Vt2 is a vector that is tb times (0 < tb < 1) of the voltage vector corresponding to the second intermediate point. The modulation unit 65 sets the occurrence period of the drive state corresponding to the first intermediate point to "ta × TS" and the occurrence period of the drive state corresponding to the second intermediate point to "tb × TS" in one control cycle. Here, TS is the length of one control cycle.

[0073] The modulation unit 65 sets the remaining period Tz (=TS-ta×TS-tb×TS) after subtracting “ta×TS” and “tb×TS” from the length TS of a control cycle as the occurrence period of the zero-voltage drive state. The remaining period Tz is the total occurrence period of each zero-voltage drive state HHH, MMM, and LLL in a control cycle. In addition, the period twice the length TS of a control cycle corresponds to one switching cycle Tsw of each switch SUH~SWL and QU1~QW2.

[0074] For example, when setting a drive mode that includes each drive state MML, MLL, MMM, and LLL, the modulation unit 65 sets the occurrence period of drive state MLL to "ta×TS" and the occurrence period of drive state MML to "tb×TS". Furthermore, the modulation unit 65 sets the occurrence period of zero-voltage drive state LLL to "TL" and the occurrence period of zero-voltage drive state MMM to "TM". In this case, the total duration of the occurrence periods of each zero-voltage drive state MMM and LLL, "TM+TL", is the remaining period Tz.

[0075] Furthermore, for example, when setting a drive mode including each drive state HMM, HHM, HHH, and MMM, the modulation unit 65 sets the occurrence period of drive state HMM to "ta×TS" and the occurrence period of drive state HHM to "tb×TS". Also, the modulation unit 65 sets the occurrence period of zero-voltage drive state HHH to "TH" and the occurrence period of zero-voltage drive state MMM to "TM". In this case, the total period "TH+TM" of the occurrence periods of each zero-voltage drive state HHH and MMM is the remaining period Tz.

[0076] Based on the drive mode set by the modulation unit 65 and the occurrence period of each drive state, switching control is performed to control the torque of the rotary motor 10 to the command torque Trq. .

[0077] In addition, in switch control, the load may be concentrated on specific switches among the switches SUH~SWL and QU1~QW2.

[0078] Specifically, in switch control where the leading edge of the command voltage vector Vαβ exists in the first region of each segment, the occurrence period TM of the zero-voltage drive state MMM is sometimes longer than the occurrence periods TH and TL of other zero-voltage drive states HHH and LLL. For example, under conditions of low vehicle speed and low torque of the rotary motor 10, the occurrence period TM of the zero-voltage drive state MMM is more likely to be longer than the occurrence periods TH and TL of other zero-voltage drive states HHH and LLL. In this case, the load may be concentrated on the intermediate switches QU1 to QW2 due to increased conduction losses of each of the switches SUH~SWL and QU1~QW2.

[0079] Here, the three-level inverter can output three different zero-voltage drive states: HHH, MMM, and LLL. Under each zero-voltage drive state (HHH, MMM, LLL), the current path is different, and the switches that generate conduction losses are different.

[0080] Therefore, the control device 50 includes an adjustment unit 66. In the switching control of each switch SUH~SWL, QU1~QW2, the adjustment unit 66 adjusts the occurrence period of each zero-voltage drive state HHH, MMM, and LLL included in the drive mode. In this embodiment, the adjustment unit 66 adjusts the occurrence period of each zero-voltage drive state HHH, MMM, and LLL in such a way that the occurrence period of the zero-voltage drive state MMM included in the drive mode is shorter than the occurrence period TM set by the modulation unit 65. Furthermore, the zero-voltage drive state MMM corresponds to a "specific drive state".

[0081] The following uses Figure 5 and Figure 6 This will explain the processing performed by the adjustment unit 66. Figure 5 and Figure 6 This illustrates an example of the shift in phase voltages between two control cycles. Figure 5 , Figure 6 In the diagram, (a) represents the shift in the voltage level of phase U, (b) represents the shift in the voltage level of phase V, and (c) represents the shift in the voltage level of phase W.

[0082] Figure 5 In this process, switches SUH to SWL and QU1 to QW2 are driven in the order MMM→MML→MLL→LLL→MLL→MML→MMM.

[0083] The adjustment unit 66 subtracts a predetermined adjustment period k from the occurrence period TM of the zero-voltage drive state MMM set by the modulation unit 65, thereby shortening the occurrence period of the zero-voltage drive state MMM. The adjustment unit 66 adds the predetermined adjustment period k to the occurrence period TL of the zero-voltage drive state LLL set by the modulation unit 65, thereby extending the occurrence period of the zero-voltage drive state LLL. That is, in one control cycle, the adjustment unit 66 adjusts the occurrence period of the zero-voltage drive state MMM to "TM-k" and adjusts the occurrence period of the zero-voltage drive state LLL to "TL+k". Thus, the occurrence period of the zero-voltage drive state MMM is shortened without changing the total duration (i.e., the remaining period Tz) of the occurrence periods of each zero-voltage drive state MMM and LLL in one control cycle.

[0084] Figure 6 In this process, the switches SUH~SWL and QU1~QW2 are driven in the order MMM→HMM→HHM→HHH→HHM→HMM→MMM.

[0085] The adjustment unit 66 subtracts a predetermined adjustment period k from the occurrence period TM of the zero-voltage drive state MMM set by the modulation unit 65, thereby shortening the occurrence period of the zero-voltage drive state MMM. The adjustment unit 66 adds the predetermined adjustment period k to the occurrence period TH of the zero-voltage drive state HHH set by the modulation unit 65, thereby extending the occurrence period of the zero-voltage drive state HHH. That is, the adjustment unit 66 adjusts the occurrence period of the zero-voltage drive state MMM to "TM-k" and adjusts the occurrence period of the zero-voltage drive state HHH to "TH+k". Thus, the occurrence period of the zero-voltage drive state MMM is shortened without changing the total occurrence period of each zero-voltage drive state HHH and MMM in one control cycle.

[0086] Figure 7 The processing steps of the control performed by the control device 50 are shown. This control is repeated at a predetermined cycle.

[0087] In step S10, the command torque Trq input from the host control device is obtained. The phase currents flowing through each phase winding 11U to 11W, the voltages of the first capacitor 21 and the second capacitor 22, and the electrical angle θe of the rotary motor 10 are all measured. The phase current can be measured using the value detected by the phase current sensor 43. The voltage of the first capacitor 21 can be measured using the voltage V1r detected by the first voltage sensor 41, and the voltage of the second capacitor 22 can be measured using the voltage V2r detected by the second voltage sensor 42. The electrical angle θe of the rotary motor 10 can be measured using the value detected by the rotation angle sensor 44.

[0088] In step S11, based on the acquired command torque Trq The phase current and electrical angle θe are used to calculate the command voltage vector Vαβ. In step S12, the segment containing the command voltage vector Vαβ and the sub-region within that segment are determined. In steps S11 and S12, the control device 50, as previously... Figure 2 The instruction current setting unit 60, the two-phase conversion unit 61, the deviation calculation units 62a and 62b, the instruction voltage calculation units 63a and 63b, the fixed coordinate conversion unit 64, and the modulation unit 65 described herein shall function.

[0089] In step S13, based on the determined segment, the sub-region within that segment, and the acquired detection voltages V1r and V2r, a drive mode consisting of a combination of the drive states of each switch SUH~SWL and QU1~QW2 is set. Here, the drive mode for two control cycles is set in a manner that includes two different zero-voltage drive states. In this case, the drive mode is set in a manner that includes at least one of the zero-voltage drive state MMM and the other zero-voltage drive states HHH and LLL. Furthermore, the occurrence period of each drive state included in the set drive mode is set. In this case, the occurrence period of each effective voltage drive state in one control cycle is set based on the length of the voltage vector after decomposing the command voltage vector Vαβ. The remaining period Tz after subtracting the occurrence period of each effective voltage drive state from the length TS of one control cycle is the total period of the occurrence periods TH, TM, and TL of each zero-voltage drive state HHH, MMM, and LLL. In addition, the processing in step S13 is equivalent to the "setting unit".

[0090] In step S14, the occurrence period of the zero-voltage drive state included in the drive mode is adjusted. In this embodiment, the occurrence period of the zero-voltage drive state MMM included in the drive mode is adjusted in such a way that the occurrence period of the zero-voltage drive state MMM in a control cycle is shortened compared to the case set by the process in step S13.

[0091] For example, when the command voltage vector Vαβ exists in the first region R1 of each segment, a drive mode including a Mid-Lo drive state and each zero-voltage drive state MMM and LLL is set. Furthermore, in one control cycle, the occurrence period of the zero-voltage drive state MMM is set to TM, and the occurrence period of the zero-voltage drive state LLL is set to TL. In this case, the occurrence periods of each zero-voltage drive state MMM and LLL are adjusted such that the occurrence period of the zero-voltage drive state MMM is "TM-k", and the occurrence period of the zero-voltage drive state LLL is "TL+k".

[0092] Furthermore, for example, when the command voltage vector Vαβ exists in the first region R1 of each segment, a drive mode including the Hi-Mid drive state and each zero-voltage drive state HHH and MMM is set. In one control cycle, the occurrence period of the zero-voltage drive state MMM is set to TM, and the occurrence period of the zero-voltage drive state HHH is set to TH. In this case, the occurrence periods of each zero-voltage drive state HHH and MMM are adjusted such that the occurrence period TM of the zero-voltage drive state MMM is "TM-k", and the occurrence period TH of the zero-voltage drive state HHH is "TH+k". Additionally, a predetermined period can be used as the adjustment period k.

[0093] Alternatively, if it is determined that the command voltage vector Vαβ exists in the second region R2 to the fourth region R4 of each segment, the processing in step S14 may be omitted.

[0094] In step S16, switch control is performed based on the drive modes of each switch SUH-SWL, QU1-QW2 set by the processes in steps S10-S14 and the occurrence periods of each drive state. Furthermore, the processes in steps S14 and S15 correspond to the "control unit".

[0095] Next, refer to Figure 8 and Figure 9 The effects and functions are explained. Figure 8 This is a comparative example in which step S14 was not performed in the switch control of each switch SUH~SWL and QU1~QW2. Figure 9 This is an example of the switching control of each switch SUH~SWL, QU1~QW2 in this embodiment. Figure 8 and Figure 9 The diagram shows the shift in voltage across each phase.

[0096] exist Figure 8 In the comparative example, the conduction losses of each intermediate switch QU1 to QW2 may increase due to the longer duration of the zero-voltage drive state MMM. In this case, the load may be concentrated on each intermediate switch QU1 to QW2.

[0097] Therefore, in this embodiment, the switching control of each switch SUH~SWL and QU1~QW2 adjusts the occurrence period of each zero-voltage drive state HHH, MMM, and LLL included in the drive mode. In this case, the conduction losses generated by each switch SUH~SWL and QU1~QW2 can be controlled within the range that allows adjustment of the occurrence period of each zero-voltage drive state HHH, MMM, and LLL. Therefore, it is possible to suppress the situation where the load is concentrated on each intermediate switch QU1~QW2.

[0098] exist Figure 9In the control example, the occurrence period of each zero-voltage drive state HHH and MMM is adjusted by shortening the adjustment period k of the occurrence period of the zero-voltage drive state MMM by a shorter period TM than that of the comparative example. In this case, the conduction losses of each intermediate switch QU1 to QW2 are reduced compared to the comparative example. As a result, it is possible to avoid the generation of concentrated losses in each intermediate switch QU1 to QW2, and it is possible to reliably suppress the situation where the load is concentrated in each intermediate switch QU1 to QW2.

[0099] The occurrence period of the zero-voltage drive state HHH is extended by the amount that the occurrence period of the zero-voltage drive state MMM is shortened. Therefore, it is possible to shorten the occurrence period of the zero-voltage drive state MMM without changing the total occurrence period of each of the zero-voltage drive states HHH and MMM.

[0100] <Second Implementation>

[0101] Hereinafter, with reference to the accompanying drawings, the second embodiment will be described focusing on the differences from the first embodiment. In this embodiment, the adjustment unit 66 takes into account the differences in switching losses generated in the switching control of each switch SUH~SWL, QU1~QW2, and adjusts the period during which the zero-voltage drive states HHH, MMM, and LLL occur.

[0102] In each phase, when the current flows from the first end of the winding connected to the switch of the inverter 30 to the second end of the winding at the motor neutral point, the upper arm switches SUH, SVH, SWH and the first intermediate switches QU1, QV1, QW1 are hard switches. Furthermore, the lower arm switches SUL, SVL, SWL and the second intermediate switches QU2, QV2, QW2 are soft switches. In this case, the switching losses of the upper arm switches SUH, SVH, SWH and the first intermediate switches QU1, QV1, QW1 are increased compared to the switching losses of the lower arm switches SUL, SVL, SWL and the second intermediate switches QU2, QV2, QW2.

[0103] On the other hand, in each phase, when current flows from the second end to the first end of the winding, the upper arm switches SUH, SVH, SWH and the first intermediate switches QU1, QV1, QW1 operate as soft switches. Furthermore, the lower arm switches SUL, SVL, SWL and the second intermediate switches QU2, QV2, QW2 operate as hard switches. In this case, compared to the switching losses of the upper arm switches SUH, SVH, SWH and the first intermediate switches QU1, QV1, QW1, the switching losses of the lower arm switches SUL, SVL, SWL and the second intermediate switches QU2, QV2, QW2 are increased.

[0104] Here, refer to Figures 10-13Taking the case where current flows from the first end to the second end of the U-phase winding 11U as an example, the case where the switching mode of each switch SUH and QU1 is hard switching and the switching mode of each switch SUL and QU2 is soft switching will be explained. Figures 10-13 In the diagram, solid lines represent the current path before the dead time, dashed lines represent the current path during the dead time, and dotted lines represent the current path after the dead time.

[0105] Figure 10 The current path is shown when the U-phase voltage changes from level H to level M. In this case, current flows through the U-phase upper arm switch SUH before the dead time when both the U-phase upper arm switch SUH and the U-phase second intermediate switch QU2 are turned off. Then, when the U-phase upper arm switch SUH turns off and the collector-emitter voltage of the U-phase upper arm switch SUH begins to rise, turn-off losses occur. During the dead time, the U-phase second diode DU2 is turned on. Thus, when the collector-emitter voltage of the U-phase second intermediate switch QU2 drops to near 0, the U-phase second intermediate switch QU2 is turned on. Therefore, the turn-on losses of the U-phase second intermediate switch QU2 are suppressed.

[0106] Figure 11 The current path is shown when the U-phase voltage changes from level M to level H. In this case, current flows through the U-phase second intermediate switch QU2 before the dead time when the upper U-phase switch SUH and the second U-phase intermediate switch QU2 are turned off. During the dead time, the second U-phase diode DU2 is turned on. Therefore, the second U-phase intermediate switch QU2 is turned off when the collector-emitter voltage of the second U-phase intermediate switch QU2 drops to near 0. Thus, the turn-off loss of the second U-phase intermediate switch QU2 is suppressed. During the dead time, the collector-emitter voltage in the off state is applied to the upper U-phase switch SUH. Therefore, when the upper U-phase switch SUH is turned on and current begins to flow through it, a turn-on loss occurs.

[0107] That is, in Figure 10 and Figure 11 In the situation shown, the U-phase upper arm switch SUH is in a hard switching mode, and the U-phase second intermediate switch QU2 is in a soft switching mode.

[0108] Figure 12The current path is shown when the U-phase voltage changes from level M to level L. In this case, current flows through the first intermediate switch QU1 before the dead time when the first intermediate switch QU1 and the lower arm switch SUL of the U-phase are turned off. Then, when the first intermediate switch QU1 is turned off and the collector-emitter voltage of the first intermediate switch QU1 begins to rise, turn-off losses occur. During the dead time, the lower arm diode DUL of the U-phase is turned on. Thus, when the collector-emitter voltage of the lower arm switch SUL drops to near 0, the lower arm switch SUL of the U-phase is turned on. This suppresses the turn-on losses of the lower arm switch SUL of the U-phase.

[0109] Figure 13 The diagram illustrates the current path as the U-phase voltage changes from level L to level M. In this case, current flows through the lower U-phase switch SUL before the dead time when the first intermediate switch QU1 and the lower U-phase switch SUL are turned off. During the dead time, the lower U-phase diode DUL is turned on. Consequently, the lower U-phase switch SUL turns off when the collector-emitter voltage drops to near 0. This suppresses the turn-off loss of the lower U-phase switch SUL. During the dead time, the collector-emitter voltage in the off state is applied to the first intermediate switch QU1. Consequently, the first intermediate switch QU1 is turned on, and when current begins to flow through it, turn-on losses occur.

[0110] That is, in Figure 12 and Figure 13 In the situation shown, the switching mode of the first intermediate switch QU1 in phase U is a hard switch, and the switching mode of the lower arm switch SUL in phase U is a soft switch.

[0111] As described above, in each phase, depending on the direction of the current flowing through the winding, one of the upper arm switch and the first intermediate switch, and the lower arm switch and the second intermediate switch, is in a hard-switching state, while the other is in a soft-switching state. In this case, it is considered that among the upper arm switches SUH, SVH, SWH and the lower arm switches SUL, SVL, SWL of each phase, the switches that are in a soft-switching state have a margin of longer occurrence period compared to the switches that are in a hard-switching state.

[0112] Therefore, in this embodiment, the adjustment unit 66 makes the first adjustment period k1 for the zero-voltage drive state HHH, which is the "first drive state", different from the second adjustment period k2 for the zero-voltage drive state LLL, which is the "second drive state", and adjusts the occurrence period of each zero-voltage drive state HHH, MMM, and LLL.

[0113] use Figure 14 Let me explain in detail the handling done by the adjustment department. Figure 14The drive mode with four control cycle quantities is shown. The occurrence period of each zero-voltage drive state HHH, MMM, and LLL is indicated by dashed circles. During the periods when each zero-voltage drive state HHH, MMM, and LLL occurs, the adjusted occurrence period of this embodiment is compared with the adjusted occurrence period of the first embodiment and shown.

[0114] In the first control cycle TS1 and the second control cycle TS2, a drive mode including the Mid-Lo drive state and each zero-voltage drive state MMM and LLL is set. In this case, the adjustment unit 66 shortens the occurrence period TM of the zero-voltage drive state MMM set by the modulation unit 65 to a second adjustment period k2, and extends the occurrence period TL of the zero-voltage drive state LLL set by the modulation unit 65 to a second adjustment period k2.

[0115] In the third control cycle TS3 and the fourth control cycle TS4, a drive mode including the Hi-Mid drive state and each zero-voltage drive state HHH and MMM is set. In this case, the adjustment unit 66 shortens the occurrence period TM of the zero-voltage drive state MMM set by the modulation unit 65 by a first adjustment period k1, and extends the occurrence period TH of the zero-voltage drive state HHH set by the modulation unit 65 by a first adjustment period k1.

[0116] That is, in the four control cycles, the regulating unit 66 shortens the occurrence period of the zero-voltage drive state MMM by "2×k1+2×k2" and extends the total occurrence period of the other zero-voltage drive states HHH and LLL by "2×k1+2×k2".

[0117] The adjustment unit 66 determines the direction of the current in each phase. Here, in each phase, the direction of current flow from the first end to the second end of the winding is set as positive, and the direction of current flow from the second end to the first end of the winding is set as negative. When it is determined that the direction of the phase current of the phase with the largest phase current is positive, the adjustment unit 66 sets the second adjustment period k2 to be longer than the first adjustment period k1. On the other hand, when it is determined that the direction of the phase current of the phase with the largest phase current is negative, the adjustment unit 66 sets the first adjustment period k1 to be longer than the second adjustment period k2. Thus, the occurrence period of each zero-voltage drive state HHH, MMM, and LLL is adjusted in a way that makes the first adjustment period k1 and the second adjustment period k2 different.

[0118] In this embodiment, considering that the switch with a soft-switching mode has a margin for extending the occurrence period of the zero-voltage drive state, the adjustment unit 66 can lengthen the shortening period of the occurrence period of the zero-voltage drive state MMM compared to the first embodiment. That is, the adjustment unit 66 can adjust the occurrence period of each zero-voltage drive state HHH, MMM, and LLL in such a way that the total shortening period of the occurrence period of the zero-voltage drive state MMM in four control cycles (equivalent to 2×k1+2×k2) is longer than that in the first embodiment (equivalent to 4×k).

[0119] Figure 15 The processing steps of the control executed by the control device 50 are shown. This control is executed repeatedly at a predetermined cycle. Additionally, in Figure 15 For convenience, the previous... Figure 7 The same processing is labeled with the same symbols.

[0120] In step S13, the drive mode is set based on the determined segment and the sub-regions within that segment. Here, a drive mode with four control cycle quantities is set, including each zero-voltage drive state HHH, MMM, and LLL. Then, proceed to step S20.

[0121] In step S20, based on the acquired phase current, the phase with the largest phase current is determined. In step S21, based on the acquired phase current, it is determined whether the direction of the current flowing through the determined phase is positive. If a positive determination is made in step S21, the process proceeds to step S22. Conversely, if a negative determination is made in step S21, the process proceeds to step S23.

[0122] In step S22, the second adjustment period k2 is set to be longer than the first adjustment period k1. The first adjustment period k1 and the second adjustment period k2 can be predetermined periods that are longer than the first adjustment period k1.

[0123] In step S23, the first adjustment period k1 is set to be longer than the second adjustment period k2. The first adjustment period k1 and the second adjustment period k2 can be predetermined periods in which the first adjustment period k1 is set to be longer than the second adjustment period k2.

[0124] Figure 16 The graph shows the power loss generated when switching control is performed in this embodiment (right bar chart) and the first embodiment (left bar chart). Figure 16 In this study, the power loss generated by each switch SUH, SUL, QU1, and QU2 in phase U is compared when the current flows from the first end to the second end through phase U winding 11U.

[0125] By shortening the period during which the zero-voltage drive state MMM occurs, the conduction losses of each intermediate switch QU1 and QU2 are reduced. Therefore, in the first embodiment, the power loss of the first intermediate switch QU1 in phase U is reduced to the same level as that of the upper arm switch SUH in phase U.

[0126] When current flows from the first terminal to the second terminal through the U-phase winding 11U, the switching mode of the U-phase lower arm switch SUL is soft switching. In this case, the power loss generated by the U-phase lower arm switch SUL is sufficient relative to the reference value A. Furthermore, the reference value A is a value used as a reference when considering the magnitude of the power loss generated during switching control, and is, for example, a value smaller than the allowable power loss.

[0127] In the first embodiment, the conduction losses of each intermediate switch QU1 and QU2 are reduced, and the occurrence of load concentration at each intermediate switch QU1 and QU2 is suppressed. However, the loss generated by the first intermediate switch QU1 in phase U is higher than the reference value A. In addition, the loss generated by the upper arm switch SUH in phase U is higher than the reference value A.

[0128] Therefore, in Figure 16 In this embodiment, given that the losses generated by the lower arm switch SUL of phase U have a margin relative to the reference value A, the adjustment periods k1 and k2 are set to be longer than in the first embodiment, so that the total shortening period of the zero-voltage drive state MMM is longer. In this case, the conduction loss of the first intermediate switch QU1 of phase U is reduced compared to the first embodiment. As a result, the losses generated by the first intermediate switch QU1 of phase U are within the reference value A.

[0129] In this embodiment, the adjustment periods k1 and k2 are set to k1 < k2. Figure 16 In this embodiment, the first adjustment period k1 is shortened compared to the adjustment period k in the first embodiment. As a result, the conduction loss of the upper U-phase switch SUH is reduced compared to the first embodiment. Consequently, the loss generated by the upper U-phase switch SUH is within the reference value A. Furthermore, the second adjustment period k2 is extended compared to the adjustment period k in the first embodiment, and the conduction loss of the lower U-phase switch SUL is increased compared to the first embodiment, but remains within the reference value A.

[0130] According to the embodiment detailed above, in addition to shortening the occurrence period of the zero-voltage drive state MMM, the occurrence periods of the other zero-voltage drive states HHH and LLL are also extended. Therefore, switch control suitable for dispersing the conduction losses generated by each switch SUH~SWH and QU1~QW2 can be achieved.

[0131] In switching control, based on the current flowing through each phase winding 11U, 11V, and 11W, the extension period of either the zero-voltage drive state HHH or LLL is made shorter than the other. This allows for the appropriate determination of the extension periods of each zero-voltage drive state HHH and LLL, taking into account the differences in switching losses generated in the switching control of each switch SUH~SWH and QU1~QW2. Therefore, switching control suitable for dispersing the conduction losses generated in each switch SUH~SWH and QU1~QW2 can be achieved.

[0132] <Other Implementation Methods>

[0133] In addition, the above-described embodiments can also be implemented with the following modifications.

[0134] In the first embodiment, the adjustment unit 66 may also adjust the occurrence period of each zero-voltage drive state HHH, MMM, and LLL in a manner that shortens the occurrence period of other zero-voltage drive states HHH and LLL instead of shortening the occurrence period of the zero-voltage drive state MMM. That is, either of the zero-voltage drive states HHH and LLL is set as a "specific drive state". In this case, for example, it is also possible to adjust the occurrence period of each zero-voltage drive state HHH and LLL in the previous embodiment. Figure 7 In step S14, the occurrence periods of each zero-voltage drive state MMM and LLL are adjusted such that the occurrence period of the zero-voltage drive state MMM is "TM+k" and the occurrence period of the zero-voltage drive state LLL is "TL-k". Alternatively, for example, the occurrence periods of each zero-voltage drive state HHH and MMM can be adjusted such that the occurrence period of the zero-voltage drive state MMM is "TM+k" and the occurrence period of the zero-voltage drive state HHH is "TH-k".

[0135] In the first embodiment, the adjustment unit 66 may also select whether to shorten any one of the occurrence periods of each zero-voltage drive state HHH, MMM, and LLL based on the temperature of each switch SUH~SWH and QU1~QW2. Specifically, in the previous Figure 7 In step S14, the zero-voltage drive state with the highest temperature among the upper arm switches SUH~SWH, intermediate switches QU1~QW2, and lower arm switches SUL~SWL can be selected as a specific drive state. Furthermore, the occurrence period of each zero-voltage drive state HHH, MMM, and LLL can be adjusted by shortening the adjustment period k of the selected specific drive state. The selection of the specific drive state can be based on the temperature calculated from the detection value of the temperature sensor 45.

[0136] According to this embodiment, in switch control, the period during which the switch with the highest temperature among the upper arm switches SUH-SWH, intermediate switches QU1-QW2, and lower arm switches SUL-SWL is turned on to the zero-voltage drive state is shortened. This reliably reduces conduction losses caused by switches with concentrated loads. Therefore, appropriate switch control can be performed while avoiding situations where the load is concentrated on specific switches among SUH-SWH and QU1-QW2.

[0137] In both the first and second embodiments, the modulation unit 65 can adjust the occurrence periods of each zero-voltage drive state HHH, MMM, and LLL when setting the occurrence periods of the drive states of each switch SUH~SWH and QU1~QW2. For example, the modulation unit 65 can use correspondence information (specifically, mapping information or mathematical formula information) that maps the command voltage vector Vαβ to the occurrence periods of the drive states of each switch SUH~SWH and QU1~QW2 to set the occurrence periods of each drive state included in the drive mode. In this case, as the correspondence information, information that adjusts the occurrence periods of each zero-voltage drive state HHH, MMM, and LLL considering the conduction losses generated by each switch SUH~SWL and QU1~QW2 can be used.

[0138] In this embodiment, the control device 50 may not include the adjustment unit 66. Furthermore, the previous steps may be omitted. Figure 7 The processing of step S14.

[0139] In the first embodiment, the adjustment unit 66 is not limited to adjusting the occurrence period of each zero-voltage drive state HHH, MMM, and LLL using predetermined adjustment periods k, but the adjustment period k can be variably set. For example, the adjustment unit 66 may set the adjustment period k longer when the phase current of the phase with the largest phase current is large, compared to when the phase current is small. As for each phase current, the adjustment unit 66 can use the detection value of the phase current sensor 43.

[0140] Furthermore, for example, the adjustment unit 66 can set the adjustment period k longer when the temperature of each switch SUH~SWL, QU1~QW2 is high compared to when the temperature of each switch SUH~SWL, QU1~QW2 is low. The adjustment unit 66 can use the detection value of the temperature sensor 45 as the temperature of each switch SUH~SWL, QU1~QW2. Additionally, in the second embodiment, the adjustment periods k1 and k2 can be variably set based on at least one of the phase current and the temperature of each switch SUH~SWL, QU1~QW2.

[0141] According to this embodiment, the occurrence period of each zero-voltage drive state HHH, MMM, and LLL can be appropriately adjusted according to the load applied to each switch SUH~SWL, QU1~QW2.

[0142] ·In the previous Figure 7 In step S14, the adjustment period k can be set to the same length as the occurrence period TM set by the processing in step S13. In this case, the occurrence period of the zero-voltage drive state MMM in a control cycle is "0".

[0143] In step S14, if the occurrence period of the zero-voltage drive state MMM in a control cycle is adjusted to "0", the drive mode can also be adjusted so that the effective voltage drive state with a phase voltage of level M in at least one phase does not occur. For example, if the command voltage vector exists in the first segment, the drive mode and the occurrence period of each drive state can be adjusted by switching control through each drive state HHL, HLL, HHH, LLL.

[0144] ·In the previous Figure 15 In steps S22 and S23, the total duration of each adjustment period k1 and k2 can be set to a length that is four times the occurrence period TM set by the processing in step S13. In this case, the occurrence period of the zero-voltage drive state MMM in the four control cycles is "0".

[0145] In steps S22 and S23, when the occurrence period of the zero-voltage drive state MMM in the four control cycles is adjusted to "0", the drive mode can also be adjusted so that the effective voltage drive state of level M in at least one phase of each phase does not occur.

[0146] • In the switching control of each switch SUH~SWL, QU1~QW2, the occurrence period of each zero voltage drive state HHH, MMM, LLL can also be adjusted when the specified execution conditions are met.

[0147] Specifically, the control device 50 can also perform Figure 17 The control shown replaces the previous one. Figure 7 The control proceeds to step S30 after the processing in step S10.

[0148] In step S30, it is determined whether the specified execution conditions are met. The execution conditions are those that allow it to be determined that the inverter 30 is in an overheated state. For example, the execution condition may be that the value of a determination parameter exceeds a threshold. The determination parameter value may be based on the command torque Trq. The values ​​calculated include the motor's rotational speed based on the electrical angle θe and the value detected by the temperature sensor 45.

[0149] If a positive determination is made in step S30, the process proceeds to step S11. Conversely, if a negative determination is made in step S30, the process proceeds to step S31. In step S31, normal control is performed. During normal control, switching control is performed without adjusting the occurrence of each zero-voltage drive state HHH, MMM, and LLL via the adjustment unit 66.

[0150] In the second embodiment, the total shortening period of the occurrence of the zero-voltage drive state MMM in the four control cycles (equivalent to 2×k1+2×k2) may not be longer than that in the first embodiment (equivalent to 4×k). In this case, the extension period of the occurrence period of each zero-voltage drive state HHH and LLL can also be adjusted.

[0151] • The intermediate switches QU1 to QW2 of each phase can also be configured with their collectors connected to each other. Taking phase U as an example, the collectors of phase U first intermediate switch QU1 and phase U second intermediate switch QU2 can be connected to each other. The emitter of phase U second intermediate switch QU2 can also be connected to the connection point of phase U upper arm switch SUH and phase U lower arm switch SUL. The emitter of phase U first intermediate switch QU1 can also be connected to the neutral point O of the capacitor. In this case, phase U first diode DU1 and phase U second diode DU2 are configured to conduct in the opposite direction to the first embodiment.

[0152] In this structure, by turning on the upper arm switch SUH and the second intermediate switch QU2 of phase U, and turning off the lower arm switch SUL and the first intermediate switch QU1 of phase U, the phase U voltage is made to level H. Furthermore, by turning on the lower arm switch SUL and the first intermediate switch QU1 of phase U, and turning off the upper arm switch SUH and the second intermediate switch QU2 of phase U, the phase U voltage is made to level L.

[0153] In this case, in each phase, when the current flows from the first end to the second end of the winding, the upper arm switches SUH, SVH, SWH and the second intermediate switches QU2, QV2, QW2 are hard switches. Furthermore, the lower arm switches SUL, SVL, SWL and the first intermediate switches QU1, QV1, QW1 are soft switches.

[0154] Furthermore, in each phase, when current flows from the second end to the first end of the winding, the upper arm switches SUH, SVH, SWH and the second intermediate switches QU2, QV2, QW2 are soft switches. In addition, the lower arm switches SUL, SVL, SWL and the first intermediate switches QU1, QV1, QW1 are hard switches.

[0155] • As an intermediate switch for each phase, a reverse blocking IGBT (RB-IGBT) can also be used.

[0156] The semiconductor switches constituting the inverter are not limited to IGBTs; for example, N-channel MOSFETs can also be used. In this case, the high-potential side terminal of the switch is the drain, and the low-potential side terminal is the source. Additionally, each switch has a corresponding body diode.

[0157] As an inverter, it is not limited to Figure 1 The inverter shown could also be other types, such as a neutral point clamped inverter.

[0158] • The energy storage unit connected to the inverter is not limited to a capacitor, but can also be a rechargeable battery.

[0159] • As a rotating motor, it is not limited to a rotating motor in which the windings of each phase are connected in a star configuration, but can also be a rotating motor in which the windings are connected in a delta configuration.

[0160] The installation targets for inverters, rotating electric machines, and control devices are not limited to vehicles; for example, they can also be mobile bodies such as airplanes or ships. When the mobile body is an airplane, the rotating electric machine becomes the aircraft's flight power source; when the mobile body is a ship, the rotating electric machine becomes the ship's navigation power source. Furthermore, the installation targets for inverters, rotating electric machines, and control devices are not limited to mobile bodies.

[0161] The control unit and methods described in this disclosure can also be implemented using a dedicated computer, which is provided by comprising a processor and memory, the processor being programmed to perform one or more functions embodied in the computer program. Alternatively, the control unit and methods described in this disclosure can be implemented using a dedicated computer, which is provided by comprising a processor composed of one or more dedicated hardware logic circuits. Alternatively, the control unit and methods described in this disclosure can be implemented using one or more dedicated computers, which are composed of a processor and memory programmed to perform one or more functions, and a processor composed of one or more hardware logic circuits. Furthermore, the computer program can also be stored on a computer-readable, non-transitory tangible recording medium as instructions to be executed by a computer.

[0162] While this disclosure has been described based on embodiments, it should be understood that this disclosure is not limited to the above embodiments and structures. This disclosure also includes various modifications and equivalent variations. Furthermore, various combinations and arrangements, and consequently, combinations and arrangements containing only one element, or more or less thereof, also fall within the scope and spirit of this disclosure.

Claims

1. A control device for a three-level inverter, applied in a system, the system comprising: The first energy storage unit (21) and the second energy storage unit (22) are connected in series. as well as Rotary electric motor (10), the rotary electric motor having armature windings (11U, 11V, 11W) corresponding to three; and A three-level inverter (30) having a switch (SUH~SWL, QU1~QW2) that electrically connects the armature winding to any one of the following in each phase: the positive side of the first energy storage unit, the negative side of the first energy storage unit, the positive side of the second energy storage unit, and the negative side of the second energy storage unit. The control device (50) of the three-level inverter performs switching control of each of the switches, including: A setting unit, based on a command voltage for controlling the control quantity of the rotary motor to a command value, sets a driving mode formed by combinations of driving states of each switch and the occurrence period of each driving state; and The control unit performs the switching control based on the set drive mode and the occurrence period of each drive state. The three different driving states in which the armature windings of each phase are electrically connected to the positive side of the first energy storage unit, the neutral point, or the negative side of the second energy storage unit are set as zero-voltage driving states. The setting unit sets the drive mode to include at least two of the zero-voltage drive states. The control unit adjusts the occurrence period of each of the zero-voltage drive states included in the drive mode during the switch control.

2. The control device for the three-level inverter according to claim 1, characterized in that, In the switch control, the control unit adjusts the occurrence period of each zero-voltage drive state in such a way that the occurrence period of a specific drive state, which is one of the zero-voltage drive states included in the drive mode, is shortened compared to the case set by the setting unit.

3. The control device for the three-level inverter according to claim 2, characterized in that, As the switch, the three-level inverter has: Upper arm switches (SUH, SVH, SWH) that electrically connect the armature winding to the positive side of the first energy storage unit in each phase. Intermediate switches (QU1, QU2, QV1, QV2, QW1, QW2) that electrically connect the armature winding to the neutral point in each phase; and The lower arm switch (SUL, SVL, SWL) electrically connects the armature winding to the negative side of the second energy storage unit in each phase. The specific drive state is the zero-voltage drive state in which the armature windings of each phase are electrically connected via the intermediate switches of each phase.

4. The control device for the three-level inverter according to claim 3, characterized in that, The setting unit sets the drive mode to include three different zero-voltage drive states. In the switch control, the control unit shortens the duration of the specific drive state compared to the case set by the setting unit. The control unit extends the total duration of the occurrence of the first driving state by the amount by which the occurrence duration of the specific driving state is shortened, where the first driving state is a zero-voltage driving state in which the armature windings of each phase are electrically connected via the upper arm switch of each phase, and the second driving state is a zero-voltage driving state in which the armature windings of each phase are electrically connected via the lower arm switch of each phase. The control unit adjusts the occurrence period of each of the zero-voltage drive states in such a way that the extension period of the occurrence period of the first drive state is different from the extension period of the occurrence period of the second drive state.

5. The control device for the three-level inverter according to claim 4, characterized in that, In the switch control, the control unit determines, based on the current flowing through each of the armature windings, whether the extension period of either the period during which the first driving state occurs or the period during which the second driving state occurs is shorter than the other.

6. The control device for the three-level inverter according to claim 2, characterized in that, As the switch, the three-level inverter has: Upper arm switches (SUH, SVH, SWH) that electrically connect the armature winding to the positive side of the first energy storage unit in each phase. Intermediate switches (QU1, QU2, QV1, QV2, QW1, QW2) that electrically connect the armature winding to the neutral point in each phase; and The lower arm switch (SUL, SVL, SWL) electrically connects the armature winding to the negative side of the second energy storage unit in each phase. In the switch control, the control unit selects the zero-voltage drive state in which the switch with the highest temperature among the upper arm switch, the middle switch, and the lower arm switch is turned on as the specific drive state. The control unit adjusts the occurrence period of each zero-voltage drive state in such a way that the occurrence period of the selected specific drive state is shortened compared to the situation set by the setting unit.

7. A program applied to a system, the system comprising: The first energy storage unit (21) and the second energy storage unit (22) are connected in series. as well as Rotary motor (10), the rotary motor having armature windings (11U, 11V, 11W) corresponding to three. A three-level inverter (30) having switches (SUH~SWL, QU1~QW2) electrically connecting the armature winding to any one of the following in each phase: the positive side of the first energy storage unit, the negative side of the first energy storage unit, the neutral point between the positive side of the second energy storage unit and the negative side of the second energy storage unit; and Computer (51), The program causes the computer to perform switching control of each of the switches, and causes the computer to perform a process including the following steps: The setting steps involve setting a driving mode formed by the combination of driving states of each switch and the occurrence period of each driving state, based on the command voltage used to control the control quantity of the rotating motor to the command value. as well as The control steps involve performing the switching control based on the set driving mode and the occurrence periods of each driving state. The three different driving states in which the armature windings of each phase are electrically connected to the positive side of the first energy storage unit, the neutral point, or the negative side of the second energy storage unit are set as zero-voltage driving states. In the setting step, the drive mode is set to include at least two of the zero-voltage drive states. During the control step, the occurrence of each of the zero-voltage drive states included in the drive mode is adjusted in the switch control.

Citation Information

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