Method for simultaneously and selectively depositing metal film and dielectric film

Abstract

Methods and apparatus for binary selective deposition are provided for selectively depositing a first material on a first surface of a substrate and a second material on a different second surface of the same substrate. Methods of reducing droop during silicon oxide deposition are also provided. The selectively deposited material includes a metal-containing material or a dielectric material.

Description

[0001] Cross-references The PCT application forms are filed together with this specification as part of this application. Each application identified in the concurrently filed PCT application forms that claims a benefit or priority under this application is incorporated herein by reference in its entirety for all purposes. Background Technology

[0002] Integrated circuits are manufactured through complex processes in which various material layers are sequentially fabricated on a semiconductor substrate in a predetermined configuration.

[0003] The predetermined configuration of materials on a semiconductor substrate is typically achieved by depositing material across the entire substrate surface and then removing the material from predetermined areas of the substrate, for example, through mask layer deposition and subsequent selective etching. When one material is deposited only on a first surface and another material on a second surface, multiple steps are usually required. To achieve the desired configuration, one material is deposited across the entire substrate surface. Next, photolithography is used to pattern the material, exposing the material not deposited on the first surface. The first surface is then etched until the material remains only on the first surface. The same steps must then be repeated to deposit another material on the second surface. Such a process is not only cumbersome but can also lead to undesirable material forming at undesirable locations on the substrate.

[0004] Semiconductor processing efficiency can be improved if a single process suitable for advanced semiconductor applications can be used to deposit a first material on a first surface of a substrate and a second material on a second surface of the substrate.

[0005] The background description provided herein is for the purpose of presenting the general context of this disclosure. The work of the currently designated inventor, within the scope described in this background section and in aspects of the specification that could not be identified as prior art at the time of filing, neither expressly nor impliedly acknowledges that it is prior art to this disclosure. Summary of the Invention

[0006] Methods and apparatus are proposed for binary selective deposition of a first material on a first surface of a substrate and a second material on a different second surface of the same substrate. For example, a metal-based inhibitor can be thermally deposited on a metal surface of the substrate, and a silicon-containing film can be deposited on a dielectric surface of the same substrate by atomic layer deposition or chemical vapor deposition, followed by conversion of the metal-based inhibitor into a metal film. Methods for reducing overhang during silicon oxide deposition are also proposed. The selectively deposited materials include metallic or dielectric materials.

[0007] Therefore, in a first aspect, this disclosure includes a method for binary deposition of a metal and a dielectric film. In some embodiments, the method includes: providing a substrate in a processing chamber having a metal surface comprising a first metal and a dielectric surface comprising a first dielectric; exposing the substrate to a metal-containing inhibitor comprising a second metal to form a film comprising the metal inhibitor on the metal surface; supplying a dielectric precursor comprising the second dielectric to the processing chamber to selectively form a dielectric film comprising the second dielectric on the dielectric surface comprising the first dielectric; and treating the film comprising the metal inhibitor using plasma to convert the film comprising the metal inhibitor on the metal surface into the second metal.

[0008] In some embodiments, the metal-containing inhibitor includes metal carbenoid compounds, metal halide compounds, metal halide oxide compounds, metal carbonyl compounds, metal cyclopentadienyl compounds, metal diketone compounds, metal aryl isocyanate compounds, or metal alkyl isocyanate compounds; and the metal in the metal-containing inhibitor is antimony, chromium, copper, cobalt, hafnium, molybdenum, nickel, ruthenium, platinum, titanium, tantalum, tungsten, zinc, or zirconium.

[0009] In some embodiments, the metal-containing inhibitor has the structure of formula (I): ML x (I); where M is a metal including antimony, copper, cobalt, hafnium, nickel, ruthenium, platinum, titanium, tantalum, tungsten, or molybdenum; each L is independently a monodentate ligand, a didentate ligand, a bidentate ligand, or a tridentate ligand; and x is an integer from 1 to 6.

[0010] In some embodiments, the monodentate ligand includes hydrogen, halogen, hydroxyl, alkylsilyl, silylalkyl, alkenyl, alkynyl, allyl, alkoxy, alkenyloxy, ethynyloxy, thioalkoxy, aliphatic acyl, -CF3, nitro, amino, imino, -N(C1-C3alkyl)C(O)(C1-C3alkyl), -C1-C3alkylamino, alkenylamino, ethynylamino, di(C1-C3alkyl)amino, -C(O)O-(C1-C3alkyl), -C(O)NH-(C1-C3alkyl), -CH=NOH, -P(C1-C3alkyl)3, -PO3H2, -OPO3H2, -C(O)N(C1-C3alkyl)2, haloalkyl, alkoxycarbonyl, alkoxyalkoxy, carboxaldehyde, carboxamide, cycloalkyl, cycloalkenyl, cycloalkynyl, aryl, aromatic acyl, aryloxy, aromatic amino. Biaryl, thioaryl, heterocyclic, alkyl heterocyclic, heterocyclic alkyl, heterocyclic acyl, alkylaryl, alkyl carbonyl, CO, =O, =S, ≡N, C≡C, -NO, arylene, aralkyl, sulfonyl, sulfonamide, sulfonylimide, carbamate, aryloxyalkyl, carboxyl, carboxyl, -C(O)NH (benzyl), subunit, amide, azide, isocyanoxy, thiocyanoxy, isothiocyanoxy, cyano, isocyanoalkyl, isocyanohaloalkyl, isocyanoaryl, isocyanohaloaryl or cycloyl.

[0011] In some implementations, at least one L is a subunit.

[0012] In some embodiments, the subunit is a carbene or a nitrogen-based carbene.

[0013] In some embodiments, the carbene is an N-heterocyclic carbene.

[0014] In some embodiments, the nitrogen-based carbene is imidazolium or pyridinium.

[0015] In some embodiments, the metal-containing inhibitor has the structure of formula (II): L' y ML"ML' y (II); where M is a metal, including antimony, copper, cobalt, hafnium, nickel, ruthenium, platinum, titanium, tantalum, tungsten, or molybdenum; each L' is independently a monodentate ligand, amphipathic ligand, bidentate ligand, or tripentate ligand; L” is a ligand including a triple-bonded caryne, a triple-bonded imide, or a triple-bonded nitride; and y is an integer from 1 to 5.

[0016] In some embodiments, the monodentate ligand is hydrogen, halogen, hydroxyl, alkylsilyl, silylalkyl, alkenyl, alkynyl, allyl, alkoxy, alkenyloxy, ethynyloxy, thioalkoxy, aliphatic acyl, -CF3, nitro, amino, imino, -N(C1-C3 alkyl)C(O)(C1-C3 alkyl), -C1-C3 alkylamino, alkenylamino, ethynylamino, di(C1-C3 alkyl)amino, -C(O)O-(C1-C3 alkyl), -C(O)NH-(C1-C3 alkyl), -CH=NOH, -P(C1-C3 alkyl)3, -PO3H2, -OPO3H2, -C(O)N(C1-C3 alkyl)2, haloalkyl, alkoxycarbonyl, alkoxyalkoxy, carboxaldehyde, carboxamide, cycloalkyl, cycloalkenyl, cycloalkynyl, aryl, aromatic acyl, aromatic oxy, aromatic amino. Biaryl, thioaryl, heterocyclic, alkyl heterocyclic, heterocyclic alkyl, heterocyclic acyl, alkylaryl, alkyl carbonyl, CO, =O, =S, ≡N, C≡C, -NO, arylene, aralkyl, sulfonyl, sulfonamide, sulfonylimide, carbamate, aryloxyalkyl, carboxyl, carboxyl, -C(O)NH (benzyl), subunit, amide, azide, isocyanoxy, thiocyanoxy, isothiocyanoxy, cyano, isocyanoalkyl, isocyanohaloalkyl, isocyanoaryl, isocyanohaloaryl or cycloyl.

[0017] In some implementations, the metal-containing inhibitor includes molybdenum halide, molybdenum halide oxide, or diketomolybdenum.

[0018] In some embodiments, the method further includes, optionally, post-processing the second metal to remove excess inhibitor after converting the membrane containing the metal inhibitor into a second metal.

[0019] In some implementations, post-processing is performed with hydrogen-containing plasma or with flash-enhanced plasma.

[0020] In some embodiments, the metal surface includes tungsten oxide, hafnium oxide, titanium oxide, aluminum oxide, zirconium oxide, cobalt, copper, tungsten, ruthenium, molybdenum, or combinations thereof.

[0021] In some embodiments, the first dielectric is germanium oxide, antimony oxide, bismuth oxide, magnesium oxide, aluminum oxide, nickel oxide, iron oxide, titanium oxide, tantalum nitride, cobalt oxide, silicon dioxide, silicon nitride, or silicon oxide carbide; and the second dielectric is silicon dioxide, silicon nitride, or silicon oxide carbide.

[0022] In a second aspect, this disclosure includes a method for selectively depositing a silicon oxide film on a substrate. In some embodiments, the method includes: providing a substrate in a processing chamber, the substrate having a first surface and a second surface; exposing the substrate to at least one metal-containing inhibitor to form a pretreated substrate comprising the metal-containing inhibitor on the first surface; supplying a silicon-containing precursor and an oxygen-containing reactant, or a silicon-containing and oxygen-containing precursor, to the processing chamber to form a silicon-containing film on the second surface of the pretreated substrate; and removing the metal-containing inhibitor from the first surface, wherein the first surface and the second surface are different.

[0023] In some embodiments, the metal-containing inhibitor is a metal carbide compound, a metal-like carbide compound, a metal halide compound, a metal halide oxide compound, a metal carbonyl compound, a metal cyclopentadienyl compound, a metal diketone compound, a metal aryl isocyanate compound, or a metal alkyl isocyanate compound; and the metal in the metal-containing inhibitor includes antimony, chromium, copper, cobalt, hafnium, molybdenum, nickel, ruthenium, platinum, titanium, tantalum, tungsten, zinc, or zirconium.

[0024] In some embodiments, the metal inhibitor is (3,3-dimethyl-1-butyne)hexacarbonyldicobalt, hexacarbonyltungsten, or molybdenum pentachloride.

[0025] In some implementations, the first surface is metal, the second surface includes a dielectric, and the overhang is minimized.

[0026] In a third aspect, this disclosure includes an apparatus for selectively depositing two different materials on two different surfaces of a semiconductor substrate. In some embodiments, the method includes: a processing chamber; a substrate holder located within the processing chamber; one or more gas inlets for allowing gas to flow into the processing chamber; a vacuum source for removing gas from the processing chamber; a plasma generator for generating plasma within the processing chamber; and one or more controllers including a plurality of machine-readable instructions for operating the one or more gas inlets, the vacuum source, and the plasma generator to perform deposition on the semiconductor substrate, the machine-readable instructions of the one or more controllers including instructions for: introducing a metal-containing inhibitor to form a metal-containing inhibitor film on a first surface of the semiconductor substrate; introducing a dielectric precursor to form a dielectric film on a second surface of the semiconductor substrate; and converting the metal-containing inhibitor film on the first surface of the semiconductor substrate into a metal.

[0027] Other features and advantages of the invention will become apparent from the following description and claims.

[0028] These and other aspects are further described below with reference to the accompanying drawings. Attached Figure Description

[0029] According to some publicly available embodiments, Figure 1 provides a schematic diagram of a non-limiting operation of selective deposition.

[0030] According to some publicly available implementations, Figure 2 provides a processing flowchart that illustrates the relevant operations of the simultaneous selective deposition method.

[0031] According to some implementations, Figure 3 provides a schematic diagram of a semiconductor substrate with high aspect ratio features at different stages of the process that are obstructed by drooping.

[0032] According to some disclosed embodiments, Figure 4 provides a process flow diagram showing the relevant operations of a method for selective deposition of silicon oxide that minimizes overhang.

[0033] Figure 5 shows a schematic diagram of an atomic layer deposition (ALD) or chemical vapor deposition (CVD) chamber suitable for implementing certain disclosed embodiments.

[0034] Figure 6 shows another schematic diagram of another ALD or CVD chamber suitable for implementing certain publicly disclosed implementation schemes.

[0035] Figure 7 shows a schematic diagram of a cluster of modules suitable for implementing certain publicly available implementation schemes. Detailed Implementation

[0036] The following description sets forth numerous specific details to provide a thorough understanding of the presented implementation schemes. The disclosed implementation schemes can be practiced without some or all of these specific details. In other instances, well-known processing operations are not described in detail to avoid unnecessarily obscuring the disclosed implementation schemes. Although the disclosed implementation schemes are described in conjunction with specific implementations, it should be understood that they are not intended to limit the disclosed implementation schemes.

[0037] definition "Aliphatic" refers to a group of organisms with at least one carbon atom to 50 carbon atoms (C). 1-50 (For example, one to 25 carbon atoms (C) 1-25 ) or one to ten carbon atoms (C 1-10The hydrocarbon portion of a hydrocarbon includes saturated groups such as alkanes (or alkyl groups) and unsaturated groups such as alkenes (or alkenyl groups) and alkynes (or alkynyl groups), and also includes its cyclic form, further including straight-chain and branched arrangements, and all stereoisomers and positional isomers. Such hydrocarbons may be unsubstituted or substituted with one or more groups (e.g., halogens or groups described herein as alkyl groups).

[0038] "Alkenyl" refers to an optionally substituted C-type compound having one or more double bonds. 2-24 Alkyl groups. Alkenyl groups can be cyclic (e.g., C10, C20, C30, C40, C50, C6 ... 3-24 Alkenyl groups can be cycloalkenyl or acyclic. They can also be substituted or unsubstituted. For example, an alkenyl group can be substituted with one or more substituents, as described herein with respect to alkyl groups. Non-limiting unsubstituted alkenyl groups include C10 and C20. 2-8 alkenyl, C 2-6 alkenyl, C 2-5 alkenyl, C 2-4 alkenyl or C 2-3 Alkenyl. Exemplary non-limiting alkenyl groups include vinyl (vinyl or ethenyl, -CH=CH2), 1-propenyl (-CH=CHCH3), allyl or 2-propenyl (-CH2-CH=CH2), 1-butenyl (-CH=CHCH2CH3), 2-butenyl (-CH2CH=CHCH3), 3-butenyl (e.g., CH2CH2CH=CH2), 2-buteneyl (e.g., =CH-CH=CHCH3), and the like.

[0039] "Alkenylene" refers to an alkenyl group (which is an optionally substituted C-group with one or more double bonds). 2-24 Alkyl groups can be in a polyvalent (e.g., divalent) form. The alkenyl group can be cyclic (e.g., C10) 3-24 (Cyclic) or acyclic). The imenyl group can be substituted or unsubstituted. For example, the imenyl group can be substituted with one or more substituents, as described herein with respect to alkyl groups. Exemplary non-limiting imenyl groups include -CH=CH- or -CH=CHCH2-.

[0040] "alkoxy" means -OR, where R is an optionally substituted alkyl group, as described herein. Exemplary alkoxy groups include methoxy, ethoxy, butoxy, and trihaloalkoxy groups, such as trifluoromethoxy. Alkoxy groups can be substituted or unsubstituted. For example, an alkoxy group can be substituted with one or more substituents, as described herein with respect to alkyl groups. Exemplary unsubstituted alkoxy groups include C 1-3 C 1-6 C 1-12 C1-16 C 1-18 C 1-20 Or C 1-24 Alkyl group.

[0041] The word "alkyl" and the prefix "alk" refer to a branched or unbranched saturated hydrocarbon group having 1 to 24 carbon atoms, such as methyl (Me), ethyl (Et), n-propyl (n-Pr or nPr), isopropyl (i-Pr or iPr), cyclopropyl, n-butyl (n-Bu or nBu), isobutyl (i-Bu or iBu), sec-butyl (s-Bu or sBu), tert-butyl (t-Bu or tBu), cyclobutyl, n-pentyl, isopentyl, sec-pentyl, neopentyl, hexyl, heptyl, octyl, nonyl, decyl, dodecyl, tetradecyl, hexadecyl, eicosyl, tetracosyl, and the like. Alkyl groups can be cyclic (e.g., C16, C2 ... 3-24 Cycloalkyl) or acyclic. Alkyl groups may be branched or unbranched. Alkyl groups may also be substituted or unsubstituted. For example, alkyl groups may include haloalkyl groups, wherein the alkyl group is substituted with one or more halogen groups as described herein. In another example, the alkyl group may be substituted with one, two, three, or four (in the example of an alkyl group having two or more carbons) substituents, the substituents being independently selected from the group consisting of: (1) C 1-6 Alkyl groups (e.g., -O-Ak, where Ak is an optionally substituted C) 1-6 (1) Alkyl); (2) Amino (e.g., -NR) N1 R N2 , where each R N1 and R N2 Independently H or optionally substituted alkyl, or R N1 With R N2 (3) aryl; (4) arylalkoxy (e.g., -O-Lk-Ar, where Lk is the divalent form of an optionally substituted alkyl group and Ar is an optionally substituted aryl group); (5) aryl acyl (e.g., -C(O)-Ar, where Ar is an optionally substituted aryl group); (6) cyano (e.g., -CN); (7) carboxylaldehyde (e.g., -C(O)H); (8) carboxyl (e.g., -CO2H); (9) C 3-8 Cycloalkyl groups (e.g., monovalent saturated or unsaturated non-aromatic cyclic C4 groups) 3-8(10) Halogen (e.g., F, Cl, Br or I); (11) Heterocyclic group (e.g., a 3, 4, 5, 6 or 7-membered ring containing one, two, three or four non-carbon heteroatoms (e.g., nitrogen, oxygen, phosphorus, sulfur or halogen), unless otherwise stated); (12) Heterocyclic group (e.g., -O-Het, where Het is a heterocyclic group, as described herein); (13) Heterocyclic acyl group (e.g., -C(O)-Het, where Het is a heterocyclic group, as described herein); (14) Hydroxyl group (e.g., -OH); (15) N-protected amino group; (16) Nitro group (e.g., -NO2); (17) Oxygenated group (e.g., =O); (18) -CO2R A , where R A Choose freely (a)C 1-6 Alkyl, (b)C 4-18 Aryl, and (c)(C) 4-18 Aryl)C 1-6 The group consisting of alkyl groups (e.g., -Lk-Ar, where Lk is the divalent form of an optionally substituted alkyl group and Ar is an optionally substituted aryl group); (19)-C(O)NR B R C , where R B and R C Each independently chooses from (a) hydrogen and (b) C. 1-6 Alkyl, (c)C 4-18 Aryl, and (d)(C 4-18 Aryl)C 1-6 The group consisting of alkyl groups (e.g., -Lk-Ar, where Lk is the divalent form of an optionally substituted alkyl group and Ar is an optionally substituted aryl group); and (20)-NR G R H , where R G and R H Each is independently selected from (a) hydrogen, (b) N-protecting group, and (c) C. 1-6 Alkyl, (d)C 2-6 Alkenyl (e.g., an optionally substituted alkyl group having one or more double bonds), (e)C 2-6 Alkyne group (e.g., an optionally substituted alkyl group having one or more triple bonds), (f)C 4-18 Aryl, (g)(C 4-18 Aryl)C 1-6 Alkyl groups (e.g., Lk-Ar, where Lk is the divalent form of an optionally substituted alkyl group and Ar is the optionally substituted aryl group), (h)C 3-8 cycloalkyl, and (i)(C 3-8 cycloalkyl)C 1-6The group consisting of alkyl groups (e.g., -Lk-Cy, where Lk is a divalent form of an optionally substituted alkyl group and Cy is an optionally substituted cycloalkyl group, as described herein), wherein in one embodiment, no two groups are bonded to a nitrogen atom via a carbonyl group. The alkyl group can be a primary, secondary, or tertiary alkyl group substituted with one or more substituents (e.g., one or more halogens or alkoxy groups). In some embodiments, the unsubstituted alkyl group is C10. 1-2 C 1-3 C 1-6 C 1-12 C 1-16 C 1-18 C 1-20 C 1-24 C 2-3 C 2-6 C 2-12 C 2-16 C 2-18 C 2-20 Or C 2-24 alkyl.

[0042] "alkylene" means a multivalent (e.g., divalent) form of an alkyl group as described herein. Exemplary alkylenes include methylene, ethylene, propylene, butylene, etc. In some embodiments, the alkylene is C10. 1-3 C 1-6 C 1-12 C 1-16 C 1-18 C 1-20 C 1-24 C 2-3 C 2-6 C 2-12 C 2-16 C 2-18 C 2-20 or C 2-24 Alkylenes. Alkylenes can be branched or unbranched. Alkylenes can also be substituted or unsubstituted. For example, alkylenes can be substituted with one or more substituents, as described herein with respect to alkyl groups.

[0043] "alkylcarbonyl" refers to an alkyl group as defined above, which is attached to a parent molecule via a carbonyl group. Exemplary, non-limiting alkylcarbonyl groups include, in particular, methylcarbonyl, ethylcarbonyl, and isopropylcarbonyl, etc.

[0044] "alkynyl" refers to an optionally substituted C-group having one or more triple bonds. 2-24Alkyl. The alkynyl group can be cyclic or acyclic, such as ethynyl, 1-propynyl, and the like. The alkynyl group can also be substituted or unsubstituted. For example, the alkynyl group can be substituted with one or more substituents, as described herein with respect to alkyl groups. Non-limiting unsubstituted alkynyl groups include C10, C20, C30, C40, C50, C60, C7 ...70, C60, C70, C70, C70, C70, C70, C70, C70, C70, C70 2-8 alkynyl group, C 2-6 alkynyl group, C 2-5 alkynyl group, C 2-4 alkynyl group, or C 2-3 Alkyne group. Exemplary non-limiting alkyne groups include ethynyl (-C≡CH), 1-propynyl (-C≡CCH3), 2-propynyl or propynyl (-CH2C≡CH), 1-butynyl (-C≡CCH2CH3), 2-butynyl (-CH2C≡CCH3), 3-butynyl (-CH2CH2C≡CH), and the like.

[0045] "alkynylene" refers to an alkynyl group (which is an optionally substituted C group with one or more triple bonds). 2-24 The alkyl group is in a polyvalent (e.g., divalent) form. The alkynyl group can be cyclic or acyclic. The alkynyl group can be substituted or unsubstituted. For example, the alkynyl group can be substituted with one or more substituents, as described herein with respect to alkyl groups. Exemplary non-limiting alkynyl groups include -C≡C- or C≡CCH2-.

[0046] "Amide group" refers to -N(R) N1 )C(O)-, where R N1 H, optionally substituted alkyl, or optionally substituted aryl.

[0047] "Amino" refers to -NR N1 R N2 , where each R N1 and R N2 Independently H, optionally substituted alkyl or optionally substituted aryl, or R N1 and R N2 Together with their respective connected nitrogen atoms, they form heterocyclic groups as defined herein.

[0048] “Aminoalkyl” means an alkyl group substituted with an amino group as defined herein.

[0049] "Aminoaryl" means an aryl group substituted with an amino group as defined herein.

[0050] "Aryl" means any group containing a carbon-based aromatic group, including, but not limited to, phenyl, benzyl, anthracenyl, anthryl, benzocyclobutenyl, benzocyclooctenyl, biphenylyl, chrysenyl, dihydroindenyl, fluoranthenyl, indacenyl, indenyl, naphthyl, phenanthryl, phenoxybenzyl, picenyl, pyrenyl, terphenyl, and the like, including fused benzo-C 4-8 Cycloalkyl groups (e.g., as defined herein), such as indanyl, tetrahydronaphthyl, fluorenyl, and the like. The term aryl also includes heteroaryl, which is defined as a group containing an aromatic group having at least one heteroatom incorporated into the ring of the aromatic group. Examples of heteroatoms include, but are not limited to, nitrogen, oxygen, sulfur, and phosphorus. Similarly, the term “non-heteroaryl” (which is also included in the term “aryl”) defines a group containing an aromatic group that does not contain a heteroatom. Aryl groups can be substituted or unsubstituted. Aryl groups can be substituted with one, two, three, four, or five substituents, such as any of those described herein with respect to alkyl groups.

[0051] "azido" refers to -N3.

[0052] "Branched alkenyl" refers to the isomer of a straight-chain alkenyl compound; it has an alkyl group bonded to the main carbon chain.

[0053] “Cyano” means -CN.

[0054] "Carbonyl" refers to the -C(O)- group, which can also be represented as >C=O.

[0055] Unless otherwise specified, “cycloalkyl” means a monovalent saturated or unsaturated non-aromatic or aromatic cyclic hydrocarbon group of three to eight carbon atoms, and examples include cyclopropyl, cyclobutyl, cyclopentyl, cyclopentadienyl, cyclohexyl, cycloheptyl, bicyclo[2.2.1.]heptyl, and the like. Cycloalkyl groups can also be substituted or unsubstituted. For example, a cycloalkyl group can be substituted with one or more groups (including those described herein as alkyl).

[0056] "Deposition" or "vapor deposition" refers to a method of forming a metal layer on one or more surfaces of a substrate using a vaporized precursor composition comprising one or more metal-containing compounds. The metal-containing compounds are vaporized and directed to and / or into contact with one or more surfaces of a substrate (i.e., a semiconductor substrate or semiconductor assembly) placed in a deposition chamber. Typically, the substrate is heated. These metal-containing compounds form a non-volatile, thin, uniform metal-containing layer on the surface of the substrate. One operation of this method constitutes a cycle, and the process can be repeated multiple cycles to obtain the desired metal thickness.

[0057] “Dicarbonyl” means any part or compound comprising two carbonyl groups as defined herein. Non-limiting dicarbonyl moiety includes 1,2-dicarbonyl (e.g., R…). C1 -C(O)-C(O)R C2 , where R C1 With R C2 Each of the following is independently a substituted alkyl group, halogen, substituted alkoxy group, hydroxyl group, or leaving group; 1,3-dicarbonyl (e.g., R C1 -C(O)-C(R 1a R 2a )-C(O)R C2 , where R C1 With R C2 Each is independently an optionally substituted alkyl group, halogen, optionally substituted alkoxy group, hydroxyl group, or leaving group, wherein R 1a With R 2a Each of the following is independently H or an optional substituent provided for an alkyl group as defined herein; and 1,4-dicarbonyl (e.g., R C1 -C(O)-C(R 1a R 2a )-C(R 3a R 4a )-C(O)R C2 , where R C1 With R C2 Each is independently an optionally substituted alkyl group, halogen, optionally substituted alkoxy group, hydroxyl group, or leaving group, wherein R 1a R 2aR 3a With R 4a Each is independently H or an optional substituent provided for an alkyl group as defined herein.

[0058] "Halogen" refers to F, Cl, Br, or I.

[0059] "Halogen-containing substituents" refers to groups containing halogens, such as halogenated aliphatic or halogenated alkyl groups.

[0060] "Haloaliphatic" means an aliphatic group as defined herein that has been substituted with one or more halogens.

[0061] "Haloalkenyl" means an alkenyl group as defined herein that has been substituted with one or more halogens.

[0062] "haloalkynyl" means an alkynyl group as defined herein that has been substituted with one or more halogens.

[0063] “Haloalkyl” means an alkyl group as defined herein that has been substituted with one or more halogens. Non-limiting unsubstituted haloalkyl groups include C… 1-2 Haloalkyl, C 1-3 Haloalkyl, C 1-4 Haloalkyl, C 1-5 Haloalkyl, C 1-6 Haloalkyl, C 2-3 Haloalkyl, C 2-4 Haloalkyl, C 2-5 Haloalkyl, C 2-6 Halogenated alkyl, or C 3-6 Halogenated alkyl groups. Other non-limiting halogenated alkyl groups include -CX. y H 3-y , where y is 1, 2, or 3, and each X is independently a halogen (F, Cl, Br, or I); -CX z H 2z CX y H 3-y Where z is 0, 1, or 2, y is 0, 1, 2, or 3, and each X is independently a halogen (F, Cl, Br, or I), wherein at least one of z or y is not 0; -CH2CX y H 3-y , where y is 1, 2, or 3, and each X is independently a halogen (F, Cl, Br, or I); -CX z1 H 2z1 CX z2 H 2z2 CX y H3-y Where z1 and z2 are each independently 0, 1, or 2, y is 0, 1, 2, or 3, and each X is independently a halogen (F, Cl, Br, or I), wherein at least one of z1, z2, or y is not 0; and -CX z H 1z [CX y1 H 3-y1 [CX] y2 H 3-y2 ], where z is 0 or 1, where y1 and y2 are each independently 0, 1, 2 or 3, and where each X is independently a halogen (F, Cl, Br, or I), and where at least one of z, y1 or y2 is not 0.

[0064] “haloalkylene” means an alkylene group as defined herein that has been substituted with one or more halogens.

[0065] "Heterocyclyl" means a 3-, 4-, 5-, 6-, or 7-membered ring containing one, two, three, or four non-carbon heteroatoms (e.g., independently selected from the group consisting of nitrogen, oxygen, phosphorus, sulfur, selenium, or halogens), unless otherwise specified. 3-membered rings have zero to one double bond, 4- and 5-membered rings have zero to two double bonds, and 6- and 7-membered rings have zero to three double bonds. The term "heterocyclic group" also includes bicyclic, tricyclic, and tetracyclic groups, wherein any of the aforementioned heterocyclic rings is fused to one, two, or three rings independently selected from the group consisting of an aromatic ring, a cyclohexane ring, a cyclohexene ring, a cyclopentane ring, a cyclopentene ring, and another monocyclic heterocyclic ring, such as indolyl, quinolyl, isoquinolyl, tetrahydroquinolyl, benzofuryl, benzothienyl, and the like. Heterocyclic compounds include acridinyl, adenyl, alloxazinyl, azaadamantanyl, azabenzimidazolyl, azabicyclononyl, azacycloheptyl, azacyclooctyl, azacyclononyl, azahypoxanthinyl, azaindazolyl, azaindolyl, azacinyl, azapanyl, azaheptanyl, azapinyl, azatidinyl, and azatyl. ), aziridinyl, azirinyl, azocanyl, azoocinyl, azononyl, benzimidazolyl, benzisothiazolyl, benzisooxazolyl, benzodiazepinyl, benzodiazocinyl, benzodihydrofuryl, benzodioxepinyl, benzodioxinyl, benzodioxanyl, benzodioxocinylbenzodioxolyl, benzodithiepinyl, benzodithiinyl, benzodioxocinyl, benzofuranyl, benzophenazinyl, benzopyranonyl, benzopyranyl, benzopyrenyl, benzopyronyl, benzoquinolyl nyl), benzoquinolizinyl, benzothiadiazepinyl, benzothiadiazolyl, benzothiazepinyl, benzothiazocinyl, benzothiazolyl, benzothienyl, benzothiophenyl, benzothiazinonyl, benzothiaziny l), benzothiopyranyl, benzothiopyronyl, benzotriazepinyl, benzotriazinonyl, benzotriazinyl, benzotriazolyl, benzoxathiinyl, benzotrioxepinyl, benzoxadiazepinyl, benzoxathi azepinyl), benzoxathiepinyl, benzoxathiocinyl, benzoxazepinyl, benzoxazinyl, benzoxazocinyl, benzoxazolinonyl, benzoxazolinyl, benzoxazolyl, benzylsulfonamide, benzylsulfinamideBipyrazinyl, bipyridinyl, carbazolyl (e.g., 4H-carbazolyl), carbolinyl (e.g., β-carbolinyl), chromanonyl, chromanyl, chromenyl, cinnolinyl, coumarinyl, cytdinyl, cytosinyl, decahydroisoquinolinyl, decahydroquinolinyl olinyl), diazabicyclooctyl, diazabicyclobutadieneyl, diaziridinethionyl, diaziridinonyl, diaziridinyl, diazirinyl, dibenzisoquinolinyl, dibenzoacridinyl, dibenzocarbazolyl, dibenzofuranyl, dibenzisoquinolinyl Dibenzophenazinyl, dibenzopyranonyl, dibenzopyronyl (xanthonyl), dibenzoquinoxalinyl, dibenzothiazepinyl, dibenzothiepinyl, dibenzothiophenyl, dibenzoxepinyl, dihydroazepinyl, di... Dihydroazetyl, dihydrofuranyl, dihydrofuryl, dihydroisoquinolinyl, dihydropyranyl, dihydropyridinyl, dihydroypyridyl, dihydroquinolinyl, dihydrothienyl, dihydroindolyl, dioxanylDioxazinyl, dioxindolyl, dioxxiranyl, dioxenyl, dioxoxenyl, dioxoxobenzofuranyl, dioxolyl, dioxotetrahydrofuranyl, dioxothiomorpholinyl, dithianyl, dithiazolyl, dithienyl Thionitrogenyl, furanyl, furazanyl, furoyl, furyl, guaninyl, homopiperazinyl, homopiperidinyl, hypoxanthinyl, hydantoinyl, imidazolidinyl, imidazolinyl, imidazolyl, indazolyl (e.g., 1H) -Indazole, indolenyl, indolinyl, indolizinyl, indolyl (e.g., 1H-indolyl or 3H-indolyl), isatyl, isobenzofuranyl, isochromanyl, isochromenyl, isoindazoyl, isoindolinyl, isoindolyl, isopyrazolonyl Isopyrazolyl, isoxazolidiniyl, isoxazolyl, isoxazolyl, isoquinolinyl, isoquinolinyl, isothiazolidinyl, isothiazolyl, morpholinyl, naphthindazolyl, naphthindolyl, naphthiridinyl, naphthopyranylNaphthothiazolyl, Naphthothioxolyl, Naphthotriazolyl, Naphthoxindolyl, Naphthyridinyl, Octahydroisoquinolinyl, Oxabicycloheptyl, Oxauracil, Oxaadiazolyl, Oxaazinyl, Oxaaziridinyl, Oxazoridinyl xazolidinyl, oxazolidonyl, oxazolinyl, oxazolonyl, oxazolyl, oxepanyl, oxetanonyl, oxetanyl, oxetyl, oxtenayl, oxindolyl, oxxiranyl, oxobenzoisothiazolyl, oxochromeny l), oxoisoquinolinyl, oxoquinolinyl, oxothiolanyl, phenanthridinyl, phenanthrolinyl, phenazinyl, phenothiazinyl, phenothienyl (benzothiofuranyl), phenoxathiinyl, phenoxazinyl, phthalazil nyl), phthalazonyl, phthalidyl, phthalimidinyl, piperazinyl, piperidinyl, piperidonyl (e.g., 4-piperidinyl), pteridinyl, purinyl, pyranyl, pyrazinyl, pyrazolidinyl, pyrazolinyl, pyrazolopyrimidinylPyrazolyl, pyridazinyl, pyridinyl, pyridopyrazinyl, pyridopyrimidinyl, pyridyl, pyrimidinyl, pyronyl, pyrrolidinyl, pyrrolidonyl (e.g., 2-pyrrolidonyl), pyrrolinyl, pyrrolizidinyl, pyrrolyl (p... yrrolyl (e.g., 2H-pyrrolyl), pyrylium, quinazolinyl, quinolinyl, quinolizinyl (e.g., 4H-quinolizinyl), quinoxalinyl, quinuclidinyl, selenazinyl, selenazolyl, selenophenyl, succinimidyl, sulfolanyl, tetrahydrofuranyl ranyl), tetrahydrofuryl, tetrahydroisoquinolinyl, tetrahydroisoquinolyl, tetrahydropyridinyl, tetrahydropyridyl, piperidyl, tetrahydropyranyl, tetrahydropyronyl, tetrahydroquinolinyl, tetrahydroquinolinyl Tetrahydroquinolyl, tetrahydrothienyl, tetrahydrothiophenyl, tetraazinyl, tetrazolyl, thiadiazinyl (e.g., 6H-1,2,5-thiadiazinyl or 2H,6H-1,5,2-dithiadiazinyl), thiadiazolyl, thianthrenyl, thianyl, thianaphthenyl, thiazepinylThiazinyl, thiazolidinedionyl, thiazolidinyl, thiazolyl, thienyl, thiepanyl, thiepinyl, thietanyl, thietyl, thiiranyl, thiocanyl, thiochromanonyl, thiochromanyl, thiochromenyl, thiodiazinyl, thiodiazolyl, thioindoxyl, thiomorpholinyl, thiophenyl, thioanyl Thiopyranyl, thiopyronyl, thiotriazolyl, thiourazolyl, thioxanyl, thioxolyl, thymidinyl, thyminyl, triazinyl, triazolyl, trithianyl, urazinyl, urazolyl, uretidinyl, uretinyl, uricyl, uridinyl, xanthenyl, xanthinyl, xanthionyl and similar compounds, as well as their modified forms (e.g., including one or more oxo and / or amino groups) and their salts. The heterocyclic group can be substituted or unsubstituted. For example, heterocyclic groups can be substituted with one or more substituents, as described herein with respect to aryl groups.

[0066] “Hydroxyl” means -OH.

[0067] "imino" means -NR-, where R can be H or an optional substituted alkyl group.

[0068] "isocyanato" refers to -NCO.

[0069] "Isothiocyanato" means -N=C=S.

[0070] "Isocyano" means -C≡NR, where R can be alkyl (e.g., alkylisocyano) or aryl (e.g., arylisocyano). The alkyl or aryl group may optionally be substituted with the substituents described below.

[0071] “Oxo” means =O group.

[0072] “oxygen” refers to -O-.

[0073] "Silyl" refers to -SiR 1 R 2 R 3 or -SiR 1 R 2 - Group. In some embodiments, R 1 R 2 and R 3 Each is independently H, optionally substituted aliphatic, optionally substituted heteroaliphatic, optionally substituted aromatic, optionally substituted heteroaromatic, or optionally substituted amino. In a particular embodiment, R 1 R 2 and R 3 Each of the following is independently H, optionally substituted alkyl, optionally substituted alkoxy, optionally substituted aryl, optionally substituted aryloxy, optionally substituted alkyl-aryl, optionally substituted aryl-alkyl, or optionally substituted amino. In other embodiments, the silyl group is -Si(R). a (OR) b (NR2) c Each R is independently H, optionally substituted aliphatic, optionally substituted heteroaliphatic, optionally substituted aromatic, or optionally substituted heteroaromatic; each of a, b, and c ≥ 0; and a + b + c = 3. In a particular embodiment, each R is independently H, optionally substituted alkyl, optionally substituted aryl, optionally substituted alkyl-aryl, or optionally substituted aryl-alkyl.

[0074] "Silyloxy" refers to -OR, where R is an optionally substituted silyl group, as described herein. In some embodiments, the silyloxy group is -O-SiR. 1 R 2 R 3 , where R 1 R 2 and R 3 Each is independently H, optionally substituted aliphatic, optionally substituted heteroaliphatic, optionally substituted aromatic, optionally substituted heteroaromatic, or optionally substituted amino. In a particular embodiment, R1 R 2 and R 3 Each of the following is independently H, optionally substituted alkyl, optionally substituted alkoxy, optionally substituted aryl, optionally substituted aryloxy, optionally substituted alkyl-aryl, optionally substituted aryl-alkyl, or optionally substituted amino. In other embodiments, the silanoxy group is -O-Si(R). a (OR) b (NR2) c Each R is independently H, optionally substituted aliphatic, optionally substituted heteroaliphatic, optionally substituted aromatic, or optionally substituted heteroaromatic; each of a, b, and c ≥ 0; and a + b + c = 3. In a particular embodiment, each R is independently H, optionally substituted alkyl, optionally substituted aryl, optionally substituted alkyl-aryl, or optionally substituted aryl-alkyl.

[0075] The use of the above terms is intended to encompass both substituted and unsubstituted portions. Substitution may be achieved by one or more groups, such as alcohols, ethers, esters, amides, sulfones, sulfides, hydroxyl groups, nitro groups, cyano groups, carboxyl groups, amines, heteroatoms, lower alkyl groups, lower alkoxy groups, lower alkoxycarbonyl groups, alkoxyalkoxy groups, acyloxy groups, halogens, trifluoromethoxy groups, trifluoromethyl groups, alkyl groups, aralkyl groups, alkenyl groups, alkynyl groups, arylsulfonyl groups, and aralkylaminocarbonyl groups, or any substituents in the preceding paragraphs, or any of these substituents directly linked or linked by a suitable linker. Linkers are typically short chains of 1-3 atoms, containing any combination of -C-, -C(O)-, -NH-, -S-, -S(O)-, -O-, -C(O)-, or -S(O)O-. The ring can be substituted multiple times.

[0076] The term "lower" in modifying "alkyl," "alkenyl," "alkynyl," "alkoxy," or "alkoxycarbonyl" refers to the C1-C6 unit used for the specific functional group. For example, "lower alkyl" refers to C1-C6 alkyl.

[0077] "Substituted" means having one or more substituent moieties whose presence does not interfere with the desired function or reactivity. Examples of substituents are alkyl, alkenyl, alkynyl, cycloalkyl (non-aromatic ring), Si(alkyl)3, Si(alkoxy)3, alkoxy, amino, alkylamino, alkenylamino, amide, amidine, guanidine, hydroxyl, thioether, alkylcarbonyl, alkylcarbonyloxy, alkoxycarbonyloxy, carbonate, alkoxycarbonyl, aminocarbonyl, alkylthiocarbonyl, phosphate, phosphate ester, phosphonate, cyano, halogen, acylamino, imino, sulfhydryl, alkylthio, thiocarboxylic acid, dithiocarboxylic acid, sulfate, sulfato, sulfonate, sulfamoyl, sulfonamide, nitro, nitrile, azide, heterocyclic, ether, ester, silicon-containing moiety, thioester, or combinations thereof. The substituent itself can be substituted. For example, the amino substituent itself may be monosubstituted or independently disubstituted by other substituents as defined above, such as alkyl, alkenyl, alkynyl, and cycloalkyl (non-aromatic rings).

[0078] “Thiocyanato” refers to -SCN.

[0079] "Unsubstituted" means that any open valence of the atom is occupied by hydrogen. Furthermore, if the occupant of an open valence on an atom is not specified, it is hydrogen.

[0080] As used herein, the term “about” should be understood to take into account minor increases and / or decreases beyond the value, changes that do not significantly affect the desired function of the parameter beyond the value. In some cases, “about” covers a difference of + / - 10% from any of the stated values. As used herein, this term modifies any stated value, a range of values, or the endpoints of one or more ranges.

[0081] As used herein, the terms “top,” “bottom,” “upper,” “lower,” “above,” and “below” are used to provide a relative relationship between structures. The use of these terms does not imply or require that a particular structure must be placed in a specific location within the apparatus.

[0082] The term "aspect ratio" generally refers to the ratio of the height to the width of a specific opening where electrical contacts will be placed. For example, a through opening, typically extending through multiple layers in the form of a cylinder, has a height and a diameter; the aspect ratio is the height of the cylinder divided by its diameter. The aspect ratio of a trench is the height of the trench divided by its minimum width at the bottom.

[0083] The term "flow control hardware" generally refers to components used to position one or more chemical sources in fluid connection with a processing chamber. For example, flow control hardware may include one or more mass flow controllers and / or valves. Exemplary chemical sources include dielectric film precursor sources, halogen-containing precursor sources, reactant gas sources, and inert gas sources.

[0084] The term "forming a gas mixture" generally means mixing multiple gases before introducing them into the processing chamber, or mixing any one or both of multiple gases in the processing chamber.

[0085] The term "inert gas" generally refers to a gaseous material that does not react with other chemicals in the processing chamber during substrate processing. Exemplary inert gases include helium (He), neon (Ne), argon (Ar), krypton (Kr), and xenon (Xe), as well as nitrogen (N2) in some processes.

[0086] The term "plasma" generally refers to a gas containing cations, free radicals, and free electrons. The term "in-situ plasma" generally refers to plasma formed at a processing station within a processing chamber. The term "remote plasma" generally refers to plasma formed at a location far from a processing station within a processing chamber.

[0087] The term "plasma generator" generally refers to a combination of components that can be used to form a plasma. Exemplary components include a radio frequency power source, an impedance matching network, and one or more electrodes.

[0088] The term "precursor" typically refers to a chemical substance adsorbed onto the substrate surface during ALD processing. The precursor reacts with reactants to convert the adsorbed precursor into a film.

[0089] The term "process chamber" or "process room" generally refers to a housing within which chemical and / or physical treatments are performed on a substrate. The pressure, substrate temperature, and gas composition within the process chamber can be controlled to perform the chemical and / or physical treatments.

[0090] The term "processing equipment" can generally refer to a machine that includes a processing chamber and other hardware configured to enable processing to be performed within the processing chamber.

[0091] The term "processing station" typically refers to the location of the substrate within the processing chamber during processing.

[0092] The term "reactant" generally refers to the chemical substance that reacts with a precursor adsorbed onto the substrate surface in an ALD process to form a film. In various processes, the reaction between the reactant and the precursor can be promoted by thermal energy and / or plasma.

[0093] The following disclosed implementations describe material deposition on a substrate, such as a wafer, substrate, or other workpiece. Workpieces can have various shapes, sizes, and materials. In this application, the terms "semiconductor wafer," "wafer," "substrate," "wafer substrate," and "partially fabricated integrated circuit" are used interchangeably. Those skilled in the art will understand that the term "partially fabricated integrated circuit" can refer to a silicon wafer during any of the many stages of integrated circuit manufacturing thereon. Wafers or substrates used in the semiconductor device industry typically have diameters of 200 mm, 300 mm, or 450 mm. Unless otherwise stated, the processing details described herein (e.g., flow rate, power level, etc.) relate to processing a 300 mm diameter substrate or a processing chamber configured to process a 300 mm diameter substrate and can be appropriately scaled down for substrates or chambers of other sizes. Besides semiconductor wafers, other workpieces that can be used in the implementations disclosed herein include various articles of manufacture, such as printed circuit boards and the like. These processes and apparatuses can be used in the manufacture of semiconductor devices, displays, LEDs, and solar photovoltaic panels and the like.

[0094] The term "silicon oxide" as used in this article includes chemical compounds containing silicon and oxygen atoms, including Si. x O y Any and all stoichiometric possibilities, where x and y include both integer and non-integer values. For example, "silicon oxide" includes those having the formula SiO. n The term "silicon oxides" can include substoichiometric compounds, such as SiO₂. 1.8 "Silicon oxides" also includes silicon dioxide (SiO2) and silicon monoxide (SiO). "Silicon oxides" also includes both natural and synthetic variants, and includes any and all crystalline and molecular structures, including tetrahedral coordination structures with oxygen atoms surrounding a central silicon atom. "Silicon oxides" also includes amorphous silicon oxides and silicates.

[0095] The term "tin oxide" as used in this article includes Sn x O y Any and all stoichiometric possibilities, where x and y include both integer and non-integer values. For example, "tin oxide" includes those with the formula SnO. n The term "tin oxides" can include compounds in which 1 ≤ n ≤ 2, where n can be an integer or a non-integer value. "Tin oxides" can include substoichiometric compounds, such as SnO. 1.8 "Tin oxides" also include tin dioxide (SnO2 or tin oxide (IV)) and tin monoxide (SnO or tin oxide (II)). "Tin oxides" also includes both natural and synthetic variants, and includes any and all crystalline and molecular structures. "Tin oxides" also includes amorphous tin oxides.

[0096] "Unsaturated" refers to the portion containing carbon-carbon double or triple bonds.

[0097] "Unsaturated substituents" refer to aliphatic chains, cyclic, aryl, or heteroaryl groups containing double or triple bonds.

[0098] Introduction and Background Atomic layer deposition (ALD) is a technique for depositing thin layers of material using a continuous, self-limiting reaction. The ALD process utilizes surface-mediated deposition reactions to deposit films layer-by-layer in a cycle. As an example, an ALD cycle may include the following operations: (i) transporting / adsorbing precursors, (ii) removing precursors from the chamber, (iii) transporting a second reactant and optionally igniting the plasma, and (iv) removing byproducts from the chamber. The reaction between the second reactant and the adsorbed precursor to form a film on the surface of the substrate influences the film composition and properties, such as inhomogeneity, stress, wet etch rate, dry etch rate, electrical properties (e.g., breakdown voltage and leakage current), etc. In ALD deposition of silicon oxide films, the reaction involves reacting an oxygen plasma with carbon and nitrogen to form a gaseous substance; oxidizing silicon to silicon oxide; removing trace amounts of carbon, nitrogen, and hydrogen impurities; and increasing the film's bonding strength and density.

[0099] Unlike chemical vapor deposition (CVD), ALD processes utilize surface-mediated deposition reactions to deposit films layer-by-layer. In one example of an ALD process, a substrate surface including numerous surface-active sites is exposed to a gaseous distribution of a first precursor, such as a silicon-containing precursor, which is provided in a dose to a chamber containing the substrate. Molecules of this first precursor (including chemisorbed and / or physisorbed molecules of the first precursor) are adsorbed onto the substrate surface. It should be understood that when a compound is adsorbed onto the substrate surface as described herein, the adsorbed layer may include the compound and derivatives thereof. For example, an adsorbed silicon-containing precursor layer may include the silicon-containing precursor and derivatives thereof. After the first precursor injection, the chamber is then evacuated to remove most or all of the first precursor remaining in the gas phase, leaving most or only the adsorbed material. In some implementations, the chamber may not be completely evacuated. For example, the reactor may be evacuated such that the partial pressure of the first precursor in the gas phase is low enough to slow the reaction. A second reactant (e.g., an oxygen-containing gas) is introduced into the chamber, such that a portion of these molecules react with the first precursor adsorbed on the surface. In some processes, the second precursor reacts immediately with the adsorbed first precursor. In other embodiments, the second reactant reacts only after a temporary application of the activation source. The chamber can then be evacuated again to remove unbound second reactant molecules. As mentioned above, in some embodiments, the chamber may not be completely evacuated. Additional ALD cycles can be used to build up the film thickness.

[0100] In some implementations, the ALD method includes plasma activation. As described herein, the ALD method and apparatus described herein can be a conformal film deposition (CFD) method, summarized in U.S. Patent Application No. 13 / 084,399 (now U.S. Patent No. 8,728,956), filed April 11, 2011, entitled “PLASMA ACTIVATED CONFORMAL FILM DEPOSITION,” and U.S. Patent Application No. 13 / 084,305, filed April 11, 2011, entitled “SILICON NITRIDEFILMS AND METHODS,” the entire contents of which are incorporated herein by reference.

[0101] This disclosure relates to the use of metal-containing inhibitors to selectively suppress specific regions on a semiconductor substrate. In one embodiment, the substrate may include a first region (e.g., comprising a metal or a semiconductor) and a second region (e.g., comprising a material different from the first region). For example, when the first region comprises a metal, the second region may comprise a semiconductor or a dielectric. In another example, when the first region comprises a semiconductor, the second region may comprise a dielectric.

[0102] The process described herein provides an inhibitor layer to be selectively deposited on a first region, thereby providing an inhibited surface. In this way, the inhibited surface is blocked from subsequent deposition steps that can provide a deposited layer on the uninhibited surface of a second region. Just as the first region is selectively inhibited, the second region is selectively deposited with layers (e.g., oxide layers, nitride layers, carbide layers, or other layers described herein). Subsequent steps may include opening the first region (e.g., by removing the inhibitor layer), patterning the substrate to provide access only to the first region, and depositing metal within the pattern to provide patterned vias electrically connected to the first region. If the first region includes a metal line, the patterned vias can provide electrical contact with that line.

[0103] In other non-limiting embodiments, the selective deposition process described herein can reduce RC delay and improve equipment performance. In further embodiments, the process described herein can reduce EUV lithography steps, as well as save time and potential costs.

[0104] Figure 1 schematically illustrates a non-limiting process 100 for binary selective deposition, which simultaneously deposits two different materials on two different surfaces of a semiconductor substrate. As shown, substrate 110 includes a first region 111 and a second region 112, the second region 112 being different from and close to (or adjacent to) the first region 111. In one embodiment, the first region 111 comprises a conductive material (e.g., a metal), and the second region 112 comprises a semi-conductive or non-conductive material (e.g., a semiconductor or a dielectric). In another embodiment, the first region 111 comprises a semi-conductive material, while the second region 112 comprises a non-conductive material.

[0105] Non-limiting conductive materials may include metals, such as transition metals including cobalt (Co), copper (Cu), tungsten (W), ruthenium (Ru), tantalum (Ta), titanium (Ti), hafnium (Hf), zirconium (Zr), and / or molybdenum (Mo), combinations thereof, and their doped forms. Non-limiting semiconducting materials include silicon (Si), germanium (Ge), silicon-germanium (SiGe), germanium-silicon (GeSi), doped Si, doped Ge, and (in some cases) silicon carbide. Non-limiting nonconducting materials may include nonmetals or dielectrics, such as low-κ dielectrics. Examples of low-κ dielectrics include dielectrics with a relative permittivity (κ) less than about 4.0 or less than about 3.0, and dielectrics from about 2.0 to 4.0, 2.0 to 2.0, 2.5 to 4.0, or 2.5 to 3.0. Low-κ dielectrics include silicon dioxide (SiO2) (including doped SiO2 (e.g., carbon-doped oxide (CDO) or carbon-doped SiO2), porous SiO2, porous doped SiO2 (e.g., porous CDO)), silicon nitrides, silicon carbides (in some cases), silicon carbide, silicon nitride, silicon carbide, etc.

[0106] Returning to Figure 1, process 100 may include introducing 101 a metal-containing inhibitor, depositing 102 a dielectric material, and optionally removing 103 the inhibitor layer. Each of these operations will now be discussed. In operation 101, a metal-containing inhibitor is thermally introduced into the processing chamber to adsorb onto the surface of substrate 110. Due to the affinity of the inhibitor molecules for first region 111, an inhibitor layer 120 is selectively provided on first region 111. The second region 112 is largely free of metal inhibitor, thus forming an uninhibited surface. The inhibitor layer 120 may be characterized in its location, for example, configured to be closer to the first region than the second region.

[0107] Metal inhibitors Using metal-based inhibitors instead of conventional silicon-based inhibitors offers certain advantages in semiconductor processing, as silicon-based inhibitors can leave undesirable silicon or silica residues on the metal surfaces they are intended to protect. Metal-based inhibitors are adsorbed onto the metal surface, rendering it unreactive to subsequent treatment with dielectric precursors.

[0108] In some implementations, the metal containing the metal inhibitor is different from the metal on the surface of the substrate on which the metal is adsorbed.

[0109] The metals containing metal inhibitors can be antimony, copper, cobalt, hafnium, nickel, ruthenium, platinum, titanium, tantalum, tungsten, or molybdenum.

[0110] Inhibitors applicable to this disclosure include, but are not limited to, metal carbenes. Carbenes have the general formula R 1 R 2 C: (“:” represents an unbonded lone pair of electrons). Carbenes and their equivalents from groups XIII, XIV, and XV are compounds containing a double-coordinated atom with a single electron and a total of six valence electrons. Such compounds are also called “ylidenes”. Not wishing to be theoretically limited, compounds with available lone pairs of electrons exhibit an affinity for metal surfaces, leading to their selective preferential adsorption onto metal surfaces rather than dielectric surfaces. Therefore, in some embodiments, metal ligands (e.g., carbenes or isocyanates) are effective.

[0111] One class of stable carbenes that can act as effective inhibitors are transition metal carbene complexes. In some embodiments, the metal is tungsten or molybdenum. These include, for example, Schrock or Fischer carbenes of the general formula M=R, having the classical structure shown in Scheme 1 (below).

[0112] Option 1 Metallic carbides can have the general formula M=CRR'.

[0113] Examples of other carbene-type inhibitors include N-heterocyclic carbene or methylene. In some embodiments, the carbene has a vapor pressure of about 7000 Torr or less at 25°C. In some embodiments, the carbene has a vapor pressure of about 700 Torr or less at 25°C.

[0114] Metal inhibitors can be metal carbenes, metal-like carbenes, metal halide compounds (e.g., MoCl5 or MoCl6); metal halide oxides (e.g., MoOCl4); metal carbonyl compounds (e.g., NiCO4, WCO6, (C3H6)Co(CO)3, (3,3-dimethyl-1-butyne)hexacarbonyldicobalt); metal cyclopentadienyl compounds (e.g., CpMoCl4, iPrCp2WH2, CpTiCl3, CpTiCl2, CpHfCl3, CpTi(NMe2)3, CpCo). (CO)2, CpCu(PEt3), MeCpPtMe3, CpTa(NtBu)(NEt2)2, or Cp2MoCl2); metal diketone compounds (e.g., Ru(acac)3, Ru(thd)3, Mo(acac)2, Mo(acac)3 or MoO2(acac)2, MoO2(thd)2; or metal alkyl isocyanate compounds. The abbreviation acac refers to acetylacetonate; the abbreviation Cp refers to cyclopentadienyl; the abbreviation thd refers to 2,2,6,6-tetramethyl-3,5-heptanedione.

[0115] Metal inhibitors can have the structure ML of formula (I). x (I); where M is a metal, including antimony, copper, cobalt, hafnium, nickel, ruthenium, platinum, titanium, tantalum, tungsten, or molybdenum; each L is independently a monodentate ligand, an ambidentate ligand, a bidentate ligand, or a tridentate ligand; x is an integer from 1 to 6.

[0116] In some embodiments, the monodentate ligand may be hydrogen, halogen, hydroxyl, alkylsilyl, silylalkyl, alkenyl, alkynyl, allyl, alkoxy, alkenyloxy, alkynyloxy, thioalkoxy, aliphatic acyl, -CF3, nitro, amino, imino, -N(C1-C3alkyl)C(O)(C1-C3alkyl), -C1-C3alkylamino, alkenylamino, alkynylamino, di(C1-C3alkyl)amino, -C(O)O-(C1-C3alkyl), -C(O)NH-( C1-C3 alkyl), -CH=NOH, -P(C1-C3 alkyl)3, -PO3H2, -OPO3H2, -C(O)N(C1-C3 alkyl)2, haloalkyl, alkoxycarbonyl, alkoxyalkoxy, carboxaldehyde, carboxamide, cycloalkyl, cycloalkenyl, cycloalkynyl, aryl, aromatic acyl, aryloxy, aromatic amino, biaryl, thioaryl, heterocyclic, alkyl heterocyclic, heterocyclic alkyl, heterocyclic acyl, alkyl alkylaryl, alkylcarbonyl, CO, =O, =S, ≡N, CC, -NO, arylene, aralkyl, sulfonyl, sulfonamide, sulfonylimide, carbamate, aryloxyalkyl, carboxyl, carboxyl, -C(O)NH (benzyl), subunit, amide, azide, isocyanoxy, thiocyanoxy, isothiocyanoxy, cyano, isocyanoalkyl, isocyanohaloalkyl, isocyanoaryl, isocyanohaloaryl, or cycloyl.

[0117] In some embodiments, at least one L is a subunit, wherein the subunit is a carbene (e.g., an N-heterocyclic carbene) or a nitrogen-based carbene (e.g., imidazolium or pyridinium).

[0118] In some embodiments, the metal inhibitor has a structure L' of formula (II). y ML"ML' y (II); where M is a metal, including antimony, copper, cobalt, hafnium, nickel, ruthenium, platinum, titanium, tantalum, tungsten, or molybdenum; each L' is independently a monodentate ligand, a multidentate ligand, a bidentate ligand, or a tripentate ligand; L” is a ligand containing a triple-bonded caryne, a triple-bonded imide, a triple-bonded nitride, or a triple-bonded oxide; y is an integer from 1 to 5.

[0119] In some embodiments, the monodentate ligand is hydrogen, halogen, hydroxyl, alkylsilyl, silylalkyl, alkenyl, alkynyl, allyl, alkoxy, alkenyloxy, ethynyloxy, thioalkoxy, aliphatic acyl, -CF3, nitro, amino, imino, -N(C1-C3alkyl)C(O)(C1-C3alkyl), -C1-C3alkylamino, alkenylamino, alkynylamino, di(C1-C3alkyl)amino, -C(O)O-(C1-C3alkyl), -C(O)NH-(C1-C3alkyl), -CH=NOH, -P(C1-C3alkyl)3, -PO3H2, -OPO3H2, -C(O)N(C1- C3 alkyl)2, haloalkyl, alkoxycarbonyl, alkoxyalkoxy, carboxaldehyde, carboxamide, cycloalkyl, cycloalkenyl, cycloalkynyl, aryl, aroyl, aryloxy, aromatic amino, biaryl, thioaryl, heterocyclic, alkylheterocyclic, heterocyclic alkyl, heterocyclic acyl, alkylaryl, alkylcarbonyl, CO, =O, =S, ≡N, C≡C, -NO, aralkenyl l), aralkyl, sulfonyl, sulfonamido, sulfonimido, carbamate, aryloxyalkyl, carboxyl, -C(O)NH (benzyl), subunit, amide, azide, isocyanate, cyanothio, isocyanothio, cyano, isocyanoalkyl, isocyanohaloalkyl, isocyanoaryl, isocyanohaloaryl, or cycloyl.

[0120] In some implementations, the metal inhibitor includes molybdenum halides, molybdenum halide oxides, or diketomolybdenum.

[0121] Specific examples of metal inhibitors include, but are not limited to, (3,3-dimethyl-1-butynedi)hexacarbonyldicobalt, hexacarbonyltungsten, and molybdenum pentachloride.

[0122] Specific examples of molybdenum-containing inhibitors include, but are not limited to, Mo(CO)3(CNR)3, Mo(CO)4(CNR)2, Mo(CO)5(CNR) and MoI3(CNR)3, wherein R is trifluoromethyl, pentafluoroethyl, 2-trifluoroethyl, methyl or tert-butyl.

[0123] Useful processing conditions can be employed to thermally introduce a metal-containing inhibitor (e.g., any metal-containing inhibitor described herein) to the surface. In one embodiment, the metal-containing inhibitor is provided to the chamber at a dispensing time of about 5 to 600 seconds, and / or at a temperature of about 50°C to 500°C or 100°C to 400°C, and / or at a pressure of about 10 mTorr to about 400 Torr, from about 1 Torr to about 100 Torr, or from about 5 Torr to 10 Torr. In a particular embodiment, the metal-containing inhibitor is provided with an inert carrier gas (e.g., nitrogen (N2) gas) and can be delivered at a temperature between 50 and 100°C. In some embodiments, the carrier gas is N2, and the processing pressure ranges from 5 to 10 Torr. The inhibitor can be delivered to the chamber continuously or in a pulsed manner.

[0124] As shown in Figure 1, operation 102 includes depositing dielectric material 130 on a second region 112 by exposing a substrate to a dielectric precursor. Deposition can be performed using a plasma-based or thermal method. Processing conditions can be pressures ranging from about 10 mTorr to about 400 Torr, from about 1 Torr to about 100 Torr, from about 5 Torr to 10 Torr, or from about 2 to about 5 Torr; temperatures ranging from about 50°C to 500°C, or 100°C to 400°C, or 200°C to about 300°C; and processing times ranging from about 1 second to about 600 seconds, or from about 5 to about 90 seconds. The dielectric precursor can be a silicon-containing precursor introduced into the processing chamber along with an oxygen-containing reactant; or a silicon-containing and oxygen-containing precursor can be used, wherein the oxygen-containing reactant is optional. Silicon-containing precursors include silanes. Examples of silanes are silane (SiH4), disilane (Si2H6), halosilanes, aminosilanes, and polysilanes (H3Si-(SiH2)). n -SiH3, where n≥0), and organosilanes, such as methylsilane, ethylsilane, isopropylsilane, tert-butylsilane, dimethylsilane, diethylsilane, di-tert-butylsilane, allylsilane, sec-butylsilane, tert-hexylsilane, isopentylsilane, tert-butyldisilane, di-tert-butyldisilane, etc.

[0125] Halosilanes contain at least one halogen group and may or may not contain hydrogen and / or carbon groups. Examples of halosilanes are iodosilanes, bromosilanes, chlorosilanes, and fluorosilanes. While halosilanes (especially fluorosilanes) may form reactive halide substances that etch silicon materials upon plasma ignition, in some embodiments, halosilanes may not be introduced into the chamber during plasma ignition, thus potentially reducing the formation of reactive halide substances from halosilanes. Specific chlorosilanes include tetrachlorosilane, trichlorosilane, dichlorosilane, monochlorosilane, allylchlorosilane, chloromethylsilane, dichloromethylsilane, dichlorodimethylsilane, chloroethylsilane, tert-butylchlorosilane, di-tert-butylchlorosilane, chloroisopropylsilane, chlorosec-butylsilane, tert-butyldimethylchlorosilane, tert-hexyldimethylchlorosilane, and so on.

[0126] Aminosilanes contain at least one nitrogen atom bonded to a silicon atom, but may also contain hydrogen, oxygen, halogen, and carbon. Examples of aminosilanes are mono-, di-, tri-, and tetra-aminosilanes (H3Si(NH2), H2Si(NH2)2, HSi(NH2)3, and Si(NH2)4, respectively), and substituted mono-, di-, tri-, and tetra-aminosilanes, such as tert-butylaminosilane, methylaminosilane, tert-butylsilaneamine, bis(tert-butylamino)silane (SiH2(NHC(CH3)3)2, BTBAS), tert-butylsilylaminocarbamate, SiH(CH3)-(N(CH3)2)2, SiHCl-(N(CH3)2)2, (Si(CH3)2NH)3, etc. A further example of an aminosilane is trisilymine (N(SiH3)).

[0127] Silicon- and oxygen-containing precursors include, but are not limited to, siloxanes. Examples of siloxanes include 2,4,6,8-tetramethylcyclotetrasiloxane (TMCTS), heptamethylcyclotetrasiloxane (HMCTS), sesquioxanes, disiloxanes (e.g., pentamethyldisiloxane (PMDSO) or tetramethyldisiloxane (TMDSO)), and trisiloxanes (e.g., hexamethyltrisiloxane or heptamethyltrisiloxane).

[0128] Oxygen-containing reactants can be oxygen-containing gases, including oxygen (O2), ozone (O3), water, peroxides, hydrogen peroxide, oxygen plasma, water plasma, alcohols, dihydroxy alcohols, polyhydroxy alcohols, fluorinated dihydroxy alcohols, fluorinated polyhydroxy alcohols, fluorinated ethylene glycol, formic acid, and other sources of hydroxyl groups, as well as combinations thereof. Oxygen-containing gases can co-circulate with inert gases; for example, combinations of oxygen and argon, or oxygen and helium.

[0129] In one embodiment, material 130 is provided as a layer. When used herein, selective deposition may refer to the selective deposition of a metal inhibitor in a first region and / or the selective deposition of material in a second region. Because the inhibitor layer 120 blocks deposition, material 130 is selectively deposited on the second region 112.

[0130] Vapor-phase based deposition processes (e.g., ALD, CVD, and their plasma-enhanced forms) can be used to deposit materials. Non-limiting materials include non-conductive materials, such as insulators, and oxides, metal oxides, nitrides, metal nitrides, carbides, metal carbides, or oxynitrides. Examples of materials include aluminum oxides, zinc oxides, zirconium oxides, hafnium oxides, silicon oxides, silicon oxynitrides, silicon nitrides, or titanium oxides. Multiple cycles (e.g., 10, 100, 200, or more cycles) can be used to deposit a material layer. Other conditions may include deposition times of approximately 5 to 600 seconds, and / or temperatures of approximately 25°C to 500°C, and / or pressures of approximately 10 mTorr to 10 Torr.

[0131] Turning back to Figure 1, in operation 103, the metal-containing inhibitor is converted into a metal layer 140.

[0132] Figure 2 shows a process flow diagram of a selective deposition method 200 for binary selective deposition, which simultaneously deposits two different materials on two different surfaces of a semiconductor substrate. This dual deposition technique is efficient and enables a fully "bottom-up" patterning approach.

[0133] Operation 202 involves providing a substrate having a first surface and a second surface as described above in a processing chamber. In some embodiments, the pressure in the processing chamber is from about 2 Torr to about 400 Torr, from about 200 Torr to about 400 Torr, or from about 2 Torr to about 20 Torr. In some embodiments, the temperature in the processing chamber is from about 25°C to about 550°C, from about 50°C to about 450°C, or from about 200°C to about 400°C. The substrate includes those described below and may have one or more of the features. In some embodiments, the first surface is metallic or a metallic-containing surface, and the second surface is dielectric.

[0134] Operation 204 involves thermally depositing a metal inhibitor layer onto the metal surface of the substrate. The processing conditions and suitable metal inhibitors are as described above with reference to Figure 1.

[0135] Operation 206 involves thermally or plasmaly depositing dielectric material onto the dielectric surface of a substrate, as described above with reference to FIG1.

[0136] Operation 208 involves converting a metal-containing inhibitor on a metal surface into a metal. In some embodiments, the conversion is achieved by exposing plasma to a reducing agent (e.g., hydrogen). Processing conditions may be pressures ranging from about 10 mTorr to about 400 Torr, from about 1 Torr to about 100 Torr, from about 5 Torr to 10 Torr, or from about 2 to about 5 Torr; temperatures ranging from about 50°C to 500°C, or from 100°C to 400°C, or from 200°C to about 300°C; and processing times ranging from about 1 second to about 600 seconds, or from about 5 to about 90 seconds. Plasma power may be from about 10 watts to about 10,000 watts per 300 mm wafer, or from about 250 watts to about 2,000 watts per 300 mm wafer. In some embodiments, the conversion is achieved by flowing hydrogen at a flow rate of 5,000 sccm and argon at a flow rate of 7,500 sccm at a pressure of 5 Torr and an RF power of 13.56 MHz.

[0137] Method 200 may include optional operations. For example, prior to operation 204, an optional plasma pretreatment operation (not shown) may be performed to pre-clean the surface in preparation for dual deposition. In some embodiments, the pretreatment provides an activated surface that facilitates the selective deposition of silicon-containing inhibitors on the first region. Non-limiting pretreatment processes include plasma treatment, reducing plasma treatment, or other reducing treatments to remove metal oxides or other surface chemicals from the first region. Plasma treatment may include inductively coupled plasma (ICP) or capacitively coupled plasma (CCP). Processing conditions may be pressures from about 10 mTorr to about 400 Torr, from about 1 Torr to about 100 Torr, from about 5 Torr to 10 Torr, or from about 2 to about 5 Torr; temperatures from about 50°C to 500°C, or 100°C to 400°C, or 200°C to about 300°C; and processing times may be from about 1 second to about 600 seconds, or from about 5 to about 90 seconds. The plasma power can range from about 10 watts to about 10,000 watts per 300mm wafer, or from about 250 watts to about 2,000 watts per 300mm wafer.

[0138] In one embodiment, the process includes a processing time of approximately 1 to 10 minutes using hydrogen (H2) gas. In another embodiment, the process includes an ICP plasma source, with the plasma gas being hydrogen (H2) and oxygen (O2) gas (e.g., at a power of approximately 100 W). Non-limiting conditions include a processing time of approximately 30 to 360 seconds and / or a substrate temperature of approximately 20°C. In yet another embodiment, the process includes a CCP plasma source, with the plasma gas being ammonia (NH3) gas (e.g., at a power of approximately 100 W). Non-limiting conditions include a processing time of approximately 10 to 60 seconds and / or a substrate temperature of approximately 200 to 300°C.

[0139] Operation 210 is an optional post-treatment to remove the inhibitor layer from the first region. Such post-treatment may include plasma treatment, wet etchant chemicals, dry etchant chemicals, or a combination thereof. Such post-treatment processes may include those that minimize damage to the first region. In another embodiment, the treatment includes an ICP or CCP plasma source, with the plasma gas being hydrogen (H2) or ammonia (NH3). Non-limiting conditions include a treatment time of about 30 seconds to 360 seconds, and / or a substrate temperature of about 50°C to about 450°C or about 100°C to 300°C.

[0140] The purging of the processing chamber may optionally be performed before or after operations 204, 206, and 208. Purging the chamber may involve flowing a purging gas or purge gas, which may be a carrier gas used in other operations or may be a different gas. In some embodiments, purging may involve evacuating the chamber. Exemplary purging gases are inert gases, including argon, nitrogen, hydrogen, and helium. In some embodiments, purging may include one or more evacuation sub-stages for evacuating the processing chamber. Alternatively, it should be understood that in some embodiments, purging may be omitted. Purging may have any suitable duration, for example, between about 0 seconds and about 60 seconds, such as about 0.01 seconds.

[0141] Operations 204-208 of this method constitute a loop, and the process can be repeated many times as needed to obtain the desired results. Furthermore, different loops can utilize different metal-containing inhibitors and dielectric precursors.

[0142] Material overhang is a challenge during the deposition of dielectric material on a substrate surface that includes features. Overhangs are protrusions that form near feature openings during deposition. Figure 3 depicts the obstacle caused by overhangs during the processing of a semiconductor substrate containing high aspect ratio features. The first cross-section 301 of Figure 3 shows a substrate 303 with pre-formed feature holes 305.

[0143] The substrate can be a silicon wafer, such as a 200mm, 300mm, or 450mm wafer, including wafers on which one or more layers of material (e.g., dielectric, conductive, or semiconductive material) are deposited. In various embodiments, the substrate is patterned. The patterned substrate may have "features," such as pillars, rods, trenches, vias, or contact holes, which may be one or more of narrow and / or recessed openings, contractions within the feature, and high aspect ratios. Features may be formed in one or more of the aforementioned layers. One example of a feature is a pillar or rod in a layer on a semiconductor substrate. Another example is a trench in a substrate or layer.

[0144] In some embodiments, the aspect ratio of the pillar feature may be at least about 1:1, at least about 2:1, at least about 4:1, at least about 6:1, at least about 10:1, or higher. The dimension of the feature near the opening (e.g., opening diameter or linewidth) may also be between about 10 nm and 500 nm, for example, between about 25 nm and about 300 nm. The disclosed method can be implemented on a substrate having features with openings less than about 150 nm. Vias, trenches, or other recessed features may be referred to as unfilled features or features. According to various embodiments, the feature profile may taper and / or include overhangs at the feature opening.

[0145] A re-entrant profile is a profile that narrows from the bottom closed end or interior of a feature to the feature opening. The re-entrant profile may be created by asymmetric etching kinetics during patterning and / or by overhangs caused by non-conformal film steps in previous film deposition (e.g., deposition of diffusion barriers). In various examples, the width of the feature in the opening at the top of the feature may be smaller than the width at the bottom of the feature.

[0146] Returning to Figure 3, the cross-sectional dimensions (e.g., opening diameter, linewidth, etc.) of the feature aperture 305 near the opening can also be between approximately 10 nanometers and 500 nanometers, or more specifically, between approximately 25 nanometers and 300 nanometers. The feature aperture is sometimes referred to as an unfilled feature, or simply a feature.

[0147] In the next stage (cross section 311), substrate 303 is shown as a lower layer 313 with a deposited pad as a feature aperture 305, which may be a diffusion barrier layer, an adhesion layer, a nucleation layer, a combination thereof, or any other suitable material. Because many deposition processes do not have good step coverage properties (i.e., more material is deposited on the field region and near the opening compared to the interior of the feature), the lower layer 313 may form overhangs 315. In some embodiments, the overhangs may be formed by materials other than the lower layer. Although the overhangs 315 are part of the lower layer 313, layer 313 may be thicker near the opening than, for example, in the interior of the feature. For the purposes of this description, "near the opening" is defined as the approximate location or region corresponding to approximately 0-10% of the feature depth measured from the field region within the feature (i.e., along the sidewalls of the feature). In some embodiments, the region near the opening corresponds to the region at the opening. Furthermore, "inside the feature" is defined as the approximate location or region corresponding to approximately 20-60% of the feature depth measured from the field region at the top of the feature. Typically, when values ​​for certain parameters (e.g., thickness) are specified as "near the opening" or "inside the feature," these values ​​represent measurements taken at these locations / regions or the average of multiple measurements performed.

[0148] In some embodiments, the average thickness of the lower layer near the opening is at least about 10% greater than that inside the feature. In more specific embodiments, this difference may be at least about 25%, at least about 50%, or at least about 100%. The material distribution within the feature may also be characterized by its step coverage. For the purposes of this description, "step coverage" is defined as the ratio of the two thicknesses, i.e., the thickness of the material inside the feature divided by the thickness of the material near the opening. In some examples, the step coverage of the lower layer is less than about 100%, or more specifically, less than about 75% or even less than about 50%.

[0149] The next cross section 321 depicts a feature cavity filled with metallic material 323. The deposition process can result in a conformal layer of material 323 accumulating on the underlying layer 313. This deposited layer follows the shape of the underlying layer 313, including its overhangs 315. In some embodiments, particularly in the later stages of the deposition process (e.g., just before the feature closes), layer 323 may become less conformal, resulting in poor step coverage (i.e., more material is deposited near the opening than inside the feature). As layer 323 thickens, it may cause the feature to close, forming a clamping point 325. Typically, some additional material is deposited above the clamping point 325 before the deposition process stops. Because of the overhangs 315 and, in some embodiments, the poor step coverage of layer 323, the closed feature may have an unfilled void 329 (i.e., a slit) below the reference point 325. The size of the void 329 and the position of the reference point 325 relative to the field area 327 depend on the size of the overhang 315, as well as the size of the feature, aspect ratio and curvature, deposition processing parameters and other parameters.

[0150] Finally, cross section 331 shows substrate 333 after chemical mechanical planarization (CMP), in which the top layer is removed from substrate 303. CMP can be used to remove overburden from field regions, such as portions of layers 313 and 323 present on the top surface of substrate 303. Typically, substrate 303 is also thinned during CMP to form substrate 333. If the clamping point 325 falls at the planarization level of the CMP process, as shown in Figure 3, the slit 329 opens upward and is exposed to the environment through slit opening 335. The problems with open and large slits have been described above.

[0151] According to some disclosed embodiments, Figure 4 provides a process flow diagram showing the relevant operations of method 400 that can be used to selectively deposit silicon oxide to minimize overhang.

[0152] Operation 402 involves providing a substrate having a first surface and a second surface as described above in a processing chamber. The substrate includes those described above that may have one or more of the features. In some embodiments, the first surface is metallic or a metallic-containing surface, and the second surface is dielectric. Suitable processing conditions include those described above with respect to operation 202 in FIG. 2.

[0153] Operation 404 involves exposing the substrate to a metal-containing inhibitor to prepare it for thermal deposition of a silicon-containing film on a second surface. In some embodiments, an inert gas is co-flowed with the metal-containing inhibitor. This pretreatment selectively forms a film on the first surface. The deposition selectivity on the first surface, but not the second surface, can be at least about 80%, about 85%, about 90%, or at least about 95%. Suitable metal-containing inhibitors include those described above with respect to FIG. 1. Suitable processing conditions include those described above with respect to operation 101 in FIG. 1.

[0154] In operation 406, after the introduction of a silicon-containing precursor and an oxygen-containing reactant, or a silicon-containing and oxygen-containing precursor, into the processing chamber, a silicon-containing film is deposited on the second surface. Suitable precursors and reactants have been described above with reference to Figure 2. In some embodiments, an inert gas may co-flow with the precursor and / or reactant. It is not desirable to be limited by theory, as the adjacent first surface is blocked by a metal-containing inhibitor; this method is effective in minimizing, reducing, or even completely avoiding droop.

[0155] In operation 408, the metal-containing inhibitor can be removed from the first surface under wet etching (e.g., using dilute hydrogen fluoride) or dry etching (e.g., using chlorine) conditions.

[0156] The purging of the processing chamber may optionally be performed before or after operations 404, 406, and 408. Purging the chamber may involve flowing a purging gas or purge gas, which may be a carrier gas used in other operations or may be a different gas. In some embodiments, purging may involve evacuating the chamber. Exemplary purging gases are inert gases, including argon, nitrogen, hydrogen, and helium. In some embodiments, purging may include one or more evacuation sub-stages to evacuate the processing chamber. Alternatively, it should be understood that in some embodiments, purging may be omitted. Purging may have any suitable duration, for example, between about 0 seconds and about 60 seconds, such as about 0.01 seconds.

[0157] Operations 404-408 of this method constitute a loop, and this process can be repeated many times as needed to obtain the desired result.

[0158] In addition, an optional plasma pretreatment operation (not shown) can be performed prior to operation 404 to pre-clean the surface in preparation for selective deposition, as described above with reference to Figure 2.

[0159] Device Figure 5 schematically illustrates an embodiment of a processing station 500, which can be used to deposit materials using atomic layer deposition (ALD) and / or chemical vapor deposition (CVD), either of which can be plasma-enhanced. For simplicity, processing station 500 is depicted as a standalone processing station having a processing chamber 502 for maintaining a low-pressure environment. However, it should be understood that multiple processing stations 500 may be contained within a common processing facility environment. It should also be understood that in some embodiments, one or more computer controllers may programmatically adjust one or more hardware parameters of processing station 500 (including those discussed in detail herein).

[0160] Processing station 500 is in fluid communication with reactant delivery system 501, which delivers process gas to distribution nozzle 506. Reactant delivery system 501 includes a mixing container 504 for mixing and / or adjusting the process gas to be delivered to nozzle 506. One or more mixing container inlet valves 520 control the introduction of process gas into mixing container 504. Similarly, nozzle inlet valves 505 control the introduction of process gas into nozzle 506.

[0161] Some reactants, like BTBAS, can be stored in liquid form, then vaporized and subsequently transported to a processing station. For example, the embodiment of Figure 5 includes an evaporation point 503 for evaporating liquid reactants to be supplied to mixing vessel 504. In some embodiments, evaporation point 503 can be a heated evaporator. The reactant vapor produced from such an evaporator condenses in a downstream delivery line. Exposure of incompatible gases to the condensed reactants can generate small particles. These particles can clog lines, impede valve operation, contaminate substrates, etc. Some methods of addressing these problems involve sweeping and / or purging the delivery line to remove residual reactants. However, sweeping the delivery line increases processing station cycle time and reduces processing station throughput. Therefore, in some embodiments, the delivery line downstream of evaporation point 503 can be thermally tracked. In some examples, mixing vessel 504 can also be thermally tracked. In a non-limiting example, the line downstream of evaporation point 503 has a high temperature distribution, extending from about 100°C to about 150°C at mixing vessel 504.

[0162] In some embodiments, the reactant liquid can evaporate at a liquid injector. For example, the liquid injector can pulse-inject liquid reactants into a carrier gas flow upstream of the mixing vessel. In one case, the liquid injector evaporates the reactants by instantaneously changing the liquid pressure from higher to lower. In another case, the liquid injector can atomize the liquid into dispersed droplets, which then evaporate in a heated delivery line. It should be understood that smaller droplets evaporate faster than larger droplets, thus reducing the delay between liquid injection and completion of evaporation. Faster evaporation reduces the length of the line downstream of evaporation point 503. In one case, the liquid injector can be directly mounted to the mixing vessel 504. In another case, the liquid injector can be directly mounted to the nozzle 506.

[0163] In some embodiments, a flow controller may be provided upstream of the evaporation point 503 to control the evaporation and the mass flow rate of the liquid delivered to the treatment station 500. For example, the flow controller (LFC) may include a thermal mass flow meter (MFM) located downstream of the LFC. The plunger valve of the LFC can then be adjusted in response to feedback control signals provided by a proportional-integral-derivative (PID) controller electrically communicating with the MFM. However, using feedback control may take a second or longer to stabilize the flow. This could prolong the dispensing time of the liquid reactants. Therefore, in some embodiments, the LFC may dynamically switch between a feedback control mode and a direct control mode. In some embodiments, the LFC may dynamically switch from a feedback control mode to a direct control mode by disabling the sensing tubes of both the LFC and the PID controller.

[0164] Nozzle 506 dispenses process gas to substrate 512. In the embodiment shown in FIG. 5, substrate 512 is located below nozzle 506 and is shown resting on base 508. It should be understood that nozzle 506 can have any suitable shape and can have any suitable number and arrangement of ports for dispensing process gas to substrate 512.

[0165] In some implementations, the microvolume 507 is located below the nozzle 506. Performing ALD and / or CVD processes in a microvolume within the processing station reduces reactant exposure and sweep-up time, decreases the time required to change process conditions (such as pressure, temperature, etc.), and limits the exposure of the processing station's robotic arms to process gases compared to performing ALD and / or CVD processes throughout the entire volume. Examples of microvolume sizes may include, but are not limited to, volumes between 0.1 liters and 2 liters. This microvolume also affects production yield. While the deposition rate per cycle is reduced, the cycle time is also reduced. In some cases, the latter effect is significant enough to improve the overall yield of modules targeting a specific film thickness.

[0166] In some embodiments, the base 508 may be raised or lowered to expose the substrate 512 to the microvolume 507 and / or to change the volume of the microvolume 507. For example, during a substrate transfer phase, the base 508 may be lowered to allow the substrate 512 to be loaded onto the base 508. During a deposition process phase, the base 508 may be raised to place the substrate 512 within the microvolume 507. In some embodiments, the microvolume 507 may completely surround the substrate 512 and a portion of the base 508 to create a region of high flow resistance during the deposition process.

[0167] Optionally, the base 508 may be lowered and / or raised during part of the deposition process to regulate process pressure, reactant concentration, etc., within the microvolume 507. Lowering the base 508 allows the microvolume 507 to be emptied while the treatment chamber 502 is maintained at a baseline pressure during deposition. Exemplary ratios of the microvolume's volume to the treatment chamber's volume may include, but are not limited to, ratios between 1:500 and 1:10. It should be understood that in some embodiments, the base height may be programmatically adjusted via a suitable computer controller.

[0168] In another scenario, adjusting the height of pedestal 508 can alter the plasma density during plasma activation and / or process cycles included in the deposition process. Upon completion of a deposition process stage, pedestal 508 can be lowered during another substrate transfer stage to allow removal of substrate 512 from pedestal 508.

[0169] While the exemplary microvolume changes described herein refer to a height-adjustable base, it should be understood that in some embodiments, the position of the nozzle 506 relative to the base 508 can be adjusted to change the volume of the microvolume 507. Furthermore, it should be understood that the vertical position of the base 508 and / or the nozzle 506 can be changed by any suitable mechanism within the scope of the invention. In some embodiments, the base 508 may include a rotation axis for rotating the orientation of the substrate 512. It should be understood that in some embodiments, one or more of these exemplary adjustments can be performed programmatically by one or more suitable computer controllers.

[0170] Returning to the embodiment shown in Figure 5, nozzle 506 and base 508 are electrically connected to an RF power supply 514 and matching network 516 for supplying energy to the plasma. In some embodiments, plasma energy can be controlled by controlling one or more of the following: processing station pressure, gas concentration, RF source power, RF source frequency, and plasma power pulse timing. For example, RF power supply 514 and matching network 516 can be operated at any suitable power to generate a plasma with the desired free radical composition. Examples of suitable power have been included in the paragraphs above. Similarly, RF power supply 514 can provide RF power at any suitable frequency. In some embodiments, RF power supply 514 can be used to independently control high-frequency and low-frequency RF power supplies. Examples of low-frequency RF frequencies may include, but are not limited to, frequencies between 50 kHz and 500 kHz. Examples of high-frequency RF frequencies may include, but are not limited to, frequencies between 1.8 MHz and 2.45 GHz. It should be understood that any suitable parameters can be adjusted discretely or continuously to provide plasma energy for surface reactions. In a non-limiting example, the plasma power can be pulsed intermittently relative to a continuously powered plasma to reduce ion bombardment of the substrate surface.

[0171] In some implementations, the plasma can be monitored in situ by one or more plasma monitors. In one case, plasma power can be monitored by one or more voltage and current sensors (such as VI probes). In another case, plasma density and / or the concentration of process gases can be measured by one or more optical emission spectroscopy (OES) sensors. In some implementations, one or more plasma parameters can be programmed to adjust based on measurements from such in-situ monitors. For example, OES sensors can be used in the feedback loop of programmed control providing plasma power. It should be understood that in some implementations, other monitors can be used to monitor the plasma and other process characteristics. Such monitors may include, but are not limited to, infrared (IR) monitors, acoustic monitors, and pressure sensors.

[0172] In some embodiments, the plasma can be controlled via input / output control (IOC) sequence instructions. In one example, instructions for setting plasma conditions for a plasma process stage may be included in the corresponding plasma activation formulation stage of the deposition process formulation. In some cases, process formulation stages may be configured sequentially such that all instructions for the deposition process stage are executed synchronously with that process stage. In some embodiments, instructions for setting one or more plasma parameters may be included in a formulation stage preceding the plasma process stage. For example, a first formulation stage may include instructions for setting the flow rates of the inert gas and / or reactant gas, instructions for setting the plasma generator to a power setpoint, and time delay instructions for the first formulation stage. A subsequent second formulation stage may include instructions for activating the plasma generator and time delay instructions for the second formulation stage. A third formulation stage may include instructions for deactivating the plasma generator and time delay instructions for the third formulation stage. It should be understood that these formulation stages may be further subdivided and / or repeated in any suitable manner within the scope of the invention.

[0173] In some deposition processes, plasma ignition lasts on the order of several seconds or longer. In some implementations, even shorter plasma ignitions can be used. These can be on the order of 10 ms to 1 second, typically around 20 to 80 ms, with one specific example being 50 ms. This very short RF plasma ignition requires extremely fast plasma stabilization. To achieve this, the plasma generator can be configured such that impedance matching is pre-set to a specific voltage while allowing frequency fluctuation. Typically, high-frequency plasma is generated at an RF frequency of approximately 13.56 MHz. In the various embodiments disclosed herein, frequency fluctuations are allowed to values ​​different from this standard value. By allowing frequency fluctuation while fixing the impedance matching to a predetermined voltage, the plasma can stabilize more quickly, a result that can be important when using very short plasma ignitions associated with certain types of deposition cycles.

[0174] In some embodiments, the temperature of the base 508 can be controlled by the heater 510. Additionally, in some embodiments, pressure control of the deposition processing station 500 can be provided via a butterfly valve 518. As shown in the embodiment of Figure 5, the butterfly valve can regulate the vacuum provided by a downstream vacuum pump (not shown). However, in some embodiments, the pressure control of the processing station 500 can be adjusted by changing the flow rate of one or more gases introduced into the processing station 500.

[0175] Figure 6 shows a schematic view of an embodiment of a multi-station processing tool 600, having an inbound loading lock 602 and an outbound loading lock 604, one or both of which may contain a remote plasma source. An atmospheric pressure manipulator 606 is configured to move a wafer from a cassette loaded via a carrier 608 through an atmospheric port 610 into the inbound loading lock 602. The wafer is placed on a base 612 within the inbound loading lock 602 by the manipulator 606, the atmospheric port 610 is closed, and the loading lock is evacuated. When the inbound loading lock 602 contains a remote plasma source, the wafer can be exposed to a remote plasma process within the loading lock before being introduced into the processing chamber 614. Additionally, the wafer can also be heated within the inbound loading lock 602, for example, to remove moisture and adsorbed gases. Next, the chamber transfer port 616 leading to the processing chamber 614 is opened, and another robotic arm (not shown) places the wafer into the reactor on the base of the first station shown in the reactor for processing. Although the embodiment illustrated in Figure 6 includes a loading lock, it should be understood that in some embodiments, the substrate may be allowed to enter the processing station directly.

[0176] The illustrated processing chamber 614 comprises four processing stations, numbered 1 to 4 in the embodiment shown in Figure 6. Each station has a heated base (shown as 618 for station 1) and a gas line inlet. It should be understood that in some embodiments, each processing station may have different or multiple uses. Although the illustrated processing chamber 614 comprises four stations, it is to be understood that a processing chamber according to this disclosure may have any suitable number of stations. For example, in some embodiments, a processing chamber may have five or more stations, while in other embodiments, a processing chamber may have three or fewer stations.

[0177] Figure 6 illustrates some embodiments of a wafer handling system 690 for transferring wafers within processing chamber 614. In some embodiments, the wafer handling system 690 can transfer wafers between various processing stations and / or between a processing station and a loading lock. It should be understood that any suitable wafer handling system can be employed. Non-limiting examples include wafer turntables and robotic arms for handling wafers. Figure 6 also illustrates an embodiment employing a system controller 650 to control the process conditions and hardware status of processing tool 600. The system controller 650 may include one or more memory devices 656, one or more mass storage devices 654, and one or more processors 652. The processor 652 may include a computer or CPU, analog and / or digital input / output connections, a stepper motor controller board, etc.

[0178] In some implementations, system controller 650 controls all activities of processing tool 600. System controller 650 executes system control software 658, stored in mass storage device 654, loaded into memory device 656, and executed by processor 652. System control software 658 may contain instructions for controlling timing, gas mixing, chamber and / or station pressure, chamber and / or station temperature, purge conditions and timing, wafer temperature, RF power level, RF frequency, substrate, pedestal, chuck and / or pedestal position, and other parameters for specific processes performed by processing tool 600. System control software 658 may be configured in any suitable manner. For example, various processing tool component subroutines or control objects may be written to control the operation of processing tool components necessary to perform various processing tool processes according to the disclosed methods. System control software 658 may be coded in any suitable computer-readable programming language.

[0179] In some embodiments, the system control software 658 may include input / output control (IOC) sequencing instructions for controlling the various parameters described above. For example, each stage of the plasma-enhanced ALD (PEALD) process may include one or more instructions executed by the system controller 650. Instructions for setting the process conditions for a PEALD process stage may be included in the corresponding PEALD formulation stage. In some embodiments, the PEALD formulation stages may be scheduled sequentially so that all instructions for a PEALD process stage are executed simultaneously with that process stage.

[0180] In some implementations, other computer software and / or programs associated with system controller 650 and stored in mass storage device 654 and / or memory device 656 may be employed. Examples of programs or program segments used for this purpose include substrate positioning programs, process gas control programs, pressure control programs, heater control programs, and plasma control programs.

[0181] The substrate positioning procedure may include program code for a processing tool assembly that loads the substrate onto the base 618 and controls the spacing between the substrate and other parts of the processing tool 600.

[0182] The process gas control program may include code for controlling the gas composition and flow rate, and optionally code for stabilizing the pressure in one or more processing stations before deposition. The process gas control program may include code for controlling the gas composition and flow rate within any publicly disclosed range. The pressure control program may include code for controlling the pressure within the processing station by adjusting, for example, throttling valves in the processing station's exhaust system, the gas flow into the processing station, etc. The pressure control program may include code for maintaining the pressure in the processing station within any publicly disclosed pressure range.

[0183] The heater control program may contain code for controlling the current flowing to the heating element used to heat the substrate. Alternatively, the heater control program may control the delivery of a heat transfer gas (such as helium) toward the substrate. The heater control program may include instructions to maintain the temperature of the substrate within any publicly disclosed range.

[0184] The plasma control program may include code for setting the RF power level and frequency applied to the processing electrodes in one or more processing stations, such as code for using any RF power level disclosed herein. The plasma control program may also include code for controlling the duration of each plasma exposure.

[0185] In some implementations, a user interface may be associated with the system controller 650. The user interface may include a display screen, a graphical software display of the device and / or process conditions, and user input devices such as clicking devices, keyboards, touch screens, microphones, etc.

[0186] In some implementations, the parameters regulated by the system controller 650 relate to process conditions. Non-limiting examples include process gas composition and flow rate, temperature, pressure, plasma conditions (e.g., RF power level, frequency, and exposure time), etc. These parameters can be provided to the user in the form of a recipe, which can be input using the user interface.

[0187] Signals used for monitoring the process can be provided from various processing tool sensors via analog and / or digital input connections of system controller 650. Signals used for controlling the process can be output via analog and digital output connections of processing tool 600. Non-limiting examples of processing tool sensors that can be monitored include mass flow controllers, pressure sensors (e.g., pressure gauges), thermocouples, and the like. Appropriately programmed feedback and control algorithms can be used with data from these sensors to maintain process conditions.

[0188] The disclosed implementation scheme can be implemented using any suitable chamber. Exemplary deposition apparatuses include, but are not limited to, devices from the ALTUS®, VECTOR®, and / or SPEED® product families (each available from Lam Research Corp. (Fremont, California)) or any other various commercially available processing systems. Two or more stations can perform the same function. Similarly, two or more stations can perform different functions. Each station can be designed / configured to perform specific functions / methods as needed.

[0189] Figure 7 is a block diagram of a processing system suitable for performing thin film deposition processes according to certain embodiments. System 700 includes a transfer module 703. Transfer module 703 provides a clean, pressurized environment to minimize the risk of contamination when the substrate being processed moves between the various reactor modules. According to certain embodiments, two multi-station reactors 709 and 710 are mounted on transfer module 703, each capable of performing atomic layer deposition (ALD) and / or chemical vapor deposition (CVD). Reactors 709 and 710 may include multiple stations 711, 713, 715, and 717, which may perform operations sequentially or non-sequentially according to the disclosed embodiments. These stations may include heated pedestals or substrate supports, one or more gas inlets or nozzles or dispersion plates.

[0190] Mounted on the transfer module 703 may also be one or more single-station or multi-station modules 707 capable of performing plasma or chemical (non-plasma) pre-cleaning, or any other process related to the disclosed methods. In some cases, module 707 can be used for various processes, such as preparing substrates for deposition processes. Module 707 may also be designed / configured to perform various other processes, such as etching or polishing. System 700 also includes one or more wafer source modules 701 in which wafers are stored before and after processes. An atmospheric robot (not shown) in atmospheric transfer chamber 719 can first move wafers from source module 701 to loading lock 721. Wafer transfer devices (typically robotic arm units) in transfer module 703 move wafers from loading lock 721 to modules mounted on transfer module 703 and move them within modules mounted on transfer module 703.

[0191] In various implementations, system controller 729 is used to control process conditions during the deposition process. Controller 729 typically includes one or more memory devices and one or more processors. The processor may include a CPU or calculator, analog and / or digital input / output connections, a stepper motor controller board, etc.

[0192] The controller 729 controls all activities of the deposition apparatus. The system controller 729 executes system control software, which includes sets of instructions for controlling timing, gas mixtures, chamber pressure, room temperature, wafer temperature, radio frequency (RF) power levels, wafer chuck or pedestal positions, and other parameters specific to the process. Additional computer programs stored in a memory device associated with the controller 729 may be employed in some embodiments.

[0193] Typically, a user interface is associated with the controller 729. The user interface may include a display screen, a graphical software display of the device and / or process conditions, and user input devices such as pointing devices, keyboards, touch screens, microphones, etc.

[0194] System control logic can be configured in any suitable manner. Generally, this logic can be designed or configured in hardware and / or software. Instructions for controlling the drive circuitry can be hard-coded or provided as software. Instructions can be provided through "programming." This programming is understood to include any form of logic, including hard-coded logic in digital signal processors, application-specific integrated circuits (ASICs), and other devices with specific algorithms implemented in hardware. Programming is also understood to include software or firmware instructions executable on a general-purpose processor. System control software can be encoded in any suitable computer-readable programming language.

[0195] The computer program code used to control the germanium-containing reducing agent pulse, the hydrogen flow, and the tungsten-containing precursor pulse, as well as other processes in the process sequence, can be written in any common computer-readable programming language: for example, assembly language, C, C++, Pascal, Fortran, or others. The compiled object code or script is executed by the processor to perform the tasks identified in the program. Also, as indicated, the program code can be hard-coded.

[0196] Controller parameters are related to process conditions, such as process gas composition and flow rate, temperature, pressure, cooling gas pressure, substrate temperature, and chamber wall temperature. These parameters are provided to the user in the form of a formula and can be input via a user interface. Signals for monitoring the process can be provided through analog and / or digital input connections to the system controller 729. Signals for controlling the process are output through analog and digital output connections to the deposition apparatus 700.

[0197] System software can be designed or configured in many different ways. For example, according to the disclosed embodiments, various chamber component subroutines or control objects can be written to control the operation of chamber components necessary to perform the deposition process (and in some cases, other processes). Examples of programs or program segments used for this purpose include substrate positioning code, process gas control code, pressure control code, and heater control code.

[0198] In some implementations, the controller is part of a system, which may be part of the examples described above. Such a system may include semiconductor process equipment, which includes one or more processing tools, one or more chambers, one or more platforms for processing, and / or specific processing components (wafer pedestals, gas flow systems, etc.). These systems may be integrated with electronics for controlling their operation before, during, and after the processing of semiconductor wafers or substrates. The electronics may be referred to as a “controller”, which can control various components or sub-components of one or more systems. Depending on the processing requirements and / or system type, the controller may be programmed to control any process disclosed herein, including the delivery of process gases, temperature settings (e.g., heating and / or cooling), pressure settings, vacuum settings, power settings, radio frequency (RF) generator settings in some systems, RF matching circuit settings, frequency settings, flow rate settings, fluid delivery settings, position and operation settings, wafer transfer tools and other transfer tools, and / or loading locks connected to or interfaced with a specific system.

[0199] In a broad sense, a controller can be defined as an electronic device having various integrated circuits, logic, memory, and / or software for receiving instructions, issuing instructions, controlling operations, enabling cleaning operations, enabling endpoint measurements, etc. Integrated circuits can include chips in the form of firmware storing program instructions, digital signal processors (DSPs), chips defined as application-specific integrated circuits (ASICs), and / or one or more microprocessors or microcontrollers that execute program instructions (e.g., software). Program instructions can be instructions sent to the controller in the form of various individual settings (or program files), which define operating parameters for performing a specific process on or for a semiconductor wafer or system. In some embodiments, operating parameters can be part of a recipe defined by a process engineer to complete one or more processing steps during the fabrication of one or more layers, materials, metals, oxides, silicon, silicon dioxide, surfaces, circuits, and / or wafer dies.

[0200] In some implementations, the controller may be part of or coupled to a computer integrated with, coupled to, or otherwise networked to the system, or a combination thereof. For example, the controller may be in the “cloud” or be all or part of a fab host system, allowing remote access to wafer processing. The computer may enable remote access to the system to monitor the current progress of manufacturing operations, examine the history of past manufacturing operations, examine trends or performance criteria of multiple manufacturing operations, change parameters of the current process, set processing steps to follow the current process, or start a new process. In some examples, a remote computer (e.g., a server) may provide process recipes to the system via a network (which may include a local network or the Internet). The remote computer may include a user interface that enables input or programming of parameters and / or settings, which are then sent from the remote computer to the system. In some examples, the controller receives instructions in the form of data specifying parameters for each processing step to be performed during one or more operations. It should be understood that the parameters may be specific to the type of process to be performed and the type of tool, to which the controller is configured to interface with or control the tool. Therefore, as described above, a controller can be distributed, for example, by comprising one or more discrete controllers networked together and operating toward a common purpose (such as the process and control described herein). An example of a distributed controller for such a purpose is one or more integrated circuits on a room that communicate with one or more integrated circuits remotely (e.g., at the platform level or as part of a remote computer), which together control the process on the room.

[0201] Example systems may include, but are not limited to, plasma etching chambers or modules, deposition chambers or modules, rotary rinsing chambers or modules, metal plating chambers or modules, cleaning chambers or modules, chamfering edge etching chambers or modules, physical vapor deposition (PVD) chambers or modules, chemical vapor deposition (CVD) chambers or modules, atomic layer deposition (ALD) chambers or modules, atomic layer etching (ALE) chambers or modules, ion implantation chambers or modules, track chambers or modules, and any other semiconductor process systems that may be associated with or used for the fabrication and / or preparation of semiconductor wafers.

[0202] As described above, depending on one or more processing steps to be performed by the tool, the controller may communicate with one or more other tool circuits or modules, other tool components, cluster tools, other tool interfaces, adjacent tools, neighboring tools, tools located throughout the plant, a host computer, another controller, or tools used in the transport of materials to and from the tool location and / or loading port in the semiconductor manufacturing plant.

[0203] Other implementation plans The apparatus and processes described herein can be used in conjunction with photolithographic patterning tools or processes, for example, for the fabrication or manufacture of semiconductor devices, displays, LEDs, photovoltaic panels, etc. Typically, although not necessarily, these apparatus and processes will be used together or operated in a common manufacturing facility. Photolithographic patterning of a film typically involves some or all of the following steps, each step enabling multiple feasible tools: (1) applying a photoresist to a workpiece, i.e., a substrate, using a spin coater or spray coater; (2) curing the photoresist using a hot plate or oven or a UV curing tool; (3) exposing the photoresist to visible light or UV or X-rays using a tool such as a wafer stepper; (4) developing the photoresist to selectively remove the photoresist and thereby pattern it using a tool such as a wet cleaning station; (5) transferring the photoresist pattern to the underlying film or workpiece using a dry or plasma-assisted etching tool; and (6) removing the photoresist using a tool such as an RF or microwave plasma stripper.

[0204] in conclusion While the foregoing embodiments have been described in detail for clarity of understanding, it will be apparent that certain changes and modifications may be made within the scope of the appended claims. It should be noted that there are many alternative methods of implementing these embodiments, including processes, systems, and apparatus. Accordingly, these embodiments should be considered illustrative rather than restrictive, and are not limited to the details given herein.

Claims

1. A method for binary deposition of a metal and a dielectric film, comprising: A substrate is provided in a processing chamber, the substrate having a metallic surface comprising a first metal and a dielectric surface comprising a first dielectric. The substrate is exposed to a metal-containing inhibitor comprising a second metal to form a film of the metal-containing inhibitor on the surface of the metal. A dielectric precursor comprising a second dielectric is supplied to the processing chamber to selectively form a dielectric film comprising the second dielectric on the dielectric surface comprising the first dielectric. as well as The metal inhibitor-containing membrane is treated with plasma to convert the metal inhibitor-containing membrane on the metal surface into a second metal.

2. The method according to claim 1, wherein the metal-containing inhibitor comprises a metal carbene compound, a metal carbene-like compound, a metal halide compound, a metal halide oxide compound, a metal carbonyl compound, a metal cyclopentadienyl compound, a metal diketone compound, a metal aryl isocyanate compound, or a metal alkyl isocyanate compound; and wherein the metal of the metal-containing inhibitor comprises antimony, chromium, copper, cobalt, hafnium, molybdenum, nickel, ruthenium, platinum, titanium, tantalum, tungsten, zinc, or zirconium.

3. The method according to claim 1, wherein the metal-containing inhibitor comprises the structure of formula (I). ML x (I); Where M is a metal, including antimony, copper, cobalt, hafnium, nickel, ruthenium, platinum, titanium, tantalum, tungsten, or molybdenum; Each L can be independently a monodentate ligand, an amphipathic ligand, a bidentate ligand, or a tripentate ligand; and x is an integer from 1 to 6.

4. The method according to claim 3, wherein the monodentate ligand comprises hydrogen, halogen, hydroxyl, alkylsilyl, silylalkyl, alkenyl, alkynyl, allyl, alkoxy, alkenyloxy, ethynyloxy, thioalkoxy, aliphatic acyl, -CF3, nitro, amino, imino, -N(C1-C3alkyl)C(O)(C1-C3alkyl), -C1-C3alkylamino, alkenylamino, alkynylamino, di(C1-C3alkyl)amino, -C(O)O-(C1-C3alkyl), -C(O)NH-(C1-C3alkyl), -CH=NOH, -P(C1-C3alkyl)3, -PO3H2, -OPO3H2, -C(O)N(C1-C3alkyl)2, haloalkyl, alkoxycarbonyl, alkoxyalkoxy, carboxaldehyde, carboxamide, cycloalkyl, cycloalkenyl, cycloalkynyl, aryl, aromatic acyl, aryloxy, aromatic amino. Biaryl, thioaryl, heterocyclic, alkyl heterocyclic, heterocyclic alkyl, heterocyclic acyl, alkylaryl, alkyl carbonyl, CO, =O, =S, ≡N, C≡C, -NO, arylene, aralkyl, sulfonyl, sulfonamide, sulfonylimide, carbamate, aryloxyalkyl, carboxyl, carboxyl, -C(O)NH (benzyl), subunit, amide, azide, isocyanoxy, thiocyanoxy, isothiocyanoxy, cyano, isocyanoalkyl, isocyanohaloalkyl, isocyanoaryl, isocyanohaloaryl or cycloyl.

5. The method of claim 3, wherein at least one L comprises a subunit.

6. The method according to claim 5, wherein the subunit is a carbene or a nitrogen-based carbene.

7. The method according to claim 6, wherein the carbene is an N-heterocyclic carbene.

8. The method according to claim 6, wherein the nitrogen-based carbene is imidazolium or pyridinium.

9. The method according to claim 1, wherein the metal-containing inhibitor comprises a structure of formula (II). L' y ML”ML' y (II); Where M is a metal, including antimony, copper, cobalt, hafnium, nickel, ruthenium, platinum, titanium, tantalum, tungsten, or molybdenum; Each L' can be independently a monodentate ligand, an amphipathic ligand, a bidentate ligand, or a tripentate ligand; L” is a ligand including a triple-bonded carbyn, a triple-bonded imide, or a triple-bonded nitride; and y is an integer from 1 to 5.

10. The method according to claim 9, wherein the monodentate ligand comprises hydrogen, halogen, hydroxyl, alkylsilyl, silylalkyl, alkenyl, alkynyl, allyl, alkoxy, alkenyloxy, ethynyloxy, thioalkoxy, aliphatic acyl, -CF3, nitro, amino, imino, -N(C1-C3alkyl)C(O)(C1-C3alkyl), -C1-C3alkylamino, alkenylamino, alkynylamino, di(C1-C3alkyl)amino, -C(O)O-(C1-C3alkyl), -C(O)NH-(C1-C3alkyl), -CH=NOH, -P(C1-C3alkyl)3, -PO3H2, -OPO3H2, -C(O)N(C1-C3alkyl)2, haloalkyl, alkoxycarbonyl, alkoxyalkoxy, carboxaldehyde, carboxamide, cycloalkyl, cycloalkenyl, cycloalkynyl, aryl, aromatic acyl, aromatic oxy, aromatic amino. Biaryl, thioaryl, heterocyclic, alkyl heterocyclic, heterocyclic alkyl, heterocyclic acyl, alkylaryl, alkyl carbonyl, CO, =O, =S, ≡N, C≡C, -NO, arylene, aralkyl, sulfonyl, sulfonamide, sulfonylimide, carbamate, aryloxyalkyl, carboxyl, carboxyl, -C(O)NH (benzyl), subunit, amide, azide, isocyanoxy, thiocyanoxy, isothiocyanoxy, cyano, isocyanoalkyl, isocyanohaloalkyl, isocyanoaryl, isocyanohaloaryl or cycloyl.

11. The method according to claim 1, wherein the metal-containing inhibitor comprises molybdenum halide, molybdenum halide oxide, or diketomolybdenum.

12. The method according to claim 1, further comprising: After the membrane containing the metal inhibitor is converted into a second metal, the second metal is optionally post-treated to remove excess inhibitor.

13. The method of claim 12, wherein the post-processing comprises: Processing is performed using hydrogen-containing plasma or flash-enhanced plasma.

14. The method of claim 1, wherein the metal surface comprises tungsten oxide, hafnium oxide, titanium oxide, aluminum oxide, zirconium oxide, cobalt, copper, tungsten, ruthenium, molybdenum, or a combination thereof.

15. The method of claim 1, wherein the first dielectric comprises germanium oxide, antimony oxide, bismuth oxide, magnesium oxide, aluminum oxide, nickel oxide, iron oxide, titanium oxide, tantalum nitride, cobalt oxide, silicon dioxide, silicon nitride, or silicon oxide carbide; and wherein, The second dielectric includes silicon dioxide, silicon nitride, or silicon oxide carbide.

16. A method for selectively depositing a silicon oxide film on a substrate, comprising: A substrate is provided in a processing chamber, the substrate comprising a first surface and a second surface; The substrate is exposed to at least one metal inhibitor to form a pre-treated substrate containing the metal inhibitor on the first surface; A silicon-containing precursor and an oxygen-containing reactant, or a silicon-containing and oxygen-containing precursor, are supplied to the processing chamber to form a silicon-containing film on the second surface of the pretreated substrate; as well as Remove the metal-containing inhibitor from the first surface. The first surface is different from the second surface.

17. The method of claim 16, wherein the metal-containing inhibitor comprises a metal carbene compound, a metal carbene-like compound, a metal halide compound, a metal halide oxide compound, a metal carbonyl compound, a metal cyclopentadienyl compound, a metal diketone compound, a metal aryl isocyanate compound, or a metal alkyl isocyanate compound; and wherein the metal of the metal-containing inhibitor comprises antimony, chromium, copper, cobalt, hafnium, molybdenum, nickel, ruthenium, platinum, titanium, tantalum, tungsten, zinc, or zirconium.

18. The method of claim 16, wherein the metal-containing inhibitor comprises (3,3-dimethyl-1-butyne)hexacarbonyldicobalt, hexacarbonyltungsten, or molybdenum pentachloride.

19. The method of claim 16, wherein the first surface comprises a metal, the second surface comprises a dielectric, and thereby minimizes sag.

20. An apparatus for selectively depositing two different materials on two different surfaces of a semiconductor substrate, comprising: Processing room; A substrate holder located in the processing chamber; One or more gas inlets for allowing gas to flow into the processing chamber; A vacuum source, used to remove gas from the processing chamber; A plasma generator for generating plasma within the processing chamber; as well as One or more controllers, comprising a plurality of machine-readable instructions for operating the one or more gas inlets, the vacuum source, and the plasma generator to perform deposition on a semiconductor substrate, wherein the machine-readable instructions of the one or more controllers include instructions for the following operations: A metal inhibitor is introduced to form a metal inhibitor film on the first surface of a semiconductor substrate; A dielectric precursor is introduced to form a dielectric film on the second surface of a semiconductor substrate; as well as The metal-containing inhibitor film on the first surface of the semiconductor substrate is converted into metal.

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