Time synchronization method, electronic equipment, storage medium and vehicle

Abstract

The invention discloses a time synchronization method, electronic equipment, a storage medium and a vehicle, relates to the technical field of vehicles, and is used for improving the precision of time synchronization in a controller of the vehicle. The method is applied to the controller, the controller comprises a first kernel and a second kernel, and the method comprises the steps that the second kernel responds to a time synchronization operation and obtains global time from a shared memory of the first kernel and the second kernel; the time synchronization operation is triggered when the first kernel updates the global time in the shared memory.

Description

Technical Field

[0001] This invention relates to the field of vehicle technology, and more particularly to a time synchronization method, electronic device, storage medium, and vehicle. Background Technology

[0002] As the automotive industry continues to advance in terms of intelligence and connectivity, intelligent driving technology is also constantly evolving. Intelligent driving systems need to perceive the surrounding environment in real time, identify obstacles, plan routes, and autonomously control the vehicle based on real-time data. These processes all require massive amounts of data to be transmitted and processed in real time. To ensure accurate and real-time data processing and transmission, it is crucial to maintain a consistent time base for all sensors, controllers, and actuators within the vehicle; that is, all components within the vehicle need to be synchronized in time to guarantee the decision-making accuracy, safety, and reliability of the intelligent driving system.

[0003] Especially in multi-core controllers, each core handles different business logic. The core that receives the global time from the clock source is different from the core that sends the global time to downstream nodes (such as various sensors). Therefore, the global time needs to be transmitted between multiple cores of the controller. Due to the limited clock frequency and accuracy of the processor, the time transmission between cores is not real-time, and there will be a certain time synchronization error, that is, the time differs between different cores. This difference may affect the performance and reliability of the system.

[0004] Therefore, improving the accuracy of time synchronization among multiple cores of the controller has become an urgent technical problem to be solved. Summary of the Invention

[0005] This application provides a time synchronization method, electronic device, storage medium, and vehicle for improving the time synchronization accuracy of multiple cores within a vehicle controller, thereby enabling accurate and real-time data processing and transmission.

[0006] To achieve the above objectives, this application adopts the following technical solution:

[0007] In a first aspect, embodiments of this application provide a time synchronization method applied to a controller, the controller including a first kernel and a second kernel, the method including: the second kernel, in response to a time synchronization operation, obtains a global time from a shared memory of the first kernel and the second kernel; the time synchronization operation is triggered when the first kernel updates the global time in the shared memory.

[0008] In the time synchronization method provided in this application, the second kernel responds to the time synchronization operation by obtaining the global time from the shared memory of the first and second kernels. The time synchronization operation is triggered when the first kernel updates the global time in the shared memory. That is, after the first kernel updates the global time in the shared memory, it triggers the time synchronization operation, allowing the second kernel to immediately obtain the latest global time from the shared memory. It should be understood that due to the highly efficient communication mechanism between kernels, the latency between the first kernel triggering the time synchronization instruction and the second kernel receiving the instruction is usually very short, almost negligible. Therefore, in the scheme of this application, after the first kernel successfully stores the global time, the second kernel can read the global time immediately, thereby ensuring the consistency of the global time in the first and second kernels, and thus improving the accuracy of time synchronization between the controller kernels.

[0009] In some embodiments, the first kernel is configured with a first task, which, when the first task is scheduled to be executed by the controller's operating system, is used to update the received global time into shared memory.

[0010] In some embodiments, the first task is a periodic task, which is triggered by the operating system to execute once at preset intervals.

[0011] In some embodiments, the first task is used to trigger a runnable entity of a first software component in a first kernel, such that the runnable entity of the first software component stores global time in shared memory.

[0012] In some embodiments, the runnable entity of the first software component is used to call the application interface in the runtime environment layer to send the global time to shared memory.

[0013] In some embodiments, the runnable entity of the first software component is used to call the data sending interface in the runtime environment layer to send the global time to shared memory.

[0014] In some embodiments, the time synchronization operation specifically involves: a first kernel sending a data storage notification to the operating system; the data storage notification being used to update the global time via the first kernel of the operating system; and the operating system responding to the data storage notification by scheduling a second task configured in a second kernel, the second task being used to obtain the global time from shared memory.

[0015] In some embodiments, the second task is used to trigger a runnable entity of the second software component in the second kernel, such that the runnable entity of the second software component obtains global time from shared memory.

[0016] In some embodiments, the runnable entity of the second software component is used to invoke the application interface in the runtime environment layer to receive global time from shared memory.

[0017] In some embodiments, the runnable entity of the second software component is used to invoke the data receiving interface in the runtime environment layer to receive global time from shared memory.

[0018] In some embodiments, shared memory is a cross-operating system application communication cache or a cross-operating system application communication channel.

[0019] In some embodiments, after obtaining the global time from the shared memory of the first kernel and the second kernel, the method further includes: the second kernel, in response to the received time acquisition instruction, determining the real-time global time based on the global time and the local system time, and sending the real-time global time to downstream nodes, wherein the time acquisition instruction is sent by the downstream node for obtaining the real-time global time.

[0020] In some embodiments, the local system time includes a first local system time and a second local system time; the first local system time is the local system time at which the second kernel obtains the global time; the second local system time is the local system time at which the second kernel obtains the time acquisition instruction; the second kernel determines the real-time global time based on the global time and the local system time, including: the second kernel determines the real-time global time based on the global time, the first local system time and the second local system time.

[0021] In some embodiments, the real-time global time is the sum of the differences between the global time and the local system time, and the local system time difference is the difference between the second local system time and the first local system time.

[0022] In some embodiments, the second kernel includes a first cache and a second cache; the first cache and the second cache are used to alternately store the global time.

[0023] In some embodiments, after obtaining the global time from shared memory, the method further includes: a second kernel storing the global time to a non-target cache based on a storage identifier, wherein the storage identifier is used to identify the target cache in the first cache and the second cache for the most recent storage of the global time, and the non-target cache is another cache in the first cache and the second cache besides the target cache.

[0024] In some embodiments, the second kernel stores the global time to a non-target cache based on a storage identifier, including: when the storage identifier is a first identifier, the second kernel stores the global time to a first cache, where the first identifier is used to identify the target cache for the most recent storage of the global time as the second cache; or, when the storage identifier is a second identifier, the second kernel stores the global time to a second cache, where the second identifier is used to identify the target cache for the most recent storage of the global time as the first cache.

[0025] In some embodiments, the method further includes: the second kernel updating the storage identifier when the global time is stored in a non-target cache.

[0026] In some embodiments, when the second kernel stores the global time in a non-target cache, updating the storage identifier includes: when the second kernel stores the global time in a first cache, updating the storage identifier from a first identifier to a second identifier; or,

[0027] When the second kernel stores the global time in the second cache, it updates the storage identifier from the second identifier to the first identifier.

[0028] In some embodiments, the method further includes: a second kernel reading the global time from the target cache based on a storage identifier.

[0029] In some embodiments, the second kernel reads the global time from the target cache based on a storage identifier, including: if the storage identifier is a first identifier, the second kernel reads the global time from the second cache; the first identifier is used to identify the target cache where the most recent global time was stored as the second cache; or, if the storage identifier is a second identifier, the second kernel reads the global time from the second cache, the second identifier is used to identify the target cache where the most recent global time was stored as the first cache.

[0030] In some embodiments, the number of second kernels is multiple.

[0031] Secondly, embodiments of this application provide an electronic device, including a processor and a memory, wherein the processor is connected to the memory, and the memory stores computer instructions. When the computer instructions are executed on the electronic device, the electronic device causes the electronic device to perform the method provided in the first aspect and its possible implementations.

[0032] Thirdly, embodiments of this application provide a computer-readable storage medium storing computer-executable instructions that, when executed on a computer, cause the computer to perform the method provided by the first aspect and its possible implementations.

[0033] Fourthly, embodiments of this application provide a vehicle, including: a controller for performing the method provided by the first aspect and its possible implementations; or, an electronic device provided by the second aspect; or, a computer-readable storage medium provided by the third aspect.

[0034] Fifthly, embodiments of this application provide a computer program product, which includes instructions. When the instructions are executed on a computer, the computer performs the method provided by the first aspect and its possible implementations.

[0035] The technical effects of any of the implementation methods in the second to fifth aspects mentioned above can be found in the technical effects of the corresponding implementation methods in the first aspect, and will not be repeated here. Attached Figure Description

[0036] Figure 1 A schematic diagram of a time transfer process provided in related technologies. Figure 1 ;

[0037] Figure 2 A schematic diagram of a time transfer process provided in related technologies. Figure 2 ;

[0038] Figure 3 A schematic diagram of a time transfer process provided in related technologies. Figure 3 ;

[0039] Figure 4 This is a schematic diagram of the structure of a controller provided in an embodiment of this application;

[0040] Figure 5 A method flow for a time synchronization method provided in this application embodiment Figure 1 ;

[0041] Figure 6 A schematic diagram of the software architecture of a controller provided in an embodiment of this application;

[0042] Figure 7 A flowchart illustrating a time synchronization method provided in this application embodiment. Figure 1 ;

[0043] Figure 8 A method flow for a time synchronization method provided in this application embodiment Figure 2 ;

[0044] Figure 9 A flowchart illustrating a time synchronization method provided in this application embodiment. Figure 2 ;

[0045] Figure 10 This application provides a schematic diagram of a process for storing global time in a cache.

[0046] Figure 11 This is a schematic diagram of the structure of an electronic device provided in an embodiment of this application. Detailed Implementation

[0047] The embodiments of the present invention will now be described in detail with reference to the accompanying drawings.

[0048] In the description of this invention, it should be understood that the terms "center", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are only for the convenience of describing this invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this invention.

[0049] The terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of this invention, unless otherwise stated, "a plurality of" means two or more.

[0050] In the description of this invention, it should be noted that, unless otherwise explicitly specified and limited, the terms "installation," "connection," and "linking" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; and they can refer to the internal connection of two components. Those skilled in the art can understand the specific meaning of the above terms in this invention based on the specific circumstances. Furthermore, when describing pipelines or channels, the terms "connection" and "linking" used in this application have the meaning of establishing electrical conductivity. The specific meaning needs to be understood in conjunction with the context.

[0051] In the embodiments of this application, the words "exemplarily" or "for example" are used to indicate examples, illustrations, or explanations. Any embodiment or design described as "exemplarily" or "for example" in the embodiments of this application should not be construed as being more preferred or advantageous than other embodiments or design solutions. Specifically, the use of the words "exemplarily" or "for example" is intended to present the relevant concepts in a specific manner.

[0052] As described in the background section, intelligent driving systems need to perceive the surrounding environment in real time, identify obstacles, plan paths, and autonomously control the vehicle based on real-time data.

[0053] Automotive Time-Sensitive Networking (TSN) is a time-sensitive networking technology designed to support real-time data transmission, ensuring the reliability, stability, and real-time performance of data within the network. It is a next-generation network technology evolved from the standard Ethernet architecture, using traditional Ethernet as its network foundation and providing deterministic data transmission capabilities through mechanisms such as clock synchronization, data scheduling, and network configuration.

[0054] TSN technology, by providing precise mechanisms such as traffic scheduling and priority control, can ensure the real-time performance, reliability, and stability of data, thereby meeting the high requirements of intelligent driving systems for data transmission.

[0055] The typical implementation of TSN technology involves obtaining a clock source to provide timing information to the controller, which then transmits it to each sensor. This implementation method already has established standards (such as IEEE 802.1AS, Precision Time Protocol PTP, etc.) or solutions to ensure the reliability of time transmission, and this application will not elaborate further on this.

[0056] The clock source can be a specific device in the network, such as a clock server, which provides accurate time information. The controller is responsible for receiving the time information from the clock source and transmitting it to other devices in the network, such as sensors. Sensors: Sensors receive time information from the controller and synchronize their time based on this information.

[0057] In practical applications, considering constraints such as controller resources, processing power, and the overall layout and decoupling of the CAN / ETH system, multiple cores are typically placed within the controller's microcontroller unit (MCU). Figure 1 As shown, the MCU can be configured with multiple cores such as Core0, Core1, and Core2.

[0058] In this scenario, the Eth processing logic would be distributed across one of the multiple cores (e.g., Figure 1 On Core0 (as shown), this allows Core0 to focus on handling Ethernet communication, fully utilizing its processing power and resources. It reduces interference between Ethernet communication and other tasks, improving communication stability and reliability. It also facilitates unified management and optimization of Ethernet communication, such as flow control, error detection and correction.

[0059] CAN processing logic is arranged in other kernels (such as...) Figure 1 As shown in the Core1 diagram, this allows Core1 to focus on processing sensor data on the CAN bus, ensuring data real-time performance and accuracy. It also reduces resource contention and interference between CAN and Ethernet communication. Furthermore, it facilitates independent configuration and optimization of CAN communication, such as baud rate settings and data frame formats.

[0060] In this way, as Figure 1As shown, the time transfer process is as follows: the clock source sends the time to the SoC, the SoC transfers the time to Core0 through the Switch, Core0 and Core1 transfer the time between each other, and Core1 then transfers the time to the CAN sensor.

[0061] For example, please refer to Figure 2 The process of transmitting time information in related technologies is as follows: Figure 2 As shown. Since Core0 is used to execute Eth processing logic, it typically includes the Ethlf module and the EthTsyn module. The EthTsyn / StbM module in Core0 is used to receive time information from the clock source, such as... Figure 2 The uplink Eth clock source shown is used by Core0 to store the received time information in the RTE. It should be understood that the RTE is used to support communication between software components, between basic software components, and between software components and basic software components within the AUTOSAR operating system.

[0062] Core1 is used to execute CAN processing logic. Therefore, Core1 includes the CANlf module and the CANTsyn module. After obtaining time information through RTE, Core1 uses the time information as a downlink CAN timestamp and sends it to other downstream CAN devices.

[0063] For example, please refer to Figure 3 In related technologies, the process of time transfer between Core0 and Core1 within the MCU is as follows: Figure 3 As shown in the diagram, a global variable `g_variable` is defined in related technologies and stored in shared memory. Core0 updates this `g_variable` variable using the real-time global time `Globaltime` cyclically at a minimum scheduling period (usually 1ms), that is, it stores the global time `Globaltime` in shared memory every 1ms. Core1 can obtain the time parameter by accessing the global variable `g_variable` in shared memory.

[0064] In this scheme, Core0 updates the global time variable at a fixed interval, but Core1 reads this time variable randomly, without synchronization with Core0's update operation. That is, in a multi-core processor environment, this scheme results in asynchronous scheduling of cross-core tasks, causing the time to not be updated synchronously in real time. Due to the asynchronous scheduling between Core0 and Core1, when Core1 reads the global time variable, it may not be at the time Core0 has just updated. This time mismatch can lead to errors, with the maximum error potentially reaching 1ms.

[0065] In related technologies, to avoid significant accuracy loss, an average error of 500µs is added to the time acquisition on Core1 for accuracy compensation. The final calculation formula for the time acquired on Core1 is: Core1_Globaltime = g_variable + 500µs. While this method can correct for errors introduced by asynchronous scheduling to some extent, adding 500µs as a fixed compensation value is based on an error estimate under average conditions. However, a fixed compensation value may not accurately reflect the actual error situation. Therefore, the time acquired on Core1 still contains a certain degree of error.

[0066] Based on this, this application provides a time synchronization method applied to a controller, which includes a first kernel and a second kernel. In this time synchronization method, the second kernel, in response to a time synchronization operation, obtains the global time from the shared memory of the first and second kernels; wherein, the time synchronization operation is triggered when the first kernel updates the global time in the shared memory. That is, the time synchronization operation is triggered when the first kernel stores the received global time in the shared memory; the second kernel, in response to the time synchronization operation, obtains the global time from the shared memory. It is understood that shared memory is an efficient inter-process communication method that allows different processors or kernels to directly access the same memory region, thereby achieving fast data exchange.

[0067] As can be seen, in the time synchronization method provided in this application, the second kernel responds to the time synchronization operation by obtaining the global time from the shared memory of the first and second kernels. The time synchronization operation is triggered when the first kernel updates the global time in the shared memory. That is, after the first kernel updates the global time in the shared memory, it triggers the time synchronization operation, allowing the second kernel to immediately obtain the latest global time from the shared memory. It should be understood that due to the highly efficient communication mechanism between kernels, the latency between the first kernel triggering the time synchronization operation and the second kernel receiving it is usually very short, almost negligible. Therefore, in the scheme of this application, after the first kernel successfully stores the global time, the second kernel can read the global time immediately, thereby ensuring the consistency of the global time in the first and second kernels, which improves the accuracy of time synchronization between the controller kernels.

[0068] It should be understood that in some embodiments, the controller in the embodiments of this application is a control component with multiple processor cores. In practical applications, the controller can be a CPU, microcontroller (MCU), single-chip microcomputer, or other control component in a vehicle. The embodiments of this application do not limit this.

[0069] For example, please refer to Figure 4The controller in this application embodiment may include a first core Core0 and a second core Core1.

[0070] It should be understood that Figure 4 This example only illustrates the case where the controller includes a second core, Core1. In actual applications, the number of second cores can be determined based on the specific circumstances. That is, there can be one or more second cores.

[0071] In some embodiments, Core0 is used to execute Eth processing logic, including the EthTsyn module, the Gtime module, and application software (Application, APP). The EthTsyn module is used to receive global time, the Gtime module is used to send global time to Core1, and the APP is used to perform specific tasks or provide specific services.

[0072] In some embodiments, the second core, Core1, is used to execute CAN processing logic, including the CANTsyn module, for interacting with devices such as sensors. Figure 4 As shown, the second kernel also includes a cache, a time acquisition interface, and an application. The cache is used to store the global time, the time acquisition interface is used to implement the transmission of the global time between the cache and the CANTsyn module, and the application is used to perform specific tasks or provide specific services.

[0073] As a feasible implementation, the cache in the second kernel includes cache A and cache B, which are used to alternately store the global time.

[0074] In some embodiments, such as Figure 4 As shown, the controller can include a System on Chip (SoC) and an MCU, with Core0 and Core1 being cores within the MCU. The SoC receives the global time from the clock source, processes it via the gPTP protocol, and then sends it to the EthTsyn module in Core0.

[0075] It should be understood that Figure 4 The controller structure shown is not a limitation. In actual applications, the internal components and module division of the controller can be set according to requirements.

[0076] In some embodiments, the controller may run the AUTOSAR (Automotive Open System Architecture) operating system, which is an operating system environment under the AUTOSAR architecture. The AUTOSAR architecture is an open standard software architecture for automotive controllers (ECUs). It aims to improve the development efficiency and reliability of automotive electronic control systems by providing a standardized software architecture.

[0077] The AUTOSAR architecture is mainly divided into three layers: the Application Layer (APPL), the Runtime Environment (RTE), and the Basic Software Layer (BSW). Among them, the relevant components of the protocol layer are mainly located in the Basic Software Layer.

[0078] The Application Software Layer (APPL) primarily stores user-defined code that implements specific functionalities. The runtime environment layer provides the resources required by the application layer and isolates it from the underlying software, ensuring that the application layer code runs in a standardized environment. The base software layer encapsulates the hardware and provides standardized system service interfaces that upper-layer software can call.

[0079] The AUTOSAR protocol layer provides standardized communication interfaces and protocol stacks, enabling interoperability between automotive electronic control systems from different manufacturers. The protocol layer is divided into multiple modules, each performing a specific function; this modular design makes the system more flexible and easier to maintain. The AUTOSAR protocol layer supports various bus protocols and communication methods, and can be expanded and customized as needed.

[0080] The time synchronization method provided in this application includes: a second kernel, in response to a time synchronization operation, obtaining a global time from the shared memory of the first and second kernels. The time synchronization operation is triggered when the first kernel updates the global time in the shared memory.

[0081] It should be understood that the first kernel communicates with the clock source and can obtain the global time from the clock source. The clock source can be a specific device in the network, such as a clock server, GNSS atomic time, NTP (Network Time Protocol) time, etc., to provide accurate time information for the vehicle.

[0082] Communication between the first and second kernels requires shared memory. Shared memory is an efficient inter-process communication method that allows multiple kernels to directly access the same memory region, thereby enabling data exchange between kernels. Shared memory can ensure data consistency across different kernels through cache coherency protocols (such as MESI or its variants). This hardware-level support significantly reduces the complexity of software implementation and improves the overall system performance.

[0083] Therefore, after obtaining the global time from the clock source, the first kernel can store the global time in shared memory so that the second kernel can retrieve it from the shared memory. This triggers a time synchronization operation, causing the second kernel to respond by retrieving the global time from the shared memory of the first and second kernels.

[0084] In this embodiment of the application, since the first kernel and the second kernel are two independent kernels, after the first kernel stores the global time in the shared memory, it needs to trigger a time synchronization operation so that the second kernel can obtain the global time from the shared memory.

[0085] As a feasible implementation method, the time synchronization operation can be specifically as follows: the first kernel sends a data storage notification to the operating system; the data storage notification is used to inform the operating system that the first memory has successfully updated the global time; the operating system, in response to the data storage notification, schedules a second task configured in the second kernel. The second task is used to obtain the global time from shared memory.

[0086] In other words, after the first kernel stores the global time in shared memory, it will trigger a data storage notification and send it to the operating system. After receiving the data storage notification, the operating system will determine that the first kernel has successfully stored the global time and schedule the second task in the second kernel so that the second kernel can obtain the global time from the shared memory after the second task is executed.

[0087] As can be seen, in the time synchronization method provided in this application, the second kernel responds to the time synchronization operation by obtaining the global time from the shared memory of the first and second kernels. The time synchronization operation is triggered when the first kernel updates the global time in the shared memory. That is, after the first kernel updates the global time in the shared memory, it triggers the time synchronization operation, allowing the second kernel to immediately obtain the latest global time from the shared memory. It should be understood that due to the highly efficient communication mechanism between kernels, the latency between the first kernel triggering the time synchronization instruction and the second kernel receiving the instruction is usually very short, almost negligible. Therefore, in the scheme of this application, after the first kernel successfully stores the global time, the second kernel can read the global time immediately, thereby ensuring the consistency of the global time in the first and second kernels, which improves the accuracy of time synchronization between the controller kernels.

[0088] In some embodiments, please refer to Figure 5 The time synchronization method provided in this application includes the following steps S101-S102:

[0089] S101, the first kernel stores the received global time in shared memory and triggers a time synchronization operation.

[0090] As a feasible implementation, S101 includes: a first task in the first kernel is triggered to execute, and the first task is used to store the received global time into shared memory.

[0091] Understandably, in a multi-core environment, the operating system ensures the correct allocation and scheduling of tasks between the first and second kernels. The operating system plays a crucial role in managing and coordinating hardware and software resources. Task scheduling (or process scheduling) is one of the primary responsibilities of the operating system kernel; it determines which task (or process, thread) will receive CPU resources and when to execute. Effective task scheduling strategies can significantly improve system efficiency and responsiveness. In other words, the operating system provides security and isolation mechanisms to ensure that tasks across different kernels do not interfere with each other. The operating system is responsible for synchronizing kernel tasks to ensure they execute in the correct order and timing.

[0092] As a feasible implementation method, the operating system can be the AUTOSAR operating system. AUTOSAR is an open and standardized automotive software architecture that provides a unified software interface and communication mechanism for the vehicle's ECU (Electronic Control Unit).

[0093] When the operating system scheduler selects the first task, the first task configured in the first kernel is triggered for execution. The operating system saves the state of the currently running task (if any) to a kernel data structure. Then, the scheduler loads the state of the first task into the CPU and begins execution. After the first task runs, it can store the global time in shared memory.

[0094] In some embodiments, the kernel may contain one or more software components (SWCs). A software component is an independent, reusable software module with specific functions and interfaces. In this embodiment, the software component in the first kernel that participates in time synchronization can be referred to as the first software component, hereinafter denoted as SWC-A. Similarly, the software component in the second kernel that participates in time synchronization can be referred to as the second software component, hereinafter denoted as SWC-B.

[0095] Each software component typically contains one or more runnable entities, which are execution units within the software component and are usually mapped to and executed within the operating system's tasks.

[0096] As a feasible implementation, the first task is used to trigger the runnable entity of SWC-A in the first kernel, so that the runnable entity of SWC-A stores the global time in shared memory.

[0097] In some embodiments, the executable entity can communicate with the underlying software layer through the API provided by the RTE layer to perform functions such as sending and receiving data and managing state.

[0098] As one feasible implementation, the runnable entity of the first software component is used to call the API in the RTE layer to send the global time to shared memory.

[0099] S102, the second kernel, responds to the time synchronization operation by obtaining the global time from shared memory.

[0100] As a feasible implementation, after the second task starts executing, the runnable entity of SWC-B in the second kernel is triggered, so that the runnable entity of SWC-B obtains the global time from shared memory.

[0101] Furthermore, as a feasible implementation, the runnable entity of the second software component is used to call the API in the RTE layer to obtain global time from shared memory.

[0102] It should be understood that the descriptions of SWC-B, runnable entities, RTE layers, etc. in the second kernel can be referred to the above embodiments, and will not be repeated here.

[0103] As one feasible implementation, the runnable entity of the second software component is used to send the global time to shared memory via a data receiving interface.

[0104] In some embodiments of this application, the controller uses the AUTOSAR operating system, and the communication between multiple kernels adopts the Inter-OS Application Communication (IOC) communication method to ensure the consistency of data reading and writing between multiple kernels. It should be understood that IOC allows secure and type-safe data transmission between different OS applications (APPs), or between kernels in a multi-core environment.

[0105] As a feasible implementation method, shared memory can be used as an IOC cache or IOC channel.

[0106] The IOC cache is a temporary area used to store data to be transmitted. When communicating across operating systems or applications, data may need to be written to the cache first, and then read from the cache and transmitted to the target operating system or application. The IOC cache is designed to improve data transmission efficiency by reducing the number of data copies and context switches, thereby reducing communication latency.

[0107] An IOC channel is a communication path connecting different operating systems or applications. It is responsible for data transmission and synchronization, ensuring that data is delivered between the sender and receiver in a predetermined manner and order. IOC channels are designed to provide an efficient, reliable, and secure communication mechanism to meet the needs of cross-operating system or cross-application communication.

[0108] In some embodiments of the AUTOSAR system, the implementation of the IOC is typically handled jointly by the Runtime Environment (RTE) and the OS. Users only need to configure the port interface of the SWC (Software Component) for mapping; the implementation of the IOC is automatically handled by the RTE / OS, requiring no additional user intervention.

[0109] For example, as one feasible implementation method, please refer to Figure 6In the embodiments of this application, the controller includes at least two independently running kernels, Core0 (first kernel) and Core1 (second kernel). Core0 and Core1 have an IOC buffer (shared memory) to act as a data buffer between Core0 and Core1, allowing data to be transferred safely and efficiently between the two kernels.

[0110] Please continue reading. Figure 6 Software component SWC-A on Core0 and software component SWC-B on Core1 communicate via the Sender-Receiver interface. SWC-A stores the global time in shared memory through the Sender (data sending) interface, and SWC-B reads the global time from shared memory through the Receiver (data receiving) interface. Runnable entities within SWC-A run in Task1 of Core0, and runnable entities within SWC-B run in Task2 of Core1.

[0111] It should be understood that, in this embodiment of the application, for ease of description, the time storage task (first task) in the first kernel is designated as Task1, and the time reading task (second task) in the second kernel is designated as Task2. That is, when the first kernel needs to store the global time in shared memory, Task1 needs to be called; when the second kernel needs to read the global time from shared memory, Task2 needs to be called.

[0112] Please continue reading. Figure 6 When the global time in Core0 needs to be transmitted to Core1, the operating system will first schedule Task1 of Core0 to run, triggering the runnable entity (RE) of SWC-A. The runnable entity calls the application programming interface (API) responsible for data communication in the RTE layer, so that the sender interface in the API updates the global time to be sent by SWC-A to the buffer cache of IOC.

[0113] When the controller's operating system schedules Task2 to run, Task2 will call the runnable entity of SWC-B. The runnable entity will call the Receiver interface in the RTE layer to update the global time in the IOC's buffer to SWC-B, thus completing the cross-core data transmission based on IOC.

[0114] The solution proposed in this application integrates the code and deploys it on the application SWC. While meeting the requirements of the AUTOSAR layered architecture, it achieves higher time synchronization accuracy and avoids the accuracy loss caused by asynchronous scheduling of MCU multi-cores, thereby improving the accuracy of time synchronization.

[0115] In some embodiments, the first kernel typically includes only a few software components, which are the basic units that make up a software system. These components are usually designed as reusable and replaceable modules for integration and deployment across different software systems. The operation of each software component requires control and management by the operating system.

[0116] As one feasible approach, please refer to Figure 7 The controller provided in this application performs the following steps during time synchronization:

[0117] S601, the operating system schedules Task1 in the first kernel to begin execution.

[0118] Because time storage operations involve access to global time and hardware devices, the AUTOSAR operating system manages permissions for these operations. Under certain conditions, AUTOSAR schedules Task1 in the first kernel to run.

[0119] S602, the first task is executed, and the obtained global time is stored in shared memory.

[0120] Specifically, as a feasible implementation method, after the first kernel scheduler Task1 runs, it triggers the runnable entity of SWC-A. The runnable entity calls the Sender interface responsible for data communication in the RTE layer to update the global time to be sent by SWC-A to the IOC buffer cache.

[0121] S603, the first kernel sends a data storage notification to the operating system.

[0122] As a feasible implementation method, the RTE layer function in the first kernel will trigger a notification to the operating system after storing the global time, that is, send a data storage notification to the operating system.

[0123] S604, the operating system schedules Task2 in the second kernel to begin execution.

[0124] After receiving the notification from the first kernel, the operating system needs to schedule Task2 in the second kernel to start execution so that the second kernel can obtain the global time.

[0125] The S605 and the second kernel obtain the global time from shared memory.

[0126] Specifically, as a feasible implementation, Task2 will call the runnable entity of SWC-B. The runnable entity will call the RTEReceiver interface to update the global time in the IOC's buffer to SWC-B, thus enabling the second kernel to obtain and update the global time.

[0127] In some embodiments, to improve the accuracy of the global time obtained within the controller, the first kernel typically needs to continuously obtain the global time from the clock source and update it in shared memory. This ensures that all components that depend on the global time receive accurate time information.

[0128] As a feasible implementation method, the first task is a periodic task, which is triggered by the operating system once every preset time interval.

[0129] In other words, the operating system schedules the first task in the first kernel to start execution at preset intervals.

[0130] It should be understood that the preset time can be pre-set by the system, and can be determined according to requirements in actual application. For example, as a feasible implementation method, the preset time can be 1ms.

[0131] The first task in the first kernel is triggered and executed once at a preset time interval, causing the first kernel to store the global time in shared memory at the preset time interval. Therefore, the first task can also be called a periodically triggered task.

[0132] It is understandable that the first task is a periodic task, while the second task requires time-synchronized operation to trigger, so the second task can be called an event-based task.

[0133] In some embodiments, after obtaining the global time, the second kernel can send it to downstream nodes connected to it, such as various sensors and application software in a vehicle. However, if the second kernel sends the global time immediately after obtaining it, and the downstream node is not yet ready to receive or process the time information, the transmission will be invalid, and may even cause processing burden or data conflicts for the downstream node. Therefore, the second kernel needs to wait for a request from the downstream node before sending the time information, which ensures that the data transmission is targeted and effective, avoiding unnecessary data transmission and potential conflicts.

[0134] However, the process by which downstream nodes obtain the global time is random. The time interval between when the second kernel obtains the global time and when it sends the global time to the downstream node can be called local latency. Since downstream nodes may access and obtain the time at any time, if the second kernel directly sends the obtained global time to the downstream node, the local latency problem still exists.

[0135] Based on this, as a feasible implementation method, please refer to Figure 8 Following S102, the time synchronization method provided in this application embodiment further includes: a second kernel, in response to receiving a time acquisition instruction, determines a real-time global time based on the global time and the local system time, and sends the real-time global time to downstream nodes. The time acquisition instruction is sent by the downstream node and is used to acquire the real-time global time.

[0136] As a feasible implementation, the second kernel can be associated with a hardware-level counter as an on-core local system clock, and then record the local system time through the local system clock.

[0137] Specifically, as a feasible implementation, the local system time includes a first local system time and a second local system time; the first local system time is the local system time obtained by the second kernel from the global time; the second local system time is the local system time obtained by the second kernel from the time acquisition instruction.

[0138] In other words, after obtaining the global time, the second kernel records the first local time, and upon receiving a time acquisition command from a downstream node, it records the second local time. The second kernel can then determine the real-time global time based on the second local time, the second local time, and the global time.

[0139] For details, please refer to Figure 8 The second kernel can determine the real-time global time through the following steps:

[0140] S701 and the second kernel determine the first local system time obtained from the global time.

[0141] S702, the second kernel, responds to the received time acquisition command and determines the second local system time.

[0142] When a downstream node needs global time, it will proactively send a time acquisition command to the second kernel to obtain time information. It should be understood that downstream nodes can be sensors such as radar devices or image acquisition devices in a vehicle; this embodiment does not limit this.

[0143] When the second kernel receives a time acquisition command, since the global time in the second kernel is not actually the real-time global time, but the global time stored in the first kernel, in order to avoid the time obtained by downstream nodes from not matching the real-time global time, the second kernel needs to determine the real-time global time based on the global time and its own recorded local system time.

[0144] The method by which the second kernel determines the second local system time can be referred to the above embodiments, and will not be repeated here.

[0145] The S703 and the second kernel determine the real-time global time based on the global time, the first local system time, and the second local system time.

[0146] As a feasible implementation method, the real-time global time is the sum of the differences between the global time and the local system time, and the local system time difference is the difference between the second local system time and the first local system time.

[0147] In other words, the difference between the second local system time and the first local system time is first determined to obtain the local system time difference. It should be understood that the local system time difference is the local latency in the second kernel. Then, the real-time global time is set to the sum of the global time and the local system time difference. The global time obtained by the second kernel is corrected using the local system time latency in the second kernel, and the resulting real-time global time is the time when the downstream node sends the time acquisition command, which is more accurate than the global time.

[0148] S704, the second kernel sends the real-time global time to downstream nodes.

[0149] After obtaining the accurate real-time global time, the second kernel sends the real-time global time to downstream nodes, enabling downstream nodes to perform data identification or feedback responses based on the real-time global time, thus providing downstream nodes with more accurate time.

[0150] For example, please refer to Figure 9 The time synchronization method provided in this application embodiment involves a first kernel storing a global time T0 into shared memory at preset intervals. After the first kernel stores T0, the second kernel retrieves T0 from the shared memory and records the current local system time t1. Upon receiving a time retrieval instruction from a downstream node, the second kernel records the current local system time t2, determines the real-time global time T based on T0, t1, and t2, and sends T to the downstream node.

[0151] Compared with solutions in related technologies, the solution provided in this application better meets the requirements of AUTOSAR software architecture IOC inter-core interaction. Furthermore, by establishing a service-based communication link using the standard SWC interface, the time processing accuracy on the MCU side can be improved by approximately 300µs. For time-sensitive sensors, the data feedback time is closer to the actual acquisition time, which directly affects the effectiveness and safety of intelligent driving function response.

[0152] In summary, the time synchronization method provided in this application can reduce the unconventional expected error introduced by time processing within the controller, significantly reduce time transmission delay, provide higher accuracy for sensor data recognition and feedback response, and offer advantages for the accurate implementation of upper-level data fusion and decision control in intelligent driving.

[0153] In some embodiments, when downstream nodes obtain the global time through the second kernel, data races and consistency issues may arise due to the lack of spinlock and interrupt lock protection. Specifically, event-driven tasks where the second kernel retrieves the global time from shared memory may occur simultaneously with downstream nodes retrieving the global time from the second kernel. This can cause one of the operations / tasks to be interrupted. The uninterrupted task / operation will then re-execute the interrupted one, leading to timestamp read errors and subsequent timestamp jumps. It can be seen that this problem arises from a half-read / write state of the global time; that is, the second kernel simultaneously stores the global time in its own memory and reads it from memory.

[0154] Based on this, embodiments of this application provide a scheme for allocating A / B dual cache in the global area of ​​Random Access Memory (RAM) to circumvent this problem. It should be understood that the global area of ​​RAM is a specific region in memory used to store global variables and static variables. The global time in this application can be considered as a global variable.

[0155] Specifically, as a feasible implementation, the second kernel includes a first cache and a second cache; the first cache and the second cache are used to alternately store the global time.

[0156] For example, as a feasible implementation, during the global time update process, the first buffer is initially used to store the latest global time data. When data in the first buffer is processed (e.g., read or used for computation), it can be marked as "processing" or "processed".

[0157] While the first buffer is being processed, the second buffer is used to receive new global time data. Once the data in the first buffer has been processed, the data in the second buffer can be read or used for subsequent calculations. At the same time, the first buffer is reused to receive new global time data, while the second buffer enters a "processing" state.

[0158] As another feasible implementation, a storage identifier can be set in the second kernel. This identifier is used to identify the target cache for the most recent storage of the global time in both the first and second caches. Then, after reading the global time from shared memory, the second kernel determines whether to store the global time in a non-target cache based on the storage identifier.

[0159] It should be understood that the target cache is the cache that most recently stored the global time, and the non-target cache is the other cache besides the target cache in the first and second caches.

[0160] That is, after obtaining the global time in the shared memory of the second kernel, the time synchronization method provided in this application embodiment further includes: the second kernel storing the global time to a non-target cache based on the storage identifier.

[0161] Specifically, the storage identifier can be a first identifier or a second identifier, wherein the first identifier is used to identify the target cache area for the most recent storage of global time as the second cache area, and the second identifier is used to identify the target cache area for the most recent storage of global time as the first cache area.

[0162] Based on this, in some embodiments, when the storage identifier is the first identifier, the second kernel stores the global time in the first cache based on the storage identifier being the first identifier.

[0163] In other embodiments, when the storage identifier is the second identifier, the second kernel stores the global time in the second cache based on the storage identifier being the second identifier.

[0164] In some embodiments, in order to enable alternating storage between the two caches, the storage identifier can be updated if the global time is successfully stored, so that the global time can be stored next time.

[0165] As a feasible implementation method, the method provided in this application embodiment further includes: the second kernel updating the storage identifier when storing the global time to a non-target cache.

[0166] Specifically, as one implementation, the second kernel, when storing the global time in the first cache, updates the storage identifier from the first identifier to the second identifier; or,

[0167] As an alternative implementation, the second kernel updates the storage identifier from the second identifier to the first identifier when storing the global time in the second cache.

[0168] When the storage identifier is the first identifier, the solution provided in this embodiment shows the following process for the second kernel to store the global time: After receiving a time synchronization operation, the second kernel reads the global time from the shared memory; based on the first identifier, it stores the global time into the first cache and changes the first identifier to the second identifier; after receiving a new time synchronization operation, the second kernel reads the new global time from the shared memory; based on the second identifier, it stores the global time into the second cache and changes the second identifier to the first identifier.

[0169] For example, as a feasible implementation method, such as Figure 10 As shown, the first identifier can be 0, and the second identifier can be 1. When the global time needs to be stored in the cache, the second kernel needs to determine the state of the storage identifier. When the storage identifier is 0, the global time is written to the first cache, and the storage identifier is set to 1; when the storage identifier is 1, the global time is written to the second cache, and the storage identifier is set to 0.

[0170] As can be seen, the solution provided in this embodiment, by alternately using two buffers, ensures that global time updates and processing do not interfere with each other. While one buffer is being processed, the other buffer can continue to receive new data. This reduces waiting time and improves system response speed. Furthermore, the dual-buffer mechanism ensures that data contention or inconsistency does not occur during data updates and processing. This helps maintain system stability and reliability.

[0171] In some embodiments, when the second kernel employs a dual-buffer mechanism, the global time needs to be read from one of the two buffers when it is necessary to use the global time in the buffer to determine the real-time global time.

[0172] As a feasible implementation method, the method provided in this application embodiment further includes: the second kernel reading the global time from the target cache based on the storage identifier.

[0173] The storage identifier is used to identify the target cache area where the global time was most recently stored in the first cache area and the second cache area. Therefore, when the global time needs to be read, it is read from the target cache area where the global time was most recently stored, which can ensure the accuracy of the global time.

[0174] It is understood that when it is necessary to determine the real-time global time in the above embodiments, the second kernel needs to read the global time from the cache. That is, in the above embodiments, the second kernel determines the real-time global time based on the global time, the first local system time and the second local system time. Specifically, the second kernel reads the global time from the target cache based on the storage identifier; the second kernel determines the real-time global time based on the read global time, the first local system time and the second local system time.

[0175] Furthermore, since the storage identifier was changed after the global time was stored in the cache corresponding to the storage identifier in the above embodiment, when reading the global time, it is necessary to read it from another cache outside the cache corresponding to the current storage identifier.

[0176] Specifically, as a feasible implementation, the second kernel reads the global time from the first cache or the second cache based on the storage identifier, including: the second kernel reads the global time from the second cache when the storage identifier is the first identifier; or, the second kernel reads the global time from the second cache when the storage identifier is the second identifier.

[0177] In other words, when the storage identifier is the first identifier, since the first identifier corresponds to the first cache area, the storage identifier has changed from the second identifier to the first identifier because the global time has just been stored in the second cache area. Therefore, it is necessary to read the global time from the second cache area.

[0178] When the storage identifier is the second identifier, since the second identifier corresponds to the second cache area, the storage identifier has changed from the first identifier to the second identifier because the global time has just been stored in the first cache area. Therefore, it is necessary to read the global time from the first cache area.

[0179] As can be seen, a single-caching mechanism may encounter data overwriting or loss issues during data writing and reading. The dual-caching mechanism in this application, by alternately using two caches, ensures that while data is being read from one cache, new data is being written to the other, thus avoiding the risk of data overwriting and loss.

[0180] This application embodiment can, according to the above method, exemplarily divide a controller or electronic device into functional modules. For example, the controller or electronic device may include functional modules corresponding to each functional division, or two or more functions may be integrated into one processing module. The integrated module can be implemented in hardware or as a software functional module. It should be noted that the module division in this application embodiment is illustrative and only represents one logical functional division; in actual implementation, there may be other division methods.

[0181] This application also provides a controller, which includes a first kernel and a second kernel.

[0182] The second kernel is used to obtain the global time from the shared memory of the first and second kernels in response to a time synchronization operation; the time synchronization operation is triggered when the first kernel updates the global time in the shared memory.

[0183] In some embodiments, the number of second kernels is multiple.

[0184] In some embodiments, the first kernel is configured with a first task, which, when the first task is scheduled to be executed by the controller's operating system, is used to update the received global time into shared memory.

[0185] In some embodiments, the first task is a periodic task, which is triggered by the operating system to execute once at preset intervals.

[0186] In some embodiments, the first task is used to trigger a runnable entity of a first software component in a first kernel, such that the runnable entity of the first software component stores global time in shared memory.

[0187] In some embodiments, the runnable entity of the first software component is used to call the application interface in the runtime environment layer to send the global time to shared memory.

[0188] In some embodiments, the runnable entity of the first software component is used to call the data sending interface in the RTE layer to send the global time to shared memory.

[0189] In some embodiments, the time synchronization operation specifically involves: a first kernel sending a data storage notification to the operating system; the data storage notification informing the operating system that the first kernel has updated the global time; and the operating system responding to the data storage notification by scheduling a second task configured in a second kernel, the second task being used to obtain the global time from shared memory.

[0190] In some embodiments, the second task is used to trigger a runnable entity of the second software component in the second kernel, such that the runnable entity of the second software component obtains global time from shared memory.

[0191] In some embodiments, the runnable entity of the second software component is used to invoke the application interface in the runtime environment layer to receive global time from shared memory.

[0192] In some embodiments, the runnable entity of the second software component is used to invoke the data receiving interface in the RTE layer to receive global time from shared memory.

[0193] In some embodiments, shared memory is a cross-operating system application communication cache or a cross-operating system application communication channel.

[0194] In some embodiments, the second kernel is further configured to, in response to receiving a time acquisition instruction, determine the real-time global time based on the global time and the local system time, and send the real-time global time to downstream nodes, wherein the time acquisition instruction is sent by the downstream nodes to acquire the real-time global time.

[0195] In some embodiments, the local system time includes a first local system time and a second local system time; the first local system time is the local system time obtained by the second kernel from the global time; the second local system time is the local system time obtained by the second kernel from the time acquisition instruction; the second kernel is specifically used to determine the real-time global time based on the global time, the first local system time and the second local system time.

[0196] In some embodiments, the real-time global time is the sum of the differences between the global time and the local system time, and the local system time difference is the difference between the second local system time and the first local system time.

[0197] In some embodiments, the second kernel includes a first cache and a second cache; the first cache and the second cache are used to alternately store the global time.

[0198] In some embodiments, the second kernel is further configured to store the global time to a non-target cache based on a storage identifier, wherein the storage identifier is used to identify the target cache in the first cache and the second cache for the most recent storage of the global time, and the non-target cache is another cache in the first cache and the second cache besides the target cache.

[0199] In some embodiments, the second kernel is specifically used to: when the storage identifier is a first identifier, store the global time in a first cache, where the first identifier is used to identify the target cache for the most recent storage of the global time as the second cache; or, when the storage identifier is a second identifier, store the global time in a second cache, where the second identifier is used to identify the target cache for the most recent storage of the global time as the first cache.

[0200] In some embodiments, the second kernel is also configured to update the storage identifier when the global time is stored in a non-target cache.

[0201] In some embodiments, the second kernel is specifically configured to update the storage identifier from the first identifier to the second identifier when the global time is stored in the first cache; or, when the global time is stored in the second cache, the second kernel updates the storage identifier from the second identifier to the first identifier.

[0202] In some embodiments, the second kernel is further configured to read the global time from the target cache based on the storage identifier.

[0203] In some embodiments, the second kernel is specifically used to read the global time from the second cache when the storage identifier is the first identifier; the first identifier is used to identify the target cache for the most recent storage of the global time as the second cache; or, when the storage identifier is the second identifier, the second kernel reads the global time from the second cache, the second identifier is used to identify the target cache for the most recent storage of the global time as the first cache.

[0204] Figure 11 This is a schematic diagram of the structure of an electronic device provided as an embodiment of this application. (See attached diagram.) Figure 11 As shown, the electronic device 130 includes, but is not limited to, a processor 1301 and a memory 1302.

[0205] The aforementioned memory 1302 is used to store the executable instructions of the processor 1301. It is understood that the processor 1301 is configured to execute instructions to implement the noise reduction method inside the vehicle as described in the above embodiments.

[0206] Processor 1301 is the control center of the electronic device. It connects various parts of the electronic device via various interfaces and lines. By running or executing software programs and / or modules stored in memory 1302, and by calling data stored in memory 1302, it performs various functions and processes data, thereby controlling the electronic device as a whole. Processor 1301 may include one or more processing modules. Optionally, processor 1301 may integrate an application processor and a modem processor. The application processor mainly handles the operating system, user interface, and applications, while the modem processor mainly handles wireless communication. It is understood that the modem processor may not be integrated into processor 1301.

[0207] The memory 1302 can be used to store software programs and various data. The memory 1302 may primarily include a program storage area and a data storage area. The program storage area may store the operating system and application programs required by at least one functional module (such as an acquisition unit, a determination module, a processing unit, etc.). Furthermore, the memory 1302 may include high-speed random access memory, and may also include non-volatile memory, such as at least one disk storage device, flash memory device, or other volatile solid-state storage device.

[0208] In some embodiments, this application also provides a computer-readable storage medium storing computer-executable instructions that, when executed on a computer, cause the computer to perform the time synchronization method provided in any of the above embodiments.

[0209] This application also provides a vehicle including the aforementioned electronic device, controller, or computer-readable storage medium.

[0210] In some embodiments, this application also provides a computer program product comprising a computer program that, when executed by a device, causes the device to perform the method as described above.

[0211] In this way, the computer program in the computer program product can be customized according to the specific needs and operating conditions of the equipment, realizing personalized control methods and improving the adaptability and flexibility of equipment control.

[0212] In addition, computer program products can be executed on different devices or systems, achieving cross-platform applicability, providing a unified control method for different types of devices, and improving system integration and interoperability.

[0213] Although this application has been described in conjunction with specific features and embodiments, it is obvious that various modifications and combinations can be made thereto without departing from the spirit and scope of this application. Accordingly, this specification and drawings are merely exemplary illustrations of this application as defined by the appended claims, and are considered to cover any and all modifications, variations, combinations, or equivalents within the scope of this application. Clearly, those skilled in the art can make various alterations and modifications to this application without departing from the spirit and scope of this application. Thus, if such modifications and modifications of this application fall within the scope of the claims of this application and their equivalents, this application is also intended to include such modifications and modifications.

[0214] The above are merely specific embodiments of the present invention, but the scope of protection of the present invention is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the technical scope disclosed in the present invention should be included within the scope of protection of the present invention. Therefore, the scope of protection of the present invention should be determined by the scope of the claims.

Claims

1. A time synchronization method, characterized in that, Applied to a controller, the controller including a first kernel and a second kernel, the method includes: The second kernel responds to a time synchronization operation by obtaining a global time from the shared memory of the first kernel and the second kernel; the time synchronization operation is triggered when the first kernel updates the global time in the shared memory.

2. The method according to claim 1, characterized in that, The first kernel is configured with a first task, which is used to update the received global time into the shared memory when the first task is scheduled to be executed by the operating system of the controller.

3. The method according to claim 2, characterized in that, The first task is a periodic task, which is triggered and executed by the operating system at preset time intervals.

4. The method according to claim 2, characterized in that, The first task is used to trigger the runnable entity of the first software component in the first kernel, so that the runnable entity of the first software component stores the global time in the shared memory.

5. The method according to claim 4, characterized in that, The runnable entity of the first software component is used to call the application interface in the runtime environment layer to send the global time to the shared memory.

6. The method according to claim 4, characterized in that, The runnable entity of the first software component is used to call the data sending interface in the runtime environment layer to send the global time to the shared memory.

7. The method according to claim 1, characterized in that, The time synchronization operation is specifically as follows: The first kernel sends a data storage notification to the operating system; the data storage notification is used to notify the operating system that the first kernel has updated the global time. In response to the data storage notification, the operating system schedules a second task configured in the second kernel, the second task being used to obtain the global time from the shared memory.

8. The method according to claim 7, characterized in that, The second task is used to trigger the runnable entity of the second software component in the second kernel, so that the runnable entity of the second software component obtains the global time from the shared memory.

9. The method according to claim 8, characterized in that, The runnable entity of the second software component is used to call the application interface in the runtime environment layer to receive the global time from the shared memory.

10. The method according to claim 8, characterized in that, The runnable entity of the second software component is used to call the data receiving interface in the runtime environment layer to receive the global time from the shared memory.

11. The method according to any one of claims 1-10, characterized in that, The shared memory is a cross-operating system application communication cache or a cross-operating system application communication channel.

12. The method according to any one of claims 1-10, characterized in that, After obtaining the global time from the shared memory of the first kernel and the second kernel, the method further includes: In response to the received time acquisition instruction, the second kernel determines the real-time global time based on the global time and the local system time, and sends the real-time global time to downstream nodes, wherein the time acquisition instruction is sent by the downstream node to acquire the real-time global time.

13. The method according to claim 12, characterized in that, The local system time includes a first local system time and a second local system time; the first local system time is the local system time obtained by the second kernel from the global time; the second local system time is the local system time obtained by the second kernel from the time acquisition instruction. The second kernel determines the real-time global time based on the global time and the local system time, including: The second kernel determines the real-time global time based on the global time, the first local system time, and the second local system time.

14. The method according to claim 13, characterized in that, The real-time global time is the sum of the differences between the global time and the local system time, and the local system time difference is the difference between the second local system time and the first local system time.

15. The method according to any one of claims 1-10, characterized in that, The second kernel includes a first cache and a second cache; the first cache and the second cache are used to alternately store the global time.

16. The method according to claim 15, characterized in that, After obtaining the global time from the shared memory, the method further includes: The second kernel stores the global time to a non-target cache based on a storage identifier, which is used to identify the target cache in the first and second caches where the global time was most recently stored. The non-target cache is another cache in the first and second caches besides the target cache.

17. The method according to claim 16, characterized in that, The second kernel stores the global time to a non-target cache based on the storage identifier, including: When the storage identifier is the first identifier, the second kernel stores the global time in the first cache, where the first identifier identifies the target cache where the global time was most recently stored as the second cache; or, When the storage identifier is the second identifier, the second kernel stores the global time in the second cache, and the second identifier is used to identify the target cache where the global time was most recently stored as the first cache.

18. The method according to claim 17, characterized in that, The method further includes: The second kernel updates the storage identifier when the global time is stored in the non-target cache.

19. The method according to claim 18, characterized in that, When the second kernel stores the global time in a non-target cache, it updates the storage identifier, including: When the second kernel stores the global time in the first cache, it updates the storage identifier from the first identifier to the second identifier; or, When the second kernel stores the global time in the second cache, it updates the storage identifier from the second identifier to the first identifier.

20. The method according to claim 16, characterized in that, The method further includes: The second kernel reads the global time from the target cache based on the storage identifier.

21. The method according to claim 20, characterized in that, The second kernel reads the global time from the target cache based on the storage identifier, including: When the storage identifier is a first identifier, the second kernel reads the global time from the second cache; the first identifier is used to identify the target cache that most recently stored the global time as the second cache; or, When the storage identifier is the second identifier, the second kernel reads the global time from the second cache, and the second identifier is used to identify the target cache that most recently stored the global time as the first cache.

22. The method according to claim 1, characterized in that, The number of the second kernel is multiple.

23. An electronic device, characterized in that, The device includes a processor and a memory, the processor being connected to the memory, the memory storing computer instructions that, when executed on the electronic device, cause the electronic device to perform the method as described in any one of claims 1-22.

24. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores computer-executable instructions that, when executed on a computer, cause the computer to perform the method as described in any one of claims 1-22.

25. A vehicle, characterized in that, include: A controller for performing the method of any one of claims 1-22; or, the electronic device of claim 23; or, the computer-readable storage medium of claim 24.

26. A computer program product, the computer program product comprising instructions, characterized in that, When the instructions are executed on a computer, the computer performs the method as described in any one of claims 1-22.

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