Power supply system, power supply voltage adjusting method and single cluster processing system

Abstract

The disclosure provides a power supply system, comprising: a first power module for supplying power to a first computing unit of a single-cluster processing system; the second power supply module is used for supplying power to a second computing unit of the single-cluster processing system, and the single-cluster processing system is divided into the first computing unit and the second computing unit; wherein the first power supply module and the second power supply module are configured to receive the same power supply control signal so as to realize synchronous power supply to the first calculation unit and the second calculation unit. The invention further provides a power supply method and a single cluster processing system.

Description

Technical Field

[0001] This disclosure relates to the field of computer technology, and in particular to a power supply system, a power supply voltage adjustment method, and a single-cluster processing system. Background Technology

[0002] With the development of artificial intelligence, the demand for computing power in computers is increasing, and the corresponding current demand is also increasing. Currently, most power supplies for consumer devices use multiphase buck converters, but existing multiphase buck products are gradually failing to meet the current requirements of electronic devices. Summary of the Invention

[0003] In view of this, the present disclosure provides a power supply system, a power supply voltage adjustment method, and a single cluster processing system.

[0004] One aspect of this disclosure provides a power supply system, comprising: a first power module for supplying power to a first computing unit of a single-cluster processing system; and a second power module for supplying power to a second computing unit of the single-cluster processing system, wherein the single-cluster processing system is divided into the first computing unit and the second computing unit; wherein the first power module and the second power module are configured to receive the same power control signal to achieve synchronous power supply to the first computing unit and the second computing unit.

[0005] According to embodiments of this disclosure, a first power module includes a first control pin, and a second power module includes a second control pin. The first and second power modules are configured to receive the same power control signal through the first and second control pins, the power control signal originating from the central processing unit of a single-cluster processing system, and to determine a target voltage value based on a change in the level of the power control signal in response to a change in the level of the power control signal.

[0006] According to embodiments of this disclosure, a first power supply module includes a first register and a second register, and a second power supply module includes a third register and a fourth register; the first power supply module is configured to: determine a target register from the first register and the second register based on the level of a power control signal; read a target voltage value from the target register, and supply power to a first computing unit based on the target voltage value; the second power supply module is configured to: determine a target register from the third register and the fourth register based on the level of a power control signal; read a target voltage value from the target register, and supply power to a second computing unit based on the target voltage value.

[0007] According to embodiments of this disclosure, the first power module is further configured to: read a target voltage value from a first register in response to a power control signal being converted to a first level; and read a target voltage value from a second register in response to a power control signal being converted to a second level; the second power module is further configured to: read a target voltage value from a third register in response to a power control signal being converted to a first level; and read a target voltage value from a fourth register in response to a power control signal being converted to a second level.

[0008] According to embodiments of this disclosure, the central processing unit is configured to: in response to detecting a power consumption change of a target task executed by the first computing unit and the second computing unit, and the power control signal being at a first level, write a target voltage value into a second register and a fourth register based on a target communication protocol, and convert the power control signal to a second level; in response to detecting a power consumption change of a target task executed by the first computing unit and the second computing unit, and the power control signal being at a second level, write a target voltage value into a first register and a third register based on a target communication protocol, and convert the power control signal to a first level.

[0009] According to embodiments of this disclosure, the first power module and the second power module are further configured to: supply power to the first computing unit and the second computing unit of the single-cluster processing system based on a preset voltage value in response to receiving a power enable signal at a first level; the central processing module is further configured to: control the power enable signal to a second level in response to the completion of the target task executed by the first computing unit and the second computing unit, so that the first power module and the second power module simultaneously stop supplying power.

[0010] Another aspect of this disclosure provides a power supply voltage adjustment method applied to a single-cluster processing system, the single-cluster processing system including a first computing unit and a second computing unit, the method including: sending power control signals to a first power module and a second power module according to the target tasks executed by the first computing unit and the second computing unit, so that the first power module and the second power module supply power to the first computing unit and the second computing unit synchronously.

[0011] According to embodiments of this disclosure, sending a power control signal to a first power module and a second power module includes: determining a target voltage value in response to power consumption changes of a target task of the first computing unit and the second computing unit; writing the target voltage value into the register groups of the first power module and the second power module based on a target communication protocol; and switching the level of the power control signal.

[0012] According to embodiments of this disclosure, the method further includes: in response to a level switching of a power control signal, controlling a first power module and a second power module to read a target voltage value from a register set; and the first power module and the second power module supplying power to a first computing unit and a second computing unit based on the target voltage value.

[0013] Another aspect of this disclosure provides a single-cluster processing system, including: a first computing unit; a second computing unit; the first computing unit and the second computing unit have the same specifications and are used to execute a target task; a central processing unit, used to determine a target voltage value and output a power control signal in response to power consumption changes of the target task executed by the first computing unit and the second computing unit.

[0014] It should be understood that the description in this section is not intended to identify key or essential features of the embodiments of this disclosure, nor is it intended to limit the scope of this disclosure. Other features of this disclosure will become readily apparent from the following description. Attached Figure Description

[0015] The above and other objects, features and advantages of this disclosure will become clearer from the following description of embodiments with reference to the accompanying drawings, in which:

[0016] Figure 1 A schematic diagram of a power supply system according to an embodiment of the present disclosure is shown;

[0017] Figure 2 A schematic diagram of a power supply system according to an embodiment of the present disclosure is shown.

[0018] Figure 3 A schematic diagram illustrating the power supply of a power supply system according to another embodiment of the present disclosure is shown.

[0019] Figure 4 A signal timing diagram of a power supply system according to an embodiment of the present disclosure is illustrated schematically;

[0020] Figure 5 A flowchart illustrating a power supply voltage adjustment method according to an embodiment of the present disclosure is shown schematically.

[0021] Figure 6 A flowchart illustrating a power supply voltage adjustment method according to another embodiment of the present disclosure is shown schematically; and

[0022] Figure 7 A schematic block diagram of a single-cluster processing system according to an embodiment of the present disclosure is shown. Detailed Implementation

[0023] The embodiments of this disclosure will now be described with reference to the accompanying drawings. Various details of the embodiments of this disclosure are included to aid understanding and should be considered merely exemplary. Therefore, those skilled in the art will recognize that various changes and modifications can be made to the embodiments described herein without departing from the scope and spirit of this disclosure. Similarly, for clarity and brevity, descriptions of well-known functions and structures are omitted in the following description.

[0024] In the technical solutions disclosed herein, the collection, storage, use, processing, transmission, provision, disclosure, and application of data (including but not limited to user personal information) comply with the provisions of relevant laws and regulations, necessary confidentiality measures have been taken, and they do not violate public order and good morals.

[0025] In existing power supply solutions, high-performance single-cluster processing systems have high power supply requirements, but lack power supply equipment that can meet the current requirements.

[0026] One current solution is to break down the single-cluster processing system into a multi-cluster processing system, distributing the current to each cluster, thereby reducing the overall power supply requirements of the processing system. However, this solution requires coordinating the load across multiple clusters, increasing the complexity of the circuit structure and power supply, leading to problems such as increased communication latency and reduced memory bandwidth.

[0027] Based on this, this disclosure provides a power supply system that aims to reduce the demand for the maximum operating current of the power supply by dividing the power supply system into multiple power supply modules. At the same time, by improving the control method of the power supply output, it enables the synchronous power supply of different power supply modules, avoids the situation of asynchronous power-on or voltage regulation, and improves the power supply efficiency and stability of the power supply.

[0028] Figure 1 A schematic diagram of a power supply system according to an embodiment of the present disclosure is shown.

[0029] like Figure 1 As shown, the power supply system 100 of this embodiment includes a first power module 110 and a second power module 120.

[0030] In embodiments of this disclosure, the first power module 110 and the second power module 120 are used to supply power to the single-cluster processing system. The single-cluster processing system is divided into a first computing unit C1 and a second computing unit C2. In the single-cluster processing system, the computing units are split into two groups based on current requirements, resulting in a first computing unit C1 and a second computing unit C2 with identical specifications. The first computing unit C1 and the second computing unit C2 can be, for example, an NPU (Neural Processing Unit), a dedicated processor for performing artificial intelligence (especially neural network computation) inference tasks.

[0031] The first power supply module 110 is used to supply power to the first computing unit C1 of the single-cluster processing system.

[0032] The second power supply module 120 is used to supply power to the second computing unit C2 of the single-cluster processing system.

[0033] The first power module 110 and the second power module 120 can, for example, be power management integrated circuits with identical specifications. In embodiments of this disclosure, the first power module 110 and the second power module 120 are configured to receive the same power control signal to achieve synchronous power supply to the first computing unit C1 and the second computing unit C2. Synchronous power supply can mean that the power supply time and power supply value of the first power module 110 and the second power module 120 are completely consistent.

[0034] According to embodiments of this disclosure, the power supply capacity of the power management module is doubled by implementing grouped power supply for a single cluster. Compared to a single-cluster, single-module power supply scheme, the multi-group power supply for a single cluster in this application can improve the output and adjustment capabilities of the power supply voltage while maintaining low communication latency and a simple structure, thereby improving power supply efficiency when dealing with load current fluctuations.

[0035] Figure 2 A schematic diagram of a power supply system according to an embodiment of the present disclosure is shown.

[0036] like Figure 2 As shown, this embodiment includes a power supply system 210 and a single cluster processing system 220.

[0037] The power supply system 210 includes a first power module 211 and a second power module 212. The single-cluster processing system 220 includes a first computing unit 2211, a second computing unit 2212, and a central processing unit 222. The first power module 211 supplies power to the first computing unit 2211, and the second power module 212 supplies power to the second computing unit 2212.

[0038] According to embodiments of this disclosure, the first power module 211 and the second power module 212 synchronously start and stop power supply based on the power enable signal PWR_EN. The first power module 211 and the second power module 212 are configured to: in response to receiving the power enable signal PWR_EN at a first level, supply power to the first computing unit 2211 and the second computing unit 2212 of the single-cluster processing system 220 based on a preset voltage value; the central processing module 222 is further configured to: in response to the completion of the target task executed by the first computing unit 2211 and the second computing unit 2212, control the power enable signal PWR_EN to a second level, causing the first power module 211 and the second power module 212 to simultaneously stop supplying power.

[0039] In embodiments of this disclosure, the preset voltage value can be set to, for example, 0.75V. The first level can be a high level. When the power enable signal PWR_EN is received as high, the first power module 211 and the second power module 212 adjust the output voltage to 0.75V to supply power to the first computing unit 2211 and the second computing unit 2212.

[0040] The second level can be low. The target tasks performed by the first computing unit 2211 and the second computing unit 2212 can be image processing, speech processing, natural language processing, etc. When the target tasks of the first computing unit 2211 and the second computing unit 2212 are completed, the single cluster processing system 220 no longer needs the power supply module to provide power. At this time, the central processing module 222 of the single cluster processing system 220 can control the power enable signal PWR_EN to be low, so that the first power module 211 and the second power module 212 simultaneously adjust the output voltage to 0 and stop supplying power to the first computing unit and the second computing unit.

[0041] According to an embodiment of this disclosure, the first power module 211 includes a first control pin DVS1, and the second power module 212 includes a second control pin DVS2. The first power module 211 and the second power module 212 are configured to receive the same power control signal DVS through the first control pin DVS1 and the second control pin DVS2. The power control signal DVS comes from the central processing unit 222 of the single cluster processing system 220. In response to a change in the level of the power control signal DVS, a target voltage value is determined based on the level of the power control signal DVS.

[0042] The power control signal DVS is used to indicate the voltage value at which the first power module 211 and the second power module 212 switch the output voltage.

[0043] The following section will further explain how the power control signal controls the output voltage of the first and second power modules.

[0044] According to embodiments of this disclosure, the first power module 211 includes a first register and a second register disposed within the first power module, and the second power module 212 includes a third register and a fourth register disposed within the second power module. All of the aforementioned registers are used to store voltage values ​​written from the central processing unit 222, for selection and reading by the first power module 211 and the second power module 212.

[0045] The first power module 211 is configured to: determine the target register from the first register and the second register based on the level of the power control signal DVS; read the target voltage value from the target register; and supply power to the first computing unit based on the target voltage value.

[0046] Both the first register and the second register store preset voltage values ​​or voltage values ​​written via the central processing unit 222. According to the power control signal DVS, the first power module 211 can select one of the first register and the second register as the target register; the target register is the register that provides a voltage value reference. After determining the target register, the target voltage value stored in the target register is read, and the output voltage is adjusted using the target voltage value as a reference to supply power to the first computing unit 2211.

[0047] In embodiments of this disclosure, a target voltage value is read from a first register in response to the power control signal DVS being converted to a first level; and a target voltage value is read from a second register in response to the power control signal DVS being converted to a second level.

[0048] The first voltage level can be high, and the second voltage level can be low. In response to the power control signal DVS changing from low to high, the first power module 211 uses the first register as the target register and reads the target voltage value from it. In response to the power control signal DVS changing from high to low, the first power module 211 uses the second register as the target register and reads the target voltage value from it.

[0049] For example, the first register stores a preset voltage value V. DVS0 The voltage is 0.75V, and the second register stores the voltage value V written by the central processing unit 222. DVS1 The voltage is 0.65V. The current first power module 211 is based on a preset voltage value V. DVS0 Power is supplied to the first computing unit 2211, and the power control signal DVS received by the first power module 211 is at a high level. In response to the power control signal DVS changing from high to low, the first power module 211 uses the second register as the target register and reads the target voltage value V from the second register. DVS1 Power is supplied to the first computing unit 2211 based on the target voltage value of 0.65V.

[0050] The second power module 212 is configured to: determine the target register from the third and fourth registers based on the level of the power control signal DVS; read the target voltage value from the target register; and supply power to the second computing unit based on the target voltage value.

[0051] Both the third and fourth registers store preset voltage values ​​or values ​​written via the central processing unit 222. According to the power control signal DVS, the second power module 212 can select one of the third and fourth registers as the target register, whereby the target register provides a voltage value reference. After determining the target register, the target voltage value stored in the target register is read, and the output voltage is adjusted using this target voltage value as a reference to supply power to the second computing unit 2212.

[0052] According to embodiments of this disclosure, the second power module 212 is further configured to: read a target voltage value from a third register in response to the power control signal DVS being converted to a first level; and read a target voltage value from a fourth register in response to the power control signal DVS being converted to a second level.

[0053] The first voltage level can be high, and the second voltage level can be low. In response to the power control signal DVS changing from low to high, the second power module 212 uses the third register as the target register and reads the target voltage value from it. In response to the power control signal DVS changing from high to low, the second power module 212 uses the fourth register as the target register and reads the target voltage value from it.

[0054] For example, the third register stores a preset voltage value V. DVS0 The voltage is 0.75V, and the fourth register stores the voltage value V written by the central processing unit 222. DVS1 The voltage is 0.65V. The current second power module 212 is based on a preset voltage value V. DVS0 Power is supplied to the second computing unit 2212, and the power control signal DVS received by the second power module 212 is at a high level. In response to the power control signal DVS changing from high to low, the second power module 212 uses the fourth register as the target register and reads the target voltage value V from the fourth register. DVS1 Power is supplied to the second computing unit 2212 based on the target voltage value of 0.65V.

[0055] According to embodiments of this disclosure, the central processing unit 222 is configured to: in response to detecting a power consumption change in the target task executed by the first computing unit 2211 and the second computing unit 2212, and the power control signal DVS being at a first level, write a target voltage value into a second register and a fourth register based on a target communication protocol, and convert the power control signal DVS to a second level. In response to detecting a power consumption change in the target task executed by the first computing unit 2211 and the second computing unit 2212, and the power control signal DVS being at a second level, write a target voltage value into a first register and a third register based on a target communication protocol, and convert the power control signal DVS to a first level.

[0056] In the embodiments of this disclosure, the first computing unit 2211 and the second computing unit 2212 can be used to perform target tasks of different types and in different fields. The power consumption and current requirements differ depending on the target task being performed. The central processing unit 222 can determine the required input voltage, i.e., the target voltage value, for the first computing unit 2211 and the second computing unit 2212 based on the power consumption of the target task, and write the target voltage value into the registers of the first power module 211 and the second power module 212.

[0057] In embodiments of this disclosure, the central processing unit 222 needs to write the target voltage value into the free registers of the first power module 211 and the second power module 212 to avoid read / write conflicts of the voltage value. When a power consumption change of the target task executed by the first computing unit 2211 and the second computing unit 2212 is detected, and the power control signal DVS is at a first level, it indicates that the first power module 211 and the second power module 212 are currently supplying power to the first computing unit 2211 and the second computing unit 2212 based on the voltage values ​​of the first register and the third register, respectively. The central processing unit 222 needs to write the target voltage value into the second register and the fourth register based on the target communication protocol. When a power consumption change of the target task executed by the first computing unit 2211 and the second computing unit 2212 is detected, and the power control signal DVS is at a second level, it indicates that the first power module 211 and the second power module 212 are currently supplying power to the first computing unit 2211 and the second computing unit 2212 based on the voltage values ​​of the second register and the fourth register, respectively. The central processing unit 222 needs to write the target voltage value into the first register and the third register based on the target communication protocol.

[0058] In embodiments of this disclosure, the target communication protocol may be I2C (Inter-Integrated Circuit). Based on the I2C protocol, the central processing unit 222 can write the target voltage value into the registers inside the first power module 211 and the second power module 212 through the SCL (serial clock line) pin and the SDA (serial data line) pin.

[0059] According to embodiments of this disclosure, by controlling the synchronous switching and power supply of two power modules, the operating frequency and operating voltage can be adjusted according to different load requirements. This optimizes the power consumption of the power supply while improving the voltage regulation capability of the power supply, thereby improving the power supply efficiency and power quality of the single cluster processing system.

[0060] Next, combined Figure 3The power supply process between the first power module and the first computing unit of this disclosure is further explained.

[0061] Figure 3 A schematic diagram of a power supply system according to another embodiment of the present disclosure is shown.

[0062] like Figure 3 As shown, in this embodiment, the first power supply module 211 supplies power to the first computing unit 2211 based on the output voltage Vout. The first power supply module includes multiple inductors L1, L2, ..., Ln connected in parallel, and multiple grounding capacitors Cout0, ..., Coutn. The first power supply module provides n-phase buck power supply based on n inductors, where n ranges from 2 to 12. The filtered current from each phase inductor is superimposed and sent to the Vout node, where it is supplied to the first computing unit 2211.

[0063] Inside the first computing unit 2211, there is a packaged resistor R outside the chip circuit. pkg Packaged inductor L pkg And the chip capacitor C inside the chip circuit die and chip resistor R die Packaged inductor L pkg With chip capacitor C die The voltage at the connection point is the input voltage Vbump to the chip circuit, and the current I flowing through the load is... load This is the operating load current.

[0064] In the embodiments disclosed herein, the internal structure of the second computing unit is the same as that of the first computing unit 2211, and the structure and connecting elements of the second power module are similar to those of the first power module 211. For the sake of brevity, they will not be described in detail.

[0065] Figure 4 A signal timing diagram of a power supply system according to an embodiment of the present disclosure is illustrated schematically.

[0066] like Figure 4 As shown, at time T0, the power enable signal PWR_EN changes from low level to high level, the output voltage PMU_A_VOUT of the first power module changes from 0 to the preset voltage value V0, and the output voltage PMU_B_VOUT of the second power module changes from 0 to the preset voltage value V0.

[0067] At time T1, the power consumption change of the target task of the first computing unit and the second computing unit is detected, and the power control signal DVS is low. The central processing unit writes the target voltage value V1 into the first register and the third register through the I2C protocol.

[0068] At time T2, the central processing unit finishes writing to the register, and the level of the control power control signal changes from low to high. The first power module reads the target voltage value V1 from the first register and adjusts the output voltage PMU_A_VOUT from 0 to the target voltage value V1. The second power module reads the target voltage value V1 from the third register and adjusts the output voltage PMU_B_VOUT from 0 to the target voltage value V1.

[0069] At time T3, the power consumption change of the target task of the first computing unit and the second computing unit is detected, and the power control signal DVS is high. The central processing unit writes the target voltage value V2 into the second register and the fourth register through the I2C protocol.

[0070] At time T4, the central processing unit finishes writing to the register, and the level of the control power control signal changes from high to low. The first power module reads the target voltage value V2 from the second register and adjusts the output voltage PMU_A_VOUT from the target voltage value V1 to the target voltage value V2. The second power module reads the target voltage value V2 from the fourth register and adjusts the output voltage PMU_B_VOUT from the target voltage value V1 to the target voltage value V2.

[0071] At time T5, the power enable signal PWR_EN changes from high level to low level, the output voltage PMU_A_VOUT of the first power module changes from the target voltage value V2 to 0, and the output voltage PMU_B_VOUT of the second power module changes from the target voltage value V2 to 0.

[0072] Figure 5 A flowchart illustrating a power supply voltage adjustment method according to an embodiment of the present disclosure is shown schematically.

[0073] like Figure 5 As shown, the power supply voltage adjustment method 500 of this embodiment is applied to a single-cluster processing system, which includes a first computing unit and a second computing unit. The method includes operation S510.

[0074] During operation S510, according to the target tasks executed by the first computing unit and the second computing unit, power control signals are sent to the first power module and the second power module so that the first power module and the second power module supply power to the first computing unit and the second computing unit synchronously.

[0075] The first computing unit and the second computing unit can be, for example, the first computing unit 2211 and the second computing unit 2212 described above. The target task can be, for example, image processing, speech processing, natural language processing, or other artificial intelligence tasks. The central processing unit can control the first power module and the second power module to synchronously supply power to the first computing unit and the second computing unit by sending power control signals to the first power module and the second power module.

[0076] According to embodiments of this disclosure, sending a power control signal to a first power module and a second power module includes: determining a target voltage value in response to power consumption changes of a target task of the first computing unit and the second computing unit; writing the target voltage value into the register groups of the first power module and the second power module based on a target communication protocol; and switching the level of the power control signal.

[0077] In embodiments of this disclosure, the target communication protocol may be the I2C protocol. After the central processing unit writes the target voltage value into the register, the level of the power control signal is switched. The power control signal is used to instruct the first power module and the second power module to read the target voltage value from the register set. The register set of the first power module includes a first register and a second register, and the register set of the second power module includes a third register and a fourth register.

[0078] When the power control signal is high, the central processing unit writes the target voltage value into the second and fourth registers based on the target communication protocol, and then changes the power control signal from high to low. When the power control signal is low, the central processing unit writes the target voltage value into the first and third registers based on the target communication protocol, and then changes the power control signal from low to high.

[0079] According to embodiments of this disclosure, the method further includes: in response to a level switching of a power control signal, controlling a first power module and a second power module to read a target voltage value from a register set; and the first power module and the second power module supplying power to a first computing unit and a second computing unit based on the target voltage value.

[0080] For example, when the power control signal is high, the first power module can read the target voltage value from the first register; when the power control signal is low, the first power module can read the target voltage value from the second register. When the power control signal is high, the second power module can read the target voltage value from the third register; when the power control signal is low, the second power module can read the target voltage value from the fourth register.

[0081] For example, the first register stores a preset voltage value of 0.75V, and the second register stores the voltage value V written by the central processing unit. DVS1The voltage is 0.65V. Currently, the first power supply module supplies power to the first computing unit based on a preset voltage value, and the power control signal received by the first power supply module is at a high level. In response to the power control signal changing from high to low level, the first power supply module uses the second register as the target register and reads the target voltage value V from the second register. DVS1 The first computing unit is powered based on a target voltage of 0.65V. The third register stores a preset voltage value of 0.75V, and the fourth register stores the voltage value V written by the central processing unit. DVS1 The voltage is 0.65V. Currently, the second power supply module supplies power to the second computing unit based on a preset voltage value, and the power control signal received by the second power supply module is at a high level. In response to the power control signal changing from high to low level, the second power supply module uses the fourth register as the target register and reads the target voltage value V from the fourth register. DVS1 Power is supplied to the second computing unit based on the target voltage value of 0.65V.

[0082] Figure 6 A flowchart illustrating a power supply voltage adjustment method according to another embodiment of the present disclosure is shown schematically.

[0083] like Figure 6 As shown, the power supply voltage adjustment method of this embodiment includes operations S601-S607.

[0084] In operation S601, the first power module and the second power module are controlled to read preset voltage values ​​from the register group.

[0085] In operation S602, in response to receiving a power enable signal, the first power module and the second power module simultaneously supply power to the first computing unit and the second computing unit based on a preset voltage value.

[0086] In operation S603, it is detected whether the power consumption of the first computing unit and the second computing unit has changed. If the power consumption of the first computing unit and the second computing unit has changed, operation S604 is executed; if the power consumption of the first computing unit and the second computing unit has not changed, operation S603 is repeated.

[0087] In operation S604, the target voltage value is determined according to the target tasks of the first calculation unit and the second calculation unit.

[0088] In operation S605, the target voltage value is written into the register group of the first power module and the second power module based on the target communication protocol.

[0089] When operating S606, in response to the level switching of the power control signal, the first power module and the second power module are controlled to read the target voltage value from the register group.

[0090] In operation S607, in response to the completion of the target task executed by the first computing unit and the second computing unit, the control power enable signal is set to the second level, causing the first power module and the second power module to stop supplying power simultaneously.

[0091] Figure 7 A schematic block diagram of a single-cluster processing system according to an embodiment of the present disclosure is shown.

[0092] like Figure 7 As shown, the single-cluster processing system 700 according to an embodiment of the present disclosure includes a first computing unit 711, a second computing unit 712, and a central processing unit 720.

[0093] The first computing unit 711 and the second computing unit 712 have the same specifications and are used to perform the target task.

[0094] The central processing unit 720 is used to determine the target voltage value and output a power control signal in response to the power consumption change of the target task performed by the first computing unit 711 and the second computing unit 712.

[0095] In embodiments of this disclosure, the first computing unit 711 and the second computing unit 712 have the same specifications, for example, they can be the same as... Figure 3 The first computing unit 2211 has a similar structure. Depending on actual needs, multiple computing units of the same specifications can be set up, and the same number of power supply modules can be configured to synchronously power each computing unit.

[0096] The central processing unit 720 can perform various appropriate actions and processes according to a program stored in memory. The central processing unit 720 may include, for example, a general-purpose microprocessor (e.g., a CPU), an instruction set processor and / or an associated chipset and / or a special-purpose microprocessor (e.g., an application-specific integrated circuit (ASIC)), etc. The central processing unit 720 may include a single processing unit or multiple processing units for performing different actions of the method flow according to embodiments of this disclosure.

[0097] Embodiments of this disclosure also include a computer program product comprising a computer program containing program code for performing the methods shown in the flowchart. When the computer program product is run on a computer system, the program code is used to cause the computer system to implement the methods provided in the embodiments of this disclosure.

[0098] When the computer program is executed by the central processing unit 720, it performs the functions defined in the system / apparatus of this disclosure embodiment. According to embodiments of this disclosure, the systems, apparatuses, modules, units, etc., described above can be implemented by computer program modules.

[0099] According to embodiments of this disclosure, program code for executing the computer programs provided in embodiments of this disclosure can be written in any combination of one or more programming languages. Specifically, these computational programs can be implemented using high-level procedural and / or object-oriented programming languages, and / or assembly / machine languages. Programming languages ​​include, but are not limited to, languages ​​such as Java, C++, Python, "C", or similar programming languages. The program code can execute entirely on a user's computing device, partially on a user's device, partially on a remote computing device, or entirely on a remote computing device or server. In cases involving remote computing devices, the remote computing device can be connected to the user's computing device via any type of network, including a local area network (LAN) or a wide area network (WAN), or it can be connected to an external computing device (e.g., via the Internet using an Internet service provider).

[0100] The flowcharts and block diagrams in the accompanying drawings illustrate the architecture, functionality, and operation of possible implementations of systems, methods, and computer program products according to various embodiments of this disclosure. In this regard, each block in a flowchart or block diagram may represent a module, segment, or portion of code containing one or more executable instructions for implementing a specified logical function. It should also be noted that in some alternative implementations, the functions indicated in the blocks may occur in a different order than those indicated in the drawings. For example, two consecutively indicated blocks may actually be executed substantially in parallel, and they may sometimes be executed in reverse order, depending on the functions involved. It should also be noted that each block in a block diagram or flowchart, and combinations of blocks in a block diagram or flowchart, may be implemented using a dedicated hardware-based system that performs the specified function or operation, or using a combination of dedicated hardware and computer instructions.

[0101] Those skilled in the art will understand that the features described in the various embodiments and / or claims of this disclosure can be combined and / or combined in various ways, even if such combinations or combinations are not explicitly described in this disclosure. In particular, the features described in the various embodiments and / or claims of this disclosure can be combined and / or combined in various ways without departing from the spirit and teachings of this disclosure. All such combinations and / or combinations fall within the scope of this disclosure.

[0102] The embodiments of this disclosure have been described above. However, these embodiments are for illustrative purposes only and are not intended to limit the scope of this disclosure. Although various embodiments have been described above, this does not mean that the measures in the various embodiments cannot be used advantageously in combination. The scope of this disclosure is defined by the appended claims and their equivalents. Various substitutions and modifications can be made by those skilled in the art without departing from the scope of this disclosure, and all such substitutions and modifications should fall within the scope of this disclosure.

Claims

1. A power supply system, comprising: The first power supply module is used to supply power to the first computing unit of the single-cluster processing system; The second power module is used to supply power to the second computing unit of the single-cluster processing system, which is divided into the first computing unit and the second computing unit. The first power module and the second power module are configured to receive the same power control signal to achieve synchronous power supply to the first computing unit and the second computing unit.

2. The power supply system according to claim 1, wherein, The first power module includes a first control pin, and the second power module includes a second control pin. The first and second power modules are configured as follows: The same power control signal is received through the first control pin and the second control pin, and the power control signal originates from the central processing unit of the single-cluster processing system. In response to a change in the level of the power control signal, a target voltage value is determined based on the level of the power control signal.

3. The power supply system according to claim 2, wherein, The first power module includes a first register and a second register, and the second power module includes a third register and a fourth register; The first power module is configured as follows: The target register is determined from the first register and the second register based on the level of the power control signal; Read the target voltage value from the target register and supply power to the first computing unit based on the target voltage value; The second power module is configured as follows: The target register is determined from the third and fourth registers based on the level of the power control signal; The target voltage value is read from the target register, and power is supplied to the second computing unit based on the target voltage value.

4. The power supply system according to claim 3, wherein, The first power module is also configured to: In response to the power control signal being converted to a first level, the target voltage value is read from the first register; In response to the power control signal switching to the second level, the target voltage value is read from the second register; The second power module is also configured as follows: In response to the power control signal being converted to a first level, the target voltage value is read from the third register; In response to the power control signal switching to the second level, the target voltage value is read from the fourth register.

5. The power supply system according to claim 3, wherein, The central processing unit is configured as follows: In response to detecting a change in power consumption of the target task executed by the first computing unit and the second computing unit, and the power control signal being at a first level, the target voltage value is written into the second register and the fourth register based on the target communication protocol, and the power control signal is converted to a second level; In response to detecting a change in power consumption of the target task executed by the first computing unit and the second computing unit, and the power control signal being at the second level, the target voltage value is written into the first register and the third register based on the target communication protocol, and the power control signal is converted to the first level.

6. The power supply system according to claim 1, wherein, The first power module and the second power module are further configured as follows: In response to receiving a power enable signal at the first level, power is supplied to the first and second computing units of the single-cluster processing system based on a preset voltage value; The central processing module is also configured to: In response to the completion of the target task executed by the first computing unit and the second computing unit, the power enable signal is controlled to the second level, so that the first power module and the second power module stop supplying power at the same time.

7. A power supply voltage adjustment method applied to a single-cluster processing system, the single-cluster processing system comprising a first computing unit and a second computing unit, the method comprising: According to the target tasks executed by the first computing unit and the second computing unit, power control signals are sent to the first power module and the second power module so that the first power module and the second power module supply power to the first computing unit and the second computing unit synchronously.

8. The method according to claim 7, wherein sending the power control signal to the first power module and the second power module comprises: In response to the power consumption changes of the target task in the first computing unit and the second computing unit, a target voltage value is determined; The target voltage value is written into the register group of the first power module and the second power module based on the target communication protocol; Switch the level of the power control signal.

9. The method according to claim 8, further comprising: In response to the level switching of the power control signal, the first power module and the second power module are controlled to read the target voltage value from the register group; The first power module and the second power module supply power to the first computing unit and the second computing unit based on the target voltage value.

10. A single-cluster processing system, comprising: First calculation unit; Second calculation unit; The first computing unit and the second computing unit have the same specifications and are used to execute the target task; The central processing unit is used to determine the target voltage value and output a power control signal in response to the power consumption changes of the target tasks performed by the first computing unit and the second computing unit.

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