Method for realizing symmetric neuromorphic behaviors based on symmetric steady-state memristor neuron circuit

Abstract

The invention discloses a method for realizing symmetrical neuromorphic behaviors based on a symmetrical steady-state memristor neuron circuit. A symmetric steady-state memristor neuron circuit is constructed through a memristor with a symmetric steady state, and under the driving of bipolar voltage, the memristor can emerge a series of bidirectional and biphase symmetric neuromorphic behaviors which are very similar to bidirectional and biphase action potentials generated by biological neurons under complex electrophysiological activities, so that the memristor can generate a series of bidirectional and biphase symmetric neuromorphic behaviors. Therefore, complex electrophysiological activities of biological neurons can be simulated more comprehensively and truly. According to the technical scheme, the circuit is simple in structure and clear in parameter, and the simulation capability of electronic circuit equipment on real electrophysiological activities of biological neurons is greatly enhanced. A new thought is expected to be provided for a basic coding mechanism of a nervous system, and a key device basis is provided for constructing a high-performance and high-simulation neuromorphic computing system.

Description

Technical Field

[0001] This invention belongs to the field of neuromorphic electronic circuit technology, and more specifically, relates to a method for realizing symmetrical neuromorphic behavior based on symmetrical steady-state memristor neuron circuits. Background Technology

[0002] Memristors, as an emerging nanodevice characterized by strong nonlinearity and low power consumption, have shown great potential in fields such as neuromorphic dynamics, brain-inspired memory computing, nanobatteries, and chaotic encrypted communication because they can naturally and accurately simulate the behavior of neurons and synapses in the biological brain. Locally active memristors, due to their active amplification characteristics and inherent properties, are widely used as electronic equivalents of biological neurons to simulate and reproduce various neuromorphic behaviors.

[0003] Generally, action potentials in biological neurons are classified into monophasic and biphasic action potentials, reflecting the spatiotemporal variations of action potentials and constituting the basic coding mechanism of the nervous system. The formation mechanism of a monophasic action potential involves the resting potential, changes near the threshold, the firing phase, and the repolarization phase. Specifically, a neuron initially at its resting potential generates an upward action potential peak after receiving a certain stimulus, before returning to the resting potential. Biphasic action potentials mainly occur in complex tissues such as nerve trunks. As the stimulus extends, the action potential generates similar peaks in opposite directions at the stimulated site and propagates along the cell membrane. Examples include monophasic and biphasic action potentials observed by applying two recording electrodes to the outer side of a single muscle fiber and ventricular myocytes; biphasic action potentials observed in the sciatic nerve of a frog; and monophasic and biphasic action potentials observed during ventricular fibrillation in dogs using monophasic and biphasic electric shocks. This indicates that biphasic action potentials play a crucial role in signal transmission. Therefore, successfully constructing hardware circuits capable of accurately generating biphasic and other symmetrical action potentials is of great significance for the research of artificial neurons.

[0004] Therefore, in-depth research into the symmetry characteristics of symmetric steady-state local active memristor neuron circuits and their application in generating bidirectional, biphasic, and other neuromorphic behaviors to promote the development of memristor neurons in neuromorphic computing applications is a problem that urgently needs to be solved by those skilled in the art. Summary of the Invention

[0005] 1. Purpose of the invention:

[0006] This invention aims to propose a method for realizing symmetrical neuromorphic behaviors based on symmetrical steady-state memristor neuronal circuits, addressing the limitation that most existing neuronal hardware circuits can only simulate unidirectional, uniphase, and other symmetrical neuromorphic behaviors. By introducing symmetrical steady-state characteristics to generate symmetrical local active and emergent symmetrical neuromorphic behaviors, this circuit can realize various bidirectional and bi-symmetrical neuromorphic behaviors in a single structure, thereby more comprehensively and realistically simulating the complex electrophysiological activities of biological neurons. This provides a key device foundation for constructing high-performance, highly realistic neuromorphic computing systems.

[0007] 2. Technical Solution

[0008] To implement a method for achieving symmetrical neuromorphic behavior based on symmetrical steady-state memristor neuron circuits, the main steps include:

[0009] Step 1: Construct a voltage-controlled local active memristor model with negative and positive steady-state symmetry, whose steady-state has an S-shaped distribution.

[0010] Step 2: Determine the S-type symmetric steady-state characteristics of the memristor.

[0011] Step 3: Construct a third-order memristor neuron circuit that can retain its symmetric steady-state characteristics based on the sigmoid symmetric steady-state memristor.

[0012] Step 4: Determine bidirectional, biphasic, and other symmetrical neuromorphic behaviors based on the symmetric steady-state memristor neuron circuit in claim S3.

[0013] The specific process of step 1 above includes: considering the symmetrical steady-state characteristics and local active properties of the memristor, a simple S-type symmetrical steady-state memristor mathematical model is constructed as follows:

[0014]

[0015] Where v and i are the voltage across the memristor and the current flowing through it, respectively; x is the state variable of the locally active memristor (LAM); a3, a1, k, b3, b1, and b0 are the control parameters of the memristor; G(x) is the memristor derivative function; f(x, v) is the state equation; and the parameter τ1 is the time scale factor, for example, τ1 = 10. 3 At this time, the system operates on the order of milliseconds (ms). The parameter τ2 is the current scaling factor, for example, τ2 = 10. -3 At this time, the memristor operates in the milliampere (mA) range. To simplify the memristor configuration, the parameters are fixed: a3 = b3 = -1, a1 = -b1, b0 = 4, k = 1, τ1 = 10. 3 and τ2 = 10 -3Set parameter a1 as a control parameter to observe the symmetrical steady-state characteristics exhibited by the memristor. Note that in practice, the memristor parameter is not unique; the parameter value can be reasonably selected according to the requirements.

[0016] Step 2 involves the following steps: Setting dx / dt = 0 in the memristor's mathematical model yields the memristor's static operating point under different input voltages. The steady-state characteristics of the memristor under various input states are determined using a dynamic path mapping diagram. The S-shaped steady-state distribution of the memristor in the xv plane under different input conditions is statistically analyzed, and the results are shown in the appendix. Figure 2 middle.

[0017] Then, a static analysis of the memristor's operating point is performed again. With the memristor parameter a1 = 2.7 fixed, the relationship between the static current I, voltage V, and state variable X is as follows:

[0018]

[0019] Where V and I are the quiescent operating points of the memristor, and X is the stable state at the quiescent operating point. The relationships between the variables and the corresponding local active curves can be obtained, as shown in the appendix. Figure 3 middle.

[0020] Next, a dynamic analysis of the memristor was performed. A sinusoidal signal was applied across the memristor, and the hysteresis loops of the memristor under different steady states were observed. The symmetry of the dynamic behavior formed by the S-type symmetric steady state of the memristor was preliminarily determined, and this was demonstrated in the attached diagram. Figure 4 middle.

[0021] Furthermore, based on the symmetrical steady-state memristor model determined in steps 1 and 2, a type of memristor neuron circuit with symmetrical steady-state characteristics is constructed while retaining the symmetrical steady-state and DC volt-ampere characteristics of the memristor. The branch formed by connecting the memristor in parallel with capacitor C is then connected in series with inductor L. A voltage source is used to control the memristor circuit to always operate in the local active region, thus forming an auxiliary... Figure 5 The simplified third-order neuron circuit model shown:

[0022]

[0023] Where x, v C i L and V in These are the state variables, capacitor voltage, inductor current, and input voltage, respectively. The neuron circuit output voltage V... out =v C =V m These three variables all represent the voltage across the memristor or capacitor.

[0024] Step 4 involves analyzing the admittance function of the third-order memristor neuron circuit given in Step 3 to determine the generation mechanism of bidirectional, biphasic, and other symmetrical neuromorphic behaviors of memristor neurons. The memristor neuron circuit given in Step 3 is initially solved using the fourth-order Runge-Kutta method on the MATLAB platform. The symmetrical steady-state characteristics of the neuron circuit are analyzed to reflect the symmetrical dynamics of neuromorphic behaviors. The results are compared and verified using an FPGA digital circuit simulation platform and the MATLAB numerical solution method. Finally, through a memristor model with symmetrical steady-state characteristics, a method for realizing symmetrical neuromorphic behaviors based on a symmetrical steady-state memristor neuron circuit is formed. The specific process is as follows:

[0025] (1) Based on the memristor neuron circuit model given in step 3, when the neuron circuit is at the operating point Q(V,I), the admittance function Y T (s,Q) can be represented as:

[0026]

[0027] Among them, A=a 11 b 12 -a 12 b 11 ;Y T (s,Q), sC, and 1 / sL are the admittances of the memristor, capacitor C, and inductor L, respectively; a 11 ,a 12 ,b 11 and b 12 All of these are derived from the analysis of the small-signal equivalent circuit of the memristor. The expressions are as follows:

[0028]

[0029] The admittance function of a memristor can be expressed as:

[0030]

[0031] in,

[0032]

[0033] In the above equation, L1, R1, and R2 can be represented as the small-signal equivalent inductance and resistance of the memristor, respectively.

[0034] The pole p of the admittance function of a memristor neuron i It can be represented as:

[0035]

[0036] in,

[0037]

[0038] By integrating the parameter a in the above equation 11 ,a 12 ,b 11 and b 12 It can be deduced that all coefficients in the above formula are voltage V. 2 and X 2 The function of . Therefore, when the input voltage V in When the value is >0 and the neuron is in a positive (negative) steady state, the input voltage V... in When the value is less than 0 and neurons are in negative (positive) steady state, they have the same pole distribution, forming a symmetric parameter domain, and can also form biphasic and bidirectional action potentials.

[0039] (2) Determine the conditions under which neuronal circuits generate neuromorphic behaviors. Solve the memristor neuron circuit using MATLAB and observe the distribution of symmetrical regions generated by the symmetrical steady-state characteristics of the memristor neuron circuit under different inputs. In V in The -L plane illustrates the neuromorphic parameter mapping of the memristor under different steady-state conditions, as shown in the attached diagram. Figure 6 As shown. The condition for memristor neuronal circuits to produce neuromorphic behavior is determined, namely, the input voltage must satisfy the condition in the right half-plane region near the chaotic boundary region. (Appendix) Figure 6 Different shades of gray represent the Locally Passive Domain (LPD), the Chaotic Edge Domain (EOCD), and the Right Half-plane Domain (RHP), respectively. According to the Local Source Theorem, the boundary between the Right Half-plane Domain and the Chaotic Edge Domain is the Hope bifurcation line.

[0040] (3) According to the appendix Figure 6 The distribution region of symmetric parameters of memristor neurons is shown in the figure. A series of bipolar square wave, sine wave and DC signals are input to memristor neurons to further determine the symmetric neuromorphic behavior of memristor neuron circuits driven by bipolar signals.

[0041] (4) Based on the memristor neuron circuit in step 3, construct the corresponding discrete digital circuit model. The FPGA development board selected for the hardware implementation should have the following characteristics: programmable logic units or dedicated computing units; at least 100 embedded hardware multipliers (DSP blocks) for parallel execution of multiplication operations in the memristor neuron model; on-chip memory for storing neuron state variables and intermediate calculation data; and a clock management circuit for generating the system operating clock. The hardware multipliers, programmable logic units, and on-chip memory are configured to collaboratively implement the neuron dynamics equation calculation for the discrete memristor neuron circuit. The digital signal is converted to an analog signal using a dual-channel digital-to-analog converter chip and output to a digital oscilloscope with at least 50MHz bandwidth and a 1GS / s sampling rate to obtain reliable measurement results.

[0042] To meet the above requirements, this solution utilizes the DE2-115 development board based on the Cyclone IV E series FPGA, with the EP4CE115F29C7 as its main chip, responsible for implementing the core algorithms and digital logic of the neuromorphic circuit. Next, a 14-bit, dual-channel AD9767 digital-to-analog converter (DAC) chip is selected to convert the digital signals generated by the FPGA into analog voltage waveforms with high precision. Finally, a GDS-1104E digital oscilloscope (100MHz bandwidth, 1GS / s sampling rate) is used to accurately capture, measure, and verify the complex neuromorphic waveforms output by the system. The corresponding experimental setup is shown in the attached diagram. Figure 7 The feasibility and accuracy of realizing symmetrical neuromorphic behavior using a symmetrical steady-state memristor neuron circuit are verified by comparing the neuromorphic behavior captured by a digital oscilloscope with the results solved by MATLAB.

[0043] Designing a continuous chaotic system using an FPGA first requires discretizing the system. The resulting data is then output to an oscilloscope via a digital-to-analog converter. The final results captured on the oscilloscope are compared and verified with the MATLAB numerical simulation results, as shown in the attached diagram. Figure 8 Appendix Figure 9 Appendix Figure 10 and appendix Figure 11 middle.

[0044] As can be seen from the above technical solution, compared with the prior art, the present invention discloses a method for realizing symmetrical neuromorphic behavior based on symmetrical steady-state memristor neuron circuits, which has the following beneficial effects:

[0045] 3. Beneficial effects:

[0046] This invention proposes a memristor neuron circuit constructed from a locally active memristor with symmetrical steady-state characteristics. This memristor neuron circuit can accurately simulate the complex dynamic behavior of biological neurons. It realizes biphasic, biphase, and a series of other symmetrical neuromorphic behaviors within the symmetrical steady-state memristor neuron circuit, overcoming the limitations of most existing technologies that can only produce unidirectional (uniphase) responses. This enhances the simulation capability of real electrophysiological activities of biological neurons using electronic circuit technology. Furthermore, this neuron circuit has a simple structure, well-defined parameters, and is easy to integrate using conventional electronic components, providing a reliable and crucial device foundation for building higher-performance neuromorphic computing systems and brain-like intelligent hardware. Attached Figure Description

[0047] Figure 1 The diagram shown is a flowchart of the implementation process.

[0048] Figure 2 The diagram shown is a symmetrical steady-state distribution diagram of a memristor.

[0049] Figure 3 The diagram shows the relationships between the state variables of the memristor and the distribution of the local active domain.

[0050] Figure 4 The diagram shows the hysteresis loop of a memristor in symmetrical steady-state conditions.

[0051] Figure 5 The diagram shows the topology of a third-order memristor neuron circuit.

[0052] Figure 6 The diagram shows a symmetrical steady-state memristor neuron circuit at V. in - Distribution of neural morphological parameters in the L-plane.

[0053] Figure 7 The diagram shows the hardware experimental setup.

[0054] Figure 8 The figure shows the biphasic action potentials generated by neurons under the drive of bipolar square wave signals with different periods and an amplitude of 1.4V.

[0055] Figure 9 The figure shows biphasic action potentials generated by neurons under the influence of bipolar sinusoidal signals of different frequencies with an amplitude of 1.4V.

[0056] Figure 10 The figure shows a comparison between experimental measurement and numerical simulation results of symmetrical bidirectional periodic spikes and centrosymmetric periodic attractors in neuronal circuits.

[0057] Figure 11 The figure shows a comparison between experimental measurement and numerical simulation results of the symmetrical chaotic spikes of the neuronal circuit. Detailed Implementation

[0058] To provide a clearer understanding of the objectives, features, and advantages of this invention, the following detailed description is provided in conjunction with the accompanying drawings and specific embodiments:

[0059] This invention discloses a method for realizing symmetrical neuromorphic behavior based on symmetrical steady-state memristor neuronal circuits. It includes constructing a voltage-controlled locally active memristor model with negative and positive steady-state symmetry. The symmetrical steady-state distribution of the memristor under different input and parameter conditions is analyzed.

[0060] Fixed parameter a1 = 2.7, attached Figure 2 (a) demonstrates that the dynamic path mapping for input voltages of different signs always exhibits a symmetrical steady state (X = Q). -1 The distribution is as follows: (Q1, Q2). Stable states with positive values ​​are marked with a dark Q1, and stable states with negative values ​​are marked with a dark Q1. -1The stable states are marked with a light color Q0, while the unstable states are marked with a light color Q0. For example, when v = ±1V, the dynamic path map has a symmetrical stable state Q. -1 And Q1. It should be noted that as the input voltage v increases (decreases), Q1 will shift to the right (left). -1 It will move to the left (right) until it reaches a certain critical point, after which Q1(Q) -1 The expression disappears. The parameter a1 is set to iterate within the range [0,3] with a step size of 0.02. Furthermore, the S-shaped steady-state distribution of different parameters a1 in the vx plane, symmetric about the origin, is recorded and shown in the appendix. Figure 2 (b) in.

[0061] Next, a static analysis of the memristor's operating point is performed. With the memristor parameter a1 = 2.7 fixed, the relationship between the quiescent current I, voltage V, and state variable X is as follows:

[0062]

[0063] Where V and I are the quiescent operating points of the memristor, and X is the stable state at the quiescent operating point. The state variable X∈[-2,2] is divided into equally spaced data points with a step size of 0.001. Figure 3 The diagram shows the relationships between the variables and their corresponding local active curves, as displayed in the appendix. Figure 3 Middle. Observation Appendix Figure 3 (a) It can be observed that state variables X with different signs can produce VX curves symmetrical about the origin and dI / dV-X curves symmetrical about X=0, where the dark curves at both ends are generated by the negative and positive stable equilibrium points (Q) in the power-off diagram, respectively. -1 The negative slope curve near Q1 contributes to the formation of an attached curve. Figure 3 (b) contains centrally symmetric local active regions (i.e., LAD1, LAD2) and N-type local active curves, and ultimately forms attached... Figure 3 (b) shows a complete centrally symmetric N-type local active curve.

[0064] Then, a dynamic analysis of the memristor was performed. A sinusoidal signal V = 1.5sin(2πft) was applied across the memristor, and the hysteresis loops of the memristor under different steady states were observed. The symmetry of the dynamic behavior formed by the symmetrical steady state of the memristor was preliminarily determined, and it is shown in the attached diagram. Figure 4 Middle. Observation Appendix Figure 4 (a) It can be observed that the memristor exhibits a frequency dependence of the hysteresis loop; that is, as the frequency decreases, the area enclosed by the hysteresis loop shrinks until it shrinks into a single-valued function. Appendix Figure 4 (b) shows that for different initial conditions x(0)=±1, the hysteresis loops that are mutually symmetric about the origin suggest the existence of bidirectional, two-phase dynamics.

[0065] Furthermore, based on the symmetrical steady-state memristor model analyzed in steps 1 and 2, while retaining the symmetrical steady-state and DC-DC volt-ampere characteristics of the memristor, a type of memristor neuron circuit with symmetrical steady-state characteristics is constructed. The branch formed by connecting the memristor in parallel with capacitor C is then connected in series with inductor L. A voltage source is used to control the memristor circuit to always operate in the local active region, thus forming a supplementary... Figure 5 The simplified third-order neuron circuit model shown:

[0066]

[0067] Where x, v C i L and V in These are the state variables, capacitor voltage, inductor current, and input voltage, respectively. The neuron circuit output voltage V... out =v C =V m These three variables all represent the voltage across the memristor or capacitor.

[0068] Then, using the fourth-order Runge-Kutta method on the MATLAB platform, a preliminary solution for the three-sister memristor neuron circuit was obtained. The zeros and poles of the neuron's admittance function were analyzed, revealing the symmetric steady-state characteristics of the neuron circuit and their symmetric dynamics in neuromorphic behavior. The distribution of the solved region and the corresponding neuromorphic waveforms are shown in the attached diagram. Figure 6 (Middle. Attached) Figure 6 In V in The -L plane shows the neuromorphic parameter mapping of the memristor under different steady-state conditions, where the memristor parameter a1 = 2.7 and the capacitance C = 30nF. (See attached image.) Figure 6 Different gray levels represent the Locally Passive Distance (LPD), the Chaotic Edge Distance (EOCD), and the Right Half-plane (RHP) domain, respectively. According to the Local Source Theorem, the boundary between the Right Half-plane domain and the Chaotic Edge Distance is the Hope bifurcation line. (Appendix) Figure 6 (a) and (b) show the parameter distribution of the memristor in negative and positive steady states, respectively. (See attached image.) Figure 6 As shown in (a), when a negative voltage is input, the memristor can generate an upward neuromorphic waveform in a negative steady state; as shown in the appendix. Figure 6 As shown in (b), when a positive voltage is input, the memristor can generate a completely symmetrical and downward-facing neuromorphic waveform in a positive steady state. This is crucial for generating single-phase, bi-phase, and various symmetrical bidirectional neuromorphic waveforms.

[0069] Furthermore, a corresponding discrete digital circuit model was constructed. Using a DE2-115 development board, a digital-to-analog converter, and an oscilloscope, the neuromorphic behavior of the memristor neuron circuit under different inputs was captured and compared with the results obtained from the MATLAB solution in (3) to verify the correctness of the symmetric steady-state memristor neuron circuit in achieving symmetric neuromorphic behavior. The hardware part uses the DE2-115 development board of Cyclone IV E series FPGA, whose main chip is EP4CE115F29C7, a 14-bit dual-channel AD9767 digital-to-analog converter chip, and a digital oscilloscope. The experimental setup diagram is shown in the attached diagram. Figure 7 In designing a continuous chaotic system using an FPGA, the first step is to discretize the system. Considering accuracy issues, an improved Euler algorithm is chosen to discretize the memristor neuron circuit, described as follows:

[0070]

[0071] Where Δt represents the iteration step size, set to Δt = 2 -14 The circuit was dynamically adjusted to operate at ampere-level current and second-level time by setting both scale factors τ1 and τ2 to 1, optimizing hardware resource utilization. All calculations were performed on the FPGA using 32-bit signed fixed-point numbers in Q16.16 format (i.e., 16-bit integers and 16-bit fractional numbers). Finally, the data was configured to a 6-bit integer and 8-bit fractional number format, and the results were output to an oscilloscope via a 14-bit DAC module. The final results and a comparison graph of the numerical simulation results are shown in the attached figure. Figure 8 Appendix Figure 9 Appendix Figure 10 and appendix Figure 11 The memristor parameters are a1 = 2, capacitance C = 30nF, and inductance L = 30mH. The biphasic action potentials captured by the oscilloscope in the memristor neuron circuit, driven by periodic square wave signals with amplitude of 1.4V and periods of T = 5s, 6s, 7s, 8s, 9s, and 10s, are shown in the attached figure. Figure 8 As shown in the figure. The biphasic action potentials captured by the oscilloscope of the memristor neuron circuit driven by periodic sinusoidal signals with amplitude of 1.4V and frequencies of f = 0.05kHz, 0.04kHz, and 0.03kHz are displayed in the attached figure. Figure 9 Symmetrical bidirectional periodic spikes and inductor current-output voltage (i) of memristor neurons under DC voltage ±1.6V driving were experimentally measured. L -V out The experimental measurements and numerical simulation results of the planar centrosymmetric periodic attractor are presented in the appendix. Figure 10 Symmetrical bidirectional chaotic spikes and inductor current-output voltage (i) of memristor neurons under DC voltage ±1.8V driving were experimentally measured. L -V outExperimental measurements and numerical simulation results of the planar centrosymmetric chaotic attractor are presented in the appendix. Figure 11 The experimentally captured time series and phase trajectories were consistent with the results of MATLAB simulations within a reasonable error range, verifying the accuracy of the results.

[0072] This invention proposes a method for realizing symmetrical neuromorphic behaviors based on symmetrical steady-state memristor neuron circuits. Utilizing the symmetrical steady-state characteristics of memristors, symmetrical local active regions and symmetrical dynamics can be formed. A simple third-order neuron circuit is constructed while retaining its symmetrical steady-state characteristics. This third-order memristor neuron circuit, relying on its symmetrical steady-state characteristics, can exhibit various bidirectional and biphasic neuromorphic behaviors under specific inputs. This is highly similar to the bidirectional and biphasic action potentials generated by biological neurons under complex electrophysiological activities, thus enabling a more comprehensive and realistic simulation of the complex electrophysiological activities of biological neurons. This provides a key device foundation for constructing high-performance, highly realistic neuromorphic computing systems. Specific implementation methods are systematically explained to aid in understanding the core ideas of the method. For those skilled in the art, modifications or equivalent substitutions can be made to the specific implementation methods without departing from the overall concept of this invention. Furthermore, adaptive adjustments can be made to the implementation methods and application scope based on the ideas of this invention. Therefore, the content of this specification should not be construed as a limitation of this invention.

Claims

1. A method for realizing symmetrical neuromorphic behavior based on symmetrical steady-state memristor neuronal circuits, characterized in that... Includes the following steps: S1: Construct a voltage-controlled local active memristor model with negative and positive steady-state symmetry, characterized in that the steady-state distribution has an S-shaped distribution. Where v and i are the voltage across the memristor and the current flowing through it, respectively; x is the state variable of the memristor; a3, a1, k, b3, b1 and b0 are the control parameters of the memristor; G(x) is the memristor derivative function; f(x, v) is the state equation; parameters τ1 and τ2 are both scale factors, τ1 is the time scale of the control system and τ2 is the current scale of the control system. S2: Determine the S-type symmetric steady-state characteristics of the memristor. The mathematical model as described in claim S1 is characterized in that, Setting dx / dt = 0, we obtain the quiescent operating point of the memristor. Using the memristor dynamic path mapping diagram, we observe the steady state of the memristor under various input conditions. We statistically analyze the S-type steady-state distribution of the memristor under different input conditions and observe the distribution of the local active region formed by the S-type symmetrical steady-state characteristics of the memristor. The specific steps are as follows: S21. Let dx / dt = 0. Under different input conditions, obtain the static operating point of the memristor, analyze the dynamic path mapping diagram of the memristor under different parameters, and determine the S-shaped symmetric steady-state distribution of the memristor in the xv plane. S22. Based on S21, perform DC current-voltage characteristic analysis on the memristor and observe the N-type local active region formed by the S-type symmetrical steady state of the memristor. S23. Apply sinusoidal signals of fixed amplitude and different frequencies to the two ends of the memristor and observe the hysteresis loop of the memristor under different steady states to preliminarily determine the symmetry of the dynamic behavior formed by the S-type symmetrical steady state of the memristor. S3: Construct a third-order memristor neuron circuit based on an sigmoid symmetric steady-state memristor that can retain its symmetric steady-state characteristics. Its characteristic is that, based on the symmetric steady-state memristor model analyzed in claims S1 and S2, while retaining the symmetric steady-state and DC-V characteristics of the memristor, a type of memristor neuron circuit with symmetric steady-state characteristics is constructed: Where x,v C and i L These represent the memristor state variables, the voltage across capacitor C, and the current flowing through inductor L, respectively. in The input voltage to the neuron circuit is v. C =V m =V out This represents the output voltage of the neuron. S4: Based on the symmetric steady-state memristor neuron circuit in claim S3, determine bidirectional, biphasic, and other symmetric neuromorphic behaviors. The mathematical model as described in claim S3 is characterized in that, The generation mechanism of bidirectional and biphasic symmetric neuromorphic behaviors of neuronal circuits was determined by using admittance functions. Preliminary solutions were obtained for memristor neuronal circuits using the MATLAB platform, revealing the symmetric steady-state characteristics of the neuronal circuits and their symmetric dynamics in neuromorphic behaviors. The results were then compared and verified using an FPGA digital circuit simulation platform with the MATLAB numerical solution method. The specific implementation steps are as follows: S41. Analyze the admittance function of memristor neurons to determine the generation mechanism of their symmetrical neuromorphic behavior. Based on the generation mechanism of symmetrical neuromorphic behavior in S42, the circuit operating point is biased to the vicinity of the ambiguity edge by input voltage. The memristor neuron circuit is solved by MATLAB, and the distribution of symmetrical regions generated by symmetrical steady-state characteristics is observed. S43. For the memristor neuron circuit proposed in claim S3, a series of bipolar square waves, sine waves and DC signals are input to determine the symmetrical neuromorphic behavior of the memristor neuron circuit driven by bipolar signals. S44. Based on the memristor neuron circuit in claim S3, construct a corresponding discrete digital circuit model, and obtain a series of symmetrical neuromorphic behaviors through an FPGA digital circuit experimental platform. The development board should have the following characteristics: it should have a programmable logic unit or a dedicated computing unit; at least 100 embedded hardware multipliers (DSP blocks) for parallel execution of multiplication operations in the memristor neuron model; An on-chip memory stores neuron state variables and intermediate computational data; a clock management circuit generates the system operating clock. The hardware multiplier, programmable logic unit, and on-chip memory are configured to collaboratively calculate the neuronal dynamics equations of the discrete memristor neuron circuit. A dual-channel digital-to-analog converter chip converts the digital signal into an analog signal, which is then output to a digital oscilloscope with at least 50MHz bandwidth and a 1GS / s sampling rate to obtain reliable measurement results. The oscilloscope captures the neuromorphic behavior of the memristor neuron circuit under different inputs and compares it with the results solved in MATLAB in S43 to verify the correctness of the symmetric steady-state memristor neuron circuit in achieving symmetric neuromorphic behavior. Through the above steps, a method for realizing symmetrical neuromorphic behavior based on symmetrical steady-state memristor neuron circuits is presented.

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