Virtual-real linkage experiment system based on digital twinning

Abstract

The embodiment of the invention discloses a virtual-real linkage experiment system based on digital twinning. The virtual-real linkage experiment system comprises hardware experiment equipment and computer equipment for operating a virtual simulation platform. The hardware experiment equipment comprises a simulator and a plurality of pluggable function modules. And the simulator is in communication connection with the virtual simulation platform through a computer equipment communication interface and communicates with each functional module. And the virtual simulation platform runs the virtual simulation model, receives an operation instruction input by a user through the computer equipment input assembly, performs logic simulation, updates the simulation state of the virtual simulation model, generates simulation state information and sends the simulation state information to the simulator. The simulator converts the simulation state information into a driving signal, drives the corresponding function module to update the physical state, and collects the physical state of each function module to obtain physical state information. The physical state is generated by operation of a user on the corresponding functional module or by the functional module responding to the driving signal. And the virtual simulation platform updates the simulation state of the virtual simulation model according to the physical state information.

Description

Technical Field

[0001] This application relates to the field of experimental teaching equipment technology, and relates to, but is not limited to, a virtual-real linkage experimental system based on digital twins. Background Technology

[0002] Microcomputer Principles and Interface Technology is a crucial core course for engineering majors such as computer science, electronic information, and automation. Experimental teaching in this course plays an irreplaceable role in deepening students' theoretical understanding and cultivating their system design and hardware debugging abilities. In recent years, with the deepening development of educational informatization, higher demands have been placed on the realism of experimental teaching scenarios, the openness of design, the interactivity of the process, and the scientific rigor of evaluation.

[0003] In related technologies, a pure virtual simulation software platform is used to build models of processors, chips, and circuits on a computer, supporting students in flexible circuit design, programming, and logic simulation. Physical hardware experimental equipment based on programmable devices provides a realistic hardware operating environment, enabling students to interact with physical signals and observe actual circuit responses. In the experiment, after completing all design and simulation verification on the virtual simulation software platform, students burn the final generated program code into the hardware device for independent execution, thereby achieving functional verification.

[0004] However, the hardware experimental equipment in related technologies uses fixed modules and closed buses, resulting in rigid hardware functions and poor expandability. Experimental content is pre-defined, making it difficult for students to conduct independent design and limiting the expansion of their innovative design space. Furthermore, the overall size of the hardware is large, making it poorly portable, and the fixed combination of computers and experimental kits is difficult to adapt to the needs of cross-campus or blended learning. In addition, teachers can only rely on the final results of student experiments for teaching evaluation, making it difficult to reflect students' thinking and exploration process during the experiments. Summary of the Invention

[0005] In view of this, the embodiments of this application provide a virtual-real linkage experimental system based on digital twins, which at least solves the problems of fixed hardware functions and separation of virtual and real states in existing teaching experimental platforms.

[0006] The technical solution of this application embodiment is implemented as follows: This application provides a virtual-real linkage experimental system based on digital twins, including a computer device and hardware experimental equipment; the computer device runs a virtual simulation platform; the hardware experimental equipment includes a simulator and multiple functional modules; the simulator is communicatively connected to the virtual simulation platform through the communication interface of the computer device; the simulator is also communicatively connected to the multiple functional modules; each of the functional modules is pluggable onto the hardware experimental equipment. The virtual simulation platform is used to run a virtual simulation model, receive operation commands input by the user through the input component of the computer device, perform logical simulation on the virtual simulation model based on the operation commands, update the simulation state of the virtual simulation model, generate simulation state information corresponding to the simulation state, and send the simulation state information to the simulator; wherein, the virtual simulation model is used to simulate the function of each functional module in the hardware experimental equipment; The simulator is used to convert the simulation state information into driving signals that drive the corresponding functional modules, so as to drive the corresponding functional modules to update their physical states. The simulator is also used to collect the physical state of each of the functional modules in real time to obtain the corresponding physical state information; wherein the physical state is generated by the user's operation on the corresponding functional module, or by the functional module responding to the drive signal; The virtual simulation platform is also used to update the simulation state of the virtual simulation model based on the physical state information.

[0007] The beneficial effects of the technical solutions provided in this application include at least the following: This application achieves modularity and scalability of hardware experimental equipment by using a simulator and multiple pluggable functional modules, solving the problems of fixed hardware functions and poor scalability in traditional experimental equipment, and providing a flexible foundation for students' independent design. It establishes state synchronization between the hardware experimental equipment and the virtual simulation platform by transmitting simulation state information from the virtual simulation platform, driving signals of the hardware experimental equipment, updating the physical state of corresponding functional modules, and transmitting the physical state information of each functional module in the hardware experimental equipment to the simulation state update of the virtual simulation model. This state synchronization replaces the traditional asynchronous compilation and burning mode, realizing real-time driving of the hardware experimental equipment by virtual operations on the virtual simulation platform, and real-time feedback of the physical state of the hardware experimental equipment to the virtual simulation model, solving the problem of separation between virtual and real states in teaching experimental systems. Therefore, this application realizes the hardware flexibility and scalability of the teaching experimental system, as well as real-time interaction between software and hardware. Furthermore, due to the transmission of state information throughout the entire process, the system possesses full-process teaching evaluation capabilities. Attached Figure Description

[0008] To more clearly illustrate the technical solutions in the embodiments of this application, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort, wherein: Figure 1 A schematic diagram of the main structure of a virtual-real linkage experimental system based on digital twins provided in this application embodiment; Figure 2 A detailed structural diagram of a virtual-real linkage experimental system based on digital twins is provided for an embodiment of this application; Figure 3 This is a schematic diagram of the structure of multiple functional modules in the system provided in the embodiments of this application. Detailed Implementation

[0009] To make the objectives, technical solutions, and advantages of the embodiments of this application clearer, the technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, not all embodiments. The following embodiments are used to illustrate this application, but are not intended to limit the scope of this application. Based on the embodiments in this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0010] In the following description, references are made to “some embodiments,” which describe a subset of all possible embodiments. However, it is understood that “some embodiments” may be the same subset or different subsets of all possible embodiments and may be combined with each other without conflict.

[0011] It should be noted that the terms "first, second, and third" used in the embodiments of this application are merely to distinguish similar objects and do not represent a specific ordering of objects. It is understood that "first, second, and third" can be interchanged in a specific order or sequence where permitted, so that the embodiments of this application described herein can be implemented in an order other than that illustrated or described herein.

[0012] It will be understood by those skilled in the art that, unless otherwise defined, all terms used herein (including technical and scientific terms) have the same meaning as commonly understood by one of ordinary skill in the art to which the embodiments of this application pertain. It should also be understood that terms such as those defined in general dictionaries should be understood to have a meaning consistent with their meaning in the context of the prior art, and should not be interpreted in an idealized or overly formal sense unless specifically defined as herein.

[0013] This application provides a virtual-real linkage experimental system 100 based on digital twins. Figure 1 This is a schematic diagram of the main structure of a virtual-real linkage experimental system based on digital twins, provided in an embodiment of this application.

[0014] like Figure 1As shown, the system 100 includes at least: a computer device 110 and a hardware experimental device 120; the computer device 110 runs a virtual simulation platform 1101; the hardware experimental device 120 includes a simulator 1201 and multiple functional modules 1202; the simulator is communicatively connected to the virtual simulation platform through the communication interface of the computer device; the simulator is also communicatively connected to the multiple functional modules; each of the functional modules is pluggable onto the hardware experimental device. The virtual simulation platform 1101 is used to run a virtual simulation model, receive operation instructions input by the user through the input component of the computer device, perform logical simulation on the virtual simulation model based on the operation instructions, update the simulation state of the virtual simulation model, generate simulation state information corresponding to the simulation state, and send the simulation state information to the simulator; wherein, the virtual simulation model is used to simulate the function of each functional module in the hardware experimental device; The simulator 1201 is used to convert the simulation state information into driving signals that drive the corresponding functional modules, so as to drive the corresponding functional modules to update their physical states. The simulator 1201 is also used to collect the physical state of each of the functional modules in real time to obtain the corresponding physical state information; wherein, the physical state is generated by the user's operation on the corresponding functional module, or by the functional module responding to the drive signal; The virtual simulation platform 1101 is also used to update the simulation state of the virtual simulation model based on the physical state information.

[0015] The computer equipment runs a virtual simulation platform. This platform is used to load and run virtual simulation models corresponding to the functional modules in the hardware experimental equipment, providing a user interface. One or more virtual simulation models can run simultaneously within the platform.

[0016] Based on the system of this application, software can drive hardware, that is, control hardware experimental equipment in real time through the operation of computer devices. For example, when a user sets the state of a simulated functional module to "on" in a virtual simulation platform, the user operation is ultimately converted into a drive signal by the simulator, driving the corresponding real functional module on the hardware experimental equipment to turn on. The simulated functional module corresponds to the real functional module; when the simulated functional module is an LED, the corresponding LED on the real functional module also lights up.

[0017] In some embodiments, the functional modules necessary to complete the core experiments can be integrated into the hardware experimental equipment according to the teaching syllabus and experimental requirements of a specific course, while the functional modules used for expanding or selecting experiments can be set in the hardware experimental equipment in a pluggable manner.

[0018] For example, in the basic experiments of the course "Microcomputer Principles and Interface Technology", parallel input interfaces, parallel output interfaces and programmable timers and counters can be integrated as fixed functional modules on the hardware motherboard of the hardware experimental equipment to complete the most basic input, output and timing experiments of the course.

[0019] Based on the system of this application, hardware-triggered software can also be implemented, that is, controlling computer equipment by controlling hardware experimental equipment. For example, when a user operates a real functional module on the hardware experimental equipment, the change in its physical state is collected in real time by the simulator and converted into corresponding physical state information, which is then sent back to the virtual simulation platform to drive the corresponding simulated functional module in the virtual simulation platform to update its state synchronously. The real functional module corresponds to the virtual simulated functional module. When a button on the real functional module is pressed, the corresponding virtual button in the virtual simulation interface will also be displayed as pressed.

[0020] This application achieves modularity and scalability of hardware experimental equipment by using a simulator and multiple pluggable functional modules, solving the problems of fixed hardware functions and poor scalability in traditional experimental equipment, and providing a flexible foundation for users' independent design of experimental equipment. It establishes state synchronization between the hardware experimental equipment and the virtual simulation platform by transmitting simulation state information from the virtual simulation platform, driving signals of the hardware experimental equipment, updating the physical state of corresponding functional modules, and transmitting the physical state information of each functional module in the hardware experimental equipment to the simulation state update of the virtual simulation model. This state synchronization replaces the traditional asynchronous compilation and burning mode, realizing real-time driving of the hardware experimental equipment by virtual operations on the virtual simulation platform, and real-time feedback of the physical state of the hardware experimental equipment to the virtual simulation model, solving the problem of separation between virtual and real states in teaching experimental systems. Therefore, this application realizes the hardware flexibility and scalability of the teaching experimental system, as well as real-time interaction between software and hardware. Furthermore, due to the transmission of state information throughout the entire process, the system possesses full-process teaching evaluation capabilities.

[0021] Below, in conjunction with Figure 2 This application provides a detailed description of a virtual-real linkage experimental system based on digital twins. Figure 2 This is a detailed structural diagram of a virtual-real linkage experimental system based on digital twins, provided for an embodiment of this application.

[0022] In some embodiments, the hardware experimental device 120 further includes a hardware motherboard 1203, an address decoder 1205, and a bus expansion module 1204; the simulator, the address decoder, and the bus expansion module are integrated on the hardware motherboard; the bus expansion module is communicatively connected to the simulator. The address decoder is connected between the emulator and the bus expansion module, and is used to decode the drive signal to select the corresponding functional module connected on the bus expansion module; The bus expansion module is provided with a standardized interface for multiple functional modules to be plugged in, so that each functional module can communicate with the emulator through the bus expansion module and the bus expansion module can provide operating power to the emulator.

[0023] The main component of the hardware experimental equipment is the hardware motherboard, also known as the pocket experimental board. The hardware motherboard integrates an emulator, an address decoder, and a bus expansion module.

[0024] Preferably, the address decoder can be implemented using a discrete decoder chip. For example, a discrete decoder chip is a 74HC138 chip.

[0025] The overall design of the hardware motherboard is implemented through a layered structure, including a simulation layer, a verification layer, and an expansion layer. The simulation and verification layers are implemented by an emulator integrated on the hardware motherboard. The emulator's simulation layer is responsible for signal synchronization and port mapping with the virtual simulation platform, while the verification layer executes control instructions and drives functional modules through the microprocessor core circuitry. The expansion layer connects various pluggable functional modules through standardized interfaces provided by the bus expansion module, supporting the access and customized development of multiple functional modules.

[0026] Furthermore, to adapt to different experimental teaching scenarios, the hardware experimental equipment adopts a modular structure design, with each functional module capable of independent operation or joint testing. Each functional module is connected to the hardware experimental equipment via standardized pin headers, with unified interface definitions for easy expansion and development. Users can select the circuit model of the corresponding functional module and load the driver file in the virtual simulation platform; the system automatically identifies the module's number and function type. This modular structure design not only improves the system's maintainability and scalability but also allows users to flexibly combine different functional modules according to experimental requirements, enabling diverse experimental solutions.

[0027] This application implements a modularization and plug-and-play identification and automatic configuration mechanism for functional modules, enabling plug-and-play functionality and improving the flexibility and scalability of teaching experiments.

[0028] In some embodiments, the simulator is connected to the computer device via a USB communication interface, which is also used to provide external power input to the hardware experimental device.

[0029] The communication interface can be either a wired communication interface or a wireless communication interface.

[0030] The wired communication interface can be a USB communication interface. Preferably, the USB communication interface can be a USB Type-C interface. The USB Type-C interface realizes dual-channel composite transmission of power supply and data transmission through an integrated control chip. The first channel is responsible for power supply and status monitoring between software and hardware, and the second channel is used for full-duplex asynchronous data interaction, thereby combining power and data links on a single interface and simplifying the system wiring.

[0031] Wireless communication interfaces can include Bluetooth and Wi-Fi interfaces. When computer equipment and hardware experimental platforms establish a data connection through wireless communication interfaces, the power supply of the hardware experimental equipment can be provided independently by its built-in rechargeable battery or an external power adapter, which enables the hardware experimental equipment to be plug-and-play.

[0032] In some embodiments, the hardware experimental device 120 is configured as a portable hardware experimental device; the planar area of ​​the hardware motherboard is less than a preset threshold.

[0033] The hardware experimental device can be a pocket-sized device, with a compact overall size. The preset threshold is a small value. For example, the length and width of the hardware experimental device are both less than 20 cm, and the height is less than 2 cm. The preset threshold can be set to 310.8 square centimeters, meaning the surface area of ​​the hardware experimental device is equal to the area of ​​a standard A5 sheet of paper. Based on this small size design, users can easily put the pocket-sized experimental device in their pocket or carry it with them. This miniaturization of the hardware motherboard is a key foundation for achieving high portability and making the device suitable for multi-scenario and mobile experimental teaching.

[0034] In some embodiments, the simulator is configured as a PSIM simulator; the PSIM simulator includes a hardware state table; the hardware state table stores the current state information of each functional module; the hardware state table is used to synchronize the simulation state of the virtual simulation model with the physical state of each functional module. The virtual simulation platform is used to send the simulation status information to the PSIM emulator; The PSIM emulator is used to receive the simulation status information and update the hardware status table based on the simulation status information; monitor changes in the hardware status table, generate corresponding drive signals, and control the physical state of the corresponding functional module based on the drive signals. The PSIM emulator is also used to collect the physical state of each of the functional modules to obtain physical state information; and to update the hardware state table based on the physical state information. The virtual simulation platform is used to periodically read the hardware status table and update the simulation status of the virtual simulation model based on the current physical status information of each functional module in the hardware status table.

[0035] The PSIM emulator possesses complete microprocessor architecture simulation capabilities. It establishes a virtual bus interface between the Proteus virtual simulation environment and the hardware motherboard, enabling bidirectional mapping between logic signals and physical ports.

[0036] The PSIM emulator works collaboratively through a three-layer architecture: a bus transaction layer, an event-driven layer, and a state table layer. The bus transaction layer samples and drives the microprocessor bus timing and multiplexed bus, generating discrete bus transactions. The event-driven layer delivers bus transactions to the corresponding virtual simulation model, triggering changes in the virtual simulation model's registers, pins, or interrupt states to update its simulation state. The state table layer maintains and records the hardware state table.

[0037] When signal delays or deviations occur between the virtual simulation platform and the hardware experimental equipment, the system automatically executes synchronization correction commands to maintain the synchronization of the corresponding functional modules in the virtual simulation platform and the hardware experimental equipment. Specifically, a conservative synchronization strategy based on global ticks is adopted, using a fixed time interval as a unified timing advancement benchmark to ensure that the processor, bus, and peripherals advance in coordination at each tick boundary, thereby avoiding cross-domain signal contention. Within each tick, execution is carried out step by step according to the order of address latching, read / write signal activation, and data sampling drive in the processor's standard bus cycle to meet the precise timing constraints of various functional modules. For scenarios such as high-frequency port operations, the system employs event merging and debouncing processing to reduce data transmission and interface refresh load while maintaining the millisecond-level real-time perception performance required for teaching.

[0038] Therefore, the system achieves bidirectional real-time linkage between software-driven hardware and hardware-triggered software. Software-driven hardware means that user operations in the Proteus virtual simulation environment are converted into bus transactions by the PSIM emulator, ultimately driving the functional modules on the hardware motherboard to update synchronously with the virtual simulation platform. Hardware-triggered software means that changes in the state of physical buttons or sensors on the hardware motherboard are sampled by the PSIM emulator and updated in the hardware state table, thereby driving the virtual functional modules and waveform displays in the Proteus virtual simulation environment to refresh synchronously. This design ensures real-time synchronization and consistency between virtual and physical experiments, improving the real-time performance and system stability of virtual-real signal interaction.

[0039] In some embodiments, the physical state includes a first physical state and a second physical state; the plurality of functional modules include an input module, an output module, and an interface and control module; The input module is used to collect the first physical state; the first physical state is determined based on user input or environmental changes. The output module is used to generate the corresponding second physical state based on the driving signal; The interface and control module are used to provide a signal path and implement access control between the simulator and the input module, or between the simulator and the output module.

[0040] Figure 3 This is a schematic diagram illustrating the structure of multiple functional modules in the system provided in the embodiments of this application. For example... Figure 3 As shown, the input module includes a bus input unit, a matrix keypad, an adjustable potentiometer, and a light sensor. The output module includes LEDs, a digital tube display, an LCD display, a buzzer, a relay, and a dot-matrix LED. The interface and control module includes a parallel input interface, a parallel output interface, a programmable parallel interface, a programmable timer / counter, a programmable interrupt controller, a programmable serial communication interface, a direct memory access controller, a digital-to-analog converter, and an analog-to-digital converter.

[0041] The functional modules also include auxiliary modules, which include a reference signal source, a clock divider, and a serial communication interface.

[0042] Specifically, in the input module, the bus input unit is an 8-bit bus input unit, and the matrix keypad is a 4x4 matrix keypad. In the output module, the LEDs are 16-bit sequential LEDs, the digital tubes are 8-bit 8-segment LEDs, the LCD display is an LCD12864 LCD screen, and the dot matrix LEDs are 8x8 dot matrix LEDs. In the interface and control module, the parallel input interface is an 8-bit bus input interface, the parallel output interface is an 8-bit bus output interface, the programmable parallel interface is an 8255 programmable parallel communication interface, the programmable timer / counter is an 8253 programmable timer or counter, the programmable interrupt controller is an 8259 programmable interrupt controller, the programmable serial communication interface is an 8251 programmable serial communication interface, and the direct memory access controller is an 8237 DMA controller and memory.

[0043] In some embodiments, the virtual simulation platform is set as the Proteus virtual simulation environment, and the virtual simulation platform 1101 includes a processor simulation module 11011, a driver and acquisition module 11012 and a simulator interface module 11013. The processor simulation module is used to perform logical simulation on the virtual simulation model based on the operation instructions, generate a first logic signal, and update the simulation state of the virtual simulation model; the processor simulation module can be configured to simulate multiple heterogeneous microprocessor architectures. The driving and acquisition module is connected to the processor simulation module and is used to receive the first logic signal and convert the first logic signal into simulation status information. The simulator interface module is connected to the driver and acquisition module and is used to send the simulation status information to the simulator and obtain the current physical status information of each of the functional modules from the simulator. The driving and acquisition module is also used to convert the physical state information into a second logic signal that can be recognized by the processor simulation module; The processor simulation module is also used to update the simulation state of the virtual simulation model based on the second logic signal.

[0044] The Proteus virtual simulation environment can run on a cloud server or a local computer device.

[0045] The Proteus virtual simulation environment integrates virtual simulation models of the 8086 processor and commonly used peripheral chips, and supports the use of the MASM32 assembler and Digital Mars C++ compiler for programming and compiling assembly and C languages.

[0046] A variety of virtual-real interactive teaching experiments can be conducted on the virtual simulation platform. For example, during I / O read / write experiments, users operate virtual LED switches in the Proteus virtual simulation environment, and their status is synchronized in real time to the hardware experimental equipment, driving the physical LEDs to produce corresponding changes. Similarly, during assembly programming experiments, users write, compile, and run 8086 assembly programs in the Proteus virtual simulation environment. The program's execution results are displayed on a virtual digital tube within the Proteus virtual simulation environment, and simultaneously displayed on the physical digital tube of the hardware experimental equipment, achieving consistency between the execution results of the virtual simulation platform and the hardware experimental equipment.

[0047] In some embodiments, the system further includes a cloud server; the cloud server is communicatively connected to the computer device; and the computer device integrates an authentication client. The authentication client is used to send an authentication request to the cloud server when the virtual simulation platform starts. The cloud server is used to verify multiple authentication requests; when the verification is successful, the cloud server generates an access token and sends the access token to the authentication client to authorize the virtual simulation platform to run. The cloud server is also used to concurrently manage the number of authorized online virtual simulation platforms in order to count the number of currently online users.

[0048] Authentication requests may include a username, password, client identifier, and timestamp. The client identifier may include a hardware serial number or machine code. The cloud server is a licensed cloud server.

[0049] The system in this application adopts a centralized authentication architecture, which consists of three collaborative parts: an authentication client, a cloud server, and an authorization management database. The authentication client runs on various computer devices within the virtual simulation platform. It automatically activates upon platform startup, establishes a secure connection with the cloud server, and sends an authentication request. Upon receiving the request, the cloud server retrieves pre-stored user registration information, authorization status, and concurrent license count from the authorization management database. It verifies the request, generates a time-sensitive access token upon successful verification, returns the token to the authentication client, and authorizes the client to access software functions. The authorization management database stores user accounts, password hashes, authorization levels, and session states, supporting dynamic updates and maintenance to provide data support for authentication and authorization decisions. Through hardware identity binding and dynamic authorization management, the authentication mechanism ensures the legitimacy of user identities and the traceability of experimental data while supporting approximately 300 concurrent online users.

[0050] The execution process of the above authentication mechanism includes the following steps: (1) Authentication mechanism is activated. When a user starts the Proteus virtual simulation environment on a computer device, the authentication client automatically begins to detect the user's authorization status.

[0051] (2) Connect to the cloud server. If the user's authorization status is invalid, the authentication client connects to the cloud server via HTTPS protocol and sends an authentication request.

[0052] (3) Cloud server verification. After receiving the authentication request, the cloud server first verifies the timestamp in the authentication request to prevent replay attacks. Then, it queries the authorization database to determine the legitimacy of the user's identity and the number of concurrent online users. If the number of users does not exceed the total number of licenses on the cloud server and the user authentication is successful, the cloud server generates a unique access token and sets the validity period of the access token.

[0053] (4) Token Return and Authorization Activation. After receiving the access token, the authentication client writes the access token to the Proteus virtual emulation environment, activating the functionality of the Proteus virtual emulation environment. During operation, the Proteus virtual emulation environment periodically sends heartbeat packets to the server to maintain the connection. If the cloud server detects that the user is offline or has not sent a heartbeat packet within the timeout period, it will release the corresponding access authorization seat, causing the user to go offline.

[0054] (5) Concurrency Management and Status Monitoring. The server counts the number of concurrent online users in real time. When the number of online users reaches the preset limit, new user login requests will be queued or rejected, and a message will be displayed indicating that the online user limit has been reached. Administrators can view user login records, online user curves, and usage time statistics reports in the background.

[0055] All authentication requests and access tokens are transmitted encrypted, and passwords are stored and verified using hashes to prevent the exposure of sensitive information in plaintext. In the event of network fluctuations or temporary service interruptions, the authentication client can switch to a short-term offline buffer mode, continuing to run for a limited time and automatically synchronizing its state upon recovery, thus avoiding experimental interruptions. For scenarios with multiple users concurrently online, the cloud server uses a multi-threaded queue to process authentication requests, combined with connection pool optimization technology, ensuring that the average authentication response time is less than 0.5 seconds when a preset number of users are online simultaneously, thereby achieving secure, stable, and efficient large-scale teaching access management. For example, the preset number can be 300.

[0056] In some embodiments, the computer device is further provided with a data acquisition and evaluation module; The data acquisition and evaluation module is used to collect and record the user's first operation log for the virtual simulation platform, and the user's second operation log for each of the functional modules; the first operation log includes program compilation, software debugging, and error logs. The data acquisition and evaluation module is further configured to bind the first operation log and the second operation log with user identity information and upload them to the cloud server to obtain experimental process data; and generate an analysis report for evaluation based on the experimental process data.

[0057] User logins, logouts, and abnormal system behaviors are all recorded in timestamped log files by the data collection and evaluation module. At the same time, the system provides a standard API interface that can be connected to the smart teaching platform to achieve unified identity authentication and experimental data integration.

[0058] The system integrates multi-channel data acquisition capabilities. The hardware experimental board has a built-in multi-channel analog-to-digital converter module, which can automatically acquire multiple analog signals during virtual-real synchronization and embed the sampled data into the hardware status table and upload it in real time. The virtual simulation platform synchronously plots signal curves through a built-in waveform display component. The sampling frequency, resolution, and number of channels are all configurable, supporting sampling frequencies from 10 Hz to 10 kHz, 8-bit or 12-bit resolution, and up to 8 acquisition channels.

[0059] To ensure data integrity and reliability, the system maintains a circular buffer for each acquisition channel to temporarily store recent data. When a sudden data change or communication anomaly is detected, data retransmission is triggered and the anomaly is marked. All acquired data and experimental operations can be recorded as either a first or second operation log, including timestamps, experiment numbers, channel sample values, hardware status, and operation records. After the experiment is completed, the experimental data can be completely exported for error analysis, time-domain characteristic studies, or automated evaluation.

[0060] In experimental teaching, software logs are used to fully record students' experimental operations, including the entire compilation and execution process, error messages, debugging steps, and different trial-and-error approaches. This data not only reproduces students' thought processes and problem-solving paths during the experiment but also provides teachers with a richer evaluation dimension than a single experimental result.

[0061] Based on this process data, teachers can conduct digital teaching evaluation from the following aspects: (1) Completeness and standardization of experimental operations: judge whether students have completed the necessary steps according to the experimental requirements and whether they have basic experimental literacy. (2) Problem analysis and debugging ability: analyze students' thinking methods and problem-solving efficiency when facing problems through error handling and debugging paths. (3) Exploratory nature of the learning process: record the diversity and rationality of students' attempts and evaluate their self-learning and innovative thinking abilities. (4) Degree of achievement of final results: combine experimental output and intermediate process to form a comprehensive evaluation of results and process.

[0062] In some embodiments, the processor emulation module includes a lock signal sending unit and a timeout detection unit; the emulator includes a lock confirmation unit; The locking signal sending unit is used to send a locking signal to the simulator before the virtual simulation platform sends the simulation status information; The lock confirmation unit is used to return a lock confirmation signal to the processor simulation module after the emulator receives the lock signal; The virtual simulation platform is used to send the simulation status information to the simulator after receiving the lock confirmation signal; The timeout detection unit is used to trigger the virtual simulation platform to suspend operation when the virtual simulation platform does not receive the lock confirmation signal within a preset time.

[0063] The communication interlock mechanism enables the virtual simulation platform to send lock signals and perform timeout detection, as well as the simulator to confirm lock status. Before the virtual simulation platform sends simulation status information to the simulator, the lock signal sending unit first sends a lock signal to the simulator. Upon receiving the lock signal, the simulator's lock confirmation unit immediately returns a lock confirmation signal to the virtual simulation platform. After successfully receiving the lock confirmation signal, the virtual simulation platform sends the simulation status information to the simulator. Simultaneously, the virtual simulation platform's timeout detection unit continuously monitors the lock confirmation signal. If the virtual simulation platform does not receive a lock confirmation signal from the simulator within a preset time, it suspends the operation of the virtual simulation platform or stops sending simulation status information to the simulator.

[0064] The aforementioned communication interlock mechanism can avoid instruction conflicts and state inconsistencies between the virtual simulation platform and the simulator caused by communication delays, packet loss, or hardware insecurity, thereby ensuring the synchronization and reliability between simulation operations and hardware responses.

[0065] In some embodiments, to prevent signal disturbances caused by hot-swapping of a functional module during the experiment, this application incorporates a hardware protection mechanism—specifically, optocoupler isolation and transient suppression circuitry—in the connection between the bus expansion module and each functional module of the hardware experimental equipment. When a functional module is inserted or removed, a delayed sampling mechanism waits for the bus signal to stabilize before updating the system's internal module configuration table. This design effectively avoids data conflicts and power glitches caused by instantaneous voltage fluctuations or signal contention, significantly improving the electrical safety and operational stability of the experimental system in teaching applications.

[0066] In some embodiments, the virtual simulation platform is an integrated environment built on Protues software, providing circuit design, simulation debugging, and program compilation functions for experiments based on the 8086 processor, and supporting various interactive virtual-physical linkage experiments. The hardware experimental equipment adopts a highly integrated modular architecture. Each functional module is relatively independently mounted on the hardware experimental equipment bus, requiring only chip select signal connections during experiments, greatly reducing the complex wiring operations in traditional experiments and improving experimental efficiency. Simultaneously, combined with the simulation functions of Protues software, it can effectively train and improve users' circuit design and debugging capabilities. There is a complete virtual-physical mapping relationship between the hardware experimental equipment and the virtual simulation platform. The hardware experimental equipment integrates commonly used functional modules and expansion interfaces necessary for the course. For modules or circuits not integrated on the physical hardware, users can design and simulate them in the Protues virtual simulation environment, meeting the needs of extended experiments.

[0067] The experimental procedure of this system is described in detail below, including the following steps: S1: Experimental Environment Preparation. Set up an experimental system consisting of computer equipment, the Proteus virtual simulation environment, the PSIM emulator, and the hardware experimental equipment. Connect the hardware experimental equipment to the computer equipment via a USB communication interface and install the corresponding drivers. After the system starts, the Proteus virtual simulation environment loads the experimental model file, and the PSIM emulator starts its listening service, automatically establishing a bidirectional communication link between the computer equipment and the hardware experimental equipment. This process, based on a unified communication protocol, achieves a plug-and-play connection between the virtual simulation platform and the hardware experimental equipment, significantly reducing the manual configuration steps required in traditional experiments.

[0068] S2: Simulation Circuit Design and Virtual-Real Mapping. Users construct a minimal system model based on the 8086 microprocessor within the Protues virtual simulation environment, adding necessary I / O expansion interface circuits and peripheral circuits. Control programs are written in assembly or C language and compiled and debugged using the integrated debugger within the Protues virtual simulation environment. Logical addresses are assigned to each I / O signal within the Protues virtual simulation environment, and a corresponding physical port mapping table is established on the hardware experimental equipment to achieve a one-to-one correspondence between logical signals and physical circuit pins. When users operate or execute programs through the Protues virtual simulation environment interface, simulation status information is transmitted to the hardware experimental equipment in real time, driving synchronous changes in the input and output states of the corresponding functional modules. This completes the bidirectional and parallel mapping between simulation status information and physical status information, improving the coupling accuracy between virtual and real experiments.

[0069] S3: Data Acquisition and Result Verification. The data acquisition and evaluation module collects real-time voltage, current, and logic level data for each I / O channel, as well as operation logs for the entire compilation, debugging, and error reporting process. It also records the execution process of code instructions, including the current instruction and its system state before and after execution, along with the compilation, debugging, and error reporting logs. The collected operation logs are transmitted back to the computer via a communication channel for numerical comparison and error analysis by the PSIM simulator. After the experiment, the system saves complete operation logs and the collected operation logs. This achieves automated data acquisition, comparison, and archiving, ensuring the traceability and consistency of experimental results.

[0070] S4: Experiment Evaluation and Extended Applications. After the experiment, the system can automatically generate an experiment report based on the recorded execution time, error logs, and virtual-to-real synchronization comparison results. If the extended function is enabled, users can upload the virtual simulation model and operation logs to the cloud-based teaching platform for remote sharing and automated evaluation. Furthermore, the system supports quickly switching experiment content by changing functional modules, such as performing different experiments like memory expansion, timed counting, or analog-to-digital conversion, demonstrating the system's excellent scalability and versatility.

[0071] It should be noted that, in the embodiments of this application, if the methods in the above system are implemented as software functional modules and sold or used as independent products, they can also be stored in a computer-readable storage medium. Based on this understanding, the technical solutions of the embodiments of this application, or the parts that contribute to related technologies, can be embodied in the form of software products. These computer software products are stored in a storage medium and include several instructions to cause an electronic device to execute all or part of the methods described in the various embodiments of this application. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), magnetic disks, or optical disks. Thus, the embodiments of this application are not limited to any specific hardware and software combination.

[0072] Correspondingly, embodiments of this application provide a computer-readable storage medium storing a computer program thereon, which, when executed by a processor, implements the steps in any of the systems described in the above embodiments. Correspondingly, embodiments of this application also provide a computer program product, which, when executed by a processor of an electronic device, is used to implement the method steps in any of the systems described in the above embodiments.

[0073] It should be understood that the phrase "one embodiment" or "an embodiment" throughout the specification means that a specific feature, structure, or characteristic related to the embodiment is included in at least one embodiment of this application. Therefore, "in one embodiment" or "in an embodiment" appearing throughout the specification does not necessarily refer to the same embodiment. Furthermore, these specific features, structures, or characteristics can be combined in any suitable manner in one or more embodiments. It should be understood that in the various embodiments of this application, the sequence numbers of the above-described processes do not imply a sequential order of execution; the execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of this application. The sequence numbers of the above-described embodiments are merely descriptive and do not represent the superiority or inferiority of the embodiments.

[0074] It should be noted that, in this document, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Unless otherwise specified, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes that element.

[0075] In the several embodiments provided in this application, it should be understood that the disclosed devices and methods can be implemented in other ways. The device embodiments described above are merely illustrative. For example, the division of units is only a logical functional division, and in actual implementation, there may be other division methods, such as: multiple units or components can be combined, or integrated into another system, or some features can be ignored or not executed. In addition, the coupling, direct coupling, or communication connection between the various components shown or discussed can be through some interfaces, and the indirect coupling or communication connection between devices or units can be electrical, mechanical, or other forms.

[0076] The units described above as separate components may or may not be physically separate, and the components shown as units may or may not be physical units; they may be located in one place or distributed across multiple network units; some or all of the units may be selected to achieve the purpose of the embodiments of this application according to actual needs. In addition, each functional unit in the embodiments of this application may be fully integrated into one processing unit, or each unit may be a separate unit, or two or more units may be integrated into one unit; the integrated unit may be implemented in hardware or in the form of hardware plus software functional units.

[0077] Alternatively, if the integrated units described above are implemented as software functional modules and sold or used as independent products, they can also be stored in a computer-readable storage medium. Based on this understanding, the technical solutions of the embodiments of this application, or the parts that contribute to related technologies, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause the device automatic test line to execute all or part of the methods described in the various embodiments of this application. The aforementioned storage medium includes various media capable of storing program code, such as mobile storage devices, ROMs, magnetic disks, or optical disks.

[0078] The methods disclosed in the several method embodiments provided in this application can be arbitrarily combined to obtain new method embodiments without conflict. The features disclosed in the several method or device embodiments provided in this application can be arbitrarily combined to obtain new method embodiments or device embodiments without conflict.

[0079] The above description is merely an embodiment of this application, but the scope of protection of this application is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.

Claims

1. A virtual-real linkage experimental system based on digital twins, characterized in that, The system includes computer equipment and hardware experimental equipment; the computer equipment runs a virtual simulation platform; the hardware experimental equipment includes a simulator and multiple functional modules; the simulator communicates with the virtual simulation platform through the communication interface of the computer equipment; the simulator also communicates with the multiple functional modules; each of the functional modules is pluggable onto the hardware experimental equipment. The virtual simulation platform is used to run a virtual simulation model, receive operation commands input by the user through the input component of the computer device, perform logical simulation on the virtual simulation model based on the operation commands, update the simulation state of the virtual simulation model, generate simulation state information corresponding to the simulation state, and send the simulation state information to the simulator; wherein, the virtual simulation model is used to simulate the function of each functional module in the hardware experimental equipment; The simulator is used to convert the simulation state information into driving signals that drive the corresponding functional modules, so as to drive the corresponding functional modules to update their physical states. The simulator is also used to collect the physical state of each of the functional modules in real time to obtain the corresponding physical state information; wherein the physical state is generated by the user's operation on the corresponding functional module, or by the functional module responding to the drive signal; The virtual simulation platform is also used to update the simulation state of the virtual simulation model based on the physical state information.

2. The system according to claim 1, characterized in that, The hardware experimental equipment also includes a hardware motherboard, an address decoder, and a bus expansion module; the simulator, the address decoder, and the bus expansion module are integrated on the hardware motherboard; the bus expansion module is communicatively connected to the simulator. The address decoder is connected between the emulator and the bus expansion module, and is used to decode the drive signal to select the corresponding functional module connected on the bus expansion module; The bus expansion module is provided with a standardized interface for multiple functional modules to be plugged in, so that each functional module can communicate with the emulator through the bus expansion module and the bus expansion module can provide operating power to the emulator.

3. The system according to claim 2, characterized in that, The hardware experimental device is configured as a portable hardware experimental device; the planar area of ​​the hardware motherboard is less than a preset threshold.

4. The system according to claim 1, characterized in that, The simulator is configured as a PSIM simulator; the PSIM simulator is equipped with a hardware status table; the hardware status table stores the current status information of each functional module; the hardware status table is used to synchronize the simulation status of the virtual simulation model with the physical status of each functional module. The virtual simulation platform is used to send the simulation status information to the PSIM emulator; The PSIM emulator is used to receive the simulation status information and update the hardware status table based on the simulation status information; monitor changes in the hardware status table, generate corresponding drive signals, and control the physical state of the corresponding functional module based on the drive signals. The PSIM emulator is also used to collect the physical state of each of the functional modules to obtain physical state information; and to update the hardware state table based on the physical state information. The virtual simulation platform is used to periodically read the hardware status table and update the simulation status of the virtual simulation model based on the current physical status information of each functional module in the hardware status table.

5. The system according to claim 1, characterized in that, The simulator communicates with the computer device via a USB communication interface, which is also used to provide external power input to the hardware experimental device.

6. The system according to claim 1, characterized in that, The physical state includes a first physical state and a second physical state; the multiple functional modules include an input module, an output module, and an interface and control module; The input module is used to collect the first physical state; The first physical state is determined based on user input or environmental changes; The output module is used to generate the corresponding second physical state based on the driving signal; The interface and control module are used to provide a signal path and implement access control between the simulator and the input module, or between the simulator and the output module.

7. The system according to claim 1, characterized in that, The virtual simulation platform is set as the Proteus virtual simulation environment, and the virtual simulation platform includes a processor simulation module, a driver and acquisition module, and a simulator interface module. The processor simulation module is used to perform logical simulation on the virtual simulation model based on the operation instructions, generate a first logic signal, and update the simulation state of the virtual simulation model. The processor simulation module can be configured to simulate various heterogeneous microprocessor architectures. The driving and acquisition module is connected to the processor simulation module and is used to receive the first logic signal and convert the first logic signal into simulation status information. The simulator interface module is connected to the driver and acquisition module and is used to send the simulation status information to the simulator and obtain the current physical status information of each of the functional modules from the simulator. The driving and acquisition module is also used to convert the physical state information into a second logic signal that can be recognized by the processor simulation module; The processor simulation module is also used to update the simulation state of the virtual simulation model based on the second logic signal.

8. The system according to claim 1, characterized in that, The system also includes a cloud server; the cloud server is communicatively connected to the computer device; the computer device integrates an authentication client; The authentication client is used to send an authentication request to the cloud server when the virtual simulation platform starts. The cloud server is used to verify multiple authentication requests; Upon successful verification, the cloud server generates an access token and sends the access token to the authentication client to authorize the virtual simulation platform to run. The cloud server is also used to concurrently manage the number of authorized online virtual simulation platforms in order to count the number of currently online users.

9. The system according to claim 8, characterized in that, The computer device is also equipped with a data acquisition and evaluation module; The data acquisition and evaluation module is used to collect and record the user's first operation log for the virtual simulation platform, and the user's second operation log for each of the functional modules; the first operation log includes program compilation, software debugging, and error logs. The data acquisition and evaluation module is also used to bind the first operation log and the second operation log with user identity information and upload them to the cloud server to obtain experimental process data; An analysis report for evaluation is generated based on the experimental process data.

10. The system according to claim 7, characterized in that, The processor simulation module includes a lock signal sending unit and a timeout detection unit; the simulator includes a lock confirmation unit. The locking signal sending unit is used to send a locking signal to the simulator before the virtual simulation platform sends the simulation status information; The lock confirmation unit is used to return a lock confirmation signal to the processor simulation module after the emulator receives the lock signal; The virtual simulation platform is used to send the simulation status information to the simulator after receiving the lock confirmation signal; The timeout detection unit is used to trigger the virtual simulation platform to suspend operation when the virtual simulation platform does not receive the lock confirmation signal within a preset time.

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