Pattern transfer and process control method for improving yield of circuit board
By optimizing development parameters, standardizing pretreatment, and implementing physical isolation for transport, the problems of open and short circuit defects in alkaline etching processes have been solved, enabling high-yield production of high-density circuit boards, especially suitable for printed circuit boards with line width/spacing ≤75μm.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2026-01-05
- Publication Date
- 2026-04-03
AI Technical Summary
Existing alkaline etching processes have open-circuit and short-circuit defects in the production of high-density circuit boards. Traditional processes are difficult to optimize, resulting in low product yield, especially low first-pass yield (PNL yield) of the entire board.
By optimizing development parameters, standardizing pretreatment and electroplating maintenance, and adopting physical isolation transport methods, a collaborative control system is formed throughout the entire process to ensure the stability of pattern generation, plating quality, and physical protection. This includes precise setting of development points and speeds, periodic bath maintenance, and rack transport.
It significantly improves the overall yield of circuit boards, especially the yield of PNL (Power Line Layout), and achieves simultaneous suppression of open and short circuit defects. It is suitable for the manufacturing of precision circuit boards with line width/spacing ≤75μm.
Abstract
Description
Technical Field
[0001] This invention relates to the field of circuit board manufacturing technology, specifically to a method for pattern transfer and process control to improve circuit board yield. Background Technology
[0002] With the rapid development of electronic devices towards high performance, miniaturization, and lightweight design, printed circuit boards (PCBs), as the core carriers of electronic components, are experiencing continuously increasing wiring density and shrinking line widths / spacings. This presents a severe technical challenge to alkaline etching, a key process for circuit pattern formation. Balancing high yield with high precision has become a critical problem that the industry urgently needs to solve. Currently, when using alkaline etching to produce high-density interconnect boards, the industry commonly faces the predicament of high incidence of defects such as open circuits (notches), short circuits (bridging, residual copper), and incomplete etching, resulting in a low overall product yield, especially the first-pass yield (PNL yield). A deeper analysis reveals that the root cause lies in multiple interconnected limitations in the existing process system that are difficult to optimize collaboratively: Firstly, the inherent contradiction between the precision and stability of pattern transfer. The development process, as the starting point of patterning, requires crucial control precision. In practice, to avoid the risk of "open circuits" caused by over-development leading to non-perpendicularity and insufficient strength of the resist film sidewalls, production often tends to adopt a more conservative development point and speed. However, this conservative strategy often leads to incomplete cleaning of the bottom of the pattern, leaving trace amounts of resist or activating substances that form weak points in subsequent electroplating and hinder the uniform action of the etching solution, thus inducing "residual copper" or "bridging" type short circuits. Under fine line conditions, this "give-and-take" relationship between open / short circuit risks is even more acute, and traditional process windows are no longer sufficient. Secondly, there is the volatility and lack of traceability in process control. Pre-treatment steps such as degreasing, micro-etching, and pickling before pattern electroplating, as well as the management of the electroplating solution itself, have a decisive impact on the uniformity, density, and adhesion of the final coating. Current production largely relies on non-standardized, experience-based maintenance and solution addition, lacking systematic periodic maintenance and precise median control standards. This makes the activity of the bath solution, the micro-etching rate, and the condition of the board surface unstable, directly leading to fluctuations in coating quality. This volatility is amplified in the etching stage, becoming a source of random defects that are difficult to predict and control, seriously affecting the consistency and reliability of the process. Thirdly, there is the prevalence and destructiveness of physical damage between processes. From the completion of pattern plating to the various processes before etching (such as transfer and routing), boards are typically handled using simple methods like stacking and piling. The fragile resist plating (such as tin plating) is easily scratched, indented, or even partially peeled off under friction, collision, and pressure between boards. These minor physical damages can quickly develop into obvious circuit gaps (open circuits) or chemical penetration points (short circuits) under the strong chemical action of subsequent alkaline etching. These mechanically caused defects often have regional and batch-specific characteristics and are one of the main reasons for the significant decrease in PNL yield.
[0003] In summary, the causes of open-circuit and short-circuit defects are intertwined across multiple dimensions, including chemical, electrochemical, and physical-mechanical aspects. Traditionally, isolated "point-based" improvements to a single parameter are no longer sufficient to achieve breakthroughs. Therefore, the industry urgently needs a new method that can systematically integrate and collaboratively optimize key control points throughout the entire process, from "pattern generation" to "etch protection," to break through existing technological bottlenecks and achieve a substantial improvement in the yield of high-density printed circuit boards. Summary of the Invention
[0004] The purpose of this invention is to overcome the technical contradictions existing in the current alkaline etching process: in the production of high-density circuit boards, conservative development control to reduce open-circuit defects often leads to insufficient cleaning of the pattern bottom, increasing the risk of short circuits and residual copper; at the same time, rough pretreatment and improper board transfer methods can further induce plating defects and physical damage, making it difficult to improve the overall board yield (PNL yield). Therefore, this invention provides a pattern transfer and process control method to improve circuit board yield. Through the triple synergy of pattern optimization, process stabilization, and physical protection, it achieves simultaneous suppression of open-circuit and short-circuit defects, thereby significantly improving the first-pass yield, especially suitable for the manufacture of precision circuits.
[0005] The technical solution of this invention is:
[0006] A method for improving circuit board yield through pattern transfer and process control includes the following steps:
[0007] Step S1, Development: Control the development point to 60%-70% and the development speed to 3.5-4.5 m / min; By controlling the development point and speed within this optimized range, it is possible to remove the unexposed resist film while forming a clear circuit pattern with steep sidewalls and no residue at the bottom, providing an initial protective layer with excellent erosion resistance for subsequent etching.
[0008] Step S2, Stabilization Pretreatment and Pattern Electroplating: Before pattern electroplating, the treatment tanks for degreasing, micro-etching, and pickling processes are periodically maintained, and the concentrations of chemicals and additives in the copper and tin baths during pattern electroplating are maintained within the median range. This step ensures the cleanliness of the board surface, micro-roughness, and uniformity and density of the plating deposition by establishing a traceable maintenance cycle and strict process control points, thereby enhancing the overall reliability of the pattern protective layer.
[0009] Step S3, Routing and Etching: During all inter-process transfers from pattern electroplating to etching completion, circuit boards are transported using racks or cage carts to isolate them from each other. This transfer method spatially isolates each board, effectively avoiding direct contact, sliding, and collisions between board surfaces, thereby eliminating plating scratches, pressure damage, and the resulting short circuit risks caused by physical friction.
[0010] Preferably, in step S1, the developing point is controlled at 65% and the developing speed is 3.8 m / min.
[0011] Furthermore, in step S2, the periodic maintenance includes: changing the chemical solution in the degreasing tank every two weeks, changing the chemical solution in the micro-etching tank and pickling tank every week, and updating the water washing tank every shift.
[0012] Furthermore, prior to step S1, the process includes replacing the water in the rinsing section of the developing machine and cleaning its conveyor rollers and extrusion sponge rollers.
[0013] Furthermore, the method is applicable to the production of printed circuit boards with a line width / spacing of less than or equal to 75 μm.
[0014] Compared with the prior art, the pattern transfer and process control method for improving circuit board yield provided by the present invention has the following advantages:
[0015] I. The pattern transfer and process control method for improving circuit board yield of this invention innovatively integrates and synergistically optimizes three elements belonging to different process stages: "pattern accuracy control," "process stability maintenance," and "physical damage prevention." Specifically, precise setting of development parameters lays a high-quality pattern foundation for the entire process; standardized maintenance of pretreatment and electroplating ensures absolute stability in the intermediate state; and mandatory physical isolation during transfer provides ultimate protection for fragile patterns. By synergistically controlling multiple links, these three elements are interconnected, forming a defect prevention and control system covering the entire chain from "pattern generation to plating enhancement to pre-etching protection," solving the industry problem of limited improvement effects from single links. This method, by constructing a full-process quality assurance system from pattern generation to final etching, is particularly suitable for the manufacturing of precision circuit boards with linewidth / spacing ≤75μm, achieving a breakthrough improvement in overall board yield.
[0016] II. The pattern transfer and process control method for improving PCB yield in this invention achieves simultaneous optimization of opposing quality indicators: In traditional processes, open circuits (over-etching) and short circuits / residual copper (under-etching) defects often increase in opposite directions. This invention optimizes the developing process, ensuring sufficient cleaning of the bottom of the pattern (preventing short circuits) while maintaining the verticality and mechanical strength of the resist film sidewalls (preventing open circuits); standardized pretreatment and electroplating maintenance ensures uniform plating without weak points, and physical isolation during transfer completely eliminates plating damage caused by external forces (the main cause of short circuits). This synergistic effect breaks the correlation between open circuit and short circuit defects, achieving a significant reduction in both simultaneously, thereby driving a breakthrough improvement in overall board yield (PNL yield).
[0017] Third, the pattern transfer and process control method for improving the yield of printed circuit boards in this invention enhances the universality and stability of the process: The method of this invention forms a set of clear, quantifiable and reproducible process specifications (such as development range, maintenance cycle and transfer tools), which are not only applicable to specific model boards, but also provide a stable and reliable quality assurance paradigm for the large-scale production of high-density, fine-line printed circuit boards, reducing production fluctuations and having significant industrial promotion value. Detailed Implementation
[0018] To enable those skilled in the art to better understand the technical solutions in the embodiments of the present invention, and to make the above-mentioned objectives, features and advantages of the present invention more apparent and understandable, the specific embodiments of the present invention will be further described below.
[0019] The endpoints and any values of the ranges disclosed herein are not limited to the precise ranges or values, and these ranges or values should be understood to include values close to these ranges or values. For numerical ranges, the endpoint values of the various ranges, the endpoint values of the various ranges and individual point values, and individual point values can be combined with each other to obtain one or more new numerical ranges, which should be considered as specifically disclosed herein.
[0020] Example 1
[0021] An alkaline etching process for circuit boards includes the following steps:
[0022] Step S1: Take 72 production panels (totaling 19,936 individual circuit units (Pieces)). First, pre-treat the developing machine, including replacing the water in the washing tank and thoroughly cleaning all conveyor rollers and extrusion sponge rollers. Then, control the developing point to stabilize at 65%, and set the developing speed to 3.8 m / min. Under these conditions, the resist film pattern has steep sidewalls and no visible residue at the bottom, providing a high-quality base pattern for subsequent processes.
[0023] Step S2, Stabilization Pretreatment and Pattern Electroplating: Before pattern electroplating, the pretreatment tanks are maintained strictly according to the following schedule: the degreasing tank solution is changed every two weeks, the micro-etching tank and pickling tank solutions are changed weekly, and all water washing tanks are replaced every production shift. Simultaneously, through an automated dosing system and laboratory analysis, the main chemical components (such as copper sulfate, tin salts, and acid concentration) and organic brightener concentrations in the copper and tin tanks of the pattern electroplating line are precisely adjusted and continuously controlled within the median range of the process specifications. This process ensures the consistency of board surface cleaning and activation and the high uniformity of plating deposition.
[0024] Step S3, Routing and Etching: From the time the pattern is electroplated until the etching is completed, all boards are carried and moved between processes (including storage, transfer to the router room for shaping, and transfer to the etching line) using special racks to ensure that each board is independently separated and there is no contact between the board surfaces.
[0025] After etching, all units were scanned using automated optical inspection (AOI). The defect statistics were as follows: 65 units with open circuits / notches, 95 units with short circuits / residual copper, 17 units with scratches, and 15 boards with no defects (good boards). The calculated product yield per unit (pcs yield) was 99.1%, while the product yield per board (pnl yield) reached 20.8%.
[0026] Example 2
[0027] An alkaline etching process for circuit boards includes the following steps:
[0028] Step S1, Development: Take 72 production master boards (19936 units) from the same batch and design as in Example 1. Perform the same pretreatment in a developer as in Example 1. Then, control the development point at 50% and set the development speed to 3.3 m / min. After development, the bottom of the pattern is visually good, but there may be slight residues at the microscopic level, and the sidewall angle is slightly gentle.
[0029] Step S2, Stabilization Pretreatment and Pattern Electroplating: This step is exactly the same as in Example 1, that is, the same periodic tank maintenance and strict chemical neutralization control standards are performed.
[0030] Step S3, Routing and Etching: This step is exactly the same as in Example 1. All boards are carried and moved using special racks between processes (including storage, transfer to the router room for shaping, and transfer to the etching line) to ensure that each board is independently separated and there is no contact between the board surfaces.
[0031] The etching and AOI inspection results are as follows: 69 cells with open circuits / notches, 127 cells with short circuits / residual copper, 1 cell with a dent, 11 cells with off-center vias, and 2 cells with scratches. Only 4 boards were completely defect-free. The calculated pcs yield is 98.85%, while the PNL yield is only 5.5%.
[0032] As can be seen from the comparative analysis of Example 2 and Example 1, under the same excellent pretreatment and physical protection transport conditions, the final PNL yield (5.5%) was significantly lower than that of Example 1 (20.8%) simply because non-optimized development parameters were used (50% development points, development speed 3.3 m / min). This indicates that even with strict control of the back-end process, insufficient development pattern quality will still directly lead to a significant increase in defects such as short circuits / residual copper, becoming a key bottleneck restricting the improvement of overall board yield. The alkaline etching process for circuit boards of the present invention effectively solves this problem by synergistically optimizing development parameters.
[0033] In summary, the pattern transfer and process control method for improving circuit board yield provided by this invention, by precisely controlling the development point to 65%, standardizing the pattern maintenance process and circuit board transfer method, effectively reduces defects such as open circuits and short circuits, and can improve the PNL yield to 20.8% and the pcs yield to 99%, significantly improving the product qualification rate.
[0034] The pattern transfer and process control method for improving the yield of printed circuit boards of the present invention is particularly suitable for the production of printed circuit boards with line width / line spacing of less than or equal to 75μm.
[0035] The embodiments of the present invention have been described in detail above, but the present invention is not limited to the described embodiments. For those skilled in the art, various changes, modifications, substitutions, and variations made to these embodiments without departing from the principles and spirit of the present invention still fall within the protection scope of the present invention.
Claims
1. A method for pattern transfer and process control to improve circuit board yield, characterized in that, Includes the following steps: Step S1, Development: Control the development point to 60%-70%, and the development speed to 3.5-4.5 m / min; Step S2, Stabilization Pretreatment and Pattern Electroplating: Before pattern electroplating, the treatment tanks for degreasing, micro-etching and pickling processes are periodically maintained, and the concentrations of chemicals and additives in the copper and tin tanks during pattern electroplating are maintained within the median range. Step S3, Routing and Etching: During all inter-process transfers from pattern electroplating to etching completion, circuit boards are transported using racks or cage carts to isolate the boards from each other.
2. The method for graphic transfer and process control of circuit board yield according to claim 1, characterized in that, In step S1, the developing point is controlled at 65% and the developing speed is 3.8 m / min.
3. The method for graphic transfer and process control of circuit board yield according to claim 1, characterized in that, In step S2, the periodic maintenance includes: changing the chemical solution in the degreasing tank every two weeks, changing the chemical solution in the micro-etching tank and pickling tank every week, and updating the water washing tank every shift.
4. The method for pattern transfer and process control to improve circuit board yield according to claim 1, characterized in that, Before step S1, the process also includes replacing the water in the rinsing section of the developing machine and cleaning its conveyor rollers and extrusion sponge rollers.
5. The method for pattern transfer and process control to improve circuit board yield according to claim 1, characterized in that, The method is applicable to the production of printed circuit boards with a line width / line spacing of 75μm or less.