Tin seepage prevention method and structure of packaging substrate, electronic equipment and medium

Abstract

The invention discloses a tin seepage prevention method and structure of a packaging substrate, electronic equipment and a medium, and relates to the technical field of packaging substrates. The method comprises the steps of obtaining a substrate to be subjected to solder mask; carrying out super roughening on the surface of the to-be-solder-mask substrate; coating a first ink layer on the substrate to be subjected to solder mask after the super roughening; carrying out pre-curing and vacuum flattening on the first ink layer; exposing and developing the first ink layer after precuring and vacuum flattening; baking and curing the first ink layer; dry film type printing ink is attached to the surface of the substrate to be subjected to solder mask, vacuum flattening is conducted on the dry film type printing ink, and a second printing ink layer is obtained; exposing and developing the second ink layer to form a second window corresponding to the first window, and forming a second solder resist bridge on the surface of the first solder resist bridge; baking and curing the second ink layer; and detecting the printing ink flatness of the to-be-solder-mask substrate according to the detection area. According to the method provided by the embodiment of the invention, tin permeation can be prevented, and the phenomenon of bridge falling can be avoided.

Description

Technical Field

[0001] This invention relates to the field of packaging substrate technology, and in particular to a method, structure, electronic device, and medium for preventing tin penetration into a packaging substrate. Background Technology

[0002] With the rapid development of the electronics and information industry, packaging substrates are becoming increasingly functional and their internal circuit designs are becoming more complex. Therefore, the areas around the solder pad openings on the packaging substrate often have dense wire bonding areas. During the soldering process, solder paste can easily overflow and connect to the wire bonding finger areas, leading to a short circuit between the wire bonding area and the solder pad area. Currently, to prevent solder bleed-through, solder mask bridges are typically created between the solder pads. However, current solder mask bridges have relatively low adhesion to the solder mask ink, making them prone to detachment. Summary of the Invention

[0003] This invention aims to at least solve one of the technical problems existing in the prior art. To this end, this invention proposes a method, structure, electronic device, and dielectric for preventing solder penetration into a packaging substrate, which can prevent solder penetration and avoid bridging phenomena.

[0004] In a first aspect, a method for preventing tin penetration into a packaging substrate according to an embodiment of the present invention includes the following steps: Obtain a substrate to be soldered; the substrate to be soldered is provided with circuit pads, the substrate to be soldered is provided with a detection area, and the detection area is provided with detection pads; The surface of the substrate to be solder resisted is roughened; A first ink layer is applied to the roughened substrate to be solder resisted. The first ink layer is pre-cured and vacuum flattened; The first ink layer after pre-curing and vacuum flattening is exposed and developed to obtain a number of first windows and a number of first solder mask bridges; the circuit pads and the detection pads are located in the corresponding first windows, and the first solder mask bridges are located on the periphery of the corresponding circuit pads or the detection pads. The first ink layer is baked and cured; A dry film ink is attached to the surface of the substrate to be solder resisted, and the dry film ink is vacuum-pressed to obtain a second ink layer; The second ink layer is exposed and developed to form a second window corresponding to the first window, and a second solder resist bridge is formed on the surface of the first solder resist bridge. The second ink layer is baked and cured; The ink flatness of the substrate to be soldered is detected based on the detection area.

[0005] According to some embodiments of the present invention, the process of applying a first ink layer to the roughened substrate to be solder resisted includes: A first-stage coating is applied to the surface of the substrate to be solder resisted after the surface has been roughened. The temperature of the first-stage coating is set to 80°C, the time is set to 10 min, the line speed is set to 1.0 m / min, and the pressure is set to -160 MPa. A pre-baking process is performed on the coated substrate to be solder resisted. The substrate to be solder resisted after a pre-baked section is subjected to a two-stage coating; the temperature of the two-stage coating is set to 80°C, the time is set to 60 min, the line speed is set to 1.0 m / min, the dwell time is set to 30 s, and the pressure is set to -200 MPa. The substrate to be solder resisted after the two-stage coating is pre-baked in two stages to form the first ink layer.

[0006] According to some embodiments of the present invention, the step of attaching dry film ink to the surface of the substrate to be solder resisted and vacuum-flattening the dry film ink to obtain a second ink layer includes: Dry film ink is applied to both sides of the substrate to be solder resisted; The temperature of the first stage of vacuum flattening is set to 80°C, the time is set to 20s, and the pressure is set to 0.8MPa to flatten the dry film ink in one stage. The temperature of the second stage of vacuum flattening is set to 70°C, the time is set to 30s, and the pressure is maintained at 0.8MPa. The dry film ink is flattened in two stages to obtain a second ink layer; the thickness of the second ink layer is controlled at 25±4μm.

[0007] According to some embodiments of the present invention, the exposure and development of the second ink layer includes: The exposure energy was reduced to 230 mJ, and the second ink layer was exposed. After exposure, the exposure is allowed to stand for a preset time, which is greater than 1 hour; After standing, the second ink layer is developed.

[0008] According to some embodiments of the present invention, the step of detecting the ink flatness of the substrate to be solder resisted based on the detection area includes: The substrate to be soldered is sliced ​​according to the detection area to obtain a detection board; The ink flatness of the test plate is detected and analyzed using a three-dimensional profilometer.

[0009] According to some embodiments of the present invention, after the step of slicing the substrate to be solder resisted according to the detection area to obtain a detection board, the method further includes: The surface hardness of the second solder bridge was tested using a 6h pencil. The first ink layer was peeled off using a 6h pencil.

[0010] According to some embodiments of the present invention, the roughening of the surface of the substrate to be solder resisted includes: The linear speed of the substrate to be soldered is controlled at 3.0±0.5m / min during the ultra-roughening process, and the etching amount is controlled at 0.1±0.1μm; The surface of the substrate to be solder resisted is roughened to give it a hook-like texture. Secondly, the anti-tin penetration structure of the packaging substrate according to the embodiments of the present invention is manufactured by the anti-tin penetration method of the packaging substrate described in the above embodiments.

[0011] Thirdly, an electronic device according to an embodiment of the present invention includes: a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein when the processor executes the computer program, it implements the method for preventing tin penetration of the packaging substrate as described in the first aspect embodiment. Fourthly, according to an embodiment of the present invention, a computer-readable storage medium stores a computer program, which, when executed by a processor, implements the method for preventing tin penetration of a packaging substrate as described in the first aspect embodiment.

[0012] The anti-tin penetration method, structure, electronic device, and dielectric of the packaging substrate according to embodiments of the present invention have at least the following beneficial effects: The process of combining dry and wet inks (i.e., a first ink layer and a second ink layer) improves the tin penetration problem. First, a first solder resist bridge is formed using the first ink layer, and then a second solder resist bridge is formed on the surface of the first solder resist bridge using the second ink layer, thereby enhancing the strength of the solder resist bridge and preventing bridge breakage caused by processes such as side etching, thus improving product yield. Simultaneously, by designing detection areas and detection pads, the quality of the ink layer and solder resist bridge can be detected and controlled, ensuring that the quality of the ink layer and solder resist bridge meets requirements, and enabling timely improvement of each process when problems occur.

[0013] Additional aspects and advantages of the invention will be set forth in part in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention. Attached Figure Description

[0014] The above and / or additional aspects and advantages of the present invention will become apparent and readily understood from the description of the embodiments taken in conjunction with the following drawings, in which: Figure 1 This is a flowchart illustrating the steps of the method for preventing tin penetration into the packaging substrate according to an embodiment of the present invention. Figure 2 for Figure 1 The flowchart showing the specific steps of step S300 is shown. Figure 3 for Figure 1 The flowchart showing the specific steps of step S700 is shown. Figure 4 for Figure 1 The flowchart showing the specific steps of step S800 is shown. Figure 5 for Figure 1 The flowchart showing the specific steps of step S1000 is shown. Figure 6 for Figure 5 The flowchart showing the specific steps of step S1010 is shown. Figure 7 for Figure 1 The flowchart showing the specific steps of step S200 is shown. Detailed Implementation

[0015] The embodiments of the present invention are described in detail below. Examples of these embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions throughout. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain this application, and should not be construed as limiting this application. The step numbers in the following embodiments are set only for ease of explanation, and there is no limitation on the order between the steps. The execution order of each step in the embodiments can be adaptively adjusted according to the understanding of those skilled in the art.

[0016] In the description of this invention, it should be understood that the orientation descriptions, such as up, down, front, back, left, right, etc., are based on the orientation or positional relationship shown in the accompanying drawings. They are only for the convenience of describing this invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limiting this invention.

[0017] The terms "first," "second," "third," and "fourth," etc., used in the specification, claims, and accompanying drawings of this invention are used to distinguish different objects, not to describe a specific order. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover non-exclusive inclusion. For example, a process, method, system, product, or apparatus that includes a series of steps or units is not limited to the listed steps or units, but may optionally include steps or units not listed, or may optionally include other steps or units inherent to these processes, methods, products, or apparatuses.

[0018] In this invention, the reference to "embodiment" means that a specific feature, structure, or characteristic described in connection with an embodiment may be included in at least one embodiment of the invention. The appearance of this phrase in various places throughout the specification does not necessarily refer to the same embodiment, nor is it a mutually exclusive, independent, or alternative embodiment. It will be explicitly and implicitly understood by those skilled in the art that the embodiments described herein can be combined with other embodiments.

[0019] With the rapid development of the electronics and information industry, packaging substrates are becoming increasingly functional and their internal circuit designs are becoming more complex. Therefore, the areas around the solder pad openings on the packaging substrate often have dense wire bonding areas. During the soldering process, solder paste can easily overflow and connect to the wire bonding finger areas, leading to a short circuit between the wire bonding area and the solder pad area. Currently, to prevent solder bleed-through, solder mask bridges are typically created between the solder pads. However, current solder mask bridges have relatively low adhesion to the solder mask ink, making them prone to detachment.

[0020] To address this, embodiments of the present invention provide a method, structure, electronic device, and dielectric for preventing solder penetration in a packaging substrate. By combining dry and wet inks (i.e., a first ink layer and a second ink layer), the solder penetration problem is improved. First, a first solder resist bridge is formed using the first ink layer, and then a second solder resist bridge is formed on the surface of the first solder resist bridge using the second ink layer. This enhances the strength of the solder resist bridge and prevents bridge breakage caused by processes such as side etching, thereby improving product yield. Simultaneously, by designing inspection areas and inspection pads, the quality of the ink layer and solder resist bridge can be inspected and controlled, ensuring that the quality of the ink layer and solder resist bridge meets requirements, and allowing for timely improvement of each process when problems occur.

[0021] The following describes in detail, with reference to the accompanying drawings, the method, structure, electronic device, and medium for preventing tin penetration of the packaging substrate according to embodiments of the present invention.

[0022] On one hand, this invention proposes a method for preventing tin penetration into a packaging substrate, such as... Figure 1 As shown, the method includes the following steps: Step S100: Obtain the substrate to be soldered; the substrate to be soldered has circuit pads, the substrate to be soldered has a detection area, and the detection area has detection pads. Specifically, in this example, the substrate to be solder masked refers to a packaged substrate that has already undergone drilling, via plugging, lamination, and circuit fabrication processes. A solder mask layer needs to be fabricated on the surface of this substrate. Simultaneously, circuit pads are provided on the substrate to facilitate connections between the circuits on the substrate and external components. Furthermore, a detection area with detection pads is provided on the substrate. This detection area and detection pads are used for subsequent quality inspection of solder mask bridges. Each subsequent process performed on the substrate will be carried out simultaneously within the detection area, ensuring that the detection area and detection pads are consistent with the rest of the substrate.

[0023] Step S200: Roughen the surface of the solder resist substrate; Specifically, in this example, before ultra-roughening the surface of the solder resist substrate, a pretreatment is required. This includes using acidic or alkaline degreasing agents to effectively remove fingerprints, oil stains, and other organic contaminants that may have adhered to the substrate during production and transportation, thereby improving the subsequent ultra-roughening effect. Simultaneously, a leveling agent can be used to micro-treat the surface of the solder resist substrate to obtain a more uniform initial surface, ensuring a consistent roughness during subsequent ultra-roughening. During ultra-roughening, a micro-etching solution or other methods are used to ultra-roughen the surface of the solder resist substrate, enhancing the adhesion between the substrate and the subsequent ink layer. Step S300: Apply the first ink layer to the roughened substrate to be solder resisted; Specifically, in this example, the prepared ink can be applied to the surface of the substrate to be solder resisted using a roller to form a first ink layer. The coating process can be divided into two stages. The first coating is primarily responsible for the initial application to the surface of the substrate, while the second coating is responsible for adjusting the thickness of the first ink layer to ensure it is within a suitable range.

[0024] Step S400: Pre-curing and vacuum flattening the first ink layer; Specifically, when the first ink layer is coated, it is necessary to pre-cur the first ink layer and then vacuum flatten it to improve the surface smoothness of the first ink layer.

[0025] Step S500: Expose and develop the first ink layer after pre-curing and vacuum flattening to obtain several first windows and several first solder mask bridges; the circuit pads and test pads are located in the corresponding first windows, and the first solder mask bridges are located on the periphery of the corresponding circuit pads or test pads. Specifically, in this example, an ORC exposure machine is used to expose the first ink layer to achieve image transfer, causing the ink in the illuminated area to undergo a polymerization reaction. After exposure, the ink is allowed to stand for 30 minutes. After standing, it is developed to clean and remove the ink in the areas where the polymerization reaction did not occur, thereby creating a window in the first ink layer. This window exposes all the circuit pads and detection pads of the substrate to be soldered. A first solder mask bridge is formed around each circuit pad and detection pad, thus isolating each pad from the surrounding circuits. When tinning the pads later, the first solder mask bridge can prevent solder penetration, thus avoiding short circuits between the pads and the surrounding circuits caused by solder penetration.

[0026] Step S600: Bake and cure the first ink layer; Specifically, after the first ink layer has been exposed and developed, it needs to be baked and cured to ensure it is fully cured.

[0027] Step S700: Apply dry film ink to the surface of the substrate to be solder resisted, and vacuum flatten the dry film ink to obtain a second ink layer; In this example, after the first ink layer is cured, dry film ink is applied to both sides of the substrate to be solder resisted, and the dry film ink is vacuum flattened to ensure that the product is free of abnormalities such as film wrinkles and bubbles, and to ensure that the thickness of the second ink layer is 25±4um.

[0028] Step S800: Expose and develop the second ink layer to form a second window corresponding to the first window, and form a second solder resist bridge on the surface of the first solder resist bridge; In this example, after vacuum flattening the second ink layer, the second ink layer is then exposed to allow the dry film to fully undergo a polymerization reaction. After exposure, the surface appearance is monitored to ensure there are no splicing marks, suction cup marks, or poor exposure phenomena. After standing, it is developed to form a second window, exposing all the solder pads and forming a second solder mask bridge on the surface of the first solder mask bridge. The solder mask bridge formed by the cooperation of the first and second solder mask bridges has high strength, preventing the first solder mask bridge from falling off due to the side etching phenomenon caused by the exposure process of the first ink layer.

[0029] Step S900: Bake and cure the second ink layer; In this example, after the exposure and development of the second ink layer are completed, the second ink layer is baked and cured to allow it to cure. Step S1000: According to the inspection area, inspect the ink flatness of the solder resist substrate.

[0030] Finally, in the inspection area, the ink flatness is tested to ensure that the ink flatness of the substrate to be soldered meets the requirements. This also allows for improvements to subsequent processes such as coating, exposure, and development if the ink flatness of the substrate does not meet the requirements. Furthermore, the strength of the solder mask bridges can also be tested in the inspection area to ensure that the strength of the solder mask bridges meets the requirements.

[0031] According to the embodiment of the present invention, the method for preventing solder penetration of the packaging substrate improves the solder penetration problem by combining dry and wet inks (i.e., a first ink layer and a second ink layer). First, a first solder resist bridge is formed using the first ink layer, and then a second solder resist bridge is formed on the surface of the first solder resist bridge using the second ink layer, thereby enhancing the strength of the solder resist bridge and avoiding bridge breakage caused by processes such as side etching, thereby improving product yield. At the same time, by designing a detection area and detection pads, the quality of the ink layer and solder resist bridge can be detected and controlled to ensure that the quality of the ink layer and solder resist bridge meets the requirements, and timely improvement can be made to each process when problems occur.

[0032] Furthermore, such as Figure 2 As shown, in some embodiments of the present invention, step S300 above: applying a first ink layer to the roughened substrate to be solder resisted includes the following four sub-steps: Step S310: Perform a first-stage coating on the surface of the ultra-roughened substrate to be solder resisted; the temperature of the first-stage coating is set to 80℃, the time is set to 10min, the line speed is set to 1.0m / min, and the pressure is set to -160Map. Step S320: Perform a pre-baking process on a section of the coated solder mask substrate; Step S330: Perform a second coating on the pre-baked substrate to be solder resisted; the temperature of the second coating is set to 80℃, the time is set to 60min, the line speed is set to 1.0m / min, the dwell time is set to 30s, and the pressure is set to -200Map. Step S340: Perform a two-stage pre-baking on the substrate to be solder resisted after the two-stage coating to form the first ink layer.

[0033] Specifically, after the solder resist substrate is roughened, the coating line directly enters the cleanroom to ensure that no foreign objects or dust adhere to the board surface during the intermediate process, thereby avoiding reduced adhesion and pitting caused by foreign objects on the board surface combining with the ink. The coating process is divided into two stages. The first stage coating is set to a temperature of 80℃, a time of 10 minutes, a line speed of 1.0 m / min, and a pressure of -160 MPa. This first stage coating is a pre-coating of the surface of the solder resist substrate, applying initial oil to the board surface. After the first stage coating, the substrate needs to be pre-baked to pre-cure the ink applied in the first stage. Then, the second stage coating is performed, with a temperature of 80℃ and a time of 60 minutes. In this stage, the ink thickness needs to be adjusted to ensure that the thickness of the first ink layer meets the requirements. Therefore, the required coating time is much longer than that of the first stage coating. At the same time, the line speed is set to 1.0 m / min, the dwell time is set to 30 seconds, and the pressure is set to -200 MPa. By increasing the dwell time and reducing the pressure, the thickness of the first ink layer is ensured to meet the requirements. After coating, a pre-curing process is performed on the product. The first ink layer after coating is baked, currently with a commonly used baking time of 10 minutes and a temperature of 80℃. To reduce lateral etching during subsequent exposure, the pre-curing process is adjusted as follows: the oven temperature is increased to 85℃, and the time is increased to 15 minutes. This increases the curing degree of the first ink layer. By extending the heating time of the ink, the curing effect is enhanced, and it remains in a partially cured state. By dividing the coating process into two stages, the coating and curing effect of the first ink layer is improved, and the lateral etching caused by subsequent exposure is reduced.

[0034] Furthermore, such as Figure 3 As shown, in some embodiments of this application, step S700 above—applying dry film ink to the surface of the substrate to be solder resisted and vacuum-flattening the dry film ink to obtain a second ink layer—includes the following three sub-steps: Step S710: Apply dry film ink to both sides of the substrate to be solder resisted; Step S720: Set the temperature of the first stage of vacuum flattening to 80℃, the time to 20s, and the pressure to 0.8MPa to flatten the dry film ink in one stage. Step S730: Set the temperature of the second stage of vacuum flattening to 70℃, the time to 30s, and the pressure to 0.8MPa to perform two-stage flattening on the dry film ink to obtain the second ink layer; the thickness of the second ink layer is controlled at 25±4μm.

[0035] Specifically, after the first ink layer is fabricated, dry film ink is applied to both sides of the substrate to be solder resisted, and vacuum flattening is performed again to adjust its flatness and uniformity. This allows the dry film ink to be more fully absorbed during the polymerization reaction in subsequent exposure, reducing lateral etching during the development stage. To improve the flattening effect of vacuum flattening, the vacuum flattening stage is divided into two segments. The first segment of vacuum flattening is set at a temperature of 80°C, a time of 20 seconds, and a pressure of 0.8 MPa to flatten the dry film ink. The second segment of vacuum flattening is set at a temperature of 70°C, a time of 30 seconds, and a pressure maintained at 0.8 MPa to flatten the dry film ink a second time, obtaining the second ink layer. The thickness of the second ink layer is controlled at 25±4 μm. The first stage of vacuum flattening has a high temperature, which can quickly reduce the viscosity of the ink and obtain excellent fluidity, thus fully filling the tiny bumps and unevenness on the ink surface. When switching to the second stage, the temperature is reduced and the time is increased, so that the ink can be cured slowly and thoroughly at a lower temperature. This helps to form a dense and uniform ink layer, thereby achieving high flatness.

[0036] Furthermore, such as Figure 4 As shown, in some embodiments of this application, step S800 above, which involves exposing and developing the second ink layer, includes the following three sub-steps: Step S810: Reduce the exposure energy to 230mJ and expose the second ink layer; Step S820: After exposure, allow the object to stand for a preset time, which is greater than 1 hour; Step S830: Develop the second ink layer.

[0037] Specifically, after vacuum flattening the second ink layer, it needs to be exposed and developed. When exposing the second ink layer, the exposure energy needs to be reduced to 230mJ. After exposure, it needs to stand for more than 1 hour before development can be carried out to allow the dry film to fully undergo the polymerization reaction. After exposure, the surface appearance is monitored to ensure that there are no splicing marks, no suction cup marks, and no exposure defects. After standing, it is developed.

[0038] Furthermore, such as Figure 5 As shown, in some embodiments of this application, step S1000 above, which involves detecting the ink flatness of the substrate to be solder resisted based on the detection area, includes the following two sub-steps: Step S1010: According to the detection area, slice the solder resist substrate to be tested to obtain the test board; Step S1020: The ink flatness of the test plate is detected and analyzed using a three-dimensional profilometer.

[0039] Specifically, after the fabrication of the first and second solder resist bridges of the substrate to be soldered is completed, the substrate to be soldered needs to be sliced ​​to cut the test area from the substrate to obtain the test board; then, the ink flatness of the test board surface is collected and analyzed by a three-dimensional profilometer to determine whether the ink flatness of the substrate to be soldered meets the requirements, and if it does not meet the requirements, the corresponding process is improved to improve the quality of subsequent products.

[0040] Furthermore, such as Figure 6 As shown, in some embodiments of this application, after step S1010 described above, the following two steps are further included: Step S1011: Perform a hardness test on the surface of the second solder bridge using a 6h pencil; Step S1012: Perform a peel test on the first ink layer using a 6h pencil.

[0041] The hardness of the solder mask bridge was tested using a 6h pencil, and the ink layer was peeled off to ensure that the strength of the solder mask bridge met the requirements and that the adhesion between the ink layer and the substrate to be soldered was stronger, thus ensuring that the bridge would not fall off. Furthermore, in some embodiments of this application, step S200 above: roughening the surface of the solder resist substrate includes the following two sub-steps: Step S210: Control the linear speed of the substrate to be solder resisted during the ultra-roughening process to be 3.0±0.5m / min, and control the etching amount to be 0.1±0.1μm; Step S220: Roughen the surface of the substrate to be solder resisted to make the surface of the substrate to be solder resisted have a hook-like texture.

[0042] Specifically, before coating, the surface of the solder resist substrate is subjected to an ultra-roughening treatment to make its surface appear as barbed fuzz. In order to better bond with the ink and enhance the adhesion between the ink and the board surface, the line speed is controlled at 3.0±0.5m / min and the etching amount is adjusted to 0.1±0.1um.

[0043] On the other hand, the present invention also proposes an ultrathin double-sided substrate, which is manufactured by the anti-tin penetration method of the packaging substrate described in the above-mentioned embodiments.

[0044] On the other hand, embodiments of the present invention also propose an electronic device, comprising: Memory, used to store program instructions; The processor is used to call the program instructions stored in the memory and execute the above-described method for preventing tin penetration of the packaging substrate according to the obtained program instructions.

[0045] The processor can be implemented using a general-purpose central processing unit (CPU), microprocessor, application specific integrated circuit (ASIC), or one or more integrated circuits, and is used to execute relevant programs to achieve the technical solutions provided in the embodiments of this application. The memory can be implemented in the form of read-only memory (ROM), static storage device, dynamic storage device, or random access memory (RAM). The memory can store the operating system and other applications. When the technical solutions provided in the embodiments of this specification are implemented through software or firmware, the relevant program code is stored in the memory and called by the processor to execute the anti-tinning method of the packaging substrate in the embodiments of this application. The memory and the processor can be connected via a bus or similar means.

[0046] On the other hand, embodiments of the present invention also provide a storage medium, which is a computer-readable storage medium storing a computer program that, when executed by a processor, implements the above-described method for preventing tin penetration onto the packaging substrate.

[0047] Memory, as a non-transitory computer-readable storage medium, can be used to store non-transitory software programs and non-transitory computer-executable programs. Furthermore, memory may include high-speed random access memory, and may also include non-transitory memory, such as at least one disk storage device, flash memory device, or other non-transitory solid-state storage device. In some embodiments, memory may optionally include memory remotely located relative to the processor, and these remote memories can be connected to the processor via a network. Examples of such networks include, but are not limited to, the Internet, intranets, local area networks, mobile communication networks, and combinations thereof. The device embodiments described above are merely illustrative, and the units described as separate components may or may not be physically separate, and may be located in one place or distributed across multiple network units. Some or all of the modules can be selected to achieve the purpose of this embodiment according to actual needs.

[0048] Although specific embodiments are described herein, those skilled in the art will recognize that many other modifications or alternative embodiments are also within the scope of this disclosure. For example, any of the functions and / or processing capabilities described in connection with a particular device or component can be performed by any other device or component. Furthermore, while various exemplary embodiments and architectures have been described according to embodiments of this disclosure, those skilled in the art will recognize that many other modifications to the exemplary embodiments and architectures described herein are also within the scope of this disclosure.

[0049] The foregoing description, with reference to block diagrams and flowcharts of systems, methods, systems, and / or computer program products according to exemplary embodiments, has described certain aspects of this disclosure. It should be understood that one or more blocks in the block diagrams and flowcharts, as well as combinations of blocks in the block diagrams and flowcharts, can be implemented by executing computer-executable program instructions, respectively. Similarly, according to some embodiments, some blocks in the block diagrams and flowcharts may not need to be executed in the order shown, or may not all need to be executed. Furthermore, additional components and / or operations beyond those shown in the blocks in the block diagrams and flowcharts may exist in some embodiments.

[0050] Therefore, blocks in block diagrams and flowcharts support combinations of means for performing a specified function, combinations of elements or steps for performing a specified function, and program instruction means for performing a specified function. It should also be understood that each block in a block diagram and flowchart, and combinations of blocks in block diagrams and flowcharts, can be implemented by a dedicated hardware computer system or a combination of dedicated hardware and computer instructions that performs a specific function, element, or step.

[0051] The program modules, applications, etc., described herein may include one or more software components, including, for example, software objects, methods, data structures, etc. Each such software component may include computer-executable instructions that, in response to execution, cause at least a portion of the functionality described herein (e.g., one or more operations of the exemplary methods described herein) to be performed.

[0052] Software components can be coded using any of a variety of programming languages. An exemplary programming language could be a low-level programming language, such as assembly language associated with a specific hardware architecture and / or operating system platform. Software components including assembly language instructions may need to be converted into executable machine code by an assembler before being executed by the hardware architecture and / or platform. Another exemplary programming language could be a higher-level programming language that is portable across multiple architectures. Software components including higher-level programming languages ​​may need to be converted into an intermediate representation by an interpreter or compiler before execution. Other examples of programming languages ​​include, but are not limited to, macro languages, shell or command languages, job control languages, scripting languages, database query or search languages, or report writing languages. In one or more exemplary embodiments, a software component containing instructions from one of the above-described programming language examples can be executed directly by the operating system or other software components without first being converted into another form.

[0053] Software components can be stored as files or other data storage structures. Software components of similar type or related function can be stored together in a specific directory, folder, or library. Software components can be static (e.g., pre-defined or fixed) or dynamic (e.g., created or modified at runtime).

[0054] The embodiments of the present invention have been described in detail above with reference to the accompanying drawings. However, the present invention is not limited to the above embodiments. Within the scope of knowledge possessed by those skilled in the art, various changes can be made without departing from the spirit of the present invention.

Claims

1. A method for preventing tin penetration into a packaging substrate, characterized in that, Includes the following steps: Obtain a substrate to be soldered; the substrate to be soldered is provided with circuit pads, the substrate to be soldered is provided with a detection area, and the detection area is provided with detection pads; The surface of the substrate to be solder resisted is roughened; A first ink layer is applied to the roughened substrate to be solder resisted. The first ink layer is pre-cured and vacuum flattened; The first ink layer after pre-curing and vacuum flattening is exposed and developed to obtain a number of first windows and a number of first solder mask bridges; the circuit pads and the detection pads are located in the corresponding first windows, and the first solder mask bridges are located on the periphery of the corresponding circuit pads or the detection pads. The first ink layer is baked and cured; A dry film ink is attached to the surface of the substrate to be solder resisted, and the dry film ink is vacuum-pressed to obtain a second ink layer; The second ink layer is exposed and developed to form a second window corresponding to the first window, and a second solder resist bridge is formed on the surface of the first solder resist bridge. The second ink layer is baked and cured; The ink flatness of the substrate to be soldered is detected based on the detection area.

2. The method for preventing tin penetration into the packaging substrate according to claim 1, characterized in that, The process of applying a first ink layer to the roughened substrate to be solder resisted includes: A first-stage coating is applied to the surface of the substrate to be solder resisted after the surface has been roughened. The temperature of the first-stage coating is set to 80°C, the time is set to 10 min, the line speed is set to 1.0 m / min, and the pressure is set to -160 MPa. A pre-baking process is performed on the coated substrate to be solder resisted. The substrate to be solder resisted after a pre-baked section is subjected to a two-stage coating; the temperature of the two-stage coating is set to 80°C, the time is set to 60 min, the line speed is set to 1.0 m / min, the dwell time is set to 30 s, and the pressure is set to -200 MPa. The substrate to be solder resisted after the two-stage coating is pre-baked in two stages to form the first ink layer.

3. The method for preventing tin penetration into the packaging substrate according to claim 1, characterized in that, The process of attaching dry film ink to the surface of the substrate to be solder resisted, and then vacuum-flattening the dry film ink to obtain a second ink layer, includes: Dry film ink is applied to both sides of the substrate to be solder resisted; The temperature of the first stage of vacuum flattening is set to 80°C, the time is set to 20s, and the pressure is set to 0.8MPa to flatten the dry film ink in one stage. The temperature of the second stage of vacuum flattening is set to 70°C, the time is set to 30s, and the pressure is maintained at 0.8MPa. The dry film ink is flattened in two stages to obtain a second ink layer; the thickness of the second ink layer is controlled at 25±4μm.

4. The method for preventing tin penetration into the packaging substrate according to claim 1, characterized in that, The exposure and development of the second ink layer includes: The exposure energy was reduced to 230 mJ, and the second ink layer was exposed. After exposure, the exposure is allowed to stand for a preset time, which is greater than 1 hour; After standing, the second ink layer is developed.

5. The method for preventing tin penetration into the packaging substrate according to claim 1, characterized in that, The step of detecting the ink flatness of the substrate to be soldered based on the detection area includes: The substrate to be soldered is sliced ​​according to the detection area to obtain a detection board; The ink flatness of the test plate is detected and analyzed using a three-dimensional profilometer.

6. The method for preventing tin penetration into the packaging substrate according to claim 5, characterized in that, After the step of slicing the substrate to be solder resisted according to the detection area to obtain the detection board, the method further includes: The surface hardness of the second solder bridge was tested using a 6h pencil. The first ink layer was peeled off using a 6h pencil.

7. The method for preventing tin penetration into the packaging substrate according to claim 1, characterized in that, The process of roughening the surface of the substrate to be solder resisted includes: The linear speed of the substrate to be soldered is controlled at 3.0±0.5m / min during the ultra-roughening process, and the etching amount is controlled at 0.1±0.1μm; The surface of the substrate to be solder resisted is roughened to give it a hook-like texture.

8. A solder-proof structure for a packaging substrate, characterized in that, It is manufactured by the anti-tin penetration method of the packaging substrate as described in any one of claims 1-7.

9. An electronic device, characterized in that, include: A memory, a processor, and a computer program stored in the memory and executable on the processor, wherein when the processor executes the computer program, it implements the method for preventing tin penetration of the packaging substrate as described in any one of claims 1 to 7.

10. A computer-readable storage medium, characterized in that, The package contains a computer program that, when executed by a processor, implements the method for preventing tin penetration onto the packaging substrate as described in any one of claims 1 to 7.

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