Cache data recovery method and device, equipment, storage medium and program product
By migrating cached data to the memory space of a second process before restarting the first process and restoring the data using the memory header structure address after restarting, the problem of cached data loss during process restart is solved, achieving fast and effective data recovery.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2026-01-06
- Publication Date
- 2026-04-07
AI Technical Summary
In storage systems, cached data stored in memory may be lost when a process restarts, making data recovery difficult.
When a process is detected to be restarting, memory space is requested from the second process, the cached data is stored in the memory space of the second process, and after the process restarts, the memory header structure address is obtained through the second process, and the cached data is restored to the memory space of the first process.
It enables rapid recovery of cached data after process restart, avoiding data loss and simplifying the data recovery process.
Smart Images
Figure CN121807623A_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of data caching technology, and in particular to a method, apparatus, device, storage medium, and program product for recovering cached data. Background Technology
[0002] In storage systems, high-speed media can be used to store frequently accessed data, which means storing the data in a memory page cache. When a business needs to read data, it first retrieves data from the page cache, improving data read and access efficiency.
[0003] However, memory data is attached to the process in which it resides. If the process restarts, the cached data stored in its memory may be lost. Summary of the Invention
[0004] Therefore, it is necessary to provide a cached data recovery method, apparatus, device, storage medium, and program product to address the aforementioned technical problems.
[0005] Firstly, this application provides a method for recovering cached data, the method comprising:
[0006] If the system detects that the first process is about to restart, it requests memory space from the second process and stores the cached data stored by the first process in the memory space.
[0007] If the restart of the first process is detected as complete, the memory header structure address of the memory space is obtained through the second process;
[0008] Based on the memory header structure address, the cached data is stored in the memory space of the first process.
[0009] In the above embodiments, firstly, upon detecting that the first process needs to be restarted, memory space is requested from the second process, and the cached data stored by the first process is stored in the memory space. Then, upon detecting that the first process has completed restarting, the memory header structure address of the memory space is obtained through the second process. Finally, based on the memory header structure address, the cached data is stored in the memory space of the first process. In this way, when the first process needs to be restarted, by storing the cached data of the first process in the memory space of the second process, the cached data before the first process restarts can be quickly restored based on the cached data stored in the second process, thus solving the problem of cached data loss upon restarting the first process.
[0010] In one embodiment, upon detecting that the first process is to be restarted, memory space is requested from the second process, and the cached data stored by the first process is stored in the memory space, including:
[0011] If the first process is detected to be restarting, memory space is requested from the second process, and the starting address of the memory space is determined as the address of the memory header structure.
[0012] Based on the memory header address, cached data is stored in memory according to the preset cache structure.
[0013] In the above embodiments, before the first process restarts, cache data is constructed in the form of a tree structure through the memory header structure entry and the preset cache structure, so that the cache data can be obtained and restored according to the memory header structure after the first process restarts.
[0014] In one embodiment, cached data is stored in memory space according to a preset cache structure based on the memory header structure address, including:
[0015] Based on the memory header structure address, the metadata, cache instance, control pointer and cache data corresponding to the cache data are stored in the memory space respectively.
[0016] In the above embodiments, based on the memory header structure address, the metadata, cache instance, control pointer and cache data corresponding to the cache data are stored in the memory space, so that the first process can obtain the cache data and restore it according to the memory header structure after restarting.
[0017] In one embodiment, the method further includes:
[0018] Add marker information to the memory addresses in the memory space that store control pointers and cached data; the marker information is used to indicate that the corresponding memory address has been used.
[0019] In the above embodiments, the memory page usage can be represented by the page description structure, avoiding the duplication of memory allocation for the second process.
[0020] In one embodiment, storing cached data into the memory space of the first process based on the memory header structure address includes:
[0021] Based on the memory header structure address, calculate the updated memory header structure address corresponding to the memory space after the first process restarts;
[0022] Retrieve cached data based on the updated memory header structure address;
[0023] Cache data is stored in the memory space of the first process.
[0024] In the above embodiments, by determining the address of the updated memory header structure, expanding the header structure, traversing the tree structure, and finding all cached data, the cached data of the first process after restarting can be restored simply and efficiently.
[0025] In one embodiment, the updated memory header structure address corresponding to the memory space after the first process restarts is calculated based on the memory header structure address, including:
[0026] Obtain the first base address and the second base address of the first process; the first base address is the memory base address of the first process before restarting, and the second base address is the memory base address of the first process after restarting;
[0027] The algorithm determines the address to update the memory header structure based on the memory header structure address, the first base address, the second base address, and the preset address.
[0028] In the above embodiments, the address of the updated memory header structure after the first process restarts is calculated through address translation, so as to avoid the inability to recover cached data due to the difference in virtual addresses before and after the first process restarts.
[0029] Secondly, this application also provides a cached data recovery apparatus, the apparatus comprising:
[0030] The request module is used to request memory space from the second process when it is detected that the first process is about to be restarted, and to store the cached data stored by the first process into the memory space;
[0031] The acquisition module is used to obtain the memory header structure address of the memory space through the second process when the restart of the first process is detected to be complete.
[0032] The storage module is used to store cached data into the memory space of the first process according to the memory header structure address.
[0033] Thirdly, this application also provides a computer device, including a memory and a processor, wherein the memory stores a computer program, and the processor executes the computer program to implement the steps of any of the methods described in the first aspect above.
[0034] Fourthly, this application also provides a computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, implements the steps of any of the methods described in the first aspect above.
[0035] Fifthly, this application also provides a computer program product, including a computer program that, when executed by a processor, implements the steps of any of the methods described in the first aspect above.
[0036] The aforementioned cached data recovery method, apparatus, device, storage medium, and program product first, upon detecting that the first process is about to restart, request memory space from the second process and store the cached data stored by the first process in the memory space. Then, upon detecting that the first process has completed restarting, obtain the memory header structure address of the memory space through the second process. Finally, based on the memory header structure address, store the cached data in the memory space of the first process. In this way, when the first process needs to be restarted, by storing the cached data of the first process in the memory space of the second process, the cached data before the first process restarts can be quickly recovered based on the cached data stored in the second process, thus solving the problem of cached data loss upon restarting the first process. Attached Figure Description
[0037] To more clearly illustrate the technical solutions in the embodiments of this application or related technologies, the drawings used in the description of the embodiments of this application or related technologies will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other related drawings can be obtained based on these drawings without creative effort.
[0038] Figure 1 This is an application environment diagram of a cached data recovery method in one embodiment;
[0039] Figure 2 This is a schematic diagram illustrating the application of a cached data recovery method in one embodiment;
[0040] Figure 3 This is a flowchart illustrating a cached data recovery method in another embodiment;
[0041] Figure 4 This is a schematic diagram of a preset cache structure in one embodiment;
[0042] Figure 5 This is a schematic diagram of the page description structure in one embodiment;
[0043] Figure 6 This is a flowchart illustrating a cached data recovery method in another embodiment;
[0044] Figure 7 This is a schematic diagram of virtual address translation in one embodiment;
[0045] Figure 8 This is a flowchart illustrating a cached data recovery method in another embodiment;
[0046] Figure 9 This is a structural block diagram of a cached data recovery device in one embodiment;
[0047] Figure 10 This is an internal structural diagram of a computer device in one embodiment. Detailed Implementation
[0048] To make the objectives, technical solutions, and advantages of this application clearer, the following detailed description is provided in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the scope of this application.
[0049] It should be noted that the terms "first," "second," etc., used in this application can be used to describe various elements, but these elements are not limited by these terms. These terms are only used to distinguish the first element from the second element. The terms "comprising" and "having," and any variations thereof, used in this application, are intended to cover non-exclusive inclusion. The term "multiple" used in this application refers to two or more. The term "and / or" used in this application refers to one of the embodiments, or any combination of multiple embodiments.
[0050] In a component-based architecture, the storage system can be broken down into multiple independent modules, each of which is a component. During component-based upgrades, the process needs to be restarted. However, memory data is attached to the process in which it resides. If the process is restarted, the cached data stored in its memory may be lost.
[0051] In view of this, this application provides a cache data recovery method. When the first process needs to be restarted, the cache data of the first process is stored in the memory space of the second process. After the first process restarts, the cache data before the restart of the first process can be quickly recovered based on the cache data stored in the second process, thus solving the problem of cache data loss when the first process restarts.
[0052] In one exemplary embodiment, such as Figure 1 As shown, a method for recovering cached data is provided. This embodiment illustrates the application of this method to a terminal. It is understood that this method can also be applied to a server, and further to a system including both a terminal and a server, and is implemented through interaction between the terminal and the server. In this embodiment, the method includes the following steps:
[0053] Step 101: If the first process is detected to be restarting, request memory space from the second process and store the cached data stored by the first process in the memory space.
[0054] In a computer system composed of component-based architectures, the first process can be a process within one component, and the second process can be a process within another component. The memory spaces of the first and second processes are independent of each other. Optionally, the first process can be a control service, handling user business, while the second process can be a resource service, providing various resources. During its operation, the first process can build cached data in memory based on frequently accessed data to improve data access efficiency. When the first component needs to be upgraded, the first process needs to be restarted. In this case, the cached data built by the first process will be lost upon restarting, and rebuilding the cached data after restarting incurs significant system overhead.
[0055] Therefore, when the first component needs to be upgraded or other abnormal situations occur, and the first process is detected to need to be restarted, since the memory of the first process and the second process are independent of each other, the first process requests memory space from the second process and stores the cached data stored in the first process in the memory space of the second process. At this time, since the second process does not need to be restarted, the cached data stored in the memory space of the second process will not be lost when the first process is restarted.
[0056] Step 102: If the restart of the first process is detected to be complete, the memory header structure address of the memory space is obtained through the second process.
[0057] Optionally, the system checks whether the first process has completed its restart based on its runtime data. After the first process restarts, it obtains the memory header structure address of the second process's memory space by interacting with the second process. The memory header structure address is the starting address of the cached data of the first process stored in the second process's memory space.
[0058] Step 103: Store the cached data in the memory space of the first process according to the memory header structure address.
[0059] After obtaining the memory header structure address, the first process can retrieve the cached data stored in the memory space of the second process based on the memory header structure address. The first process then stores the cached data in its own memory space, thus restoring the cached data of the first process.
[0060] For example, such as Figure 2The diagram illustrates the application process for cached data recovery. The first process can include multiple services, such as service A, service B, and service C. Each service has its own cached data. The second process maintains a shared memory segment. When the first process needs to restart, it requests memory space from the second process. The second process allocates the shared memory space to the first process and maps the physical address of the memory space to a virtual address, providing the virtual address to the first process. The first process can then access the second process's memory space through the virtual address. Each service in the first process constructs its cached data within this memory segment. After the first process restarts, it retrieves the cached data from the second process's memory space and parses it into the cache of each service, making it available for the first process's use. Optionally, each service can construct a cache repository from its own cached data. The first process retrieves the cache repository and then parses it to obtain the cached data from each service. To ensure proper cached data recovery, the algorithms and processes for constructing and parsing the cache repository in the first process before and after restarting must be inversely related, while the structure of the cache repository remains unchanged.
[0061] In the above embodiments, firstly, upon detecting that the first process needs to be restarted, memory space is requested from the second process, and the cached data stored by the first process is stored in the memory space. Then, upon detecting that the first process has completed restarting, the memory header structure address of the memory space is obtained through the second process. Finally, based on the memory header structure address, the cached data is stored in the memory space of the first process. In this way, when the first process needs to be restarted, by storing the cached data of the first process in the memory space of the second process, the cached data before the first process restarts can be quickly restored based on the cached data stored in the second process, thus solving the problem of cached data loss upon restarting the first process.
[0062] In the embodiments of this application, when it is detected that the first process is to be restarted, the steps of requesting memory space from the second process and storing the cached data stored by the first process in the memory space are as follows: Figure 3 As shown, it may include:
[0063] Step 301: If the first process is detected to be restarting, request memory space from the second process and determine the starting address of the memory space as the memory header structure address.
[0064] If a restart is detected for the first process, a memory resource allocation mechanism is triggered, sending a memory allocation request to the running second process. This request may include the minimum memory capacity required by the first process and memory access permission flags. Upon receiving the request, the second process scans its available physical memory, allocates a suitable memory block from unoccupied memory regions, and uses the starting address of this memory block as the memory header structure address. The virtual address mapped to this memory header structure address is then provided to the first process, allowing it to access the memory space via this address.
[0065] Step 302: Based on the memory header structure address, store the cached data in the memory space according to the preset cache structure.
[0066] Optionally, based on the memory header structure address, the metadata, cache instance, control pointer, and cache data corresponding to the cached data are stored in the memory space respectively.
[0067] The preset cache structure can be as follows: Figure 4 As shown, the cache structure includes a memory header structure (root header structure), a metadata description area, a cache instance area, control structure pages, and cache data pages. The memory header structure, serving as the entry point to the memory space, stores global structures such as the number of locks and cache instances; its address is the starting address of the memory space. The metadata description area includes metadata (PCR root item) for at least one cache instance, which can be used to index each cache instance. The cache instance area includes at least one cache instance (ins buffer), each used to index into a control structure page. The control structure page area includes at least one control structure page (struct page), each containing at least one control pointer, which is used to index into a cache data page. The cache data page area includes at least one cache data page (data page), which stores cached data.
[0068] In the above embodiments, before the first process restarts, cache data is constructed in the form of a tree structure through the memory header structure entry and the preset cache structure, so that the cache data can be obtained and restored according to the memory header structure after the first process restarts.
[0069] In the embodiments of this application, the memory of the second process can be provided for use by multiple other processes. Since the memory addresses mapped by the second process to the first process are numerous and not necessarily contiguous, please refer to the following for details on which memory addresses are used to construct cached data in the memory space. Figure 4It also sets up a page description structure (Page Bmp), which includes bits corresponding to multiple memory pages. When the first process uses a memory page of the second process, it adds a mark to the address of the memory page to indicate that the memory address has been used. Marking information is added to the memory addresses storing control pointers and cached data in the memory space; the marking information is used to indicate that the corresponding memory address has been used. For example... Figure 5 As shown, when a memory address is used, the bit corresponding to the page description structure is set to 1.
[0070] In the above embodiments, the memory page usage can be represented by the page description structure, avoiding the duplication of memory allocation for the second process.
[0071] In one embodiment, after the first process restarts, the cached data is stored in the memory space of the first process according to the memory header structure address, such as... Figure 6 As shown, it includes:
[0072] Step 601: Calculate the updated memory header structure address corresponding to the memory space after the first process restarts, based on the memory header structure address.
[0073] In this process, after the first process restarts, the page address of the cached data stored in the second process is obtained by parsing the memory header structure address layer by layer. Since it is a virtual address mapping, the page address of the cached data obtained by the first process is still the original virtual address before the first process restarts. Since the virtual address will change after the first process restarts, address translation is required to calculate the virtual address corresponding to the page address of the cached data after the first process restarts.
[0074] First, calculate the updated memory header structure address corresponding to the memory space after the first process restarts. This includes obtaining the first base address and the second base address of the first process; the first base address is the memory base address before the first process restarts, and the second base address is the memory base address after the first process restarts. Then, determine the updated memory header structure address based on the memory header structure address, the first base address, the second base address, and a preset address determination algorithm.
[0075] like Figure 7 As shown, subtracting the first base address from the obtained memory header structure address and adding the second base address gives the updated memory header structure address. Figure 7 In the diagram, 0xa, 0xb, 0xc, etc. are the original virtual addresses of the control structure pages, and 0xM, 0xN, 0xR, etc. are the original virtual addresses of the cached data pages. The diagram only shows a partial illustration. It can be understood that the virtual address of each page is calculated from the original virtual address, the first base address, and the second base address.
[0076] Step 602: Obtain cached data based on the updated memory header structure address.
[0077] By parsing layer by layer based on the updated memory header structure address, all cached data was obtained. Please continue to refer to [the relevant documentation / reference]. Figure 7 Each obtained virtual address is updated according to the first base address and the second base address to obtain the address of each cached data.
[0078] Step 603: Store the cached data in the memory space of the first process.
[0079] The cached data obtained from the second process is stored in the memory space of the first process, such as the cache repository mentioned above, and then parsed into the caches of each business function in the first process. Figure 7 As shown, after the cached data is restored, the position corresponding to the page with restored cached data in the page description structure is 0, indicating that the page is not used and can be released and allocated to other services for continued use.
[0080] In the above embodiments, by determining the address of the updated memory header structure, expanding the header structure, traversing the tree structure, and finding all cached data, the cached data of the first process after restarting can be restored simply and efficiently.
[0081] In the embodiments of this application, such as Figure 8 As shown, a method for recovering cached data is provided, including:
[0082] Step 801: If the first process is detected to be waiting to be restarted, request memory space from the second process and determine the starting address of the memory space as the memory header structure address.
[0083] Step 802: Based on the memory header structure address, store the cached data in the memory space according to the preset cache structure.
[0084] Step 803: If the restart of the first process is detected to be complete, the memory header structure address of the memory space is obtained through the second process.
[0085] Step 804: Calculate the updated memory header structure address corresponding to the memory space after the first process restarts, based on the memory header structure address.
[0086] Step 805: Obtain cached data based on the updated memory header structure address.
[0087] Step 806: Store the cached data in the memory space of the first process.
[0088] In the above embodiments, by entrusting the cached data of the first process that needs to be restarted to the second process that does not need to be restarted, the first process can quickly restore the cached data before the restart after restarting, thus achieving the effect of not losing memory after restarting.
[0089] It should be understood that although the steps in the flowcharts of the embodiments described above are shown sequentially according to the arrows, these steps are not necessarily executed in the order indicated by the arrows. Unless explicitly stated herein, there is no strict order restriction on the execution of these steps, and they can be executed in other orders. Moreover, at least some steps in the flowcharts of the embodiments described above may include multiple steps or multiple stages. These steps or stages are not necessarily completed at the same time, but can be executed at different times. The execution order of these steps or stages is not necessarily sequential, but can be performed alternately or in turn with other steps or at least some of the steps or stages in other steps. It is understood that the steps in different embodiments can be freely combined as needed, and all non-contradictory solutions formed by such combinations are within the scope of protection of this application.
[0090] Based on the same inventive concept, this application also provides a cache data recovery apparatus for implementing the cache data recovery method described above. The solution provided by this apparatus is similar to the implementation described in the above method; therefore, the specific limitations in one or more cache data recovery apparatus embodiments provided below can be found in the limitations of the cache data recovery method described above, and will not be repeated here.
[0091] In one exemplary embodiment, such as Figure 9 As shown, a cached data recovery device 900 is provided, including: an application module 901, an acquisition module 902, and a storage module 903, wherein:
[0092] The application module 901 is used to request memory space from the second process when it is detected that the first process is about to be restarted, and to store the cached data stored by the first process into the memory space;
[0093] The acquisition module 902 is used to obtain the memory header structure address of the memory space through the second process when the restart of the first process is detected to be complete;
[0094] Storage module 903 is used to store cached data into the memory space of the first process according to the memory header structure address.
[0095] In one embodiment, the application module 901 is specifically used to apply for memory space from the second process when the first process is detected to be restarting, and to determine the starting address of the memory space as the memory header structure address; based on the memory header structure address, the cached data is stored in the memory space according to a preset cache structure.
[0096] In one embodiment, the application module 901 is specifically used to store the metadata, cache instance, control pointer and cache data corresponding to the cache data into the memory space based on the memory header structure address.
[0097] In one embodiment, the device further includes a tagging module for adding tagging information to memory addresses in the memory space that store control pointers and cached data; the tagging information is used to indicate that the corresponding memory address has been used.
[0098] In one embodiment, the storage module 903 is specifically used to calculate the updated memory header structure address corresponding to the memory space after the first process restarts, based on the memory header structure address; obtain cached data based on the updated memory header structure address; and store the cached data in the memory space of the first process.
[0099] In one embodiment, the storage module 903 is specifically used to obtain the first base address and the second base address of the first process; the first base address is the memory base address before the first process restarts, and the second base address is the memory base address after the first process restarts; and the updated memory header structure address is determined according to the memory header structure address, the first base address, the second base address, and a preset address determination algorithm.
[0100] Each module in the aforementioned cached data recovery device can be implemented entirely or partially through software, hardware, or a combination thereof. These modules can be embedded in the processor of a computer device in hardware form or independent of it, or stored in the memory of the computer device in software form, so that the processor can call and execute the operations corresponding to each module.
[0101] In one exemplary embodiment, a computer device is provided, which may be a terminal, and its internal structure diagram may be as follows: Figure 10As shown, the computer device includes a processor, memory, input / output interfaces, a communication interface, a display unit, and an input device. The processor, memory, and input / output interfaces are connected via a system bus, and the communication interface, display unit, and input device are also connected to the system bus via the input / output interfaces. The processor provides computing and control capabilities. The memory includes non-volatile storage media and internal memory. The non-volatile storage media stores the operating system and computer programs. The internal memory provides an environment for the operation of the operating system and computer programs stored in the non-volatile storage media. The input / output interfaces are used for exchanging information between the processor and external devices. The communication interface is used for wired or wireless communication with external terminals; wireless communication can be achieved through Wi-Fi, mobile cellular networks, Near Field Communication (NFC), or other technologies. When the computer program is executed by the processor, it implements a cached data retrieval method. The display unit is used to form a visually visible image and can be a display screen, a projection device, or a virtual reality imaging device. The display screen can be an LCD screen or an e-ink screen. The input device of the computer device can be a touch layer covering the display screen, or buttons, trackballs, or touchpads set on the casing of the computer device, or external keyboards, touchpads, or mice, etc.
[0102] Those skilled in the art will understand that Figure 10 The structure shown is merely a block diagram of a portion of the structure related to the present application and does not constitute a limitation on the computer device to which the present application is applied. Specific computer devices may include more or fewer components than those shown in the figure, or combine certain components, or have different component arrangements.
[0103] In one exemplary embodiment, a computer device is provided, including a memory and a processor. The memory stores a computer program, and the processor executes the computer program to perform the following steps: when a first process is detected to be restarting, requesting memory space from a second process and storing cached data stored by the first process in the memory space; when a restart of the first process is detected to be complete, obtaining the memory header structure address of the memory space through the second process; and storing the cached data in the memory space of the first process according to the memory header structure address.
[0104] In one embodiment, when the processor executes a computer program, it further performs the following steps: if it detects that the first process is to be restarted, it requests memory space from the second process and determines the starting address of the memory space as the memory header structure address; based on the memory header structure address, it stores cached data in the memory space according to a preset cache structure.
[0105] In one embodiment, when the processor executes a computer program, it further performs the following steps: using the memory header structure address as a reference, it stores the metadata, cache instance, control pointer, and cache data corresponding to the cache data into the memory space.
[0106] In one embodiment, when the processor executes a computer program, it further performs the following steps: adding marker information to the memory addresses in the memory space that store control pointers and cached data; the marker information is used to indicate that the corresponding memory address has been used.
[0107] In one embodiment, when the processor executes the computer program, it further performs the following steps: calculating the updated memory header structure address corresponding to the memory space after the first process restarts, based on the memory header structure address; obtaining cached data based on the updated memory header structure address; and storing the cached data in the memory space of the first process.
[0108] In one embodiment, when the processor executes a computer program, it further performs the following steps: obtaining a first base address and a second base address of a first process; the first base address is the memory base address before the first process restarts, and the second base address is the memory base address after the first process restarts; and determining the updated memory header structure address based on the memory header structure address, the first base address, the second base address, and a preset address determination algorithm.
[0109] In one embodiment, a computer-readable storage medium is provided having a computer program stored thereon. When the computer program is executed by a processor, it performs the following steps: when a first process is detected to be restarting, it requests memory space from a second process and stores cached data stored by the first process in the memory space; when a restart of the first process is detected to be complete, it obtains the memory header structure address of the memory space through the second process; and stores the cached data in the memory space of the first process according to the memory header structure address.
[0110] In one embodiment, when the computer program is executed by the processor, it further performs the following steps: if it is detected that the first process is to be restarted, it requests memory space from the second process and determines the starting address of the memory space as the memory header structure address; based on the memory header structure address, it stores cached data in the memory space according to a preset cache structure.
[0111] In one embodiment, when the computer program is executed by the processor, it further performs the following steps: using the memory header structure address as a reference, storing the metadata, cache instance, control pointer and cache data corresponding to the cache data into the memory space respectively.
[0112] In one embodiment, when the computer program is executed by the processor, it further performs the following steps: adding marker information to the memory address in the memory space that stores the control pointer and cached data; the marker information is used to indicate that the corresponding memory address has been used.
[0113] In one embodiment, when the computer program is executed by the processor, it further performs the following steps: calculating the updated memory header structure address corresponding to the memory space after the first process restarts, based on the memory header structure address; obtaining cached data based on the updated memory header structure address; and storing the cached data in the memory space of the first process.
[0114] In one embodiment, when the computer program is executed by the processor, it further performs the following steps: obtaining the first base address and the second base address of the first process; the first base address is the memory base address before the first process is restarted, and the second base address is the memory base address after the first process is restarted; determining the updated memory header structure address based on the memory header structure address, the first base address, the second base address, and a preset address determination algorithm.
[0115] In one embodiment, a computer program product is provided, including a computer program that, when executed by a processor, performs the following steps: upon detecting that a first process is to be restarted, requesting memory space from a second process and storing cached data stored by the first process in the memory space; upon detecting that the first process has completed restarting, obtaining the memory header structure address of the memory space through the second process; and storing the cached data in the memory space of the first process according to the memory header structure address.
[0116] In one embodiment, when the computer program is executed by the processor, it further performs the following steps: if it is detected that the first process is to be restarted, it requests memory space from the second process and determines the starting address of the memory space as the memory header structure address; based on the memory header structure address, it stores cached data in the memory space according to a preset cache structure.
[0117] In one embodiment, when the computer program is executed by the processor, it further performs the following steps: using the memory header structure address as a reference, storing the metadata, cache instance, control pointer and cache data corresponding to the cache data into the memory space respectively.
[0118] In one embodiment, when the computer program is executed by the processor, it further performs the following steps: adding marker information to the memory address in the memory space that stores the control pointer and cached data; the marker information is used to indicate that the corresponding memory address has been used.
[0119] In one embodiment, when the computer program is executed by the processor, it further performs the following steps: calculating the updated memory header structure address corresponding to the memory space after the first process restarts, based on the memory header structure address; obtaining cached data based on the updated memory header structure address; and storing the cached data in the memory space of the first process.
[0120] In one embodiment, when the computer program is executed by the processor, it further performs the following steps: obtaining the first base address and the second base address of the first process; the first base address is the memory base address before the first process is restarted, and the second base address is the memory base address after the first process is restarted; determining the updated memory header structure address based on the memory header structure address, the first base address, the second base address, and a preset address determination algorithm.
[0121] It should be noted that the user information (including but not limited to user device information, user personal information, etc.) and data (including but not limited to data used for analysis, data stored, data displayed, etc.) involved in this application are all information and data authorized by the user or fully authorized by all parties, and the collection, use and processing of the relevant data must comply with relevant regulations.
[0122] Those skilled in the art will understand that all or part of the processes in the methods of the above embodiments can be implemented by a computer program instructing related hardware. The computer program can be stored in a non-volatile computer-readable storage medium, and when executed, it can include the processes of the embodiments of the above methods. Any references to memory, databases, or other media used in the embodiments provided in this application can include at least one of non-volatile memory and volatile memory. Non-volatile memory can include read-only memory (ROM), magnetic tape, floppy disk, flash memory, optical memory, high-density embedded non-volatile memory, resistive random access memory (ReRAM), magnetic random access memory (MRAM), ferroelectric random access memory (FRAM), phase change memory (PCM), graphene memory, etc. Volatile memory can include random access memory (RAM) or external cache memory, etc. By way of illustration and not limitation, RAM can take many forms, such as Static Random Access Memory (SRAM) or Dynamic Random Access Memory (DRAM). The databases involved in the embodiments provided in this application may include at least one type of relational database and non-relational database. Non-relational databases may include, but are not limited to, blockchain-based distributed databases. The processors involved in the embodiments provided in this application may be general-purpose processors, central processing units, graphics processing units, digital signal processors, programmable logic devices, quantum computing-based data processing logic devices, artificial intelligence (AI) processors, etc., and are not limited to these.
[0123] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this application.
[0124] The embodiments described above are merely illustrative of several implementation methods of this application, and while the descriptions are specific and detailed, they should not be construed as limiting the scope of this patent application. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this application, and these all fall within the protection scope of this application. Therefore, the protection scope of this application should be determined by the appended claims.
Claims
1. A method for recovering cached data, characterized in that, The method includes: If the system detects that the first process needs to be restarted, it requests memory space from the second process and stores the cached data stored by the first process in the memory space. If the restart of the first process is detected to be complete, the memory header structure address of the memory space is obtained through the second process; The cached data is stored in the memory space of the first process according to the memory header structure address.
2. The method according to claim 1, characterized in that, The step of requesting memory space from the second process and storing the cached data stored by the first process in the memory space when the first process is detected to be restarting includes: If the first process is detected to be restarting, memory space is requested from the second process, and the starting address of the memory space is determined as the address of the memory header structure. Based on the memory header structure address, the cached data is stored in the memory space according to the preset cache structure.
3. The method according to claim 2, characterized in that, The step of storing the cached data into the memory space based on the memory header structure address and according to a preset cache structure includes: Based on the memory header structure address, the metadata, cache instance, control pointer, and cache data corresponding to the cache data are respectively stored in the memory space.
4. The method according to claim 3, characterized in that, The method further includes: Add marker information to the memory addresses in the memory space that store the control pointer and the cached data; the marker information is used to indicate that the corresponding memory address has been used.
5. The method according to claim 1, characterized in that, The step of storing the cached data into the memory space of the first process according to the memory header structure address includes: Based on the memory header structure address, calculate the updated memory header structure address corresponding to the memory space after the first process restarts; The cached data is obtained based on the updated memory header structure address; The cached data is stored in the memory space of the first process.
6. The method according to claim 5, characterized in that, The step of calculating the updated memory header structure address corresponding to the memory space after the first process restarts, based on the memory header structure address, includes: Obtain the first base address and the second base address of the first process; the first base address is the memory base address of the first process before restarting, and the second base address is the memory base address of the first process after restarting; The updated memory header structure address is determined based on the memory header structure address, the first base address, the second base address, and the preset address determination algorithm.
7. A cached data recovery device, characterized in that, The device includes: The application module is used to request memory space from the second process when it is detected that the first process is to be restarted, and to store the cached data stored by the first process into the memory space; The acquisition module is used to acquire the memory header structure address of the memory space through the second process when the restart of the first process is detected to be complete. The storage module is used to store the cached data into the memory space of the first process according to the memory header structure address.
8. A computer device comprising a memory and a processor, wherein the memory stores a computer program, characterized in that, When the processor executes the computer program, it implements the steps of the method according to any one of claims 1 to 6.
9. A computer-readable storage medium having a computer program stored thereon, characterized in that, When the computer program is executed by a processor, it implements the steps of the method according to any one of claims 1 to 6.
10. A computer program product, comprising a computer program, characterized in that, When the computer program is executed by a processor, it implements the steps of the method according to any one of claims 1 to 6.