Method for detecting metal pollutants on surface of silicon wafer

Abstract

The invention provides a method for detecting metal pollutants on the surface of a silicon wafer, which comprises the following steps of: performing diffusion treatment on the silicon wafer to be detected, so that the metal pollutants on the surface layer of the silicon wafer to be detected are diffused into the silicon wafer; carrying out surface treatment on the silicon wafer to be detected so as to remove surface oxides and residual metals of the silicon wafer to be detected; and then whether metal pollutants exist on the surface of the silicon wafer to be detected or not is judged through mu-PCD minority carrier lifetime detection and / or SPV diffusion length detection. According to the method, surface metal is promoted to be diffused into the silicon wafer body through heat treatment, and recognition of low-concentration metal pollution is achieved in combination with minority carrier lifetime detection and / or diffusion length testing means.

Description

TECHNICAL FIELD

[0001] The present application belongs to the technical field of semiconductor material detection, and relates to pollution detection, in particular to a method for detecting metal contaminants on the surface of a silicon wafer. BACKGROUND

[0002] In the process of manufacturing and processing semiconductor silicon wafers, trace metal contaminants are easily introduced onto the surface of the silicon wafer due to the operation of process equipment, the requirements of the production environment, and the properties of raw materials, etc. Silicon wafers contaminated by metals are prone to cause crystal defects, reduce device quality, and deteriorate electronic properties, especially having a serious impact on gate oxide reliability and minority carrier lifetime, resulting in huge losses.

[0003] The metal contamination layer on the surface of the silicon wafer is generally cleaned by using a high-concentration, high-corrosive solution, or removed by surface grinding and polishing. However, improper operation of the existing cleaning process can easily cause damage to the surface of the silicon wafer, affecting the performance of the device. The detection of metal contaminants on the silicon wafer plays an important role in the process control and optimization of subsequent removal of the contamination layer.

[0004] Currently, the detection of metal contaminants on the surface of the silicon wafer mainly includes X-ray fluorescence spectroscopy testing and ICP-MS (inductively coupled plasma mass spectrometry) testing for direct detection, which has fast detection speed and high sensitivity. However, the detection limit of X-ray fluorescence spectroscopy testing varies greatly for different substrates, and accurate standard samples are required for calibration. The ICP-MS testing procedure is complicated and cannot accurately locate the contaminated area. In addition, the direct detection method still has technical bottlenecks for extremely low concentration metals, and therefore, an indirect characterization method is needed to achieve high sensitivity identification. SUMMARY

[0005] In view of the deficiencies of the prior art, the purpose of the present application is to provide a method for detecting metal contaminants on the surface of a silicon wafer, which indirectly characterizes the low-concentration metal contamination condition on the surface of the silicon wafer by body metal diffusion, in combination with minority carrier lifetime detection and / or diffusion length testing means.

[0006] To achieve this purpose, the present application adopts the following technical solutions:

[0007] The present application provides a method for detecting metal contaminants on the surface of a silicon wafer, which comprises: diffusing a to-be-tested silicon wafer to diffuse metal contaminants on the surface layer of the to-be-tested silicon wafer to the inside of the to-be-tested silicon wafer; then performing surface treatment on the to-be-tested silicon wafer to remove the surface oxide and residual metal therefrom; and subsequently determining whether metal contaminants exist on the surface of the to-be-tested silicon wafer by μ-PCD (Microwave Photoconductive Decay) minority carrier lifetime detection and / or SPV (Surface Photovoltage) diffusion length detection.

[0008] As a preferred technical solution of the present application, the diameter of the to-be-tested silicon wafer is 150 nm to 300 nm, for example, it can be 150 nm, 180 nm, 200 nm, 220 nm, 240 nm, 250 nm, 280 nm or 300 nm, but is not limited to the listed values, and other values not listed in this range are also applicable.

[0009] The thickness of the to-be-tested silicon wafer is 600 μm to 1000 μm, for example, it can be 600 μm, 650 μm, 700 μm, 750 μm, 800 μm, 850 μm, 900 μm, 950 μm or 1000 μm, but is not limited to the listed values, and other values not listed in this range are also applicable.

[0010] As a preferred technical solution of the present application, the diffusion treatment includes: continuously supplying protective gas under the condition of 500-1000℃, heating the to-be-tested silicon wafer, promoting the surface layer metal to diffuse into the to-be-tested silicon wafer body by internal gettering, and stably remaining in the body.

[0011] As an embodiment of the present application, the protective gas includes at least one of N2, N2O, Ar, NO, H2 or O2.

[0012] As a preferred technical solution of the present application, the heating treatment includes: placing the to-be-tested silicon wafer in a preheated heating furnace, and heating to a first temperature at one time, then performing a first holding treatment, then heating to a second temperature at two times, and performing a second holding treatment, then performing a gradient cooling treatment and taking out.

[0013] The temperature in the preheated heating furnace is 500-650℃, for example, it can be 500℃, 520℃, 530℃, 550℃, 560℃, 580℃, 600℃, 610℃, 620℃, 640℃ or 650℃, but is not limited to the listed values, and other values not listed in this range are also applicable.

[0014] The first temperature is 750-850℃, for example, it can be 750℃, 760℃, 770℃, 780℃, 790℃, 800℃, 810℃, 820℃, 830℃, 840℃ or 850℃, but is not limited to the listed values, and other values not listed in this range are also applicable.

[0015] The second temperature is 900-1000℃, for example, it can be 900℃, 910℃, 920℃, 930℃, 940℃, 950℃, 960℃, 970℃, 980℃, 990℃ or 1000℃, but is not limited to the listed values, and other values not listed in this range are also applicable.

[0016] The temperature rising rate of the first temperature rising is greater than the temperature rising rate of the second temperature rising.

[0017] As an embodiment of the present application, the time of the first holding treatment is 5 min to 20 min, for example, it can be 5 min, 6 min, 8 min, 10 min, 12 min, 15 min, 16 min, 18 min or 20 min, but is not limited to the listed values, and other values not listed in the range are also applicable.

[0018] The time of the second holding treatment is 30 min to 60 min, for example, it can be 30 min, 35 min, 40 min, 45 min, 50 min, 55 min or 60 min, but is not limited to the listed values, and other values not listed in the range are also applicable.

[0019] As a preferred technical solution of the present application, the gradient cooling treatment comprises: cooling the measured silicon wafer after heating treatment to 750℃ to 850℃ in one section, then holding treatment in three sections, and then cooling to 500℃ to 650℃ in two sections.

[0020] The temperature after the first cooling can be 750℃, 760℃, 770℃, 780℃, 790℃, 800℃, 810℃, 820℃, 830℃, 840℃ or 850℃, but is not limited to the listed values, and other values not listed in the range are also applicable.

[0021] The temperature after the second cooling can be 500℃, 520℃, 530℃, 550℃, 560℃, 580℃, 600℃, 610℃, 620℃, 640℃ or 650℃, but is not limited to the listed values, and other values not listed in the range are also applicable.

[0022] As a preferred technical solution of the present application, during the first temperature rising and the second temperature rising, 15 L / min to 25 L / min of N2 and 0.1 L / min to 0.3 L / min of O2 are introduced into the heating furnace.

[0023] The flow rate of N2 introduced into the heating furnace can be 15 L / min, 16 L / min, 17 L / min, 18 L / min, 19 L / min, 20 L / min, 21 L / min, 22 L / min, 23 L / min, 24 L / min or 25 L / min, but is not limited to the listed values, and other values not listed in the range are also applicable.

[0024] The flow rate of the O2 introduced into the heating furnace during the first holding treatment can be 0.1 L / min, 0.12 L / min, 0.15 L / min, 0.2 L / min, 0.22 L / min, 0.25 L / min, 0.28 L / min, or 0.3 L / min, but is not limited to the listed values, and other values within the range are also applicable.

[0025] During the first holding treatment, 15-25 L / min of N2 and 0.10-0.3 L / min of O2 are introduced into the heating furnace.

[0026] The flow rate of the N2 introduced into the heating furnace during the first holding treatment can be 15 L / min, 16 L / min, 17 L / min, 18 L / min, 19 L / min, 20 L / min, 21 L / min, 22 L / min, 23 L / min, 24 L / min, or 25 L / min, but is not limited to the listed values, and other values within the range are also applicable.

[0027] The flow rate of the O2 introduced into the heating furnace during the first holding treatment can be 0.1 L / min, 0.12 L / min, 0.15 L / min, 0.2 L / min, 0.22 L / min, 0.25 L / min, 0.28 L / min, or 0.3 L / min, but is not limited to the listed values, and other values within the range are also applicable.

[0028] During the second holding treatment, 5 L / min-15 L / min of O2 are introduced into the heating furnace, for example, it can be 3 L / min, 4 L / min, 5 L / min, 6 L / min, 7 L / min, or 8 L / min, but is not limited to the listed values, and other values within the range are also applicable.

[0029] During the gradient cooling treatment, 15 L / min-25 L / min of N2 are introduced into the heating furnace, for example, it can be 15 L / min, 16 L / min, 17 L / min, 18 L / min, 19 L / min, 20 L / min, 21 L / min, 22 L / min, 23 L / min, 24 L / min, or 25 L / min, but is not limited to the listed values, and other values within the range are also applicable.

[0030] As a preferred technical solution of the present application, the surface treatment comprises: sequentially performing a first cleaning, a second cleaning, and drying on the silicon wafer after the diffusion treatment is completed.

[0031] The first cleaning uses a HF solution with a concentration of 0.5% to 10%, for example, 0.5%, 1%, 2%, 3%, 4%, 5%, 6%, 7%, 8%, 9%, or 10%, but not limited to the listed values, and other values not listed in the range are also applicable.

[0032] The second cleaning uses pure water, and the time of the first cleaning and the second cleaning is independently 5 to 20 minutes, for example, 5 minutes, 6 minutes, 8 minutes, 10 minutes, 12 minutes, 15 minutes, 16 minutes, 18 minutes, or 20 minutes, but not limited to the listed values, and other values not listed in the range are also applicable.

[0033] The drying includes spinning dry the silicon wafer to be tested and then blowing nitrogen on the surface of the silicon wafer to be tested.

[0034] As a preferred technical solution of the present application, the detection position of the silicon wafer to be tested includes an edge region and / or a center region of the silicon wafer to be tested.

[0035] As a preferred technical solution of the present application, the detection method further includes: pre-establishing a mapping relationship between ICP-MS surface metal and μ-PCD minority carrier lifetime or SPV diffusion length, inputting the content detection result into the mapping relationship, and evaluating the surface metal contamination level of the silicon wafer to be tested.

[0036] The surface metal contamination level is divided into a first level, a second level, and a third level.

[0037] In the first level, the surface metal contamination concentration is ≤50 ppt; in the second level, the surface metal contamination concentration is 50 to 150 ppt, and 50 ppt is not included; and in the third level, the surface metal contamination concentration is >150 ppt.

[0038] As a preferred technical solution of the present application, the detection method further includes: dividing the silicon wafer to be tested into a plurality of measurement points in a grid pattern; adding a metal standard solution to the center region and the edge region of the silicon wafer to be tested for contamination treatment; then detecting the μ-PCD minority carrier lifetime and the SPV diffusion length of the silicon wafer to be tested after the contamination treatment; and according to the detection results, drawing a first Map graph and a second Map graph to determine the metal contamination position; in the first Map graph, the lifetime detection value of each measurement point is displayed in different colors; and in the second Map graph, the diffusion length detection value of each measurement point is displayed in different colors.

[0039] Compared with the prior art, the present application has the following beneficial effects:

[0040] The silicon wafer surface metal contaminant detection method provided by the application improves detection precision and efficiency through a selective testing method, realizes high-sensitivity and non-destructive indirect detection of low-concentration metal contamination, supports dimensional conversion of result data, is convenient for standardized analysis and control, has a simple detection process, and is easy to integrate into an existing silicon wafer testing process. BRIEF DESCRIPTION OF DRAWINGS

[0041] Figure 1 A minority carrier lifetime detection result diagram of different groups of silicon wafers provided for example 2.

[0042] Figure 2 A diffusion length detection result diagram of different groups of silicon wafers provided for example 2.

[0043] Figure 3 A first Map diagram (minority carrier lifetime detection result) of a silicon wafer provided for example 3.

[0044] Figure 4 A second Map diagram (diffusion length detection result) of a silicon wafer provided for example 3.

[0045] Figure 5 A first Map diagram (minority carrier lifetime detection result) of a silicon wafer provided for example 4.

[0046] Figure 6 A second Map diagram (diffusion length detection result) of a silicon wafer provided for example 4. DETAILED DESCRIPTION

[0047] It should be understood that, in the description of the application, the terms "center", "longitudinal", "transverse", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", and the like indicate the orientation or positional relationship shown in the drawings, and are only for the convenience of describing the application and simplifying the description, and do not indicate or imply that the devices or elements indicated must have a particular orientation, be constructed and operated in a particular orientation, and therefore cannot be understood as limiting the application. In addition, the terms "first", "second", and the like are only for descriptive purposes and cannot be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Therefore, the features defined with "first", "second", and the like can explicitly or implicitly include one or more of the features. In the description of the application, unless otherwise stated, the meaning of "a plurality of" is two or more.

[0048] The technical solutions of the application will be further described below in conjunction with the drawings and through specific embodiments.

[0049] In one specific embodiment, the application provides a silicon wafer surface metal contaminant detection method, comprising the following steps:

[0050] Step one: Diffusion treatment is performed on the silicon wafer to be tested, so that the metal contaminants on the surface layer of the silicon wafer to be tested are diffused into the interior.

[0051] The diameter of the silicon wafer to be tested is 150-300 nm, and the thickness is 600-1000 μm.

[0052] The diffusion treatment includes: under the condition of 500-1000℃, continuously supplying protective gas, heating the silicon wafer to be tested, promoting the diffusion of the surface layer metal into the body of the silicon wafer to be tested by internal gettering, and stably retaining in the body.

[0053] The protective gas includes at least one of N2, N2O, Ar, NO, H2 or O2.

[0054] In some embodiments, the heating treatment includes: placing the silicon wafer to be tested in a preheated heating furnace, and heating to a first temperature at one time, then performing a first holding treatment, then heating to a second temperature at two times, and performing a second holding treatment, then performing gradient cooling treatment and taking out.

[0055] The temperature in the preheated heating furnace is 500-650℃. The heating furnace includes but is not limited to high-temperature furnace, medium-temperature furnace, oxidation furnace, diffusion furnace, annealing furnace, vertical furnace and horizontal furnace, etc.

[0056] The heating rate of the first heating is 5-10℃ / min, and during the first heating, 15-25 L / min of N2 and 0.10-0.3 L / min of O2 are supplied into the heating furnace. The first temperature is 750-850℃. The time of the first holding treatment is 5-20 min, and during the first holding treatment, 15-25 L / min of N2 and 0.10-0.3 L / min of O2 are supplied into the heating furnace.

[0057] The heating rate of the second heating is 1-3℃ / min, and during the second heating, 15-25 L / min of N2 and 0.10-0.3 L / min of O2 are supplied into the heating furnace. The second temperature is 900-1000℃. The time of the second holding treatment is 30-60 min, and during the second holding treatment, 5-15 L / min of O2 is supplied into the heating furnace.

[0058] Further, the gradient cooling process comprises: cooling the silicon wafer after the heating process to 750-850℃ in one stage, then performing three-stage holding process, and then cooling to 500-650℃ in two stages, while continuously supplying N2 to the heating furnace at a flow rate of 15-25 L / min.

[0059] Step two: performing surface treatment on the silicon wafer to remove the surface oxide and residual metal.

[0060] The specific surface treatment method comprises: sequentially performing one-stage cleaning, two-stage cleaning and drying on the silicon wafer after the diffusion process.

[0061] The cleaning equipment used in the surface treatment includes, but is not limited to, at least one of a tank cleaning machine, a single wafer cleaning machine, a semi-automatic cleaning machine, and a manual cleaning machine.

[0062] In some embodiments, in the one-stage cleaning process, an HF solution with a concentration of 0.5%-10% is used as the cleaning agent, and the silicon wafer is cleaned for 5-20 min by at least one of spraying, overflow and bubbling through the cleaning equipment to remove the oxide film on the surface of the silicon wafer.

[0063] In the two-stage cleaning process, pure water is used as the cleaning agent, and the silicon wafer is cleaned for 5-20 min by at least one of spraying, overflow and bubbling through the cleaning equipment to remove the residual HF on the surface of the silicon wafer.

[0064] The specific drying method comprises: spin-drying the silicon wafer in a drying equipment, and then blowing nitrogen to remove the residual pure water on the surface of the silicon wafer.

[0065] Step three: then determining whether there is metal contamination on the surface of the silicon wafer by μ-PCD minority carrier lifetime detection and / or SPV diffusion length detection.

[0066] When the surface contamination level of the silicon wafer is high, i.e., the contamination concentration > 1E9 atoms / cm 3 , μ-PCD minority carrier lifetime detection is preferred; when the surface contamination level of the silicon wafer is low, i.e., the contamination concentration ≤ 1E9 atoms / cm 3 , SPV diffusion length detection is preferred.

[0067] The detection position of the silicon wafer includes the edge region and / or the center region of the silicon wafer. In the present application, the center region refers to a circular region within a distance of 2 / 3 radius to 3 / 4 radius of the silicon wafer, and the edge region refers to an annular region between the outermost edge of the silicon wafer inwardly by 3-5 mm and the boundary line of the center region.

[0068] The u-PCD minority carrier lifetime detection refers to a test method using a pulsed laser to irradiate a silicon wafer, generate non-equilibrium carriers, cause the conductivity of the silicon wafer to instantaneously increase, and then utilize a microwave to detect the process of the conductivity decaying with time, so as to calculate the lifetime of the minority carriers. The detection process of the present application meets at least one of the following working parameters: the wavelength of the injected laser is 800-1000 nm, the pulse width is 1 ns-100 ns, the injection depth is 10-800 μm, the probe height is 5-15 mm, and the microwave frequency is 8-12 GHz.

[0069] The SPV diffusion length detection refers to a process of using monochromatic light with energy greater than the band gap of a silicon wafer to irradiate the surface of a sample, generating electron-hole pairs after the light is absorbed, collecting the electron-hole pairs at the surface of the material after diffusion, changing the surface potential, generating a voltage signal, i.e., surface photovoltage, and calculating the diffusion length of the minority carriers by measuring the surface photovoltage under irradiation of light with different wavelengths. The detection process of the present application meets at least one of the following working parameters: the wavelength of the irradiation light source is 400-1000 nm, the intensity of the irradiation light source is 100 uW / cm 2 ~100 mW / cm 2 , and the working frequency is 10 Hz-100 Hz.

[0070] In some embodiments, the detection method further comprises: pre-establishing a mapping relationship between ICP-MS surface metal and μ-PCD minority carrier lifetime or SPV diffusion length, inputting the content detection result into the mapping relationship, and evaluating the surface metal contamination level of the silicon wafer to be detected.

[0071] The surface metal contamination level is divided into a first level, a second level and a third level. In the first level, the surface metal contamination concentration is ≤50 ppt; in the second level, the surface metal contamination concentration is 50-150 ppt, and 50 ppt is not included; and in the third level, the surface metal contamination concentration is >150 ppt.

[0072] The establishment of the mapping relationship between ICP-MS surface metal and μ-PCD minority carrier lifetime or SPV diffusion length in the present application comprises the following steps:

[0073] (1) For a determined oxygen concentration region and resistivity range of the type of silicon wafer to be detected.

[0074] (2) Select a clean silicon wafer of the type, and perform a standard contamination treatment thereon. Specifically, 10 μL of metal standard solution with different concentrations is used to contaminate different positions of the clean silicon wafer.

[0075] (3) Then, the contaminated silicon wafer is sequentially subjected to diffusion treatment and surface treatment.

[0076] (4) IC P-MS test, μ-PCD minority carrier lifetime test and SPV diffusion length test are performed on different positions of the silicon wafer after surface treatment, and test results are obtained respectively.

[0077] (5) Based on the test results of ICP-MS, the contamination of the silicon wafer is divided into three levels of low, medium and high, and the corresponding mapping relationship is obtained according to the μ-PCD minority carrier lifetime value and the SPV diffusion length value of different levels.

[0078] Among them, the surface metal contamination concentration in the low contamination level is ≤ 50 ppt; the surface metal contamination concentration in the medium contamination second level is 50-150 ppt, and 50 ppt is not included; the surface metal contamination concentration in the high contamination level is > 150 ppt.

[0079] Based on the above mapping relationship, the surface metal contamination level of the silicon wafer is inversely deduced by detecting the μ-PCD minority carrier lifetime value and / or the SPV diffusion length value of the silicon wafer, the result data dimension conversion is supported, and the standardized analysis and control are facilitated.

[0080] In some embodiments, the detection method further comprises:

[0081] S1: The silicon wafer to be tested is divided into a plurality of measurement points in a grid pattern.

[0082] S2: Metal standard solution is added to the center area and the edge area of the silicon wafer to be tested for contamination treatment.

[0083] S3: Then, the μ-PCD minority carrier lifetime test and the SPV diffusion length test are performed on the silicon wafer after contamination treatment.

[0084] S4: According to the test results, a first Map graph and a second Map graph are drawn to determine the metal contamination position.

[0085] Among them, the first Map graph displays the lifetime detection value of each measurement point in different colors.

[0086] The second Map graph displays the diffusion length detection value of each measurement point in different colors.

[0087] The present application is particularly suitable for the detection of transition metal elements such as Ni, Cu and Fe, realizes high sensitivity and non-destructive indirect detection of low concentration metal contamination, and improves the detection accuracy and efficiency.

[0088] Example 1

[0089] In this embodiment, the surface metal contamination of a silicon wafer with a diameter of 150 nm and a thickness of 100 μm is detected, which specifically includes the following steps:

[0090] (1) Put the to-be-tested silicon wafer into a diffusion furnace with a temperature of 500-650℃, and perform a first temperature rise at a temperature rise rate of 5℃ / min. After the temperature in the diffusion furnace reaches 750℃, perform a first holding treatment for 10min. During the first temperature rise and the first holding treatment, continuously introduce 20L / min of N2 and 0.15L / min of O2 into the diffusion furnace. Then perform a second temperature rise at a temperature rise rate of 3℃ / min, while continuously introducing 20L / min of N2 and 0.15L / min of O2 into the diffusion furnace. After the temperature in the diffusion furnace reaches 950℃, perform a second holding treatment for 60min, and continuously introduce 10L / min of O2 into the diffusion furnace during the second holding treatment.

[0091] (2) After the end of the second holding treatment, perform a gradient temperature drop treatment on the diffusion furnace, i.e., first drop the temperature to 800℃ at a rate of 2℃ / min, and perform a third holding treatment for 15min. Then drop the temperature to 550℃ at a rate of 6℃ / min, while continuously introducing 20L / min of N2 into the diffusion furnace. Take out the to-be-tested silicon wafer, and promote the surface layer metal to diffuse into the to-be-tested silicon wafer through internal gettering, and stably remain in the to-be-tested silicon wafer.

[0092] (3) Put the to-be-tested silicon wafer into a cleaning tank, first spray clean with a 3% HF solution for 15min, then spray with pure water for 10min, then spin dry the pure water on the surface of the to-be-tested silicon wafer, and then perform nitrogen blowing to remove the oxides and residual metals on the surface of the to-be-tested silicon wafer.

[0093] (4) Perform μ-PCD minority carrier lifetime detection and SPV diffusion length detection on the central region of the to-be-tested silicon wafer, and detect that the diffusion length value is 573.596μm and the minority carrier lifetime value is 3168.18μs.

[0094] (5) According to the mapping relationship between the ICP-MS surface metal and the μ-PCD minority carrier lifetime or SPV diffusion length established in advance, it is determined that the contamination level of the silicon wafer is the first level, i.e., the surface metal contamination concentration ≤50ppt.

[0095] Example 2

[0096] In this example, 10 groups of silicon wafers with a diameter of 300nm and a thickness of 800μm are detected for surface metal contamination, which specifically includes the following steps:

[0097] (1) Put the to-be-tested silicon wafer into a diffusion furnace with a temperature of 500-650°C, and perform a first temperature rise at a temperature rise rate of 8°C / min. After the temperature in the diffusion furnace reaches 800°C, perform a first holding treatment for 15 min. During the first temperature rise and the first holding treatment, continuously introduce 20 L / min of N2 and 0.15 L / min of O2 into the diffusion furnace. Then perform a second temperature rise at a temperature rise rate of 2°C / min, while continuously introducing 20 L / min of N2 and 0.15 L / min of O2 into the diffusion furnace. After the temperature in the diffusion furnace reaches 1000°C, perform a second holding treatment for 45 min, and continuously introduce 10 L / min of O2 into the diffusion furnace during the second holding treatment.

[0098] (2) After the end of the second holding treatment, perform a gradient temperature drop treatment on the diffusion furnace, i.e., first drop the temperature to 850°C at a rate of 3°C / min, and perform a third holding treatment for 15 min. Then drop the temperature to 650°C at a rate of 5°C / min, while continuously introducing 20 L / min of N2 into the diffusion furnace. Take out the to-be-tested silicon wafer, and promote the diffusion of the surface metal into the to-be-tested silicon wafer through internal gettering, and stabilize the retention of the surface metal in the to-be-tested silicon wafer.

[0099] (3) Put the to-be-tested silicon wafer into a cleaning tank, first spray clean the to-be-tested silicon wafer with a 1% HF solution for 20 min, then spray the to-be-tested silicon wafer with pure water for 15 min, then spin dry the pure water on the surface of the to-be-tested silicon wafer, and then perform nitrogen blowing to remove the oxides and residual metals on the surface of the to-be-tested silicon wafer.

[0100] (4) Perform μ-PCD minority carrier lifetime detection and SPV diffusion length detection on the central region of the to-be-tested silicon wafer, and the results are shown in Figure 1 and Figure 2 .

[0101] (5) According to the mapping relationship between the ICP-MS surface metal and the μ-PCD minority carrier lifetime or the SPV diffusion length established in advance, determine the contamination levels of the 10 groups of silicon wafers, as shown in Table 1.

[0102] Table 1

[0103]

[0104] Example 3

[0105] In this example, the surface metal contamination of silicon wafers with a diameter of 200 nm and a thickness of 1000 μm is detected, which specifically includes the following steps:

[0106] (1) The silicon wafer to be tested was placed in a diffusion furnace at a temperature of 500℃~650℃ and heated once at a heating rate of 10℃ / min. After the temperature in the diffusion furnace reached 850℃, a first-stage heat preservation treatment was performed for 5 minutes. During the first heating and first-stage heat preservation treatment, N2 at a rate of 20L / min and O2 at a rate of 0.15L / min were continuously introduced into the diffusion furnace. Then, a second heating was performed at a heating rate of 1℃ / min, while N2 at a rate of 20L / min and O2 at a rate of 0.15L / min were introduced into the diffusion furnace. After the temperature in the diffusion furnace reached 1000℃, a second-stage heat preservation treatment was performed for 30 minutes. During the second-stage heat preservation treatment, O2 at a rate of 10L / min was continuously introduced into the diffusion furnace.

[0107] (2) After the two-stage heat preservation treatment is completed, the diffusion furnace is subjected to gradient cooling treatment. That is, the temperature is first reduced to 800℃ at a rate of 2℃ / min, and then the three-stage heat preservation treatment is carried out for 15min. Then the temperature is reduced to 550℃ at a rate of 8℃ / min. At the same time, 20L / min of N2 is continuously introduced into the diffusion furnace. The silicon wafer to be tested is taken out, and the surface metal is diffused into the silicon wafer to be tested through internal gettering and is stably retained in the silicon wafer to be tested.

[0108] (3) Place the silicon wafer to be tested in a cleaning tank, first spray it with 0.5% HF solution for 20 minutes, then spray it with pure water for 5 minutes, then shake off the pure water on the surface of the silicon wafer to be tested, and then purge it with nitrogen to remove oxides and residual metals on its surface.

[0109] (4) Divide the silicon wafer to be tested into multiple measurement points in a grid pattern, and add metal standard solution to the central and edge areas of the silicon wafer to be tested for contamination treatment.

[0110] (5) Subsequently, μ-PCD minority carrier lifetime and SPV diffusion length were measured on the contamination-treated silicon wafers. Based on the test results, the first map and the second map were plotted, as follows: Figure 3 As shown, the first map displays the lifetime measurement value for each measurement point in different colors. Figure 4 As shown, the diffusion length detection value of each measurement point is displayed in different colors in the second map.

[0111] According to the first and second maps, the metal contamination on the silicon wafer is located in the edge area.

[0112] Example 4

[0113] This embodiment performs surface metal contaminant detection on silicon wafers with a diameter of 300nm and a thickness of 700μm, specifically including the following steps:

[0114] (1) The silicon wafer to be tested was placed in a diffusion furnace at a temperature of 500℃~650℃ and heated once at a heating rate of 6℃ / min. After the temperature in the diffusion furnace reached 750℃, a first-stage heat preservation treatment was performed for 10min. During the first heating and first-stage heat preservation treatment, N2 at a rate of 20L / min and O2 at a rate of 0.15L / min were continuously introduced into the diffusion furnace. Then, a second heating was performed at a heating rate of 2℃ / min, while N2 at a rate of 20L / min and O2 at a rate of 0.15L / min were introduced into the diffusion furnace. After the temperature in the diffusion furnace reached 900℃, a second-stage heat preservation treatment was performed for 35min. During the second-stage heat preservation treatment, O2 at a rate of 10L / min was continuously introduced into the diffusion furnace.

[0115] (2) After the two-stage heat preservation treatment is completed, the diffusion furnace is subjected to gradient cooling treatment. That is, the temperature is first reduced to 850°C at a rate of 3°C / min, and then the temperature is maintained for 15 minutes. Then the temperature is reduced to 650°C at a rate of 6°C / min. At the same time, 20L / min of N2 is continuously introduced into the diffusion furnace. The silicon wafer to be tested is taken out, and the surface metal is diffused into the silicon wafer to be tested through internal gettering and is stably retained in the silicon wafer to be tested.

[0116] (3) Place the silicon wafer to be tested in a cleaning tank, first spray it with 1% HF solution for 15 minutes, then spray it with pure water for 20 minutes, then shake off the pure water on the surface of the silicon wafer to be tested, and then purge it with nitrogen to remove oxides and residual metals on its surface.

[0117] (4) Perform μ-PCD minority carrier lifetime detection and SPV diffusion length detection on the central region of the silicon wafer to be tested.

[0118] (5) Based on the pre-established mapping relationship between the metal in the ICP-MS table and the minority carrier lifetime or SPV diffusion length of μ-PCD, the contamination level of the silicon wafer is determined to be Level 2.

[0119] (6) Divide the silicon wafer to be tested into multiple measurement points in a grid pattern, and add metal standard solution to the central and edge areas of the silicon wafer to treat contamination.

[0120] (7) Subsequently, μ-PCD minority carrier lifetime and SPV diffusion length were measured on the contaminated silicon wafers. Based on the test results, the first map and the second map were plotted, as follows: Figure 5 As shown, the first map displays the lifetime measurement value for each measurement point in different colors. Figure 6 As shown, the diffusion length detection value of each measurement point is displayed in different colors in the second map.

[0121] According to the first and second maps, the metal contamination on the silicon wafer is located in the central area.

[0122] The applicant states that the above description is only a specific embodiment of the present application, but the protection scope of the present application is not limited thereto, and it should be understood by those skilled in the art that any changes or replacements within the technical scope disclosed by the present application, which can be easily thought of by any person skilled in the art, falls within the protection scope and disclosure scope of the present application.

Claims

1. A method for detecting metallic contaminants on the surface of a silicon wafer, characterized in that, The method for detecting metallic contaminants on the surface of silicon wafers includes: The silicon wafer to be tested is subjected to a diffusion treatment to diffuse metallic contaminants from the surface of the silicon wafer into its interior. The silicon wafer to be tested is then subjected to surface treatment to remove surface oxides and residual metals. Subsequently, the presence of metallic contaminants on the surface of the silicon wafer under test was determined by μ-PCD minority carrier lifetime detection and / or SPV diffusion length detection.

2. The method for detecting metallic contaminants on the surface of a silicon wafer according to claim 1, characterized in that, The diameter of the silicon wafer to be tested is 150nm~300nm; The thickness of the silicon wafer under test is 600μm~1000μm.

3. The method for detecting metallic contaminants on the surface of a silicon wafer according to claim 1 or 2, characterized in that, The diffusion process includes: continuously introducing a protective gas at 500℃~1000℃ to heat the silicon wafer to be tested, thereby promoting the diffusion of the surface metal into the silicon wafer through internal gettering and stably retaining it within the wafer; Preferably, the protective gas includes at least one of N2, N2O, Ar, NO, H2, or O2.

4. The method for detecting metallic contaminants on the surface of a silicon wafer according to claim 3, characterized in that, The heating process includes: placing the silicon wafer to be tested in a preheated heating furnace and heating it to a first temperature in one go, followed by a heat preservation process, then heating it to a second temperature in another go, followed by a second heat preservation process, and then removing it after a gradient cooling process. The temperature inside the preheated furnace is 500℃~650℃; The first temperature is 750℃~850℃, and the second temperature is 900℃~1000℃; The heating rate of the first heating is greater than the heating rate of the second heating; Preferably, the first stage of heat preservation treatment lasts for 5 to 20 minutes, and the second stage of heat preservation treatment lasts for 30 to 60 minutes.

5. The method for detecting metallic contaminants on the surface of a silicon wafer according to claim 4, characterized in that, The gradient cooling process includes: cooling the heated silicon wafer to 750℃~850℃ in one stage, followed by three stages of heat preservation, and then cooling to 500℃~650℃ in another stage.

6. The method for detecting metallic contaminants on a silicon wafer surface according to claim 4 or 5, characterized in that, During the first and second heating processes, N2 at a rate of 15 L / min to 25 L / min and O2 at a rate of 0.10 L / min to 0.3 L / min are introduced into the heating furnace. During the first stage of heat preservation, N2 at a rate of 15 L / min to 25 L / min and O2 at a rate of 0.10 L / min to 0.3 L / min are introduced into the heating furnace. During the second stage of heat preservation, O2 at a rate of 5 L / min to 15 L / min is introduced into the heating furnace. During the gradient cooling process, N2 is introduced into the heating furnace at a rate of 15 L / min to 25 L / min.

7. The method for detecting metallic contaminants on the surface of a silicon wafer according to any one of claims 1-6, characterized in that, The surface treatment includes: sequentially performing a first-stage cleaning, a second-stage cleaning, and drying on the silicon wafer to be tested after the diffusion treatment is completed; The first stage of cleaning uses an HF solution with a concentration of 0.5% to 10%, the second stage of cleaning uses pure water, and the time for the first stage of cleaning and the second stage of cleaning are independent, ranging from 5 min to 20 min. The drying process includes spinning the silicon wafer to be tested dry and then purging its surface with nitrogen.

8. The method for detecting metallic contaminants on the surface of a silicon wafer according to any one of claims 1-7, characterized in that, The detection location of the silicon wafer under test includes the edge region and / or the center region of the silicon wafer under test.

9. The method for detecting metallic contaminants on the surface of a silicon wafer according to any one of claims 1-8, characterized in that, The detection method further includes: A mapping relationship between ICP-MS surface metals and μ-PCD minority carrier lifetime or SPV diffusion length is established in advance. The content detection results are input into the mapping relationship to evaluate the surface metal contamination level of the silicon wafer to be tested. The classification of surface metal contamination levels includes Level 1, Level 2, and Level 3; The surface metal contamination concentration in the first level is ≤50 ppt; The surface metal contamination concentration in the second level is 50~150ppt, excluding 50ppt; The surface metal contamination concentration in the third level is >150 ppt.

10. The method for detecting metallic contaminants on the surface of a silicon wafer according to any one of claims 1-9, characterized in that, The detection method further includes: The silicon wafer under test is divided into multiple measurement points in a grid pattern. Metal standard solution was added to the center and edge areas of the silicon wafer to be tested for contamination treatment. Subsequently, μ-PCD minority carrier lifetime and SPV diffusion length were performed on the silicon wafers after contamination treatment. Based on the test results, a first map and a second map were drawn to determine the location of metal contamination. The first Map displays the lifetime detection value of each measurement point in different colors; The second map displays the diffusion length detection value of each measurement point in different colors.

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