Data transmission request processing method and device, electronic equipment and storage medium
By dynamically determining the target weight of DMA channels and intelligently scheduling them, the problem of hardware resource waste and low bandwidth utilization caused by the DMA channel management method in NVMe SSD controllers is solved, and efficient utilization and performance improvement of DMA channels are achieved.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-11-21
- Publication Date
- 2026-04-14
AI Technical Summary
In the existing technology, the DMA channel management method of NVMe SSD controllers results in high-priority channels being continuously under high load, while low-priority channels are idle, causing a waste of hardware resources and low PCIe bus bandwidth utilization.
By receiving data transmission requests, determining the amount and type of data to be transmitted, obtaining the remaining capacity of the request queue and the total amount of data already transmitted for the direct memory access channel, dynamically determining the target weight of the DMA channel, and selecting the target channel to process the data transmission request based on the type and weight, the system reduces firmware intervention and achieves intelligent scheduling of the DMA channel.
It improves the utilization of the DMA channel, reduces data transfer latency, and enhances PCIe bus bandwidth utilization and NVMe SSD input/output performance.
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Figure CN121858487A_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of data storage technology, and in particular to data transmission request processing methods, apparatus, electronic devices and storage media. Background Technology
[0002] Non-Volatile Memory Express (NVMe) solid-state drive (SSD) controllers typically employ a fixed-priority round-robin allocation method for managing Direct Memory Access (DMA) channels. Specifically, each DMA channel is assigned a fixed static priority. When a data transfer request is received from the host, it is preferentially allocated to the idle DMA channel with the highest static priority. If all DMA channels are busy, the request is round-robin according to the static priority from highest to lowest until the highest priority DMA channel becomes idle, at which point the data transfer request is allocated to that channel for processing.
[0003] However, this DMA channel management method results in high-priority DMA channels being constantly under high load, while low-priority DMA channels are always idle, leading to a waste of hardware resources. Summary of the Invention
[0004] This application provides a data transfer request processing method, apparatus, electronic device, and storage medium to at least solve the problem of wasted hardware resources caused by the DMA channel management method in related technologies.
[0005] This application provides a data transmission request processing method, including: Receive data transmission requests; Determine the amount of data to be transmitted in the data transmission request; Determine the type of data transmission request based on the amount of data to be transmitted; For any direct memory access channel, obtain the remaining capacity of the request queue corresponding to that direct memory access channel and the total amount of data already transmitted; The target weight of the direct memory access channel is determined based on the remaining capacity of the request queue corresponding to the direct memory access channel and the total amount of data transmitted. The target direct memory access channel is determined based on the type of data transfer request and the target weight of each direct memory access channel. Data transfer requests are handled based on the target direct memory access channel.
[0006] This application also provides a data transmission request processing apparatus, including: The receiving module is used to receive data transmission requests; The first determining module is used to determine the amount of data to be transmitted in the data transmission request; The second determining module is used to determine the type of data transmission request based on the amount of data to be transmitted; The acquisition module is used to obtain the remaining capacity and total amount of data transmitted in the request queue corresponding to any direct memory access channel. The third determining module is used to determine the target weight of the direct memory access channel based on the remaining capacity of the request queue corresponding to the direct memory access channel and the total amount of data transmitted. The fourth determination module is used to determine the target direct memory access channel based on the type of data transfer request and the target weight of each direct memory access channel; The processing module is used to process data transfer requests based on the target direct memory access channel.
[0007] This application also provides an electronic device, including: a memory for storing a computer program; and a processor for implementing the steps of any of the above-described data transmission request processing methods when executing the computer program.
[0008] This application also provides a computer-readable storage medium storing a computer program, wherein the computer program, when executed by a processor, implements the steps of any of the above-described data transmission request processing methods.
[0009] This application also provides a computer program product, including a computer program that, when executed by a processor, implements the steps of any of the above-described data transmission request processing methods.
[0010] This application addresses the following: receiving a data transfer request; determining the amount of data to be transferred; determining the type of data transfer request based on the amount of data to be transferred; for any given direct memory access channel (DMA channel), obtaining the remaining capacity of the request queue and the total amount of data already transferred for that DMA channel; determining the target weight of that DMA channel based on the remaining capacity of the request queue and the total amount of data already transferred; determining the target DMA channel based on the type of data transfer request and the target weight of each DMA channel; and processing the data transfer request based on the target DMA channel. By determining the target DMA channel for processing the data transfer request based on the dynamic weight of the DMA channel and the type of data transfer request, the technical problem of wasted hardware resources caused by managing DMA channels according to static priorities can be solved, thus achieving the technical effect of improving the utilization rate of DMA channels. Attached Figure Description
[0011] To more clearly illustrate the embodiments of this application, the accompanying drawings used in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0012] Figure 1 This is a schematic diagram of the structure of a data transmission request processing system provided in an embodiment of this application; Figure 2 A flowchart illustrating a data transmission request processing method provided in an embodiment of this application; Figure 3 A flowchart illustrating another data transmission request processing method provided in an embodiment of this application; Figure 4 A flowchart illustrating another data transmission request processing method provided in an embodiment of this application; Figure 5 This is a schematic diagram of the structure of a data transmission request processing device provided in an embodiment of this application; Figure 6 This is a schematic diagram of the structure of an electronic device provided in an embodiment of this application. Detailed Implementation
[0013] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the protection scope of this application.
[0014] It should be noted that, in the description of this application, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. The terms "first," "second," etc., in this application are used to distinguish similar objects and are not used to describe a specific order or sequence.
[0015] To enable those skilled in the art to better understand the present application, the present application will be further described in detail below with reference to the accompanying drawings and specific embodiments.
[0016] The DMA channel management methods in related technologies result in high-priority DMA channels being constantly under high load, while low-priority DMA channels are always idle, leading to a waste of hardware resources. For example, in the event of a sudden surge in small data transfer requests, high-priority DMA channels may be unable to release resources in time due to the frequent processing of these requests, while low-priority DMA channels may have no requests to process at all.
[0017] To address the aforementioned problems, this application provides a data transmission request processing method, apparatus, electronic device, and storage medium. The method includes: receiving a data transmission request; determining the amount of data to be transmitted in the data transmission request; determining the type of the data transmission request based on the amount of data to be transmitted; for any given direct memory access channel (DMA channel), obtaining the remaining capacity of the request queue corresponding to that DMA channel and the total amount of data already transmitted; determining the target weight of the DMA channel based on the remaining capacity of the request queue corresponding to that DMA channel and the total amount of data already transmitted; determining a target DMA channel based on the type of the data transmission request and the target weight of each DMA channel; and processing the data transmission request based on the target DMA channel. The method provided above determines the dynamic weight of the DMA channel based on the remaining capacity of the request queue corresponding to the DMA channel and the total amount of data already transmitted, and determines the target DMA channel for processing the data transmission request based on the dynamic weight of the DMA channel and the type of the data transmission request. Therefore, it can solve the technical problem of wasted hardware resources caused by managing DMA channels according to static priority, and achieve the technical effect of improving the utilization rate of DMA channels.
[0018] The specific application environment architecture or specific hardware architecture on which the execution of the data transmission request processing method depends is described here.
[0019] The data transmission request processing method, apparatus, electronic device, and storage medium provided in this application are applicable to processing data transmission requests issued by a server host. Figure 1The diagram shows the structure of the data transmission request processing system upon which this application is based. This system includes a server host and a storage controller. The storage controller is the controller within an NVMe SSD. The NVMe SSD follows the NVMe protocol and uses a PCIe interface to achieve high-speed data transmission between the server host and the storage device. The server host sends data transmission requests to the storage controller. The storage controller receives the data transmission requests; determines the amount of data to be transmitted; determines the type of data transmission request based on the amount of data to be transmitted; for any given direct memory access channel (DMI), obtains the remaining capacity of the request queue corresponding to that DMI and the total amount of data already transmitted; determines the target weight of that DMI based on the remaining capacity of the request queue and the total amount of data already transmitted; determines the target DMI based on the type of data transmission request and the target weight of each DMI; and processes the data transmission request based on the target DMI.
[0020] Embodiments of this application provide a data transfer request processing method applied to the controller in an NVMe SSD. Figure 2 This is a flowchart illustrating the data transmission request processing method provided in an embodiment of this application, as shown below. Figure 2 As shown, the data transmission request processing method includes the following steps: Step S201: Receive data transmission request.
[0021] Data transmission requests include data read requests and data write requests.
[0022] Step S202: Determine the amount of data to be transmitted in the data transmission request.
[0023] Step S203: Determine the type of data transmission request based on the amount of data to be transmitted.
[0024] The types of data transmission requests include small data transmission requests and large data transmission requests.
[0025] Step S204: For any direct memory access channel, obtain the remaining capacity of the request queue and the total amount of data already transmitted for that direct memory access channel.
[0026] Each Direct Memory Access (DMA) channel corresponds to a unique circular request queue, which stores the data descriptors corresponding to pending data transfer requests. This request queue can also be called a data descriptor queue. The data descriptor defines the configuration information of the data transferred in a single DMA channel, determined based on the corresponding data transfer request, including the source address, destination address, and data length (in bytes). DMA channels are used for data transfer between the server host and the controller in the NVMe SSD, without requiring intervention from the Central Processing Unit (CPU).
[0027] In related technologies, the DMA channel management method involves waiting for the controller's firmware to reconfigure the data descriptor for the next data transfer request after one data transfer request is processed, leading to frequent DMA channel starts and stops. During this process, the hardware transfer capability of the DMA channel is interrupted, and the PCIe bus bandwidth cannot be fully utilized.
[0028] In this application, the firmware in the controller maintains a request queue for each DMA channel. After the DMA channel finishes processing the current data transfer request, it automatically reads the data descriptor corresponding to the next data transfer request from the corresponding request queue to process the next data transfer request. There is no need to wait for the firmware response, which reduces the firmware intervention frequency and reduces the number of DMA channel start-stops by more than 60%, and increases the PCIe bus bandwidth utilization to more than 85%.
[0029] This firmware refers to the embedded program in the controller that implements DMA channel scheduling, data transfer request allocation, and DMA channel status management.
[0030] It should be noted that the remaining capacity of the request queue is determined based on the preset queue depth and the number of data descriptors in the request queue. The preset queue depth is set by technical personnel. For example, the preset queue depth can be 8.
[0031] Specifically, the difference between the preset queue depth of the request queue and the number of data descriptors in the request queue is calculated, and this difference is determined as the remaining capacity of the request queue.
[0032] The total amount of data transferred in a direct memory access channel, i.e., the cumulative number of bytes transferred, is used to quantify the load pressure on the direct memory access channel.
[0033] Step S205: Determine the target weight of the direct memory access channel based on the remaining capacity of the request queue corresponding to the direct memory access channel and the total amount of data transmitted.
[0034] Step S206: Determine the target direct memory access channel based on the type of data transfer request and the target weight of each direct memory access channel.
[0035] Understandably, the target direct memory access channel for processing the data transfer request is determined based on the type of the data transfer request and the target weight of each direct memory access channel.
[0036] Step S207: Process the data transfer request based on the target direct memory access channel.
[0037] The data transfer request processing method provided in this application determines the dynamic weight of the direct memory access channel based on the remaining capacity of the request queue corresponding to the direct memory access channel and the total amount of data already transferred. Based on the dynamic weight of the direct memory access channel and the type of data transfer request, the target direct memory access channel for processing the data transfer request is determined. Therefore, it can solve the technical problems of hardware resource waste, low DMA channel utilization, and high data transfer latency caused by the method of managing DMA channels according to static priority. It achieves the technical effects of improving DMA channel utilization, reducing data transfer latency, and improving the input / output performance and bandwidth utilization of NVMe SSD.
[0038] Embodiments of this application provide a data transfer request processing method applied to the controller in an NVMe SSD. Figure 3 This is a flowchart illustrating the data transmission request processing method provided in an embodiment of this application, as shown below. Figure 3 As shown, the data transmission request processing method includes the following steps: Step S301: Receive a data transmission request. For details, please refer to [link to relevant documentation]. Figure 2 Step S201 of the illustrated embodiment will not be described again here.
[0039] Step S302: Determine the amount of data to be transmitted in the data transmission request. For details, please refer to [link to relevant documentation]. Figure 2 Step S202 of the illustrated embodiment will not be described again here.
[0040] Step S303: Determine the type of data transmission request based on the amount of data to be transmitted.
[0041] Specifically, step S303 includes: Step S3031: If the amount of data to be transmitted is not greater than a preset data amount threshold, determine that the type of data transmission request is the first type.
[0042] The preset data volume threshold is set by technical personnel. For example, the preset data volume threshold is 4KB.
[0043] Understandably, the first type is a data transfer request with a small amount of data.
[0044] Step S3032: If the amount of data to be transmitted is greater than a preset data amount threshold, determine that the type of data transmission request is the second type.
[0045] Understandably, the second type is a data transmission request involving large amounts of data.
[0046] Step S304: For any direct memory access channel, obtain the remaining capacity and total amount of data already transmitted in the request queue corresponding to that direct memory access channel. See details in [link to relevant documentation]. Figure 2 Step S204 of the illustrated embodiment will not be described again here.
[0047] Step S305: Determine the target weight of the direct memory access channel based on the remaining capacity of the request queue corresponding to the direct memory access channel and the total amount of data transmitted.
[0048] Specifically, step S305 includes: Step S3051: Determine the continuity factor of the direct memory access channel based on the remaining capacity of the request queue corresponding to the direct memory access channel.
[0049] The continuity factor of the direct memory access channel is positively correlated with the remaining capacity of the request queue corresponding to the direct memory access channel. A larger continuity factor indicates that the DMA channel can continuously process more data transfer requests.
[0050] Specifically, the continuity factor of the direct memory access channel is determined using the following formula: C = (QM) × β Where C is the continuity factor of the direct memory access channel, Q is the preset queue depth of the request queue corresponding to the direct memory access channel, M is the used capacity of the request queue corresponding to the direct memory access channel, and β is the positive correlation coefficient, which is set by technical personnel.
[0051] Step S3052: Determine the target weight of the direct memory access channel based on the continuity factor and the total amount of data transmitted.
[0052] Step S306: Determine the target direct memory access channel based on the type of data transfer request and the target weight of each direct memory access channel.
[0053] Step S307: Process the data transfer request based on the target direct memory access channel. See details below. Figure 2 Step S207 of the illustrated embodiment will not be described again here.
[0054] The data transmission request processing method provided in this application intelligently divides data transmission requests into a first type (small data volume) and a second type (large data volume) based on the comparison result between the amount of data to be transmitted and a preset threshold. It can adopt differentiated target direct memory access channel confirmation strategies for different types of requests, thereby improving the efficiency of data transmission and system performance.
[0055] By dynamically determining the target weight of a direct memory access channel by combining the remaining capacity of the request queue and the total amount of data already transferred, intelligent scheduling of multiple DMA channels is achieved.
[0056] In some optional implementations, step S3052 above includes: Step a1: Based on the first formula, determine the target weight of the direct memory access channel. The first formula is: W dynamic =W base ×log(S+1)×C Among them, W dynamic W represents the target weight for this direct memory access channel. base Let S be the initial weight of the direct memory access channel, S be the total amount of data transmitted in the direct memory access channel, and C be the continuity factor of the direct memory access channel.
[0057] The initial weight of the direct memory access channel is determined based on the underlying hardware priority of the direct memory access channel, which is set by technical personnel.
[0058] By logarithmically scaling S, we can avoid large values causing drastic fluctuations in the target weight.
[0059] In some alternative implementations, step S306 includes: Step b1: If the data transfer request type is the first type, then based on the second formula, determine the first target score for each direct memory access channel; based on the first target score for each direct memory access channel, determine the direct memory access channel with the highest first target score as the target direct memory access channel. The second formula is: Score1 i =W dynamici + α / (M i + 1) Among them, Score1 i For the first objective score of the i-th direct memory access channel, W dynamici Let M be the target weight for the i-th direct memory access channel, α be a preset weight coefficient, and M be the target weight for the i-th direct memory access channel. i Let α be the used capacity of the request queue corresponding to the i-th direct memory access channel. α is based on experimental test settings.
[0060] Step b2: If the data transfer request type is the second type, then based on the third formula, determine the second target score for each direct memory access channel; based on the second target score for each direct memory access channel, determine the direct memory access channel with the highest second target score as the target direct memory access channel. The third formula is: Score2 i =W dynamici + α / (S i + 1) Among them, Score2 i For the second objective score of the i-th direct memory access channel, S i This represents the total amount of data transmitted in the i-th direct memory access channel.
[0061] The data transmission request processing method provided in this application determines the target direct memory access channel by dynamically selecting different scoring formulas according to the type of data transmission request. This achieves refined and intelligent scheduling of different types of transmission requests, thereby improving the overall transmission efficiency and resource utilization of the system.
[0062] In some optional implementations, the above data transmission request processing method further includes: Step c1: At preset time intervals, obtain the total amount of data transmitted for each direct memory access channel and the remaining capacity of the corresponding request queue.
[0063] The preset time period is set by technical personnel; for example, the preset time period can be 1 millisecond.
[0064] Step c2: Determine the average total amount of data transferred based on the total amount of data transferred for each direct memory access channel.
[0065] Step c3: For any direct memory access channel, if the total amount of data transmitted by the direct memory access channel exceeds a preset multiple of the average total amount of data transmitted, then based on the remaining capacity of the request queue corresponding to each direct memory access channel, determine the direct memory access channel with the largest remaining capacity; determine the data descriptors to be migrated in the request queue corresponding to the direct memory access channel, and migrate the data descriptors to be migrated to the request queue corresponding to the direct memory access channel with the largest remaining capacity.
[0066] The request queue is used to store the data descriptors corresponding to pending data transfer requests.
[0067] The preset multiplier is set by a technician; for example, the preset multiplier can be 2x.
[0068] Understandably, if the S value of any DMA channel exceeds twice the average total amount of data transferred, some data descriptors in the request queue corresponding to that DMA channel will be migrated to the request queue corresponding to the low-load DMA channel, so that the low-load DMA channel can handle the data transfer requests corresponding to the migrated data descriptors, thereby achieving load balancing.
[0069] The data transfer request processing method provided in this application periodically monitors the operating status of each direct memory access channel, including the total amount of data transferred and the remaining capacity of the request queue, and performs data descriptor migration based on this dynamic information to achieve load balancing of DMA channels, effectively improving the overall system performance and resource utilization. Actual tests show that using the data transfer request processing method provided in this application increases DMA channel utilization from 50%-70% in related technologies to over 90%.
[0070] In some optional implementations, step S307 above includes: Step d1: If the request queue corresponding to the target direct memory access channel is not empty, parse the data transfer request and obtain the data descriptor corresponding to the data transfer request.
[0071] Step d2: Place the data descriptor corresponding to the data transfer request into the request queue corresponding to the target direct memory access channel.
[0072] The target direct memory access channel processes data transfer requests corresponding to data descriptors in the order of the data descriptors in the request queue.
[0073] Understandably, the earlier a data descriptor is placed in the request queue, the sooner its corresponding data transfer request will be processed. After placing the data descriptor corresponding to the data transfer request into the request queue corresponding to the target direct memory access channel, the used capacity of that request queue is updated.
[0074] If the request queue corresponding to the target direct memory access channel is empty, parse the data transfer request, obtain the data descriptor corresponding to the data transfer request, and process the data transfer request based on the data descriptor corresponding to the data transfer request.
[0075] The data transmission request processing method provided in this application standardizes the data transmission request processing flow into three steps: parsing, queuing, and sequential execution, thereby achieving an efficient and reliable data transmission mechanism.
[0076] In some optional implementations, the above data transmission request processing method further includes: Step e1: For any direct memory access channel, if the request queue corresponding to the direct memory access channel includes multiple data descriptors corresponding to multiple data transfer requests of the first type, then aggregate the multiple data descriptors corresponding to the data transfer requests of the first type in the request queue to obtain an aggregated data descriptor.
[0077] Step e2: Based on the direct memory access channel, the aggregated data transfer request is processed according to the aggregated data descriptor. The data transfer requests corresponding to multiple data descriptors constituting the aggregated data descriptor are aggregated to obtain the aggregated data transfer request.
[0078] It should be noted that the final storage location is determined based on the storage positions of the multiple data descriptors constituting the aggregate data descriptor in the request queue. Specifically, the final storage location is the location of the data descriptor that appears last among the multiple data descriptors constituting the aggregate data descriptor.
[0079] The data transmission request processing method provided in this application improves bus utilization and avoids bandwidth waste caused by small packet transmission by merging multiple scattered small data transmission requests. This enhances overall I / O performance.
[0080] Embodiments of this application provide a data transfer request processing method applied to the controller in an NVMe SSD. Figure 4 This is a flowchart illustrating the data transmission request processing method provided in an embodiment of this application, as shown below. Figure 4 As shown, the data transmission request processing method includes the following steps: Step 1: Initialize Configuration. Set the preset data volume threshold to 4KB and the preset queue depth of the request queue to 8. Assign a basic hardware priority to each DMA channel to determine the initial weight of each DMA channel. For example, the initial weight of DMA0 channel is 10, the initial weight of DMA1 channel is 8, and the initial weight of DMA2 channel is 6.
[0081] Step 2: Receive the data transmission request sent by the host and determine the type of data transmission request. Specifically, the firmware parses the amount of data to be transmitted in the data transmission request. If the amount of data to be transmitted is no more than 4KB, the data transmission request is determined to be a small data transmission request; if the amount of data to be transmitted is greater than 4KB, the data transmission request is determined to be a large data transmission request.
[0082] Step 3: Calculate the dynamic weights. Specifically, calculate the target weight for each DMA channel. See the corresponding description above for details, which will not be repeated here.
[0083] Step 4: Perform request allocation and queue update. See steps b1 and b2 above for details, which will not be repeated here. After placing the data descriptor corresponding to the data transfer request into the request queue corresponding to the target direct memory access channel, update the used capacity of that request queue.
[0084] Step 5: Continuous Transfer. The DMA channel automatically reads data descriptors from the corresponding request queue and processes the data transfer request. After processing one data transfer request, if there are still data descriptors in the request queue, the next data transfer request is processed.
[0085] The data transmission request processing method provided in this application determines the dynamic weight of the direct memory access channel based on the remaining capacity of the request queue corresponding to the direct memory access channel and the total amount of data transmitted. Based on the dynamic weight of the direct memory access channel and the type of data transmission request, the target direct memory access channel for processing the data transmission request is determined, thereby achieving the technical effects of improving the utilization of the DMA channel, reducing data transmission latency, and improving the input / output performance and bandwidth utilization of the NVMe SSD.
[0086] Through the above description of the embodiments, those skilled in the art can clearly understand that the methods according to the above embodiments can be implemented by means of software plus necessary general-purpose hardware platforms. Of course, they can also be implemented by hardware, but in many cases the former is a better implementation method.
[0087] Embodiments of this application also provide a data transmission request processing apparatus, such as... Figure 5 As shown, the data transmission request processing device includes: The receiving module 501 is used to receive data transmission requests.
[0088] The first determining module 502 is used to determine the amount of data to be transmitted in the data transmission request.
[0089] The second determining module 503 is used to determine the type of data transmission request based on the amount of data to be transmitted.
[0090] The acquisition module 504 is used to acquire the remaining capacity and the total amount of data transmitted in the request queue corresponding to any direct memory access channel.
[0091] The third determining module 505 is used to determine the target weight of the direct memory access channel based on the remaining capacity of the request queue corresponding to the direct memory access channel and the total amount of data transmitted.
[0092] The fourth determination module 506 is used to determine the target direct memory access channel based on the type of data transfer request and the target weight of each direct memory access channel.
[0093] Processing module 507 is used to process data transfer requests based on the target direct memory access channel.
[0094] In some alternative implementations, the second determining module 503 includes: The first determining unit is used to determine the type of data transmission request as the first type when the amount of data to be transmitted is not greater than a preset data amount threshold.
[0095] The second determining unit is used to determine the type of data transmission request as the second type when the amount of data to be transmitted is greater than a preset data amount threshold.
[0096] In some alternative implementations, the third determining module 505 includes: The third determining unit is used to determine the continuity factor of the direct memory access channel based on the remaining capacity of the request queue corresponding to the direct memory access channel.
[0097] The fourth determining unit is used to determine the target weight of the direct memory access channel based on the continuity factor and the total amount of data transmitted.
[0098] In some optional implementations, the fourth determining unit includes: The fourth determining subunit is used to determine the target weight of the direct memory access channel based on the first formula, which is: W dynamic =W base ×log(S+1)×C Among them, W dynamic W represents the target weight for this direct memory access channel. base Let S be the initial weight of the direct memory access channel, S be the total amount of data transmitted in the direct memory access channel, and C be the continuity factor of the direct memory access channel.
[0099] In some alternative implementations, the fourth determining module 506 includes: The fifth determining unit is used to, if the data transfer request type is the first type, determine the first target score for each direct memory access channel based on the second formula; and, based on the first target score of each direct memory access channel, determine the direct memory access channel with the highest first target score as the target direct memory access channel. The second formula is: Score1 i =W dynamici + α / (M i + 1) Among them, Score1 i For the first objective score of the i-th direct memory access channel, W dynamiciLet M be the target weight for the i-th direct memory access channel, α be a preset weight coefficient, and M be the target weight for the i-th direct memory access channel. i This represents the used capacity of the request queue corresponding to the i-th direct memory access channel.
[0100] The sixth determining unit is used to determine the second target score for each direct memory access channel based on the third formula if the data transfer request type is the second type; and to determine the direct memory access channel with the highest second target score as the target direct memory access channel based on the second target score of each direct memory access channel. The third formula is: Score2 i =W dynamici + α / (S i + 1) Among them, Score2 i For the second objective score of the i-th direct memory access channel, S i This represents the total amount of data transmitted in the i-th direct memory access channel.
[0101] In some optional embodiments, the data transmission request processing apparatus further includes: The first acquisition unit is used to acquire the total amount of data transmitted and the remaining capacity of the corresponding request queue for each direct memory access channel at preset time intervals.
[0102] The seventh determining unit is used to determine the average total amount of data transmitted based on the total amount of data transmitted for each direct memory access channel.
[0103] The migration unit, for any direct memory access channel (DMI) channel, if the total amount of data transmitted on that DMI channel exceeds a preset multiple of the average total amount of data transmitted, determines the DMI channel with the largest remaining capacity based on the remaining capacity of the request queue corresponding to each DMI channel; identifies the data descriptors to be migrated in the request queue corresponding to that DMI channel; and migrates these data descriptors to the request queue corresponding to the DMI channel with the largest remaining capacity. The request queue is used to store data descriptors corresponding to pending data transmission requests.
[0104] In some alternative implementations, the processing module 507 includes: The second acquisition unit is used to parse the data transmission request and obtain the data descriptor corresponding to the data transmission request when the request queue corresponding to the target direct memory access channel is not empty.
[0105] The insertion unit is used to insert the data descriptor corresponding to the data transfer request into the request queue corresponding to the target direct memory access channel.
[0106] The target direct memory access channel processes data transfer requests corresponding to data descriptors in the order of the data descriptors in the request queue.
[0107] For a description of the features in the embodiment corresponding to the data transmission request processing device, please refer to the relevant description in the embodiment corresponding to the data transmission request processing method, which will not be repeated here.
[0108] Embodiments of this application also provide an electronic device, such as... Figure 6 As shown, it includes a processor 601 and a memory 602, in which a computer program is stored. The processor 601 is configured to run the computer program to perform the steps in any of the above-described embodiments of the data transmission request processing method.
[0109] Embodiments of this application also provide a computer-readable storage medium storing a computer program, wherein the computer program is configured to execute the steps in any of the above-described embodiments of the data transmission request processing method when it is run.
[0110] In one exemplary embodiment, the aforementioned computer-readable storage medium may include, but is not limited to, various media capable of storing computer programs, such as a USB flash drive, read-only memory (ROM), random access memory (RAM), portable hard disk, magnetic disk, or optical disk.
[0111] Embodiments of this application also provide a computer program product, which includes a computer program that, when executed by a processor, implements the steps in any of the above-described data transmission request processing method embodiments.
[0112] Embodiments of this application also provide another computer program product, including a non-volatile computer-readable storage medium storing a computer program, which, when executed by a processor, implements the steps in any of the above-described data transmission request processing method embodiments.
[0113] Those skilled in the art will further recognize that the units and algorithm steps of the various examples described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, computer software, or a combination of both. To clearly illustrate the interchangeability of hardware and software, the components and steps of the various examples have been generally described in terms of functionality in the foregoing description. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.
[0114] The foregoing has provided a detailed description of a data transmission request processing method, apparatus, electronic device, and storage medium provided in this application. Specific examples have been used to illustrate the principles and implementation methods of this application. The descriptions of the embodiments above are only intended to aid in understanding the method and core ideas of this application. It should be noted that those skilled in the art can make various improvements and modifications to this application without departing from its principles, and these improvements and modifications also fall within the protection scope of the claims of this application.
Claims
1. A data transmission request processing method, characterized in that, include: Receive data transmission requests; Determine the amount of data to be transmitted in the data transmission request; Based on the amount of data to be transmitted, determine the type of the data transmission request; For any direct memory access channel, obtain the remaining capacity of the request queue corresponding to that direct memory access channel and the total amount of data already transmitted; The target weight of the direct memory access channel is determined based on the remaining capacity of the request queue corresponding to the direct memory access channel and the total amount of data transmitted. The target direct memory access channel is determined based on the type of the data transfer request and the target weight of each direct memory access channel. The data transfer request is processed based on the target direct memory access channel.
2. The method according to claim 1, characterized in that, Determining the type of the data transmission request based on the amount of data to be transmitted includes: If the amount of data to be transmitted is not greater than a preset data amount threshold, the type of the data transmission request is determined to be the first type; If the amount of data to be transmitted is greater than a preset data amount threshold, the type of the data transmission request is determined to be the second type.
3. The method according to claim 1, characterized in that, The determination of the target weight of the direct memory access channel based on the remaining capacity of the request queue corresponding to the direct memory access channel and the total amount of data transmitted includes: The continuity factor of the direct memory access channel is determined based on the remaining capacity of the request queue corresponding to the direct memory access channel. The target weight of the direct memory access channel is determined based on the continuity factor and the total amount of data transmitted.
4. The method according to claim 3, characterized in that, The determination of the target weight of the direct memory access channel based on the continuity factor and the total amount of data transmitted includes: Based on the first formula, the target weight of the direct memory access channel is determined. The first formula is: W dynamic =W base ×log(S+1)×C Among them, W dynamic W represents the target weight for this direct memory access channel. base Let S be the initial weight of the direct memory access channel, S be the total amount of data transmitted in the direct memory access channel, and C be the continuity factor of the direct memory access channel.
5. The method according to claim 1, characterized in that, The step of determining the target direct memory access channel based on the type of the data transfer request and the target weight of each direct memory access channel includes: If the data transfer request is of type 1, then based on the second formula, a first target score is determined for each direct memory access channel; based on the first target score of each direct memory access channel, the direct memory access channel with the highest first target score is determined as the target direct memory access channel; the second formula is: Score1 i =W dynamici + a / (M i + 1) Among them, Score1 i For the first objective score of the i-th direct memory access channel, W dynamici Let M be the target weight for the i-th direct memory access channel, α be a preset weight coefficient, and M be the target weight for the i-th direct memory access channel. i The used capacity of the request queue corresponding to the i-th direct memory access channel; If the data transfer request is of type two, then based on the third formula, a second target score is determined for each direct memory access channel; based on the second target score of each direct memory access channel, the direct memory access channel with the highest second target score is determined as the target direct memory access channel; the third formula is: Score2 i =W dynamici + a / (S i + 1) Among them, Score2 i For the second objective score of the i-th direct memory access channel, S i This represents the total amount of data transmitted in the i-th direct memory access channel.
6. The method according to claim 1, characterized in that, The method further includes: At preset time intervals, obtain the total amount of data transmitted for each direct memory access channel and the remaining capacity of the corresponding request queue; The average total amount of data transmitted is determined based on the total amount of data transmitted for each of the direct memory access channels. For any direct memory access channel, if the total amount of data transmitted by the direct memory access channel exceeds a preset multiple of the average total amount of data transmitted, then based on the remaining capacity of the request queue corresponding to each direct memory access channel, the direct memory access channel with the largest remaining capacity is determined; the data descriptors to be migrated in the request queue corresponding to the direct memory access channel are determined, and the data descriptors to be migrated are migrated to the request queue corresponding to the direct memory access channel with the largest remaining capacity. The request queue is used to store the data descriptors corresponding to the data transmission requests to be processed.
7. The method according to claim 1, characterized in that, The process of handling the data transfer request based on the target direct memory access channel includes: If the request queue corresponding to the target direct memory access channel is not empty, parse the data transmission request to obtain the data descriptor corresponding to the data transmission request; Place the data descriptor corresponding to the data transmission request into the request queue corresponding to the target direct memory access channel; The target direct memory access channel processes the data transfer requests corresponding to the data descriptors according to the order of the data descriptors in the request queue.
8. A data transmission request processing apparatus, characterized in that, include: The receiving module is used to receive data transmission requests; The first determining module is used to determine the amount of data to be transmitted in the data transmission request; The second determining module is used to determine the type of the data transmission request based on the amount of data to be transmitted; The acquisition module is used to obtain the remaining capacity and total amount of data transmitted in the request queue corresponding to any direct memory access channel. The third determining module is used to determine the target weight of the direct memory access channel based on the remaining capacity of the request queue corresponding to the direct memory access channel and the total amount of data transmitted. The fourth determining module is used to determine the target direct memory access channel based on the type of the data transmission request and the target weight of each direct memory access channel; The processing module is used to process the data transfer request based on the target direct memory access channel.
9. An electronic device, characterized in that, include: Memory, used to store computer programs; A processor, configured to implement the steps of the data transmission request processing method as described in any one of claims 1 to 7 when executing the computer program.
10. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores a computer program, wherein the computer program, when executed by a processor, implements the steps of the data transmission request processing method as described in any one of claims 1 to 7.