IGBT (Insulated Gate Bipolar Translator) structure capable of adjusting active trench arrangement
By introducing an adjustable active trench arrangement into the IGBT structure and utilizing adjustable pad areas and bus connections, the problem of customization required for existing IGBT designs is solved, achieving flexibility and cost-effectiveness to adapt to various application needs without changing the underlying chip structure and manufacturing process.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- ZHEJIANG CUIZHAN MICROELECTRONICS CO LTD
- Filing Date
- 2025-12-19
- Publication Date
- 2026-04-14
AI Technical Summary
Existing IGBT designs require customization for different application scenarios, resulting in long R&D cycles, high costs, numerous product models, and complex management. It is impossible to flexibly adjust electrical characteristics to adapt to various application needs without changing the underlying chip structure and manufacturing process.
By introducing an adjustable active trench arrangement into the IGBT structure, and utilizing the first and second adjustable pad areas and their corresponding bus connections, the function of the trench is dynamically defined, enabling the switching between the gate trench and the emitter trench, and flexibly adjusting the switching speed, on-state voltage drop, and short-circuit withstand capability.
This enables a single chip platform to adapt to various application needs without changing the underlying chip structure and manufacturing process, reducing R&D costs, simplifying management, and improving adaptability and flexibility.
Smart Images
Figure CN121865641A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of IGBT technology, and in particular to an IGBT structure with adjustable active trench arrangement. Background Technology
[0002] In the field of power electronics, Insulated Gate Bipolar Transistors (IGBTs), as important power semiconductor devices, have been widely used in many cutting-edge fields such as photovoltaic energy storage, new energy vehicles, industrial frequency converters, white goods, smart grids, servers, and artificial intelligence. With the rapid development of these technologies, the market has placed diverse and stringent demands on IGBT performance. Switching speed is one of the core parameters of IGBTs, but different application areas, and even different customers within the same field, have significantly different requirements for the switching frequency of IGBTs with the same voltage and current specifications. For example, industrial frequency converters typically operate in the low-frequency range below 10kHz, focusing on low on-state voltage drop; while photovoltaic inverters require switching frequencies in the range of 20kHz to 60kHz or even higher, and have extremely stringent requirements for switching losses to improve system efficiency.
[0003] Currently, to meet these diverse performance requirements, IGBT suppliers have to design dedicated chips with different gate and emitter trench arrangements for each specific application scenario. By changing the trench arrangement, the parasitic parameters inside the IGBT can be adjusted, thereby achieving different switching speeds, saturation currents, and short-circuit withstand capabilities. However, achieving this customized design means that for each new product specification, the entire photomask needs to be redesigned and a complete wafer fabrication process needs to be carried out. This process not only leads to lengthy R&D cycles and a sharp increase in costs, but also causes a series of serious problems such as a large number of product models, complex management, resource waste, inventory backlog, and difficulties in supply and allocation.
[0004] Therefore, there is an urgent need for an innovative IGBT design that can flexibly adjust its internal electrical characteristics without changing the underlying chip structure and manufacturing process, so as to be compatible with a variety of application requirements on a single chip platform. Summary of the Invention
[0005] In view of this, the present invention provides an IGBT structure with adjustable active trench arrangement to solve the above-mentioned technical problems.
[0006] An IGBT structure with adjustable active trench arrangement includes an IGBT assembly, a gate pad region, a first adjustable pad region, a second adjustable pad region, two gate buses connected to the gate pad region, two first buses connected to the first adjustable pad region, two second buses connected to the second adjustable pad region, and an emitter metal disposed on the insulating dielectric layer. The IGBT assembly includes a P-type collector region, an N-type drift region disposed on the P-type collector region, a P-type base region disposed on the N-type drift region, multiple N-type emitter regions disposed on the N-type drift region, multiple trenches disposed on the P-type base region, and an insulating dielectric layer disposed on the P-type base region. The two ends of the multiple trenches are respectively connected to the gate through second vias on the insulating dielectric layer. The system comprises a pad area, a first adjustable pad area, a second adjustable pad area, and an emitter metal connection. The trenches are categorized into gate trenches, first adjustable trenches, second adjustable trenches, and emitter trenches based on their connection positions. The two ends of the gate trench are respectively connected to two gate buses, and one end of each gate bus is connected to the gate pad area. The two ends of the first adjustable trench are respectively connected to two first buses, and one end of each first bus is connected to the first adjustable pad area. The two ends of the second adjustable trench are respectively connected to two second buses, and one end of each second bus is connected to the second adjustable pad area. The two ends of the emitter trench are respectively connected to the emitter metal. The first adjustable pad area is connected to either the gate pad area or the emitter metal, and the second adjustable pad area is connected to either the gate pad area or the emitter metal.
[0007] Furthermore, the P-type collector region includes a collector metal layer, a P-type doped layer disposed on the collector metal layer, and an N-type cutoff layer disposed on the P-type doped layer.
[0008] Furthermore, multiple N-type emission regions are spaced apart on the P-type base region, the N-type emission regions are embedded in the P-type base region, and the upper surface of the N-type emission region is flush with the upper surface of the P-type base region.
[0009] Furthermore, the N-type emitter region is connected to the emitter metal through a first through-hole on the insulating dielectric layer.
[0010] Furthermore, the upper surface of the trench is flush with the P-type base region and the N-type emitter region, the bottom of the trench penetrates the P-type base region and extends to the N-type drift region, a gate oxide layer is provided on the inner sidewall of the trench, the gate oxide layer is filled with polysilicon, and the gate oxide layer is located between the polysilicon and the trench.
[0011] Furthermore, the second via is located at the overlap of the plurality of trenches, the gate bus, the first bus, the second bus, and the emitter metal.
[0012] Compared to existing technologies, the adjustable active trench arrangement IGBT structure provided by this invention, through the first and second adjustable pad areas and their corresponding first and second buses, allows the first and second adjustable trenches to dynamically define themselves as gate trenches or emitter trenches simply by changing the connection relationship between the adjustable pad areas and the gate pads or the emitter metal via simple external connection lines. This enables a single chip to flexibly configure the trench arrangement ratio, thereby generating device characteristics with different switching speeds, on-state voltage drops, and short-circuit withstand capabilities, perfectly adapting to the stringent requirements of different application scenarios from low to high frequencies. Furthermore, characteristic adjustments can be achieved simply by changing the external connections between the first and second adjustable pad areas and the gate pad areas or the emitter metal, eliminating the need to redesign the photomask and significantly saving costs. Attached Figure Description
[0013] Figure 1 This is a top view of an IGBT structure with adjustable active trench arrangement provided by the present invention.
[0014] Figure 2 for Figure 1 A top view of an IGBT structure with adjustable active trench arrangement, excluding the gate pad area, the first adjustable pad area, the second adjustable pad area, the gate bus, the first bus, and the second bus.
[0015] Figure 3 for Figure 2 A cross-sectional view at point AA of an IGBT structure with adjustable active trench arrangement.
[0016] Figure 4 for Figure 1 A top view of an IGBT assembly with the adjustable active trench arrangement having the insulating dielectric layer removed. Detailed Implementation
[0017] The following provides a more detailed description of specific embodiments of the present invention. It should be understood that the description of the embodiments of the present invention herein is not intended to limit the scope of protection of the present invention.
[0018] like Figures 1 to 4The diagram shown is a structural schematic of the adjustable active trench IGBT structure provided by the present invention. The adjustable active trench IGBT structure includes an IGBT assembly 10, a gate pad region 20, a first adjustable pad region 30, a second adjustable pad region 40, two gate buses 50 connected to the gate pad region 20, two first buses 60 connected to the first adjustable pad region 30, two second buses 70 connected to the second adjustable pad region 40, and an emitter metal 80 disposed on the insulating dielectric layer 50. It is conceivable that the adjustable active trench IGBT structure also includes other functional modules, which are techniques well known to those skilled in the art and will not be described in detail here.
[0019] The IGBT assembly 10 includes a P-type collector region 11, an N-type drift region 12 disposed on the P-type collector region 10, a P-type base region 13 disposed on the N-type drift region 12, a plurality of N-type emitter regions 14 disposed on the N-type drift region 12, a plurality of trenches 15 disposed on the P-type base region 13, and an insulating dielectric layer 16 disposed on the P-type base region 13.
[0020] The P-type collector region 11 includes a collector metal layer 111, a P-type doped layer 112 disposed on the collector metal layer 111, and an N-type cutoff layer 113 disposed on the P-type doped layer 112.
[0021] The collector metal layer 111 is located at the bottom of the device and its main function is to connect with the external electrode metal. The P-type doped layer 112 serves as the collector of the device and is connected to the collector metal layer 111. The electric field extends from the N-type drift region 12 to the P-type collector region 10. If there is direct contact, the electric field will be sharply enhanced in the P-type doped layer 112, leading to local breakdown. Therefore, the N-type cutoff layer 113 is located between the N-type drift region 12 and the P-type doped layer 112. The N-type cutoff layer 113 is used to limit the extension of the electric field in the N-type drift region 12 and prevent breakdown. At the same time, it effectively reduces the thickness of the N-type drift region 12, reduces the on-resistance, and reduces the turn-off loss and time.
[0022] The N-type drift region 12 is the main withstand voltage layer of the IGBT device. It is used to withstand the high voltage when the IGBT device is turned off and serves as a current flow channel from the collector to the emitter when it is turned on.
[0023] The P-type base region 13 is disposed on the N-type drift region 12, and the P-type base region 13 is a key area for forming conductive channels in IGBT.
[0024] Multiple N-type emitter regions 14 are spaced apart on the P-type base region 13. The N-type emitter regions 14 are embedded in the P-type base region 13, with their upper surfaces flush with the upper surfaces of the P-type base region 13. The N-type emitter regions 14 are connected to the emitter metal 80 through a first through-hole 161 on the insulating dielectric layer 16, and are the primary source of electron current for the IGBT, providing electrons to the IGBT when the device is turned on.
[0025] The upper surface of the trench 15 is flush with the P-type base region 13 and the N-type emitter region 14. The bottom of the trench 15 penetrates the P-type base region 13 and extends to the N-type drift region 12. A gate oxide layer 151 is provided on the inner sidewall of the trench 15. The gate oxide layer 151 is filled with polysilicon 152. The gate oxide layer 151 is located between the polysilicon 152 and the trench 15, and it is used to prevent leakage current between the polysilicon 152 and the surrounding N-type drift region 12.
[0026] The trenches 15 are arranged in a straight line. In this embodiment, eight trenches 15 are arranged in a cycle of four. The following description uses four trenches 15. The two ends of each trench 15 are connected to the gate pad region 20, the first adjustable pad region 30, the second adjustable pad region 40, and the emitter metal 80 respectively through a second through-hole 162 on the insulating dielectric layer 16. Depending on the connection position, the trenches 15 can serve different functions, specifically as gate trench 153, first adjustable trench 154, second adjustable trench 155, and emitter trench 156. The first through-hole 161 on the insulating dielectric layer 16 is used to connect the emitter metal 80 to the N-type emitter region 14. The second via 162 on the insulating dielectric layer 16 is used to connect the plurality of trenches 15 with the gate bus 50, the first bus 60, the second bus 70, and the emitter metal 80. Therefore, the second via 162 is located at the overlap of the plurality of trenches 15 and the gate bus 50, the first bus 60, the second bus 70, and the emitter metal 80, so that it can pass through the insulating dielectric layer 16 and connect with the corresponding trench 15.
[0027] The two ends of the gate trench 153 are respectively connected to the two gate buses 50. One end of the two gate buses 50 is connected to the gate pad area 20, and the other ends are connected to each other or spaced apart. The gate pad area 20 is connected to the external gate metal (not shown), thereby enabling the gate trench 153 to communicate with the gate metal.
[0028] The first adjustable trench 154 is connected to two first buses 60 at its two ends. One end of each of the two first buses 60 is connected to the first adjustable pad area 30, and the other ends are connected to each other or spaced apart. The first adjustable pad area 30 is connected to the gate pad area 20 or the emitter metal 80 via a connecting line, thereby enabling the first adjustable trench 154 to communicate with the gate metal or emitter metal 80, thus controlling whether the first adjustable trench 154 is a gate trench or an emitter trench.
[0029] The two ends of the second adjustable trench 155 are respectively connected to two second buses 70. One end of each of the two second buses 70 is connected to the second adjustable pad area 40, and the other ends are connected to each other or spaced apart. The second adjustable pad area 40 is connected to the gate pad area 20 or the emitter metal 80 through a connecting line, thereby enabling the second adjustable trench 155 to communicate with the gate metal or emitter metal 80, so as to control whether the second adjustable trench 155 is a gate trench or an emitter trench.
[0030] The two ends of the emitter trench 156 are respectively connected to the emitter metal 80.
[0031] When adjusting the number and arrangement of gate trenches and emitter trenches, it is only necessary to control the first adjustable pad area 30 and the second adjustable pad area 40 to the gate pad area 20 or the emitter metal 80. If a two-gate-trench-two-emitter-trench arrangement is required, simply connect the first adjustable pad area 30 to the gate pad area 20 electrically. Since the gate pad area 20 is connected to the external gate metal, the first bus 60 and the first adjustable pad area 30 are also connected to the external gate, at which point the first adjustable trench 154 becomes a gate trench. Similarly, the second adjustable trench 155 is transformed into an emitter trench by connecting the second adjustable pad area 40 to the emitter metal 80 via a connecting wire. Simultaneously, since both ends of the trench 15 are connected to the bus, current flows in from both sides simultaneously when the trench is turned on, resulting in a faster response time. The number of the first adjustable trench 154 and the second adjustable trench 155 can be set as needed, and at least one adjustable trench can be selectively defined as a gate trench or an emitter trench.
[0032] This application also includes a method for manufacturing an IGBT structure with adjustable active trench arrangement, comprising the following steps: Step S1: Provide an N-type lightly doped substrate, define its terminal region and perform corresponding processing, define the required active region, and define the N-type drift region 12. Step S2: Using photolithography and hard masking techniques, trenches 15 are etched on the surface of the active region defined in step S1; Step S3: A gate oxide layer 151 is grown in the trench 15 formed in step S2, and polysilicon 152 is filled on the gate oxide layer 151 to form a trench structure; Step S4: Within the active region defined in step S1, a P-based region 13 is formed on the surface of the N-type drift region 12 by ion implantation of P-type impurities and high-temperature push-bonding process; Step S5: An implantation window is formed on the surface of the P-type base region 13 by photolithography, and an N-type emitter region 14 is formed on the surface of the P-type base region 13 by N-type ion implantation and high-temperature push-junction process; Step S6: Deposit an insulating dielectric layer 16 on the surface of the trench 15, the P-base region 13, and the N-type emitter region 14; Step S7: Using photolithography, a plurality of first vias 161 and a plurality of second vias 162 are etched on the insulating dielectric layer 16. The positions of the first vias 161 correspond to the P-type base region 13 and the N-type emitter region 14, and the positions of the second vias 161 correspond to the two ends of the trench 15, so as to define the gate trench and the emitter trench. Step S8: Metal deposition is performed on the insulating dielectric layer 16 to form a gate pad region 20, a first adjustable pad region 30, a second adjustable pad region 40, a gate bus 50, a first bus 60, a second bus 70, and an emitter metal 80, such that the emitter metal 80 fills the first via 161, and the gate bus 50, the first bus 60, and the second bus 70 fill the plurality of second vias 162 respectively. Step S9: Thin the back side of the N-type drift region 12 to a suitable thickness, and form a P-type doped layer 112 and an N-type cutoff layer 113 by ion implantation, respectively. Activate the impurities by laser annealing. Sputter metal onto the P-type doped layer 112 to form a collector metal layer 111, finally forming the device structure.
[0033] Compared with existing technologies, the adjustable active trench arrangement IGBT structure provided by this invention, through the first adjustable pad area 30 and the second adjustable pad area 40 and their corresponding first bus 60 and second bus 70, allows the first adjustable trench 154 and the second adjustable trench 155 to dynamically define the adjustable trench as the gate trench 153 or the emitter trench 156 simply by changing the connection relationship between the adjustable pad area and the gate pad 20 or the emitter metal 80 via a simple external connection line. This enables a single chip to flexibly configure the trench arrangement ratio, thereby generating device characteristics with different switching speeds, on-state voltage drops, and short-circuit withstand capabilities, perfectly adapting to the stringent requirements of different application scenarios from low frequency to high frequency. Furthermore, characteristic adjustments can be achieved simply by changing the external connection between the first adjustable pad area 30 and the second adjustable pad area 40 and the gate pad area 20 or the emitter metal 80, eliminating the need to redesign the photomask and significantly saving costs.
[0034] The above are merely preferred embodiments of the present invention and are not intended to limit the scope of protection of the present invention. Any modifications, equivalent substitutions or improvements within the spirit of the present invention are covered within the scope of the claims of the present invention.
Claims
1. An IGBT structure with adjustable active trench arrangement, characterized in that: The adjustable active trench IGBT structure includes an IGBT assembly, a gate pad region, a first adjustable pad region, a second adjustable pad region, two gate buses connected to the gate pad region, two first buses connected to the first adjustable pad region, two second buses connected to the second adjustable pad region, and an emitter metal disposed on the insulating dielectric layer. The IGBT assembly includes a P-type collector region, an N-type drift region disposed on the P-type collector region, a P-type base region disposed on the N-type drift region, multiple N-type emitter regions disposed on the N-type drift region, multiple trenches disposed on the P-type base region, and an insulating dielectric layer disposed on the P-type base region. The two ends of the multiple trenches are respectively connected to the gate pad region and the first adjustable pad region through second vias on the insulating dielectric layer. The system includes a pad area, a second adjustable pad area, and an emitter metal connection. The trenches are categorized into gate trenches, first adjustable trenches, second adjustable trenches, and emitter trenches based on their connection positions. The two ends of the gate trench are connected to two gate buses, and one end of each gate bus is connected to the gate pad area. The two ends of the first adjustable trench are connected to two first buses, and one end of each first bus is connected to the first adjustable pad area. The two ends of the second adjustable trench are connected to two second buses, and one end of each second bus is connected to the second adjustable pad area. The two ends of the emitter trench are connected to the emitter metal. The first adjustable pad area is connected to either the gate pad area or the emitter metal, and the second adjustable pad area is connected to either the gate pad area or the emitter metal.
2. The IGBT structure with adjustable active trench arrangement as described in claim 1, characterized in that: The P-type collector region includes a collector metal layer, a P-type doped layer disposed on the collector metal layer, and an N-type cutoff layer disposed on the P-type doped layer.
3. The IGBT structure with adjustable active trench arrangement as described in claim 1, characterized in that: Multiple N-type emission regions are spaced apart on the P-type base region, the N-type emission regions are embedded in the P-type base region, and the upper surface of the N-type emission regions is flush with the upper surface of the P-type base region.
4. The IGBT structure with adjustable active trench arrangement as described in claim 1, characterized in that: The N-type emitter region is connected to the emitter metal through a first through-hole on the insulating dielectric layer.
5. The IGBT structure with adjustable active trench arrangement as described in claim 1, characterized in that: The upper surface of the trench is flush with the P-type base region and the N-type emitter region. The bottom of the trench penetrates the P-type base region and extends to the N-type drift region. A gate oxide layer is provided on the inner sidewall of the trench. The gate oxide layer is filled with polysilicon and is located between the polysilicon and the trench.
6. The IGBT structure with adjustable active trench arrangement as described in claim 1, characterized in that: The second via is located at the overlap of the plurality of trenches, the gate bus, the first bus, the second bus, and the emitter metal.