Overlay alignment techniques in digital communications

Abstract

Techniques for performing digital communications are presented herein. One example method of digital communication includes a first node obtaining an input bit sequence c = [c0, c1,..., cK-1]; the first node determines a first intermediate bit sequence w = [w0, w1,..., wNw-1] and a second intermediate bit sequence w '= [w' 0, w '1,..., w' Nw '-1] based on an operation performed on the input bit sequence c; the first node determines a superposition bit sequence h = [h0, h1,..., hH-1] by executing a middle alignment superposition operation on the first middle bit sequence w and the second middle bit sequence w '; the first node determines an output bit sequence f = [f0, f1,..., fF-1] based on the superposed bit sequence h; the first node transmits a signal comprising the output bit sequence f to the second node.

Description

Technical Field

[0001] This document is primarily for digital communications, such as digital wireless communications. Background Technology

[0002] Mobile communication technologies are propelling the world toward an increasingly interconnected and networked society. Compared to existing wireless networks, next-generation systems and wireless communication technologies will need to support a wider range of use case characteristics and provide more complex and advanced access requirements and flexibility.

[0003] Long-Term Evolution (LTE) is a wireless communication standard developed by the 3rd Generation Partnership Project (3GPP) for mobile devices and data terminals. LTE Advanced (LTE-A) is a wireless communication standard that enhances the LTE standard. The fifth-generation wireless system (called 5G) evolves upon the LTE and LTE-A wireless standards, aiming to support higher data rates, massive connectivity, ultra-low latency, high reliability, and other emerging service requirements. Summary of the Invention

[0004] This invention discloses a channel coding technique employing incremental redundancy in a communication system (e.g., a wireless communication system).

[0005] An example method for digital communication includes: a first node acquiring an input bit sequence. c = [ c 0, c 1, ..., c K-1 ],in K It is the input length of the input bit sequence; the first node is based on the input bit sequence. c = [ c 0, c 1, ..., c K-1 Perform one or more operations to determine the first intermediate bit sequence. w = [ w 0, w 1, ..., w Nw-1 ] and the second intermediate bit sequence w' = [ w' 0, w' 1, ..., w' Nw'-1 ],in Nw It is the first intermediate bit sequence w The first length, and Nw' is the second intermediate bit sequence w The second length of '; the first node through the first intermediate bit sequence w = [ w 0, w 1, ..., w Nw-1 ] and the second intermediate bit sequence w ' = [ w '0, w '1, ..., w ' Nw'-1 Perform a center alignment and overlay operation to determine the overlay bit sequence. h = [ h 0, h 1, ..., h H-1 ],in H It is the third length of the superimposed bit sequence; the first node is based on the superimposed bit sequence. h =[ h 0, h 1, ..., h H-1 Determine the output bit sequence f = [ f 0, f 1, ..., f F-1 ],in F It is the fourth length of the output bit sequence; the first node sends a signal to the second node, the signal including the output bit sequence. f = [ f 0, f 1, ..., f F-1 ].

[0006] Another example of a digital communication method includes: a second node receiving a signal transmitted by a first node, the signal comprising an output bit sequence f = [f0, f1, ..., fF-1], wherein the output bit sequence f = [f0, f1, ..., fF-1] is based on a superimposed bit sequence. h = [ h 0, h 1, ..., h H-1 ], superimposed bit sequence h = [ h 0, h 1, ..., h H-1 Based on the first intermediate bit sequence w = [ w 0,w 1, ..., w Nw-1 ] and the second intermediate bit sequence w ' = [ w '0, w '1, ..., w ' Nw'-1 The intermediate alignment and overlay operation is performed, wherein the first intermediate bit sequence w = [ w 0, w 1, ..., w Nw-1 Based on the input bit sequence c = [ c 0, c 1, ..., c K-1 ], second intermediate bit sequence w ' = [ w '0, w '1, ..., w ' Nw'-1 Based on the input bit sequence c = [ c 0, c 1, ..., c K-1 Part of ], in which K It is the input length of the input bit sequence. Nw It is the first intermediate bit sequence w The first length, Nw ' is the second intermediate bit sequence w' The second length, H It is the third length of the superimposed bit sequence. F It is the fourth length of the output bit sequence; the second node determines the input bit sequence. c = [ c 0, c 1, ..., c K-1 The estimate.

[0007] In some embodiments, the first intermediate bit sequence w = [ w 0, w 1, ..., w Nw-1 This is determined by performing one or more of the following operations: adding frozen bits, rate analysis, pre-transformation, or based on the first polarization matrix. Polarization transformation operations, interleaving operations, bit selection operations, and / or rate matching operations. In some embodiments, the input bit sequence...c = [ c 0, c 1, ..., c K-1 Perform add / freeze bit operations and / or rate analysis operations. In one embodiment, this can be performed based on the input bit sequence. c = [ c 0, c 1, ..., c K-1 The obtained information is used to perform a pre-transformation operation based on the first polarization matrix. Polarization transformation operations, interleaving operations, bit selection operations, and / or rate matching operations. In some embodiments, the first polarization matrix... Not equal to the second polarization matrix .

[0008] In some embodiments, the second intermediate bit sequence w ' = [ w '0, w '1, ..., w ' Nw'-1 This is determined by performing one or more of the following operations: determining the extended bit operation, CRC appending operation, adding frozen bits operation, rate analysis operation, pre-transformation operation, and operation based on the second polarization matrix. The polarization transformation operation, interleaving operation, bit selection operation, and / or rate matching operation. In some embodiments, determining the extended bit operation is performed on the input bit sequence. c = [ c 0, c 1, ..., c K-1 This is performed as part of the process. In one embodiment, it is based on the input bit sequence. c = [ c 0, c 1, ..., c K-1 The information obtained from a portion of the data is used to perform CRC appending, adding frozen bits, rate analysis, pre-transformation, and second polarization matrix-based operations. Polarization transformation operations, interleaving operations, bit selection operations, and / or rate matching operations.

[0009] In some embodiments, the first polarization matrix Not equal to the second polarization matrix In some embodiments, the output bit sequence f = [ f 0, f 1, ..., fF-1 This is determined by performing one or more of the following operations: outputting the bit sequence. f = [ f 0, f 1, ..., f F-1 Set to equal the superimposed bit sequence. h = [ h 0, h 1, ..., h H-1 Interleaving operation, bit selection operation. In one embodiment, the first intermediate bit sequence w = [ w 0, w 1, ..., w Nw-1 One or more of the following determine: the length of the input bit sequence K Data bit index set Q First polarization matrix First polarization matrix Size N The fifth length of the output of the bit selection operation E The sixth length of the output of the rate matching operation E Ordered rate matching index set R =<R (0), R (1), ..., R ( N r -2), R ( N r -1) > Interleaver pattern J Generate bit sequence on GF(2) g = [ g 0, g 1,..., g m Generating polynomials on GF(2) g ( D ) = g 0+ g 1· D + ... + g m-1 · D m-1 + g m · D m The recursive feedback bit sequence on GF(2) q = [ q 0,q 1, ..., q m ], recursive feedback polynomial on GF(2) q ( D ) = q 0+ q 1· D + ... + q m · D m , length is m +1 state bit sequence t = [ t 0, t 1, ..., t m-1 , t m ], pre-transformation matrix T Pre-transformed input index set P I Pre-transformed output index set P O Pre-transformed frozen bit sequence r , or the memory length m.

[0010] In some embodiments, the second intermediate bit sequence w ' = [ w '0, w '1, ..., w ' Nw'-1 Determined by one or more of the following: replicating bit index set Data bit index set Q’ Second polarization matrix Second polarization matrix Size N’ The fifth length of the output of the bit selection operation E’ The sixth length of the output of the rate matching operation E’ Ordered rate matching index set R' = <R’ (0), R’ (1), ..., R’ ( N r -2) Interweaver Mode J’ Generate bit sequence on GF(2) g’ = [ g’ 0, g’ 1, ..., g’ m Generating polynomials on GF(2) g’ ( D ) = g’ 0+g’ 1· D + ... + g’ m-1 · D m-1 + g’ m · D m The recursive feedback bit sequence on GF(2) q’ =[ q’ 0, q’ 1, ..., q’ m ] , recursive feedback polynomial on GF(2) q’ ( D ) = q’ 0+ q’ 1· D + ... + q’ m · D m , length is m’ +1 state bit sequence t’ = [ t’ 0, t’ 1, ..., t’ m-1 , t’ m ], pre-transformation matrix T’ Pre-transformed input index set P’ I Pre-transformed output index set P’ O Pre-transformed frozen bit sequence r’ Memory length m’ or generate polynomials in a loop .

[0011] In some embodiments, the first intermediate bit sequence w = [ w 0, w 1, ..., w Nw-1 The first length is equal to one of the following values: the sixth length of the output of the rate matching operation, the fifth length of the output of the bit selection operation, the seventh length of the output of the interleaving operation, and the length based on the first polarization matrix. The eighth length of the output of the polarization transform, the first polarization matrix The size of the polarization matrix. In some embodiments, the second intermediate bit sequence w’ = [ w’ 0, w’ 1, ..., w’ Nw’-1The second length of ] is equal to one of the following values: the sixth length of the output of the rate matching operation, the fifth length of the output of the bit selection operation, the seventh length of the output of the interleaving operation, or the length based on the second polarization matrix. The eighth length and the second polarization matrix of the output of the polarization transformation Polarization matrix size, output bit sequence f The fourth length.

[0012] In some embodiments, the first intermediate bit sequence w = [ w 0, w 1, ..., w Nw-1 [ is] one of the following: a portion of the second output of the rate matching operation, a portion of the first output of the bit selection operation, a portion of the third output of the interleaving operation, based on the first polarization matrix. Part of the fourth output of the polarization transform. In some embodiments, the second intermediate bit sequence w’ = [ w’ 0, w’ 1, ..., w’ Nw’-1 [ ] is one of the following items: a portion of the second output of the rate matching operation, a portion of the first output of the bit selection operation, a portion of the third output of the interleaving operation, based on the second polarization matrix. Part of the fourth output of the polarization transform. In some embodiments, the superimposed bit sequence h =[ h 0, h 1, ..., h H-1 The third length is equal to the second intermediate bit sequence. w ' = [ w '0, w '1, ..., w ' Nw'-1 The second length of ].

[0013] In some embodiments, performing the intermediate alignment and overlay operation includes: the first node obtaining a first intermediate bit sequence. w = [ w 0, w 1, ..., w Nw-1 ] and the second intermediate bit sequence w ' = [ w '0, w '1, ..., w ' Nw'-1 ]; and the first node determines the third length by one or more of the following:H superimposed bit sequence h = [ h 0, h 1, ..., h H-1 ] : , , , in Nw It is the first intermediate bit sequence w The first length, Nw' It is the second intermediate bit sequence w The second length of '. In some embodiments, for Superimposed bit sequences h = [ h 0, h 1, ..., h H-1 The index in the middle is i bits It is the first intermediate bit sequence w = [ w 0, w 1, ..., w Nw-1 The index in the middle is bits With the second intermediate bit sequence w ' = [ w '0, w '1, ..., w ' Nw'-1 The index in the middle is bits Add them on GF(2).

[0014] In some embodiments, ,in It equals one of the following values: In one embodiment, for Superimposed bit sequences h = [ h 0, h 1, ..., h H-1 The index in the middle is i bits Set as the second intermediate bit sequence w ' = [ w '0, w '1, ..., w ' Nw'-1 The index in the middle is bits ,in or , It equals one of the following values: In one embodiment, for Superimposed bit sequences h = [ h 0, h 1, ..., h H-1 The index in ] is i bits It is the first intermediate bit sequence w = [ w 0, w 1, ..., w Nw-1 The index in the middle is bits With the second intermediate bit sequence w ' = [ w '0, w '1, ..., w ' Nw'-1 The index in ] is bits The result of adding over GF(2), where, In some embodiments, It equals one of the following values: .

[0015] In some embodiments, for Superimposed bit sequences h = [ h 0, h 1, ..., h H-1 The index in the middle is i bits It is the first intermediate bit sequence w = [ w 0, w 1, ..., w Nw-1 The index in the middle is bits With the second intermediate bit sequence w ' = [ w '0, w '1, ..., w ' Nw'-1 The index in the middle is bits Add over GF(2). In some embodiments, ,in It equals one of the following values: .

[0016] In one embodiment, the first intermediate bit sequence w = [ w 0, w 1, ..., w Nw-1 ] and the second intermediate bit sequence w’ = [ w’ 0, w’ 1, ..., w’ Nw’-1 The length is determined by one or more of the following: the length of the input bit sequence, the sixth length of the output of the rate matching operation after the first polarization transformation through the first polarization matrix, the sixth length of the output of the rate matching operation after the second polarization transformation through the second polarization matrix, the fifth length of the output of the bit selection operation after the polarization transformation through the first polarization matrix, the fifth length of the output of the bit selection operation after the polarization transformation through the second polarization matrix, the size of the first polarization matrix, the size of the second polarization matrix, the first threshold and / or the second threshold.

[0017] In yet another exemplary aspect, the above-described method is embodied in processor-executable code and stored in a non-transitory computer-readable storage medium. When a processor executes the code contained in the computer-readable storage medium, the processor performs the method described in this patent document.

[0018] In yet another exemplary embodiment, a device configured or operable to perform the methods described above is disclosed.

[0019] The above and other aspects and their embodiments are described in more detail in the accompanying drawings, description and claims. Attached Figure Description

[0020] Figure 1A shows the polarization matrix of size N = 32. G (32) Factor plot.

[0021] Figure 1B shows the polarization matrix of size N = 32. G (32) .

[0022] Figure 2 illustrates a rate-matched 5G polar coding scheme.

[0023] Figure 3 illustrates the onboard (IV) standard polar coding for rate matching used for retransmission.

[0024] Figure 4 shows an example of polarization-adjusted convolutional (PAC) encoding.

[0025] Figure 5 illustrates the generation of bit sequences. g = [ g 0, g 1, ..., g m Or generating polynomial g ( D The convolution transformation performed by ).

[0026] Figure 6-7 shows an example diagram of recursive convolution transformation.

[0027] Figures 8A-8C illustrate the example of center-aligned overlay operation.

[0028] Figure 9A shows an example block diagram, where the first node obtains a length of K input bit sequence c = [ c 0, c 1,..., c K-1 ], and determine the length as F Output bit sequence f = [ f 0, f 1, ..., f F-1 ].

[0029] Figure 9B shows an example block diagram, where the first node obtains a length of K input bit sequence c = [ c 0, c 1,..., c K-1 The length is determined through rate matching operations (including interleaving and bit selection operations). F Output bit sequence f = [ f 0, f 1, ..., f F-1 ], and determine that the input to the extended bit operation is the input bit sequence.

[0030] Figure 9C shows an example block diagram, where the first node obtains a length of K input bit sequence c = [ c 0, c 1,..., c K-1 The length is determined by a CRC append operation. F Output bit sequence f= [ f 0, f 1, ..., f F-1 ] .

[0031] Figure 9D shows an example block diagram where the second node receives the output bit sequence sent by the first node. f = [ f 0, f 1, ..., f F-1 [The signal, and determine the input bit sequence] c = [ c 0, c 1, ..., c K-1 The estimated value of ], where the length is F Output bit sequence f = [ f 0, f 1, ..., f F-1 ] is of length superimposed bit sequence It undergoes pre-transformation and rate matching operations, including bit selection operations.

[0032] Figure 10 shows the block error rate (BLER) simulation results for a specific example of Figure 9B.

[0033] Figure 11A shows an example block diagram in which the first node determines the first intermediate bit sequence. w For length is N First interleaved output bit sequence y Second intermediate bit sequence w’ Select the output bit sequence for the second bit e’ .

[0034] Figure 11B shows an example block diagram, in which the first node determines the first intermediate bit sequence based on the pre-transformation operation. w For length is N First interleaved output bit sequence y Second intermediate bit sequence w’ Select the output bit sequence for the second bit e’ .

[0035] Figure 12 shows the BLER simulation results for a specific example of Figure 11A.

[0036] Figure 13 shows the BLER simulation results for a specific example of Figure 11B.

[0037] Figure 14A shows an example block diagram in which the first node determines the first intermediate bit sequence. w = [ w 0, w 1, ..., w Nw-1 [ is a length of] N First polarization transform output bit sequence d Second intermediate bit sequence w’ Select the output bit sequence for the second bit e’ .

[0038] Figure 14B shows an example block diagram, in which the first node determines the first intermediate bit sequence according to the pre-transformation operation. w = [ w 0, w 1, ..., w Nw-1 [ is a length of] N First polarization transform output bit sequence d Second intermediate bit sequence w’ Select the output bit sequence for the second bit e’ .

[0039] Figure 15A shows an example block diagram in which the first node determines the first intermediate bit sequence. w Select the output bit sequence for the first bit e Second intermediate bit sequence w’ For the second interleaved output bit sequence y '.

[0040] Figure 15B shows an example block diagram, in which the first node determines the first intermediate bit sequence based on the pre-transformation operation. w Select the output bit sequence for the first bit e Second intermediate bit sequence w’ For the second interleaved output bit sequence y '.

[0041] Figure 16 shows the BLER simulation results for a specific example of Figure 15A.

[0042] Figure 17A shows an example block diagram, which differs from Embodiment 12 in how the first intermediate bit sequence is determined. w .

[0043] Figure 17B shows an example block diagram, which differs from Embodiment 13 in how the first intermediate bit sequence is determined. w .

[0044] Figure 18A shows an example block diagram, which differs from Embodiment 12 in how the first intermediate bit sequence is determined. w .

[0045] Figure 18B shows an example block diagram, which differs from Embodiment 13 in how the first intermediate bit sequence is determined. w .

[0046] Figure 19A shows an example block diagram in which the first node determines the first intermediate bit sequence. w Select the output bit sequence for the first bit e Second intermediate bit sequence w’ The output bit sequence for the second polarization transform d '.

[0047] Figure 19B shows an example block diagram in which the first node determines the first intermediate bit sequence based on the pre-transformation operation. w Select the output bit sequence for the first bit e Second intermediate bit sequence w’ The output bit sequence for the second polarization transform d ' .

[0048] Figure 20 shows the BLER simulation results for a specific example of Figure 19A.

[0049] Figure 21A shows an example block diagram, which differs from Embodiment 18 in how the first intermediate bit sequence is determined. w .

[0050] Figure 21B shows an example block diagram, which differs from Embodiment 19 in how the first intermediate bit sequence is determined. w .

[0051] Figure 22A shows an example block diagram, which differs from Embodiment 18 in how the first intermediate bit sequence is determined. w .

[0052] Figure 22B shows an example block diagram, which differs from Embodiment 19 in how the first intermediate bit sequence is determined. w .

[0053] Figure 23 shows the BLER simulation results for a specific example of Figure 22A.

[0054] Figure 24 shows an example flowchart for transmitting signals.

[0055] Figure 25 shows an example method for estimating the input bit sequence.

[0056] Figure 26An exemplary block diagram of a hardware platform that can be used as part of a network device or communication device is shown.

[0057] Figure 27 Examples of wireless communication, including base stations (BS) and user equipment (UE), based on some implementations of the disclosed technology are shown. Detailed Implementation

[0058] In the 3GPP (3rd Generation Partnership Project) fifth-generation (5G) mobile communication standard, low-density parity-check (LDPC) codes are used for data transmission. To transmit a transport block (a sequence of bits containing the information to be transmitted), the transmitter encodes the transport block into a low-rate LDPC codeword and selects a subset of bits from the low-rate LDPC codeword for transmission; this is called the initial (first) transmission of the transport block. The receiver then receives and decodes this bit subset of the low-rate LDPC codeword, obtaining the decoded transport block. If the decoded transport block passes the cyclic redundancy check (CRC) embedded in the transport block, the receiver sends an acknowledgment (ACK) signal to the transmitter, indicating that the transmission of that transport block is complete and a new transport block (if any) can be transmitted. However, if the decoded transport block fails the CRC embedded in the transport block, the receiver can send a negative acknowledgment (NACK) signal to the transmitter, requesting that the same transport block be transmitted again. Upon receiving a NACK signal, the transmitter can select another portion of bits from the low-rate LDPC codeword for transmission; this is the second transmission (or retransmission) of the transport block. This is the hybrid automatic repeat request (HARQ) process. The other portion of bits in the low-rate LDPC codeword consists of incremental redundancy (IR) bits from the initial transmission. Therefore, more accurately, the HARQ process is an IR-HARQ process.

[0059] LDPC codes can generate multiple incremental redundant bits. However, for short payload sizes (also known as transport block size, TBS), LDPC codes are inferior to polar codes. Furthermore, LDPC codes have a high lower bound for errors (block error rate, BLER, of 0.0001). To achieve future ultra-reliable low-latency communication (URLLC), better channel coding is needed.

[0060] Results show that in short TBS, for single transmissions without HARQ, polar codes and polarization-adjusted convolutional (PAC) codes outperform LDPC codes. However, polar codes and PAC codes are based on polarization phenomena, which can make generating incremental redundant bits for retransmission difficult. In polarizing matrix extension (PME) techniques, the bits of the initial transmission and the retransmitted bits are combined into a codeword derived from a polarization matrix larger than that of the initial transmission. This patent document describes an improved PME method for polar coding, PAC coding, and / or other pre-transformed polar coding during the HARQ process.

[0061] The example headings in the following sections are for ease of understanding of the disclosed subject matter and do not limit the scope of the claimed subject matter in any way. Therefore, one or more features of one example section may be combined with one or more features of another example section. Furthermore, the terms 5G or 6G are used for clarity of explanation, but the technologies disclosed in this document are not limited to 5G or 6G technologies and can also be used in wireless systems implementing other protocols.

[0062] I. Explanation of Symbols GF(2) denotes a Galois field of size 2 with elements “0” and “1”.

[0063] br( i ) is the bit reversal function.

[0064] floor(x) represents the largest integer not greater than x.

[0065] ceil(x) represents the smallest integer not less than x.

[0066] round(x) is a rounding function that makes round(x) the integer closest to x. For example, round(3.2) = 3, round(4.8) = 5, round(2.5) = 3, round(-1.9) = -2, and round(-3.4) = -3.

[0067] min(x, y) represents the minimum value between x and y, i.e.

[0068] max(x, y) represents the maximum value between x and y, i.e.

[0069] mod(x, y) represents the remainder when x is divided by y. For example, mod(5, 3) = 2, mod(3, 5) = 3.

[0070] X i, j Representation matrix X The elements in the i-th row and j-th column, where bold uppercase letters are used to represent matrices.

[0071] [ x 0, x 1, ..., x Y-1 ] represents a sequence (or vector) of length Y, containing elements x 0, x 1, ..., x Y-1 Bold lowercase letters x Used to represent sequences (or vectors), i.e. x = [ x 0, x 1, ..., x Y-1 ].

[0072] { x 0, x 1, ..., x Y-1} indicates having Y Different elements x 0, x 1, ..., x Y-1 The set, that is, for any i ≠ j , x i ≠ x jFor example, the set {1, 2, 3} is the same as the set {1, 3, 2}.

[0073] < x 0, x 1, ..., x Y-1 > represents an ordered set, in which there are Y Different elements x 0, x 1, ..., x Y-1 That is, for any i ≠ j , x i ≠ x j .make X =< x 0, x 1, ..., x Y-1 >, X ( i ) represents an ordered set X The i-th element x i For example, the ordered set <1, 2, 3> is different from the ordered set <1, 3, 2>.

[0074] For sets X , |X| This represents the size of the set, that is, the number of elements in set X. For example, |{9, 2, 3}| = 3, |<1, 2, 7>| = 3, |<7, 1, 2>| = 3.

[0075] Z N = {0, 1, ..., N -2, N {-1} represents the set of all non-negative integers less than N.

[0076] Indexes for sequences, vectors, or matrices all start from zero.

[0077] Table 1. Symbols and their meanings

[0078] II.A. Description of the polarization matrix remember G (N)is a polarization transformation matrix of N rows and N columns (or simply called a polarization matrix), where N is a power of 2, that is N = , where n is a positive integer. n is called G (N) the order of the polarization matrix of N is called G (N) the size of the polarization matrix of G (N) is one of the following cases.

[0079] (1) G (N) = ; (2) G (N) = ; (3) G (N) = P (N) ; (4) G (N) = ; where matrix operations are performed over GF(2), P (N) = , P (2) = , P (1) = [1], is the n - th Kronecker power of the matrix P (2) , B (N) is an N - by - N bit - reverse permutation matrix, and 0 is an all - zero matrix of N / 2 rows and N / 2 columns. Let be the element in the i - th row and j - th column of the bit - reverse permutation matrix B (N) . Then, we have

[0080] for 0 ≤ i < N and 0 ≤ j < N, where br(i) is the bit - reverse function defined as br( i ) = , and b n-1 , b n-2 ,..., b 1,b 0] is the n-bit binary expansion of the integer i, i.e., i = A sequence (or vector) of length N over GF(2) x multiplied by the polarization matrix over GF(2) G (N) is called the polarization transformation of the sequence (vector) x Denote y = x · G (N) , where the vector-matrix multiplication is performed over GF(2). Then, y is x 's polarization transformation. Figure 1A shows the factor graph of the polarization matrix G (32) of size N = 32, Figure 1B showing the matrix G (32) .

[0081] II.B. Introduction to Polar Coding In the 3GPP 5G standard, polar codes are used for control channel transmission. Figure 2 shows a schematic diagram of 5G polar coding with rate matching. Let Q be the set of data bit indices of size K, i.e., |Q| = K, where Q is a subset of the integer set Z N ={0, 1, ..., N -2, N -1}, Z N containing all non-negative integers less than N. Then, for 5G polar coding, using the polarization matrix G (N) to encode the input bit sequence c = c 0, c 1, ..., c K-2 , c K-1 into the output bit sequence e = e 0, e 1, ..., e E-2 , e E-1 includes the following operations, where K is the length of the input bit sequence, E is the length of the output bit sequence, K and E are positive integers, K < N, and K < E.

[0082] Add Freeze Bits: The Add Freeze Bits operation will... N - K The zero bits and the input bit sequence c Combining, based on the data bit index set Q Forming length is N polarization transform input sequence u = [ u 0, u 1, ..., u N-2 , u N-1 Polarization transform input sequence u From the input bit sequence c Data bit index set Q and polarization matrix size N The decision is as follows.

[0083]

[0084] Polarization transformation: Polarization transformation converts a first bit sequence of length N into a second bit sequence of length N. The method is to use GF(2) to transform the first bit sequence of length N into a polarization matrix. G (N) Multiplication. A polarization transform output bit sequence of length N. d = [ d 0, d 1, ..., d N-2 , d N-1 Input sequence from polarization transform u and polarization matrix G (N) Determined, that is, d = u·G (N) The vector-matrix multiplication is performed on GF(2).

[0085] Rate matching: Rate matching in 5G polar coding includes two operations: sub-block interleaving and bit selection.

[0086] Sub-block interleaving: an interleaved output bit sequence of length N. y = [ y 0, y 1, ..., y N-2 , y N-1The output bit sequence consists of a 32-bit sub-block interleaver in mode π and a polarization transform. d and polarization matrix size N Confirmed, as shown below.

[0087]

[0088] Where π = [ π 0, π 1, π 2, π 3, π 4, π 5, π 6, π 7, π 8, π 9, π 10 , π 11 , π 12 , π 13 , π 14 , π 15 , π 16 , π 17 , π 18 , π 19 , π 20 , π 21 , π 22 , π 23 , π 24 , π 25 , π 26 , π 27 , π 28 , π 29 , π 30 , π 31] = [0, 1, 2, 4, 3, 5, 6, 7, 8, 16, 9, 17, 10, 18, 11, 19, 12, 20, 13, 21, 14, 22, 15, 23, 24, 25, 26, 28, 27, 29, 30, 31], and J = [ J 0, J 1, ..., J N-2 , J N-1 [A] is an interleaver pattern of length N, determined by the sub-block interleaver pattern π and the polarization matrix size N. Interleaver pattern J It is an integer sequence [0, 1, 2, ..., N -2, N A permutation of [-1].

[0089] Bit selection: There are three types of bit selection: repetition, puncturing, and shortening. Given an interleaved output bit sequence... y The input bit sequence length K, the output bit sequence length E, and the polarization matrix size N are given. The output bit sequence is... e It can be determined in the following way.

[0090] i. Repeat: For E ≥ N , e k = y mod(k,N) , k = 0, 1, 2, ..., E -2, E -1. ii. Drilling: For E < N and K / E ≤ 7 / 16, e k = y N-E+k , k = 0, 1, 2, ..., E -2, E -1. iii. Shorten: ForE < N and K / E> 7 / 16, e k = y k ,k = 0, 1, 2, ..., E -2, E -1. Rate matching can also be described as follows. Let... R = <R (0), R (1), ..., R ( N r -2), R ( N r -1) > For size N r = min( E , N The ordered rate matching index set R is a set of integers. Z N A subset of. Then, the polarization transform is used to output the bit sequence. d Given an ordered rate matching index set R, the output bit sequence length E, and the polarization matrix size N, determine the output bit sequence. e for e k = d R(mod(k,N)) ,in k = 0, 1, 2, ..., E -2, E -1. Here, the ordered rate matching index set. R = < J 0, J 1, ..., J N-2 , J N-1 >Used for bit selection through repetition; ordered rate-matching index set R = < J N-E , J N-E+1 , J N-E+2 , ..., J N-2 , J N-1 >Used for bit selection via puncturing; ordered rate-matching index set R =< J 0, J 1, ..., J E-2 , J E-1 >Used for bit selection to continue by shortening. J = [J 0, J 1, ..., J N-2 , J N-1 ] is an interleaver pattern of length N determined in the sub-block interleaving operation.

[0091] II.C. Introduction to Polar Coding in Vehicle Communication Standard YD / T 4007-2022 In the 3GPP 5G standard, the control channel uses polar coding and does not have retransmission. In the standard YD / T 4007-2022 (referred to as the Vehicle (IV) standard in the remainder of this document), polar coding is also used for the data channel. Therefore, if a NACK signal occurs during data transmission, polar coding requires retransmission.

[0092] For the initial transmission of the IV standard, the process is the same as the polar coding in the 3GPP 5G standard, and its process diagram is as follows: Figure 2 As shown in Figure 3, a schematic diagram of IV standard polar coding and rate matching for retransmission is presented. Suppose we need to retransmit the input bit sequence. c = [ c 0, c 1, ..., c K-2 , c K-1 ]. Figure 3 The process input polarization transform input sequence is shown. u = [ u 0, u 1, ..., u N-2 , u N-1 ] and input bit sequence c = [ c 0, c 1, ..., c K-2 , c K-1 Perform the initial transmission and output a retransmitted bit sequence of length E'. e' = [ e' 0, e' 1, ..., e' E'-2 , e' E'-1 Transmit.

[0093] Determine the extended bits: the extended bit sequence By replicating bit index set It is confirmed that, among them, Polarization transform input sequence in initial transmission u = [ u 0, u 1, ..., u N-2 , u N-1 The initial polarization matrix size during transmission is N, where Represents the set of bit indexes for replication The number of elements in yes a subset of It is the initial data bit index set of size K in the transmission. Then the extended bit sequence... c ext Determine as follows.

[0094]

[0095] CRC Additional Note: If the polarization matrix size N in the initial transmission is equal to 4096, then CRC bits Appended to the extended bit sequence This extended bit sequence is based on the CRC generator polynomial. The calculation shows that, among which and The coefficients are polynomials over GF(2). The encoding is done in a systematic form, which means that in GF(2), the polynomial is: When divided by the corresponding CRC generator polynomial The remainder is 0. The CRC additional output bit sequence is represented as follows: . and The relationship between them is for , for .

[0096] If the polarization matrix size N in the initial transmission is not equal to 4096, then the number of CRC bits... and CRC bits All are empty sequences. The CRC additional output bit sequence is represented as follows: ,for It is equal to the extended bit sequence. ,Right now .

[0097] Serialization: Obtain the CRC additional output bit sequence Then, append the CRC output bit sequence. With the input bit sequence in the initial transmission c = [ c 0, c 1, ..., c K-2 , c K-1 ] Serial length is retransmitted input bit sequence That is, K' equals the extended bit sequence The sum of the length of the input bit sequence c, the number of CRC bits, and the length of the input bit sequence. In the retransmission of the input bit sequence... c' middle, front Each bit is set as an additional output bit sequence for CRC. bits in, after K The bits are set as the input bit sequence. c The bits in, that is: c' = = = .

[0098] Adding freeze bits: The operation of adding freeze bits is the same as the operation in the initial transmission. The operation of adding freeze bits will... N' - K' One zero bit and the retransmitted input bit sequence Combination, based on size Retransmitted data bit index set Forming a length of N' retransmission polarization transform input sequence u' = [ u' 0, u' 1, ..., u' N'-2 , u' N'-1 ], where N' = 2N is the size of the polarization matrix in the retransmission, and N is the size of the polarization matrix in the initial transmission; retransmission data bit index set It is a set With extended information bit set The union of, where It is the initial data bit index set of size K in the transmission; the extended information bit set. It is the set of integers Z N = {0, 1,..., N-2, N A subset of {-1} Z N = {0, 1, ..., N -2, N The subarray {-1} contains all non-negative integers less than N, and Equal to copying the bit index set Size and extended bit sequence The sum of the CRC bits. Then, the polarization transform input sequence is retransmitted. u From the retransmitted input bit sequence Retransmitted data bit index set The size N' of the polarization matrix is ​​determined as follows.

[0099]

[0100] It should be noted that if and ,but and All are empty sets, and and p All are empty bit sequences; if ,but and All are empty sets, and and p All are empty bit sequences; otherwise, and Both are not empty sets, and It is not an empty bit sequence, in which K It is the input bit sequence in the initial transmission. c Length; E It is the output bit sequence during the initial transmission. e Length; E' It is the length of the retransmitted bit sequence e'.

[0101] Polarization transformation: The polarization transformation is the same as that in the initial transmission. The only difference is that the polarization matrix of the polarization transformation is on GF(2). ,in N' = 2 N N is the size of the polarization matrix in the initial transmission. Then, the input sequence is obtained from the retransmitted polarization transform. u' Determining the polarization matrix Length is N' Retransmission polarization transform output bit sequence ' =[ d' 0, d' 1, ...,d' N'-2 , d' N'-1 ],Right now, The vector-matrix multiplication is performed on GF(2).

[0102] Rate matching: Rate matching in IV standard retransmissions also includes two operations: sub-block interleaving and bit selection. However, this differs from the initial transmission.

[0103] Sub-block interleaving: For sub-block interleaving, the retransmission interleaved output bit sequence of length M. y = [ y 0, y 1, ..., y M-2 , y M-1 The output bit sequence consists of a 32-bit sub-block interleaver in mode π and a retransmission polarization transform. d The first M bits and the size of the sub-block interleaving buffer M Confirmed, as shown below.

[0104]

[0105] Where π = [ π 0, π 1, π 2, π 3, π 4, π 5, π 6, π 7, π 8, π 9, π 10 , π 11 , π 12 , π 13 , π 14 , π 15 , π 16 , π 17 , π 18 , π 19, π 20 , π 21 , π 22 , π 23 , π 24 , π 25 , π 26 , π 27 , π 28 , π 29 , π 30 , π 31 ] = [0, 1, 2, 4, 3, 5, 6, 7, 8, 16, 9, 17, 10, 18, 11, 19, 12, 20, 13, 21, 14, 22, 15, 23, 24, 25, 26, 28, 27, 29, 30, 31], where J = [ J 0, J 1, ..., J M-2 , J M-1 [A] is an interleaver pattern of length M, determined by the sub-block interleaver pattern π and the sub-block interleaving buffer size M. Interleaver pattern J It is an integer sequence [0, 1, 2, ..., M -2, M A permutation of [-1]. The sub-block interleaving buffer size M is determined as follows.

[0106] 1) If and , but M = N . 2) If and , but M = N . 3) If and , but M = N / 2. 4) If and , but M = N. 5) If , but M = N. Where K is the input bit sequence during the initial transmission. c The length of E; E is the output bit sequence during the initial transmission. e The length of ; N is the size of the initial transmission polarization matrix; E' It is a retransmission of the bit sequence e' The length. Note the difference from the initial transmission: the index in the sub-block interleaving. J i It depends on the size of the sub-block interleaving buffer. M It is calculated, not based on the size of the polarization matrix in the retransmission. N' Computational; output bit sequence using only retransmission polarization transformation d' The former M 1 bit.

[0107] Bit selection: There are five bit selection types during retransmission. Given the retransmission interleaved output bit sequence y’ The initial transmission input bit sequence length K, the initial transmission output bit sequence length E, the retransmission output bit sequence length E', the initial transmission polarization matrix size N, and the sub-block interleaving buffer size M, and the retransmission output bit sequence... e’ It can be determined in the following way.

[0108] 1) If and , but

[0109] 2) If and , but

[0110] 3) If and , but

[0111] 4) If and , but

[0112] 5) If , but

[0113] Similarly, a size of N'r = min( E' , M ordered rate matching index set R' = <R' (0), R' (1), ..., R' ( N' r -2), R' ( N' r -1) > This describes the rate matching operation in retransmission. Then, the retransmission polarization transform is used to output the bit sequence. d' The ordered rate matching index set R', the length of the output bit sequence E in the initial transmission, the length of the retransmitted bit sequence E', and the sub-block interleaving buffer size M are used to determine the retransmitted bit sequence. e' for e k = d R(mod(k,M)) , k = 0, 1, 2, ..., E’ -2, E’ -1. Here, the ordered rate matching index set. Bit selection for example 1); ordered rate matching index set Bit selection used in examples 2) and 4) (in In the case of); the ordered rate matching index set is used for bit selection in cases 2) and 4) (in In the case of); ordered rate matching index set Bit selection for example 3); ordered rate matching index set Bit selection for case 5) (in (and ordered rate matching index set); Bit selection for example 5) (in In the case of), J = [ J 0, J 1, ..., J M-2 , J M-1 [] is an interleaver pattern of length M determined in the sub-block interleaving operation.

[0114] Introduction to II.D.PAC Encoding PAC coding is a type of pre-transform polar code. Specifically, PAC codes are polar codes that use convolutional transforms. Figure 4 shows a PAC coding diagram. Let... Q For size KThe data bit index set, i.e. Q | = K ,in Q It is the set of integers Z N = {0, 1,..., N -2, N A subset of {-1} Z N = {0, 1, ..., N -2, N -1} contains all values ​​less than N Non-negative integers. Therefore, using the polarization matrix... G (N) Input bit sequence c = [ c 0, c 1, ..., c K-2 , c K-1 Encode into an output bit sequence e = [ e 0, e 1,..., e E-2 , e E-1 The process includes the following operations, where K It is the length of the input bit sequence. E It is the length of the output bit sequence. K < N , K < E ,and K and E All are positive integers.

[0115] Rate analysis: The rate analysis operation is the same as the add freeze bit operation in 5G polar coding. The rate analysis operation will... N - K The zero bits and the input bit sequence c Combining, based on the data bit index set Q Formation length For N Rate analysis output sequence v = [ v 0, v 1, ..., v N-2 , v N-1 Specifically, the rate analysis outputs a bit sequence. v From the input bit sequence c Data bit index set Qand polarization matrix size N Confirmed, as shown below.

[0116]

[0117] Convolution Transformation: Convolution transformation is the operation of converting a convolution input bit sequence of length N into a convolution output bit sequence of length N. This is done by combining the convolution input bit sequence with a generator bit sequence of length (m+1). g = [ g 0, g 1, ..., g m-1 , g m Perform convolution operations, where g = [ g 0, g 1, ..., g m-1 , g m The generating polynomial over GF(2) is defined. g ( D ) = g 0+ g 1· D + ... + g m-1 · D m-1 + g m · D m ,in, m It is the memory length of the convolution transformation, or equivalently, the generator polynomial. g ( D The degree of the generator polynomial; while D It is a dummy variable that represents delay in digital circuits. Figure 5 It shows the use of generated bit sequences g = [ g 0, g 1, ..., g m or generating polynomial g ( D The convolution transformation is performed. Specifically, a convolution transformation of length N outputs a bit sequence. u = [ u 0, u 1, ..., u N-2 , u N-1 The bit sequence is output from the rate analysis.v Generating polynomials g ( D (or equivalently, generate a bit sequence) g The polarization matrix size N is determined as follows.

[0118]

[0119] Polarization Transformation: The polarization transformation is the same as that in 5G polar coding. The output bit sequence is determined by the convolution transform. u and polarization matrix G (N) Determine the polarization transform output bit sequence of length N. d = [ d 0, d 1, ..., d N-2 , d N-1 ] ,Right now d = u·G (N) The vector-matrix multiplication is performed on GF(2).

[0120] III. Example Technology This section introduces incremental redundancy in polar coding, PAC coding, or other pre-transformed polar coding. In this patent document, the term "first node" can refer to a user equipment (UE) or a base station (BS), and the term "second node" can refer to either a UE or a BS. In one embodiment, when the first node sends certain information to the second node, if the first node is a UE, the second node can be a BS; if the first node is a BS, the second node can be a UE. In another embodiment, when the first node transmits certain information to the second node, the first node and the second node can be a first UE and a second UE.

[0121] 3.1 Example 1: (This method is applied to the first node) A digital communication method includes: a first node acquiring an input bit sequence. c = [ c 0, c 1, ..., c K-1 The first node performs at least one of the following operations based on the input bit sequence. c = [ c 0, c 1, ..., c K-1 Determine the first intermediate bit sequence w = [w 0, w 1, ..., w Nw-1 Added freeze bit operation, rate analysis operation, pre-transformation operation, and operation based on the first polarization matrix. The polarization transformation operation, interleaving operation, bit selection operation, and rate matching operation; the first node performs at least one of the following operations based on the input bit sequence. c = [ c 0, c 1, ..., c K-1 The second intermediate bit sequence is determined in part of [the part]. w' = [ w' 0, w' 1, ..., w' Nw'-1 [This section describes various operations related to bit extension, CRC appending, adding frozen bits, rate analysis, pre-transformation, and second polarization matrix.] Polarization transformation operation, interleaving operation, bit selection operation, rate matching operation; the first node performs operations on the first intermediate bit sequence. w = [ w 0, w 1, ..., w Nw-1 ] and the second intermediate bit sequence w ' = [ w '0, w '1, ..., w ' Nw'-1 Perform a center alignment and overlay operation to determine the overlay bit sequence. h = [ h 0, h 1, ..., h H-1 The first node performs at least one of the following operations based on the superimposed bit sequence. h = [ h 0, h 1, ..., h H-1 Determine the output bit sequence f = [ f 0, f 1, ..., f F-1 ] : Output bit sequence f = [ f 0, f 1, ..., f F-1 Set to equal the superimposed bit sequence. h= [ h 0, h 1, ..., h H-1 Interleaving operation, bit selection operation; and the first node, which will contain the output bit sequence. f = [ f 0, f 1, ..., f F-1 The signal is sent to the second node, where K It is the input bit sequence c The input length; Nw It is the first intermediate bit sequence w = [ w 0, w 1, ..., w Nw-1 ] length; first polarization matrix Size It is a power of 2, where n is a positive integer; Nw ' is the second intermediate bit sequence w' = [ w' 0, w' 1, ..., w' Nw'-1 ] length; second polarization matrix Size It is a power of 2, where n' is a positive integer; H It is a superimposed bit sequence h =[ h 0, h 1, ..., h H-1 The length of ]; F It is the output bit sequence f = [ f 0, f 1, ..., f F-1 The length of ].

[0122] In some embodiments, the input bit sequence may be processed as described in this patent document. c = [ c 0, c 1, ..., c K-1 Perform the add / freeze bit operation and rate analysis operation. In one embodiment, the input bit sequence can be analyzed. c =[ c 0, c 1, ..., cK-1 The obtained information is used to perform a pre-transformation operation based on the first polarization matrix. Polarization transformation operations, interleaving operations, bit selection operations, and / or rate matching operations.

[0123] In some embodiments, determining the extended bit operation can be performed on the input bit sequence. c = [ c 0, c 1, ..., c K-1 This is part of the execution. In one embodiment, it can be performed on the input bit sequence. c = [ c 0, c 1, ..., c K-1 The information obtained from a portion of the data is used to perform CRC appending, adding frozen bits, rate analysis, pre-transformation, and second polarization matrix-based operations. The polarization transformation operation, interleaving operation, bit selection operation, and / or rate matching operation are described. Another part of this patent document will describe the operations related to the center alignment superposition operation.

[0124] 3.2 Example 2: (The method is applied to the second node) A digital communication method includes: a second node receiving an output bit sequence sent by a first node. f =[ f 0, f 1, ..., f F-1 The signal; the second node determines the input bit sequence. c = [ c 0, c 1, ..., c K-1 The estimated value of ]; where the output bit sequence f = [ f 0, f 1, ..., f F-1 The first node performs one of the following operations, based on the superimposed bit sequence. h = [ h 0, h 1, ..., h H-1 Determine: Output the bit sequence f = [ f 0, f 1, ..., f F-1 Set to equal the superimposed bit sequence h = [h 0, h 1, ..., h H-1 Interleaving operation, bit selection operation; among which, superimposed bit sequences h = [ h 0, h 1,..., h H-1 The first node processes the first intermediate bit sequence. w = [ w 0, w 1, ..., w Nw-1 ] and the second intermediate bit sequence w ' = [ w '0, w '1, ..., w ' Nw'-1 The intermediate bit sequence is determined by performing intermediate alignment and superposition; wherein, the first intermediate bit sequence w = [ w 0, w 1, ..., w Nw-1 The first node processes the input bit sequence. c = [ c 0, c 1, ..., c K-1 Perform at least one of the following operations to determine: add frozen bits operation, rate analysis operation, pre-transformation operation, or operation based on the first polarization matrix. Polarization transformation operation, interleaving operation, bit selection operation, rate matching operation; second intermediate bit sequence w' = [ w' 0, w' 1, ..., w' Nw'-1 The first node determines the input bit sequence based on the input bit sequence. c = [ c 0, c 1, ..., c K-1 A portion of the [data] is determined by performing at least one of the following operations: determining the extended bit operation, CRC appending operation, adding frozen bits operation, rate analysis operation, pre-transformation operation, or based on the second polarization matrix. Polarization transformation operation, interleaving operation, bit selection operation, rate matching operation; among which, F It is the output bit sequence f = [ f 0, f 1, ..., fF-1 The length of ]; K It is the input bit sequence c Length; H It is a superimposed bit sequence h = [ h 0, h 1, ..., h H-1 The length of ]; Nw It is the first intermediate bit sequence w = [ w 0, w 1, ..., w Nw-1 The length of ]; Nw' It is the second intermediate bit sequence w' = [ w' 0, w' 1, ..., w' Nw'-1 The length of the first polarization matrix; Size It is a power of 2, where n Positive integers; second polarization matrix Size It is a power of 2, where n' It is a positive integer.

[0125] 3.3 Example 3: (Operating instructions for Example 1 and Example 2) Example 3 describes operations that can be performed on the techniques described in Example 1 or Example 2.

[0126] 3.3.1 Add freeze bit operation or rate analysis operation The operation of adding frozen bits includes: the first node obtaining the input bit sequence for adding frozen bits. c = [ c 0, c 1,..., c K-1 The first node is determined by the size of the polarization matrix. N Data bit index set Determine the output bit sequence to add frozen bits. u = [ u 0, u 1, ..., u N-1 ] ;in, K To add frozen bits, input a bit sequence. c Length; Add frozen bits to output bit sequence u = [ u 0, u 1, ..., uN-1 The length of ] is equal to the size of the polarization matrix. N Polarization matrix size The power of 2, where n is a positive integer; data bit index set have K The size of the data bit index set is equal to the input bit sequence with the added frozen bits. c Length (| Q | = K Data bit index set It is the first set of integers A subset of {0, 1, ..., N-2, N-1}, that is, for k = 0, 1, ..., K-2, K-1, ,in N It is the size of the polarization matrix, the first set of integers. {0, 1, ..., N-2, N-1} includes all non-negative integers less than N. In some embodiments, the input bit sequence with added frozen bits is the input bit sequence. c = [ c 0, c 1, ..., c K-1 In one embodiment, adding a frozen bit input bit sequence is the output of a concatenation operation. In one embodiment, adding a frozen bit input bit sequence is the output of a determine-extend-bit operation. In one embodiment, adding a frozen bit input bit sequence is the output of a CRC append operation. In one embodiment, it belongs to the data bit index set. (Right now The index of ) is i The bits are set to add frozen bits to the input bit sequence. c = [ c 0, c 1, ..., c K-1 One bit in ] ,in, j The input bit sequence is not greater than the one with added frozen bits. c A non-negative integer of length. In some embodiments, it is not part of the data bit index set. (Right now The index of ) is i bits It is set to zero ("0"). In one embodiment, a freeze bit output bit sequence is added. u = [ u 0, u 1, ..., u N-1It shall be determined as follows.

[0127]

[0128] In the first specific example, a frozen bit input bit sequence is added. c = [ c 0, c 1, c 2, c 3, c 4, c 5] length K =6, the size of the polarization matrix is N = 16, the data bit index set is Q = {12, 7, 11, 13, 14, 15}, add frozen bits to output the bit sequence. u = [ u 0, u 1, u 2, u 3, u 4, u 5, u 6, u 7, u 8, u 9, u 10 , u 11 , u 12 , u 13 , u 14 , u 15 ] length N = 16, and was determined to be u = [ u 0, u 1, u 2, u 3, u 4, u 5, u 6, u 7, u 8, u 9, u 10 , u 11 , u 12 , u 13 , u 14 , u 15 ] = [0, 0, 0, 0, 0, 0, 0, 0,c 0, 0, 0, 0, c 1, c 2, c 3, c 4, c 5]. In the second specific example, a frozen bit input bit sequence is added. c =[ c 0, c 1, c 2, c 3, c 4, c 5] length K = 6, the size of the polarization matrix is N = 8, the data bit index set is Q = {2, 4, 3, 5, 6, 7}, add frozen bits to output the bit sequence. u = [ u 0, u 1, u 2, u 3, u 4, u 5, u 6, u The length of 7] is N = 8, and was determined to be u = [ u 0, u 1, u 2, u 3, u 4, u 5, u 6, u 7] = [0, 0, c 0, c 1, c 2, c 3, c 4, c 5).

[0129] In the third specific example, a frozen bit input bit sequence is added. c = [ c 0, c 1, c 2, c 3, c 4, c 5, c 6, c 7, c 8, c 9, c 10 , c 11 , c12 , c 13 , c 14 , c 15 , c 16 , c 17 , c 18 , c 19 The length of ] is K = 20, the size of the polarization matrix is N = 32, Data bit index set Q = {17, 10, 18, 12, 20, 24, 7, 11, 19, 13, 14, 21, 26, 25, 22, 25, 22, 28, 15, 23, 27, 29}, add frozen bits to the output bit sequence. u = [ u 0, u 1, u 2, u 3, u 4, u 5, u 6, u 7, u 8, u 9, u 10 , u 11 , u 12 , u 13 , u 14 , u 15 , u 16 , u 17 , u 18 , u 19 , u 20 , u 21 , u 22 , u 23 , u 24 , u 25 , u 26 ,u 27 , u 28 , u 29 , u 30 , u 31 The length of ] is N = 32, and was determined to be u = [ u 0, u 1, u 2, u 3, u 4, u 5, u 6, u 7, u 8, u 9, u 10 , u 11 , u 12 , u 13 , u 14 , u 15 , u 16 , u 17 , u 18 , u 19 , u 20 , u 21 , u 22 , u 23 , u 24 , u 25 , u 26 , u 27 , u 28 , u 29 , u 30 , u 31 ] = [0, 0, 0, 0, 0, 0, 0, c 0, 0, 0, c 1, c 2,c 3, c 4, c 5, c 6, 0, c 7, c 8, c 9, c 10 , c 11 , c 12 , c 13 , c 14 , c 15 , c 16 , c 17 , c 18 , c 19 , 0, 0].

[0130] The rate analysis operation performs the exact same operations as the add-freeze-bits operation, including: obtaining the rate analysis input bit sequence from the first node. c = [ c 0, c 1, ..., c K-1 ]; and the first node based on the size of the polarization matrix N and data bit index set Determine the rate analysis output bit sequence v = [ v 0, v 1, ..., v N-1 ]; where the rate analysis input bit sequence c = [ c 0, c 1, ..., c K-1 [This refers to adding frozen bits to the input bit sequence; rate analysis outputs the bit sequence.] v = [ v 0, v 1, ..., v N-1 [This refers to adding frozen bits to the output bit sequence; the polarization matrix size N and the data bit index set.] This is exactly the same as the operation involving adding frozen bits. In some embodiments, the rate analysis input bit sequence is the input bit sequence... c = [ c 0, c1, ..., c K-1 In some embodiments, the rate analysis input bit sequence is the output of a concatenation operation. In some embodiments, the rate analysis input bit sequence is the output of a determine-extend-bit operation. In one embodiment, the rate analysis input bit sequence is the output of a CRC append operation.

[0131] 3.3.2 Pre-transformation operation The pre-transformation operation includes: the first node acquiring the pre-transformation input bit sequence. v = [ v 0, v 1, ..., v N-1 The first node determines the pre-transformed output bit sequence based on at least one of the following: u = [ u 0, u 1, ..., u N-1 ]: Size of polarization matrix N Generate bit sequence on GF(2) g = [ g 0, g 1, ..., g m Generating polynomials on GF(2) g ( D ) = g 0+ g 1· D +... + g m-1 · D m-1 + g m · D m The recursive feedback bit sequence on GF(2) q = [ q 0, q 1, ..., q m ], recursive feedback polynomial on GF(2) q ( D ) = q 0+ q 1· D + ... + q m · D m , length is m +1 state bit sequence t = [ t 0,t 1, ..., t m-1 , t m ],have N OK N Pre-transformation matrix of the column T Pre-transformed input index set P I Pre-transformed output index set P O Pre-transformed frozen bit sequence r Ordered rate matching index set R = <R (0), R (1), ..., R ( N r -2), R ( N r -1) > Among them, the pre-transformed input bit sequence v and pre-transformed output bit sequence u The lengths of all of them are equal to the size of the polarization matrix. N Size of the polarization matrix It is a power of 2, where n It is a positive integer; m The memory length is one of the following: generating bit sequences g Generating polynomials g ( D ), recursive feedback bit sequence q Recursive feedback polynomial q ( D ), state bit sequence t Input index set before transformation P I Output index set before transformation P O and ordered rate matching index set R It is the first set of integers Z N = {0, 1, 2, ..., N -2, N A subset of {-1}. The first set of integers. Z N = {0, 1, 2, ..., N -2, N {-1} contains all non-negative integers less than N. N r It is the size of the ordered rate matching index set. N r equal N andE The minimum value in, i.e. N r = min( N , E ),in, E It is the length of the output bit sequence of the bit selection operation, or the length of the output bit sequence of the rate matching operation.

[0132] If the pre-transformed output bit sequence u = [ u 0, u 1, ..., u N-1 The pre-transform operation is also called the convolution transform if it is determined by at least one of the following: the generated bit sequence on GF(2). g = [ g 0, g 1, ..., g m Generating polynomials on GF(2) g ( D ) = g 0+ g 1· D + ... + g m-1 · D m-1 + g m · D m The recursive feedback bit sequence on GF(2) q = [ q 0, q 1, ..., q m ], recursive feedback polynomial on GF(2) q ( D ) = q 0+ q 1· D + ... + q m · D m .

[0133] In some embodiments, the pre-transformed input bit sequence is the output of an operation that adds frozen bits. In one embodiment, the pre-transformed input bit sequence is the output of a rate analysis operation.

[0134] 3.3.2.1 Parameters in the pre-transformation operation Generate bit sequence g Generate bit sequence g = [ g 0,g 1, ..., g m [Can be of length] m Any binary sequence of +1, where m This is called the memory length. In the first specific example, when the memory length... m When = 6, the generated bit sequence is g = [ g 0, g 1, g 2, g 3, g 4, g 5, g 6] = [1, 0, 1, 1, 0, 1, 1]. In the second specific example, when the memory length m = 3, the generated bit sequence is: g = [ g 0, g 1, g 2, g 3] = [1, 1, 0, 1]. In the third specific example, when the memory length m = 4, the generated bit sequence is: g = [ g 0, g 1, g 2, g 3, g 4] = [1, 0, 0, 1, 1].

[0135] Generate the polynomial g(D) Generating polynomials g ( D ) = g 0+ g 1· D + ... + g m-1 · D m-1 + g m · D m It can be any bivariate polynomial over GF(2), where m This is the degree of the generator polynomial. In the first specific example, when the memory length m = 6, the generator polynomial is... g ( D ) = g 0+ g 1· D + g 2. D 2 + g 3· D3 + g 4. D 4 + g 5. D 5 + g 6· D 6 = 1 + 0· D + 1· D 2 + 1· D 3 + 0· D 4 + 1· D 5 + 1· D 6 = 1 + D 2 + D 3 + D 5 + D 6 In the second specific example, when the memory length m When = 3, the generator polynomial is g ( D ) = g 0+ g 1· D + g 2. D 2 + g 3· D 3 = 1 + 1· D + 0· D 2 + 1· D 3 = 1+ D + D 3 In the third specific example, when the memory length... m When = 4, the generator polynomial is g ( D ) = g 0+ g 1· D + g 2. D 2 + g 3· D 3 + g 4. D 4 =1+ 0· D+ 0· D 2 + 1· D 3 + 1· D 4 = 1+ D 3 + D 4 Generating polynomials g ( D ) = g 0+ g 1· D + ... + g m-1 · D m-1 + g m · D m Equivalent to generating a bit sequence g = [ g 0, g 1, ..., g m ]. Figure 5 The generated bit sequence using GF(2) is shown. g =[ g 0, g 1, ..., g m or generating polynomial g ( D ) = g 0+ g 1· D + ... + g m-1 · D m-1 + g m · D m The convolution transformation performed.

[0136] Recursive feedback bit sequence q : Recursive feedback bit sequence q = [ q 0, q 1, ..., q m ] is of length m A binary sequence of +1, where [ q 1, ..., q m [ is a length of] m Any binary sequence, and q 0 = 1, where mIt refers to memory length. In a specific example, memory length... m = 6, the recursive feedback bit sequence is q = [ q 0, q 1, q 2, q 3, q 4, q 5, q 6] = [1, 0, 1,0, 1, 1, 1]. In another specific example, based on length... m = 3, the recursive feedback bit sequence is q = [ q 0, q 1, q 2, q 3] = [1, 0, 1, 1]. In the third specific example, the memory length is... m = 4, the recursive feedback bit sequence is q = [ q 0, q 1, q 2, q 3, q 4] = [1, 0, 0, 1, 1].

[0137] Recursive feedback polynomial q ( D ): Recursive feedback polynomial q ( D ) = q 0+ q 1· D + ... + q m-1 · D m-1 + q m · D m It is a binary polynomial with zero coefficients. q 0 is 1, other coefficients q 1, ..., q m Let be any binary value over GF(2), where m For memory length. In a specific example, memory length m = 6, the recursive feedback polynomial is q ( D ) = q 0+ q 1· D + q 2. D 2 + q 3·D 3 + q 4. D 4 + q 5. D 5 + q 6· D 6 = 1 + 0· D + 1· D 2 + 0· D 3 + 1· D 4 + 1· D 5 + 1· D 6 = 1 + D 2 + D 4 + D 5 + D 6 In another specific example, the memory length is... m = 3, the recursive feedback polynomial is q ( D ) = q 0+ q 1· D + q 2. D 2 + q 3· D 3 = 1 + 0· D + 1· D 2 + 1· D 3 = 1+ D 2 + D 3 In the third specific example, memory length m = 3, the recursive feedback polynomial is q ( D ) = q 0+ q 1· D + q 2. D 2 + q 3· D 3 + q 4. D4 = 1 + 0· D + 0· D 2 + 1· D 3 + 1· D 4 = 1+ D 3 + D 4 Recursive feedback polynomial q ( D ) = q 0+ q 1· D + ... + q m-1 · D m-1 + q m · D m Equivalent to recursive feedback bit sequence q =[ q 0, q 1, ..., q m ].

[0138] State bit sequence t State bit sequence t Used to store the convolution state during convolution transformation.

[0139] Pre-transformation matrix T : Pre-transformation matrix T yes N OK N A columnar bivariate upper triangular matrix satisfies the following condition: for any integer i and j , 0 ≤ j < i < N , ,in It is the pre-transformation matrix T The i Line number j The elements of the column.

[0140] Pre-transformation matrix T row properties In one embodiment, the pre-transformation matrix T has N - N r All elements in the row are zero, where N r It is an ordered rate matching index set R The size. In some embodiments, for row indexes that do not belong to the ordered rate matching index set R. iPre-transformation matrix T The i All elements in the row are zero. This indicates that... Q This is a data bit index set used to determine the rate analysis output bit sequence in a rate analysis operation (or to determine the frozen bit addition output bit sequence in a frozen bit addition operation). In one embodiment, the pre-transformation matrix T has... N - 1 - Q max All elements in the row are zero, where Q max It is a data bit index set Q The element with the maximum value in the set, and Q max = In one embodiment, the pre-transformation matrix T The end N - 1 - Q max All elements in the row are zero, where Q max It is a data bit index set Q The element with the maximum value in the set, and Q max = In one embodiment, for values ​​greater than Qmax i Pre-transformation matrix T The i All elements in the row are zero, where Q max It is a data bit index set Q The element with the maximum value in the set, and Q max = In one embodiment, the pre-transformation matrix T have N - 1 - R max All elements in the row are zero, where R max In the ordered rate matching index set R The element with the maximum value in the set, and R max = In one embodiment, the pre-transformation matrix T The end N - 1 - R max All elements in the row are zero, where R max In the ordered rate matching index set R The element with the maximum value in the set, and Rmax = In one embodiment, for greater than R max of i Pre-transformation matrix T The i All elements in the row are zero, where R max It is a data bit index set R The element with the maximum value in the set, and R max = .

[0141] Pre-transformation matrix T Column attributes In one embodiment, the pre-transformation matrix T have N - N r All elements of the column are zero, where N r Matching index set for ordered rates R The size. In some embodiments, for those not belonging to the ordered rate matching index set. R column index j Pre-transformation matrix T The j All elements in the column are zero. Q This is a data bit index set used to determine the rate analysis output bit sequence in a rate analysis operation (or to determine the frozen bit output bit sequence in a frozen bit addition operation). In one embodiment, the pre-transformation matrix... T have N - 1 - Q max All elements of the column are zero, where Q max It is a data bit index set Q The element with the maximum value in the set, and Q max = In one embodiment, the pre-transformation matrix T The end N - 1 - Q max All elements in the column are zero, where Q max It is the element with the maximum value in the data bit index set Q, and Q max = In one embodiment, for greater than Q max of j Pre-transformation matrix T Thej All elements in the column are zero, where Q max It is a data bit index set Q The element with the maximum value in the set, and Q max = In one embodiment, the pre-transformation matrix T have N - 1 - R max All elements of the column are zero, where R max In the ordered rate matching index set R The element with the maximum value in the set, and R max = In one embodiment, the pre-transformation matrix T The end N - 1 - R max All elements of the column are zero, where R max In the ordered rate matching index set R The element with the maximum value in the set, and R max = In one embodiment, for greater than R max of j Pre-transformation matrix T The j All elements in the column are zero, where R max It is a data bit index set R The element with the maximum value in the set, and R max = .

[0142] Ordered rate matching index set R : E This indicates the length of the output bit sequence in the initial or retransmitted bit sequence. N r An ordered rate matching index set of elements R It can be the first set of integers Z N any subset of, where N r = min( N , E ), and ordered rate matching index set R The elements in the matrix are smaller than the size of the polarization matrix of the polarization transform before the rate matching operation. NA non-negative integer. In the first specific example, the ordered rate matching index set. R The size is N r = N ,and R Contains the first set of integers Z N All elements in, where R =< R (0), R (1), R (2), ..., R ( N r -2), R ( N r -1)>=<0, 1, 2,..., N -2, N -1>. In the second specific example, the ordered rate matching index set R The size is N r = E ,and R Includes all smaller than E Non-negative integers: R =< R (0), R (1), R (2), ..., R ( N r -2), R ( N r -1)>=<0, 1, 2, ..., E -2, E -1>. In the third specific example, the ordered rate matching index set R The size is N r = E , R Includes all smaller than N and greater than N - E Integers of -1: R =< R (0), R (1), R (2), ..., R ( N r -2), R ( N r -1)>=< N - E ,N - E+ 1, N - E+ 2, ..., N -2, N -1>. Let J = [ J 0, J 1, ..., J M-2 , J M-1 ] is an interleaver pattern of length M determined by the sub-block interleaver pattern π = [ π 0, π 1, π 2, π 3, π 4, π 5, π 6, π 7, π 8, π 9, π 10 , π 11 , π 12 , π 13 , π 14 , π 15 , π 16 , π 17 , π 18 , π 19 , π 20 , π 21 , π 22 , π 23 , π 24 , π 25 , π 26 , π 27 , π 28 , π 29 , π 30 , π 31The sub-block interleaving buffer size M is as follows: [0, 1, 2, 4, 3, 5, 6, 7, 8, 16, 9, 17, 10, 18, 11, 19, 12, 20, 13, 21, 14, 22, 15, 23, 24, 25, 26, 28, 27, 29, 30, 31]. J = [ J 0, J 1, ..., J M-2 , J M-1 ] is the interleaver pattern, which is an integer sequence [0, 1, 2,..., M -2, M A permutation of [-1], where J A specific example is defined as follows.

[0143]

[0144] In the fourth specific instance, the ordered rate matching index set R The size is N r = M ,and R Contains the first set of integers Z N All elements in. R =< R (0), R (1), R (2), ..., R ( N r -2), R ( N r -1)>=< J 0, J 1, ..., J M-2 , J M-1 >; Among them, J i It is an interleaver pattern J = [ J 0, J 1, ..., J M-2 , J M-1 The i-th element in ] . In the fifth specific example, the size of the ordered rate matching index set R is N r = E ,andR Includes interleaver pattern J The index is less than E All elements. R =< R (0), R (1), R (2), ..., R ( N r -2), R ( N r -1)>=< J 0, J 1, ..., J E-2 , J E-1 >, among which J i It is an interleaver pattern J = [ J 0, J 1, ..., J M-2 , J M-1 The first in ] i There are elements. In the sixth specific example, the size of the ordered rate matching index set R is . N r = E ,and R Includes interleaver pattern J The index is greater than M - E -1 and less than M All elements. R =< R (0), R (1), R (2),..., R ( N r -2), R ( N r -1)>=< J M-E , J M-E+1 , J M-E+2 , ..., J M-2 , J M-1 >, among which J i It is an interleaver pattern J = [ J 0, J1, ..., J M-2 , J M-1 The first in ] i Each element.

[0145] Pre-transform input index set P I Pre-transform input index set P I It can be the first set of integers Z N Any subset of the pre-transformed input index set. P I It can be used for pre-transformation operations to achieve variable lengths, thereby improving payload transmission efficiency. Pre-transformation input index set. P I The first specific example is P I equal to the first set of integers Z N Pre-transformed input index set P I The second specific example is, P I From all not greater than Q max Composed of non-negative integers, P I = {0, 1, 2, ..., Q max - 1, Q max} and has Q max + 1 element, where Q max It is the set of data bit indexes used in rate analysis operations. Q The element with the maximum value in the set, and Q max = In the third specific example, the pre-transformed input index set P I Equal to ordered rate matching index set R =< R (0), R (1), R (2), ..., R ( N r -2), R ( N r -1)>, that is P I = { R (0),R (1), R (2), ..., R ( N r -2), R ( N r -1)}. In the fourth specific example, the pre-transformed input index set P I From all not greater than R max The composition of non-negative integers, i.e. P I = {0, 1, 2, ..., R max - 1, R max}, and has R max + 1 element, where R max It is an ordered rate matching index set R =< R (0), R (1), R (2),..., R ( N r -2), R ( N r -1)> the element with the largest median value, and R max = .

[0146] Pre-transform output index set P O Pre-transform output index set P O It can be the first set of integers Z N Any subset of. Pre-transformed output index set. P O It can be used for pre-transformation operations to achieve variable lengths, thereby improving payload transmission efficiency. Pre-transformation output index set. P O The first specific example is P O equal to the first set of integers Z N In the second specific example, the pre-transformed output index set P O From all not greater than Q max The non-negative integer composition, that is, P O= {0, 1, 2, ..., Q max - 1, Q max}, and has Q max +1 element, of which Q max It is the set of data bit indexes used in rate analysis operations. Q The element with the maximum value in the set, and Q max = In the third specific example, the pre-transformed output index set P O Equal to ordered rate matching index set R =< R (0), R (1), R (2), ..., R ( N r -2), R ( N r -1)>, that is P O = { R (0), R (1), R (2), ..., R ( N r -2), R ( N r -1)}. In the fourth specific example, the pre-transformed output index set P O From all not greater than R max The non-negative integer composition, that is, P O = {0, 1, 2, ..., R max - 1, R max}, and has R max + 1 element, where R max It is an ordered rate matching index set R =< R (0), R (1), R (2),..., R ( N r -2), R (N r -1)> the element with the largest median value, and R max = .

[0147] Pre-transformed frozen bit sequence r In some embodiments, the pre-transformed frozen bit sequence r It can be of length N - N PO Any bit sequence, where N PO It is the pre-transformed output index set P O Size, N This is the size of the polarization matrix. In a specific example, N = 8 and N PO = 5, the pre-transformed frozen bit sequence is r = [1, 0, 1], with a length of N - N PO = 8 - 5 = 3. In another specific example, N = 32 and N PO = 5, Pre-transformed frozen bit sequence r It is a sequence of all zeros with a length of . N - N PO = 32 - 5 = 27. In some embodiments, the pre-transformed frozen bit sequence r It can be any bit sequence of length N, where N is the size of the polarization matrix. In a specific example, N = 8, the pre-transformed frozen bit sequence is r = [0, 0, 0, 0, 0, 1, 0, 1], with a length of N = 8. In another specific example, N = 32, pre-transformed frozen bit sequence r It is a length of N = 32 is a sequence of all zeros.

[0148] 3.3.2.2 Pretransformation determined by the pretransformation matrix In some embodiments, the pre-transformed output sequence of length N u It is the product of the pre-transformed input bit sequence and the pre-transformation matrix T with N rows and N columns, i.e. u=v·T The pre-transformed input bit sequence is a rate analysis output sequence of length N. vVector-matrix multiplication is performed on GF(2).

[0149] 3.3.2.3 Pretransformation determined by the pretransformation matrix and the pretransformation frozen bit sequence In some embodiments, the length is N Pre-transformed output sequence u It is achieved by pre-transforming and freezing the bit sequence. r With pre-transformed input bit sequence v and have N OK N Pre-transformation matrix of the column T It is determined by adding the products, that is... u = v · T + r The pre-transformed input bit sequence is of length [length missing]. N Rate analysis output bit sequence v Vector-matrix multiplication is performed on GF(2), vector-vector addition is performed on GF(2), and the pre-transformation freezes the bit sequence. r The length is equal to the size of the polarization matrix. N .

[0150] 3.3.2.4 By g or g(D), t, P I 、P O Pre-transformation determined by r In some embodiments, the pre-transformation operation uses at least one of the following methods to determine the length. N Pre-transformed output bit sequence u Generate bit sequence g = [ g 0, g 1, ..., g m ], the generating polynomial on GF(2) g ( D ) = g 0+ g 1· D +... + g m-1 · D m-1 + g m · D m Pre-transformed input index set P I Pre-transformed output index set P O Or pre-transformed frozen bit sequence r Pre-transformed frozen bit sequence r The length isN - N PO ,in N PO It is the pre-transformed output index set P O The size of the transformation operation is shown in Table 2. Example algorithms 1A-1G are provided as example implementations of the pre-transformation operation.

[0151] Table 2 Examples of Pre-Transformation Implementation Methods

[0152] In some embodiments, if index i belongs to the pre-transformed output index set P O The pre-transformed output bit sequence u The index is i bits ( u i The generation of the bit sequence is determined by at least one of the following: g = [ g 0, g 1, ..., g m ], generating polynomial over GF(2) g ( D ) = g 0+ g 1· D + ... + g m · D m Pre-transformed input bit sequence v = [ v 0, v 1, ..., v N-1 In L 1 bit, whose index is the first intersection. M 1 L The maximum value. The first intersection. M 1 is the set of non-negative integers ({0, 1, ..., ...). i -1, i}) and pre-transform input index set P I The intersection of. L = min(| M 1|, min( i +1, m +1)), where | M 1| is the first intersection M The number of elements in 1.

[0153] In the first specific example, where N = 16, i = 3, m = 6, Generating polynomial g ( D ) = g 0+ g 1· D + g 2. D 2 + g 3· D 3 + g 4. D 4 + g 5. D 5 + g 6· D 6 Pre-transformed output index set P O = {0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10}, the pre-transform input index set P I = {0, 2, 3, 5, 7, 8, 10} is: (1) The first intersection M1 is M 1 = {0, 1, 2, 3} ∩ P I = {0, 1, 2, 3} ∩ {0, 2, 3, 5, 7, 8, 10} = {0, 2, 3}; (2) L = min(| M 1|, min( i +1, m +1)) = min(3, min(3+1, 6+1)) = 3; (3) Pre-transformed input bit sequence v = [ v 0, v 1, v 2, v 3, v 4, v 5, v 6, v 7, v 8, v 9, v 10 , v 11, v 12 , v 13 , v 14 , v 15 In L = 3 bits, whose index is the first intersection. M In 1 = {0, 2, 3} L = 3 maximum values, that is v 3, v 2and v 0; (4) Finally, the pre-transformed output bit sequence u index i = 3 bits is u i = mod( g 0· v 3+ g 1· v 2+ g 2. v 0, 2).

[0154] In the second specific example, N = 16, i = 9, m = 3, generate sequence g = [ g 0, g 1, g 2, g 3], Pre-transformed output index set P O = {0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10}, the pre-transform input index set P I = {0, 2, 3, 5, 7, 8, 10} is: (1) First intersection M 1 is M 1 = {0, 1, 2, 3, 4, 5, 6, 7, 8, 9} ∩ P I = {0, 1, 2, 3, 4, 5, 6, 7, 8, 9} ∩ {0, 2, 3, 5, 7, 8, 10} = {0, 2, 3, 5, 7, 8}; (2) L = min(| M 1|, min( i +1, m+1)) = min(6, min(9+1, 3+1)) = 4; (3) Pre-transformed input bit sequence v = [ v 0, v 1, v 2, v 3, v 4, v 5, v 6, v 7, v 8, v 9, v 10 , v 11 , v 12 , v 13 , v 14 , v 15 In L = 4 bits, whose index is the first intersection. M In the set 1 = {0, 2, 3, 5, 7, 8} L = 4 maximum values, that is v 8, v 7, v 5, v 3; (4) Finally, the pre-transformed output bit sequence u index i =9 bits are u 9 = mod( g 0· v 8+ g 1· v 7+ g 2. v 5+ g 3· v 3, 2).

[0155] In some embodiments, if the index i Belongs to the pre-transform output index set P O The pre-transformed output bit sequence u The bit at index i in the middle ( u i The generation of the bit sequence is determined by at least one of the following: g = [ g 0, g 1, ..., g m], generating polynomial over GF(2) g ( D ) = g 0+ g 1· D + ... + g m · D m And / or, pre-transformed input bit sequence v = [ v 0, v 1,..., v N-1 L bits in v i , v i-1 , ..., v i-L+1 Its index is a value in the set that is not greater than i non-negative integers L The maximum values ​​are {0, 1, ...,} i -1, i}),in L = min( i +1, m +1).

[0156] In the first specific example, i = 3, m = 6, Pre-transform output index set P O = {0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10}, generating polynomial g ( D ) = g 0+ g 1· D + g 2. D 2 + g 3· D 3 + g 4. D 4 + g 5. D 5 + g 6· D 6 for (1) The set of non-negative integers, where i No greater than 3, i.e., {0, 1, 2, 3}; (2) L = min(i +1, m +1) = min(3+1, 6+1) = 4; (3) Pre-transformed input bit sequence v = [ v 0, v 1, ..., v N-1 In L = 4 bits, whose index is in the set {0, 1, 2, 3} L = 4 maximum values, respectively v 3, v 2, v 1, and v 0; (4) Finally, the first i bits u i = mod( g 0· v 3+ g 1· v 2+ g 2. v 1+ g 3· v 0, 2).

[0157] In the second specific example, N = 16, i = 9, m = 3, Pre-transform output index set P O = {0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10}, generate the sequence g = [ g 0, g 1, g 2, g 3] is: (1) The set of non-negative integers, where i is not greater than 9, i.e. {0, 1, 2, 3, 4, 5, 6, 7, 8, 9}; (2) L = min( i +1, m +1) = min(9+1, 3+1) = 4; (3) Pre-transformed input bit sequence v = [ v 0, v 1, v 2, v 3, v 4,v 5, v 6, v 7, v 8, v 9, v 10 , v 11 , v 12 , v 13 , v 14 , v 15 The L = 4 bits in the set {0, 1, 2, 3, 4, 5, 6, 7, 8, 9} are the L = 4 maximum values. v 9, v 8, v 7, v 6; (4) Finally, the pre-transformed output bit sequence u The bit at index i = 9 u 9 = mod( g 0· v 9+ g 1· v 8+ g 2. v 7+ g 3· v 6, 2).

[0158] In some embodiments, for any index i Pre-transformed output bit sequence u The index is i bits (u) i The bit sequence is determined by at least one of the following: g = [ g 0, g 1, ..., g m ], generating polynomial over GF(2) g ( D ) = g 0+ g 1· D + ... + g m · D m and / or pre-transformed input bit sequence v = [ v 0, v 1, ..., vN-1 In L 1 bit, whose index is the first intersection. M 1 L The maximum value. The first intersection. M 1 is the set of non-negative integers ({0, 1, ..., ...). i -1, i}) and pre-transform input index set P I The intersection, L = min(| M 1|, min( i +1, m +1)), where | M 1| is the first intersection M The number of elements in 1.

[0159] In the first specific example, N = 16, i = 2, m = 6, Generating polynomial g ( D ) = g 0+ g 1· D + g 2. D 2 + g 3· D 3 + g 4. D 4 + g 5. D 5 + g 6· D 6 Pre-transformed input index set P I = {0, 2, 3, 5, 7, 8, 10} is: (1) First intersection M 1 = {0, 1, 2} ∩ P I = {0, 1, 2} ∩ {0, 2, 3, 5, 7, 8, 10} = {0, 2}; (2) L = min(| M 1|, min( i +1, m +1)) = min(2, min(3+1, 6+1)) = 2; (3) Pre-transformed input bit sequencev = [ v 0, v 1, v 2, v 3, v 4, v 5, v 6, v 7, v 8, v 9, v 10 , v 11 , v 12 , v 13 , v 14 , v 15 In the ], L = 2 bits, and its index is the first intersection. M In 1 = {0, 2} L = 2 maximum values, that is v 2,and v 0; (4) Finally, the pre-transformed output bit sequence u index i = 2 bits are u 2 = mod( g 0· v 2+ g 1· v 0,2).

[0160] In the second specific example, N = 16, i = 9, m = 3, generate sequence g = [ g 0, g 1, g 2, g 3], Pre-transformed input index set P I = {0, 2, 5, 7, 8, 10} is: (1) The first intersection M1 is M 1 = {0, 1, 2, 3, 4, 5, 6, 7, 8, 9} ∩ P I = {0, 1, 2, 3,4, 5, 6, 7, 8, 9} ∩ {0, 2, 5, 7, 8, 10} = {0, 2, 5, 7, 8}; (2) L= min(| M 1|, min( i +1, m +1)) = min(5, min(9+1, 3+1)) = 4; (3) Pre-transformed input bit sequence v = [ v 0, v 1, v 2, v 3, v 4, v 5, v 6, v 7, v 8, v 9, v 10 , v 11 , v 12 , v 13 , v 14 , v 15 In L = 4 bits, whose index is the first intersection. M 1 L = 4 maximum values, that is v 8, v 7, v 5, v 2; (4) Finally, the pre-transformed output bit sequence u index i =9 bits are u 9 = mod( g 0· v 8+ g 1· v 7+ g 2. v 5+ g 3· v twenty two).

[0161] In some embodiments, for any index i Pre-transformed output bit sequence u The index is i bits ( u i The bit sequence is determined by at least one of the following: g = [ g 0, g 1, ..., g m], generating polynomial over GF(2) g ( D ) = g 0+ g 1· D + ... + g m · D m and / or pre-transformed input bit sequence v = [ v 0, v 1, ..., v N-1 In L bits, whose index is no greater than bits. i ,in L It is not greater than m . a non-negative integer.

[0162] In some examples, if the index i Not part of the pre-transform output index set P O The pre-transformed output bit sequence u The index is i bits ( u i The index is set to zero, for example, as shown in Algorithms 1A and 1D. In some examples, if the index... i Not part of the pre-transform output index set P O The pre-transformed output bit sequence u The index is i bits ( u i Set as the pre-transformed input bit sequence v The i bits v i For example, as shown in Algorithms 1B and 1E. In some examples, if the index i Not part of the pre-transform output index set P O The pre-transformed output bit sequence u The index is i bits (u) i This will be set as a pre-transformed frozen bit sequence. r One of the bits, as shown in Algorithms 1C and 1F, is the pre-transformed frozen bit sequence. r The length is N - N PO , N PO It is the pre-transformed output index setP O Size.

[0163] In Algorithm 1A-1G, N It is the size of the polarization matrix, and also the pre-transformed output bit sequence. u Length or pre-transformed input bit sequence v Length, m It's memory length. v i It is the index of the pre-transformed input bit sequence. i bits, u i It is the index of the pre-transformed output bit sequence. i bits, g k It is a generated sequence g = [ g 0, g 1, ..., g m The index in ] is k The bits, or the generating polynomial over GF(2) g ( D ) = g 0+ g 1· D + ... + g m-1 · D m-1 + g m · D m The number of times is k The coefficient of the term.

[0164] 3.3.2.5 By q or q(D), t, P I 、P O Pre-transformation determined by r In some embodiments, the pre-transform operation uses at least one of the following methods to determine a pre-transformed output bit sequence of length N. u Recursive feedback bit sequence q = [ q 0, q 1, ..., q m ], recursive feedback polynomial on GF(2) q ( D )= q 0+ q 1· D + ... + q m-1 ·D m-1 + q m · D m Pre-transformed input index set P I Pre-transformed output index set P O Or pre-transformed frozen bit sequence r Pre-transformed frozen bit sequence r The length is N - N PO ,in N PO It is the pre-transformed output index set P O The size. Figure 6 shows an example diagram of a recursive convolution transform according to one or more embodiments of the present technology. The recursive convolution transform consists of a recursive feedback bit sequence. q = [ q 0, q 1, ..., q m Or a recursive feedback polynomial on GF(2) q ( D ) = q 0+ q 1· D +... + q m-1 · D m-1 + q m · D m Definition, where q 0 = 1.

[0165] Table 3 shows example algorithms 2A-2G, which are example implementations of the pre-transformation operation.

[0166] Table 3 Examples of Pre-Transformation Implementation Methods

[0167] In some embodiments, if the index i Belongs to the pre-transform output index set P O The pre-transformed output bit sequence u The index is i bits ( u i It is determined by at least one of the following: a recursive feedback bit sequence q= [ q 0, q 1, ..., q m ], recursive feedback polynomial on GF(2) q ( D ) = q 0+ q 1· D + ... + q m · D m Pre-transformed input bit sequence v = [ v 0, v 1,..., v N-1 The first in ] i bits v i and / or pre-transformed output bit sequence u = [ u 0, u 1, ..., u N-1 In L 1 bit, whose index is the second intersection. M 2 L The maximum value. The second intersection. M 2 is less than i The set of non-negative integers ({0, 1,..., ...) i -2, i -1}) and pre-transform output index set P I The intersection, L = min(| M 2|, min( i , m )), where | M 2| is the second intersection M The number of elements in 2 (e.g., as shown in algorithms 2A, 2B, and 2C in Table 3). In the first specific example, N =16, i = 3, m = 6, Recursive Feedback Polynomial q ( D ) = q 0+ q 1· D + q 2. D 2 + q 3· D 3 +q 4. D 4 + q 5. D 5 + q 6· D 6 , q 0=1, pre-transform output index set P O = {0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10}, the pre-transform input index set P I ={0, 2, 3, 5, 7, 8, 10} is: (1) Second intersection M 2 is M 2 = {0, 1, 2} ∩ P I = {0, 1, 2} ∩ {0, 2, 3, 5, 7, 8, 10} = {0, 2}; (2) L = min(| M 2|, min( i , m )) = min(2, min(3, 6)) = 2; (3) Pre-transformed input bit sequence v = [ v 0, v 1, v 2, v 3, v 4, v 5, v 6, v 7, v 8, v 9, v 10 , v 11 , v 12 , v 13 , v 14 , v 15 In L = 2 bits, whose index is the second intersection. M 2 L = 2 maximum values, that is v 2 and v 0; (4) Finally, the pre-transformed output bit sequenceu index i = 3 bits is u 3 = mod( q 0· v 3+ q 1· u 2+ q 2. u 0, 2) = mod( v 3+ q 1· u 2+ q 2. u 0, 2), because q 0 = 1.

[0168] In the second specific example, N = 16, i = 9, m = 3, recursive feedback sequence q = [ q 0, q 1, q 2, q 3], q 0 = 1, pre-transform output index set P O = {0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10}, the pre-transform input index set P I = {0, 2, 3, 5, 7, 8, 10}, is: (1) Second intersection M 2 is M 2 = {0, 1, 2, 3, 4, 5, 6, 7, 8} ∩ P I = {0, 1, 2, 3, 4, 5, 6, 7, 8} ∩ {0, 2, 3, 5, 7, 8, 10} = {0, 2, 3, 5, 7, 8}; (2) L = min(| M 2|, min( i , m )) = min(6, min(9, 3)) = 3; (3) Pre-transformed input bit sequence v = [ v 0, v 1, v 2, v 3, v 4, v 5,v 6, v 7, v 8, v 9, v 10 , v 11 , v 12 , v 13 , v 14 , v 15 In L = 3 bits, whose indices are the intersection M In the formula 2 = {0, 2, 3, 5, 7, 8} L = 3 maximum values, that is v 8. v 7 and v 5; (4) Finally, the pre-transformed output bit sequence u index i =9 bits are u 9 = mod( q 0· v 9+ q 1· u 8+ q 2. u 7+ g 3· u 5, 2) = mod( v 9+ q 1· u 8+ q 2. u 7+ g 3· u 5, 2), because q 0 = 1.

[0169] In some embodiments, if the index i Belongs to the pre-transform output index set P O The pre-transformed output bit sequence u index i bits ( u i It is determined by at least one of the following: a recursive feedback bit sequence q = [ q 0, q 1, ..., q m ], recursive feedback polynomial on GF(2) q ( D) = q 0+ q 1· D + ... + q m · D m Pre-transformed input bit sequence v = [ v 0, v 1,..., v N-1 The index in the middle is i bits (v) i ), and / or pre-transformed output bit sequence u = [ u 0, u 1, ..., u N-1 In L bits u i-1 , u i-2 , ..., u i-L Its index is less than i The set of non-negative integers {0, 1, ..., i -2, i The L maximum values ​​in {-1}. L = min( i , m (For example, as shown in algorithms 2D, 2E and 2F).

[0170] In the first specific example, N = 16, i = 3, m = 6, Pre-transform output index set P O = {0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10}, recursive feedback polynomial q ( D ) = q 0+ q 1· D + q 2. D 2 + q 3· D 3 + q 4. D 4 + q 5. D 5 + q 6·D 6 for: (1) The set of non-negative integers less than i = 3 is {0, 1, 2}; (2) L = min( i , m ) = min(3, 6) = 3; (3) Pre-transformed output bit sequence u = [ u 0, u 1, ..., u N-1 In L = 3 bits, whose index is in the set {0, 1, 2} L = 3 maximum values, that is u 2. u 1 and u 0; (4) Finally, the pre-transformed output bit sequence u index i = 3 bits is u i = mod( q 0· v 3+ q 1· u 2+ q 2. u 1+ q 3· u 0, 2).

[0171] In the second specific example, N = 16, i = 9, m = 3, recursive feedback bit sequence q = [ q 0, q 1, q 2, q 3], q 0 = 1, pre-transform output index set P O = {0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10}, is: (1) Less than i The set of non-negative integers equal to 9 is {0, 1, 2, 3, 4, 5, 6, 7, 8}; (2) L = min( i , m ) = min(9, 3) = 3; (3) Pre-transformed output bit sequence u = [ u 0, u 1, u 2, u 3, u 4, u 5, u 6, u 7, u 8, u 9, u 10 , u 11 , u 12 , u 13 , u 14 , u 15 In L = 3 bits, whose index is in the set {0, 1, 2, 3, 4, 5, 6, 7, 8}. L = 3 maximum values, that is u 8. u 7 and u 6; (4) Finally, the pre-transformed output bit sequence u index i =9 bits are u i = mod( q 0· v 9+ q 1· u 8+ q 2. u 7+ q 3· u 6, 2) == mod( v 9+ q 1· u 8+ q 2. u 7+ q 3· u 6, 2), because q 0 = 1.

[0172] In some embodiments, for any index i Pre-transformed output bit sequence u The index is i bits ( u i It is determined by at least one of the following: recursive feedback bit sequence q = [q 0, q 1, ..., q m ], recursive feedback polynomial on GF(2) q ( D ) = q 0+ q 1· D + ... + q m · D m Pre-transformed input bit sequence v = [ v 0, v 1, ..., v N-1 The first in ] i bits v i and / or pre-transformed output bit sequence u = [ u 0, u 1, ..., u N-1 In L 1 bit, whose index is the second intersection. M 2 L The maximum value. The second intersection. M 2 is less than i The set of non-negative integers ({0, 1, ..., ...) i -2, i -1}) and pre-transform output index set P I The intersection, L = min(| M 2|, min( i , m )), where | M 2| is the second intersection M The number of elements in 2 (e.g., as shown in Algorithm 2G).

[0173] In the first specific example, where N = 16, i = 3, m = 6, Recursive Feedback Polynomial q ( D ) = q 0+ q 1· D + q 2. D 2 + q 3· D3 + q 4. D 4 + q 5. D 5 + q 6· D 6 , q 0 = 1, pre-transform input index set P I = {0, 2, 3, 5, 7, 8, 10}: (1) Second intersection M 2 is M 2 = {0, 1, 2} ∩ P I = {0, 1, 2} ∩ {0, 2, 3, 5, 7, 8, 10} = {0, 2}; (2) L = min(| M 2|, min( i , m )) = min(2, min(3, 6)) = 2; (3) Pre-transformed output bit sequence u = [ u 0, u 1, u 2, u 3, u 4, u 5, u 6, u 7, u 8, u 9, u 10 , u 11 , u 12 , u 13 , u 14 , u 15 In L = 2 bits, whose index is the second intersection. M 2 L = 2 maximum values, that is u 2 and u 0; (4) Finally, the pre-transformed output bit sequence u index i = 3 bits is u 3 = mod(q 0· v 3+ q 1· u 2+ q 2. u 0, 2) = mod( v 3+ q 1· u 2+ q 2. u 0, 2), because q 0 = 1.

[0174] In the second specific example, N = 16, i = 9, m = 3, recursive feedback sequence q = [ q 0, q 1, q 2, q 3], q 0 = 1, pre-transform input index set P I = {0, 2, 3, 5, 7, 8, 10} is: (1) Second intersection M 2 is M 2 = {0, 1, 2, 3, 4, 5, 6, 7, 8} ∩ P I = {0, 1, 2, 3, 4, 5, 6, 7, 8} ∩ {0, 2, 3, 5, 7, 8, 10} = {0, 2, 3, 5, 7, 8}; (2) L = min(| M 2|, min( i , m )) = min(6, min(9, 3)) = 3; (3) Pre-transformed output bit sequence u = [ u 0, u 1, u 2, u 3, u 4, u 5, u 6, u 7, u 8, u 9, u 10 , u 11 , u12 , u 13 , u 14 , u 15 In L = 3 bits, whose indices are the intersection M In the formula 2 = {0, 2, 3, 5, 7, 8} L = 3 maximum values, that is u 8. u 7 and u 5; (4) Finally, the pre-transformed output bit sequence u index i =9 bits are u 9 = mod( q 0· v 9+ q 1· u 8+ q 2. u 7+ g 3· u 5, 2) = mod( v 9+ q 1· u 8+ q 2. u 7+ q 3· u 5, 2), because q 0 = 1.

[0175] In some embodiments, if the index i Belongs to the pre-transform output index set P O The pre-transformed output bit sequence u The index is i bits (u) i It is determined by at least one of the following: a recursive feedback bit sequence q = [ q 0, q 1, ..., q m ], recursive feedback polynomial on GF(2) q ( D ) = q 0+ q 1· D + ... + q m · D m Pre-transformed input bit sequence v = [v 0, v 1,..., v N-1 The index in the middle is i bits (v) i ), and the pre-transformed output bit sequence u = [ u 0, u 1, ..., u N-1 The index in the middle is not greater than i of L bits, of which L It is not greater than m . a non-negative integer.

[0176] In some embodiments, if the index i Not part of the pre-transform output index set P O The pre-transformed output bit sequence u The index is i bits ( u i The index is set to zero (e.g., as shown in Algorithms 2A and 2D). In one embodiment, if index i does not belong to the pre-transformed output index set... P O Then the pre-transformed output bit sequence u The bit with index i (u i Set as the pre-transformed input bit sequence v The i-th bit v i (For example, as shown in algorithms 2B and 2E). In one embodiment, if the index i Not part of the pre-transform output index set P O The pre-transformed output bit sequence u The index is i bits ( u i The pre-transformed frozen bit sequence is set. r One bit (e.g., as shown in algorithms 2C and 2F). Pre-transformed frozen bit sequence r The length is N - N PO ,in N PO It is the pre-transformed output index set P O Size.

[0177] In Algorithm 2A-2G,N It is the size of the polarization matrix, and also the pre-transformed output bit sequence. u Length or pre-transformed input bit sequence v Length, m It's memory length. v i It is the index of the pre-transformed input bit sequence. i bits, u i It is the index of the pre-transformed output bit sequence. i bits, g k It is a generated sequence g = [ g 0, g 1, ..., g m The index in ] is k The bits, or the recursive feedback polynomial over GF(2). q ( D ) = q 0+ q 1· D + ... + q m-1 · D m-1 + q m · D m The number of times is k The coefficient of the term.

[0178] 3.3.2.6 By g or g(D), q or q(D), t, P I , P O Pre-transformation determined by r In some embodiments, the pre-transformation operation uses at least one of the following to determine the length as: N Pre-transformed output bit sequence u Generate bit sequence g = [ g 0, g 1, ..., g m ], generating polynomial over GF(2) g ( D ) = g 0+ g 1· D + ...+ g m-1 · D m-1 + g m ·D m Recursive feedback bit sequence q = [ q 0, q 1, ..., q m ], recursive feedback polynomial on GF(2) q ( D ) = q 0+ q 1· D + ... + q m-1 · D m-1 + q m · D m Pre-transformed input index set P I Pre-transformed output index set P O Pre-transformed frozen bit sequence r , length is m+1 state bit sequence t = [ t 0, t 1, ..., t m-1 , t m Pre-transformed frozen bit sequence r The length is N - N PO ,in N PO It is the pre-transformed output index set P O The size. Figure 7 illustrates an example of another recursive convolution transform according to one or more embodiments of the present technology. The recursive convolution transform is generated by a bit sequence. g = [ g 0, g 1, ..., g m and / or recursive feedback bit sequences q = [ q 0, q 1, ..., q m ] Defined, or derived from the generating polynomial on GF(2) g ( D )= g 0+ g 1· D + ... + gm-1 · D m-1 + g m · D m and / or recursive feedback polynomial q ( D ) = q 0+ q 1· D + ... + q m · D m Definition, where q 0 = 1. Examples of implementation methods for the pre-transformation can be found in algorithms 3A-3G in Table 4.

[0179] In some embodiments, if the index i Belongs to the pre-transform output index set P O The pre-transformed output bit sequence u The index is i bits ( u i Determined based on at least one of the following: the pre-transformed input bit sequence v The index is i bits ( v i Generate bit sequences g = [ g 0, g 1, ..., g m ]; Generating polynomials over GF(2) g ( D ) = g 0+ g 1· D + ... + g m · D m Recursive feedback bit sequence q = [ q 0, q 1, ..., q m ], recursive feedback polynomial on GF(2) q ( D ) = q 0+ q 1· D + ... + q m · D mand / or state bit sequence t = [ t 0, t 1, ..., t m-1 , t m The pre-transformation can be implemented using the example implementations given in Algorithms 3A-3G in Table 4. The pre-transformation operation may include: the first node converting the state bit sequence... t The bit with index 0 is set as the pre-transformed input bit sequence. v The index is i bits ( v i ) ,Right now t 0= v i The first node, based on the recursive feedback bit sequence, q = [ q 0, q 1, ..., q m (or a recursive feedback polynomial on GF(2)) q ( D ) = q 0+ q 1· D + ... + q m · D m and the updated state bit sequence t = [ t 0, t 1, ..., t m-1 , t m Determine the summation bits s for The first node will send the state bit sequence t The bit with index 0 is set as the summation bit. s ,Right now t 0= s And the first node generates a bit sequence g = [ g 0, g 1, ..., g m (or generating polynomials over GF(2)) g ( D ) = g 0+ g 1· D + ... + gm · D m ) and the updated state bit sequence t = [ t 0, t 1, ..., t m-1 , t m Determine the pre-transformed output bit sequence u The index is i bits ( u i )for .

[0180] Table 4 shows example algorithms 3A-3G, which are example implementations of the pre-transformation operation.

[0181] Table 4 Another example of a pre-transformation implementation

[0182] In some embodiments, if the index i Not part of the pre-transform output index set P O The pre-transformed output bit sequence u index i ( u i The bit of ) is set to zero, for example, as shown in algorithms 3A and 3D. In one embodiment, if the index i Not part of the pre-transform output index set P O Then the pre-transformed output bit sequence u index i ( u i The bits of ) are set as the pre-transformed input bit sequence v index i ( v i The bits of ), for example, as shown in algorithms 3B and 3E. In one embodiment, if the index i Not part of the pre-transform output index set P O The pre-transformed output bit sequence u index i ( u i The bits of ) are set as the pre-transformed frozen bit sequence. rOne of the bits, for example, as shown in algorithms 3C and 3F, wherein the pre-transformed frozen bit sequence r The length is N - N PO , N PO It is the pre-transformed output index set P O The size. In one embodiment, if the index i Belongs to the pre-transform input index set P I Then for the state bit sequence t = [ t 0, t 1, ..., t m-1 , t m Perform a right shift, and, for example, shift the state bit sequence as shown in algorithms 3A, 3B, 3C, and 3G. t The index is 0 ( t The bits of 0 are set to 0, as shown below.

[0183]

[0184] In some embodiments, for any index i For the state bit sequence t = [ t 0, t 1, ..., t m-1 , t m Perform a right shift, and, for example, shift the state bit sequence as shown in algorithms 3D, 3E, and 3F. t The index is 0 ( t The bits of 0 are set to 0, as shown below.

[0185]

[0186] In algorithm 3A-3G, N It represents the size of the polarization matrix, or the length of the pre-transformed input bit sequence, or the length of the pre-transformed output bit sequence; m It is the length of memory; v i It is the index of the pre-transformed input bit sequence. i bits; u i It is the index of the pre-transformed output bit sequence. i bits; qk It is a recursive feedback sequence q = [ q 0, q 1, ..., q m The bit at index k in ], or the recursive feedback polynomial over GF(2). q ( D ) = q 0+ q 1· D + ... + q m-1 · D m-1 + q m · D m middle k The coefficient of the second term, g k It generates sequence g g = [ g 0, g 1, ..., g m The index in the middle is k The bits, or the generator polynomial over GF(2). g ( D ) = g 0+ g 1· D + ... + g m-1 · D m-1 + g m · D m middle k The coefficient of the term.

[0187] 3.3.3 Polarization Transformation Operation The polarization transformation operation includes: the first node acquiring the polarization transformation input bit sequence; and the first node determining the polarization transformation output bit sequence. d = [ d 0, d 1, ..., d N-1 Polarization transform input bit sequence and polarization transform output bit sequence. d The lengths of all of them are equal to the size of the polarization matrix. N Polarization transform output bit sequence d The first node inputs the polarization transformation bit sequence. u With an N x N polarization matrixG (N) Multiplying them together yields the result, i.e. d = u·G (N) The vector-matrix multiplication is performed over GF(2), where the polarization matrix is ​​N rows and N columns. G (N) It is one of the following matrices: (1) G (N) = (2) G (N) = (3) G (N) = P (N) ; or (4) G (N) = Matrix operations are performed on GF(2). P (N) = , P (2) = , It is a matrix P (2) The nth power of Kronecker, B (N) yes N OK N A column-wise bit-reversed permutation matrix. 0 is... N / 2 rows and N A matrix of all zeros with 2 / 2 columns. Let Bit-inverted permutation matrix B (N) The i Line number j The elements of the column. Then, for 0 ≤ i < N and 0 ≤ j < N We have , of which br( i ) is the bit reversal function, defined as br( i ) = ,and[ b n-1 , b n-2 ,..., b 1, b [0] is an integer i = of n Bit binary expansion. The length of GF(2) is N A sequence (or vector)x polarization matrix on GF(2) G (N) Multiplication is called a sequence (vector). x The polarization transformation. (Note: The original text contains several typographical errors and inconsistencies. A more accurate translation would require the full context.) y = x · G (N) , where vector-matrix multiplication is performed on GF(2). Therefore, y that is x The polarization transformation. In one embodiment, the polarization transformation input bit sequence is the output of the add-freeze bit operation. In one embodiment, the polarization transformation input bit sequence is the output of the pre-transform operation. In one embodiment, the polarization transformation input bit sequence is the output of the rate analysis operation. Figure 1 shows the size of... N = 32 polarization matrix G (32) sum matrix G (32) Factor plot.

[0188] In some embodiments, the polarization transform input bit sequence is the output of an operation that adds freeze bits. In one embodiment, the polarization transform input bit sequence is the output of a rate analysis operation. In one embodiment, the polarization transform input bit sequence is the output of a pre-transform operation.

[0189] 3.3.4 Rate Matching Operation The rate matching operation includes: the first node acquiring the rate matching input bit sequence; and the first node determining the rate matching output bit sequence by at least one of the following: polarization matrix size. N Interleaving buffer size M Ordered rate matching index set R = <R (0), R (1), ..., R ( N r -2), R ( N r -1) > Interleaving operations and bit selection operations. In one embodiment, the rate-matched input bit sequence is of length [missing information]. N Polarization transform output bit sequence d = [ d 0, d 1, ..., d N-1 ] ,in N This is the size of the polarization matrix. In one embodiment, the rate-matched input bit sequence is a length of... N Polarization transform output bit sequence d= [ d 0, d 1, ..., d N-1 [the previous] M bits, of which N It is the size of the polarization matrix. M This is the size of the interleaving buffer. In one embodiment, the rate-matched output bit sequence is of length [missing information]. E Output bit sequence e = [ e 0, e 1, ..., e E-1 A specific example of rate matching is shown in Figure 9. In one embodiment, the rate-matched input bit sequence is the output of a polarization transform operation. In another embodiment, the rate-matched input bit sequence is the output of a center-aligned superposition operation.

[0190] 3.3.4.1 Performing rate matching operations using an ordered rate matching index set In some embodiments, the rate matching operation is performed by the first node through an ordered rate matching index set. R = <R (0), R (1), ..., R ( N r -2), R ( N r -1) > Determine the rate-matched output bit sequence corresponding to the rate-matched input bit sequence. e ,in N r It is the size of the ordered rate matching index set. In one embodiment, N r equal N and E The minimum value between, that is, N r = min( N , E );in N It is the size of the polarization matrix. E Is it the rate matching the length of the output bit sequence, or the output bit sequence e The length. In some embodiments, N r equal N and E The minimum value between, that is, N r = min( N , E );in M It is the size of the interlacing.E It is the length of the rate-matched output bit sequence. A first concrete example is... e k = d R(mod(k,N)) , k = 0, 1, 2,..., E -2, E -1. The second specific example is... e k = d R(mod(k,M)) , k = 0, 1, 2, ..., E -2, E -1. The third specific example is... e k = d R(k) , k = 0, 1, 2, ..., E -2, E -1. The fourth specific example is:

[0191] The fifth specific example is:

[0192] The sixth specific example is:

[0193] 3.3.4.2 Rate matching operation including interleaving operation In some embodiments, the rate matching operation includes an interleaving operation. The interleaving operation includes: obtaining the interleaved input bit sequence by the first node, and determining the interleaved output bit sequence by the first node. y .

[0194] In some embodiments, the interleaved input bit sequence is the output of a polarization transform operation. In one embodiment, the interleaved input bit sequence is a portion of the output of a polarization transform operation. In one embodiment, the interleaved input bit sequence is the output of a center-aligned superposition operation. In one embodiment, the interleaved input bit sequence is a sequence of length [missing information]. N Polarization transform output bit sequence d = [ d 0, d 1, ..., d N-1 In some embodiments, the interleaved input bit sequence is of length […]. N Polarization transform output bit sequence d = [ d 0, d 1, ...,d N-1 ] before M bits, of which M This is the size of the interleaving buffer. In one embodiment, the interleaved output bit sequence... y = [ y 0, y 1, ..., y N-1 The length of the interleaved input bit sequence is equal to the length of the interleaved bit sequence. Specific examples are shown in Figures 9A and 9B.

[0195] In some embodiments, interleaving is performed using an interleaver pattern of length M. J = [ J 0, J 1, ..., J M-2 , J M-1 Determine and interleave the input bit sequence d = [ d 0, d 1, ..., d M-1 The corresponding interleaved output bit sequence y = [ y 0, y 1, ..., y M-1 ]for ,in i = 0, 1, 2, ..., M -2, M -1, interleaved output bit sequence y The i Each bit equals the interleaved input bit sequence. d = [ d 0, d 1, ..., d M-1 The first J i Bits. Interleaver mode. J It can be a sequence of integers [0, 1, 2, ..., M -2, M Arbitrary arrangement of [-1]. In one embodiment, M It is equal to the size of the polarization matrix. In one embodiment, M Equal to the interleaving buffer size. Interleaver mode. J = [ J 0, J 1, ..., J M-2 ,J M-1 The first specific example of ] is determined as follows:

[0196] Where π = [ π 0, π 1, π 2, π 3, π 4, π 5, π 6, π 7, π 8, π 9, π 10 , π 11 , π 12 , π 13 , π 14 , π 15 , π 16 , π 17 , π 18 , π 19 , π 20 , π 21 , π 22 , π 23 , π 24 , π 25 , π 26 , π 27 , π 28 , π 29 , π 30 , π 31 The sequence [0, 1, 2, 4, 3, 5, 6, 7, 8, 16, 9, 17, 10, 18, 11, 19, 12, 20, 13, 21, 14, 22, 15, 23, 24, 25, 26, 28, 27, 29, 30, 31] is the sub-block interleaver pattern. MThis refers to either the polarization matrix size or the interleaving buffer size. Interleaver mode. J = [ J 0, J 1,..., J M-2 , J M-1 The second specific example is the interleaver pattern. J Chinese index i and the i element J i The relationship between them satisfies the following quadratic form: Table 5 summarizes the parameters. f 1 and f 2 depends on M Some examples of (polarization matrix size or interleaving buffer size).

[0197] Table 5 Examples of interleaver parameters

[0198] Interleaver pattern J = [ J 0, J 1, ..., J M-2 , J M-1 The third specific example, M = 8, J = [ J 0, J 1, J 2, J 3, J 4, J 5, J 6, J 7] = [2, 5, 7, 1, 4, 3, 6, 0]. Interleaver pattern. J = [ J 0, J 1, ..., J M-2 , J M-1 The fourth specific example, M = 8, J = [ J 0, J 1, J 2, J 3, J 4, J 5, J 6, J7] = [0, 1, 2, 4, 3, 5, 6, 7].

[0199] In some embodiments, the interleaved input bit sequence is the output of a polarization transform operation. In one embodiment, the interleaved input bit sequence is the output of a center-aligned superposition operation. In some embodiments, the interleaved input bit sequence is the output of a polarization transform operation. In one embodiment, the interleaved input bit sequence is the output of a center-aligned superposition operation. In one embodiment, the interleaved input bit sequence is a polarization transform output bit sequence. In one embodiment, the interleaved input bit sequence is a center-aligned superposition output bit sequence. In one embodiment, the interleaved input bit sequence is a superposition bit sequence. h In some embodiments, the interleaved input bit sequence is a polarization transform output bit sequence. In one embodiment, the interleaved input bit sequence is a center-aligned superimposed output bit sequence. In another embodiment, the interleaved input bit sequence is a superimposed bit sequence. h .

[0200] 3.3.4.3 Rate matching operation including bit selection operation In some embodiments, the rate matching operation includes a bit selection operation. The bit selection operation includes: obtaining a bit selection input bit sequence by a first node, and determining a bit selection output bit sequence by the first node.

[0201] In some embodiments, the bit-selected input bit sequence is the output of an interleaving operation. In one embodiment, the bit-selected input bit sequence is the output of a polarization transform operation. In one embodiment, the bit-selected input bit sequence is the output of a center-aligned superposition operation. In one embodiment, the bit-selected input bit sequence is the interleaved output bit sequence. y In one embodiment, the bit selection input bit sequence is of length [length missing]. N Polarization transform output bit sequence d ,in N This is the size of the polarization matrix. In one embodiment, the bit-selected output bit sequence is of length [missing information]. H Center-aligned superimposed output bit sequence h = [ h 0, h 1, ..., h H-1 Specific examples are shown in Figures 9A, 9B, 9D, and 15A.

[0202] The first concrete example is that a bit selection operation determines the bit selection output bit sequence. e = [ e 0, e 1, ..., eE-1 Select the input bit sequence for the bit. d = [ d 0, d 1, ..., d N-1 The former in ] E bits, of which e k = d k , k = 0, 1,2, ..., E -2, E -1. E Not greater than N .

[0203] The second specific example is that the bit selection operation determines the bit selection output bit sequence. e = [ e 0, e 1, ..., e E-1 Select the input bit sequence for the bit. d = [ d 0, d 1, ..., d N-1 The last one in ] E bits, of which e k = d N-E+k , k = 0,1, 2, ..., E -2, E -1. E Not greater than N .

[0204] The third specific example is that the bit selection operation determines the bit selection output bit sequence. e = [ e 0, e 1, ..., e E-1 Select the input bit sequence for the bit. d = [ d 0, d 1, ..., d N-1 The repetition of bits in the middle, i.e. e k = d mod(k,N) , k = 0, 1, 2,..., E -2, E-1. E is not less than N.

[0205] The fourth specific example is determining the bit selection output bit sequence. e = [ e 0, e 1, ..., e E-1 Select the input bit sequence for the bit. d = [ d 0, d 1, ..., d N-1 From the index SE The beginning of the continuous E bits, that is, e k = d S-E+k , k = 0, 1,2, ..., E -2, E -1, where E Not greater than N and S Not less than E .

[0206] The fifth specific example is that the bit selection operation determines the bit selection output bit sequence. e = [ e 0, e 1, ..., e E-1 Select the input bit sequence for the bit. d = [ d 0, d 1, ..., d N-1 From the index S The repetition of the initial bit, i.e. e k = d mod(S+k,N) , k = 0, 1, 2, ..., E -2, E -1, S It is not greater than N A non-negative integer. In some embodiments, S = M - E .

[0207] In some embodiments, the bit selection input bit sequence is the polarization transform output bit sequence. d The former M bits, i.e., [ d 0,d 1, ..., d M-1 ],in M This is the size of the interleaving buffer. In one embodiment, the bit selection output bit sequence is of length [missing information]. E Output bit sequence e = [ e 0, e 1, ..., e E-1 ] .

[0208] The first concrete example is that the bit selection operation determines the bit selection output bit sequence. e = [ e 0, e 1, ..., e E-1 Select the input bit sequence for the bit selection. d 0, d 1, ..., d M-1 The former in ] E bits, that is, e k = d k , k = 0, 1, 2,..., E -2, E -1. E Not greater than M .

[0209] The second specific example is that the bit selection operation determines the bit selection output bit sequence. e = [ e 0, e 1, ..., e E-1 Select the input bit sequence for the bit selection. d 0, d 1, ..., d M-1 The last one in ] E bits, that is, e k = d N-E+k , k = 0, 1, 2,..., E -2, E -1. E Not greater than M .

[0210] The third specific example is that the bit selection operation determines the bit selection output bit sequence. e= [ e 0, e 1, ..., e E-1 Select the input bit sequence for the bit selection. d 0, d 1, ..., d M-1 The repetition of bits in ], that is, e k = d mod(k,N) , k = 0, 1, 2,..., E -2, E -1. E Not less than M .

[0211] The fourth specific example is determining the bit selection output bit sequence. e = [ e 0, e 1, ..., e E-1 Select the input bit sequence for the bit selection. d 0, d 1, ..., d M-1 From the index SE The beginning of the continuous E bits, that is, e k = d S-E+k , k = 0, 1, 2,..., E -2, E -1, where E Not greater than N and S Not less than E .

[0212] The fifth specific example is that the bit selection operation determines the bit selection output bit sequence. e = [ e 0, e 1, ..., e E-1 Select the input bit sequence for the bit selection. d 0, d 1, ..., d M-1 From the index S The repetition of the initial bit, i.e. e k = d mod(S+k,N) ,k = 0, 1, 2, ..., E -2, E -1, where, E Not less than M , S It is not greater than N A non-negative integer. In some embodiments, S = M - E .

[0213] In one embodiment, the bit selection input bit sequence is an interleaved output bit sequence. Examples are given in Figures 9A and 9B.

[0214] The first concrete example is bit selection determination bit selection output bit sequence. e = [ e 0, e 1, ..., e E-1 [This refers to the interleaved output bit sequence] y = [ y 0, y 1, ..., y M-1 The former in ] E bits, that is, e k = y k , k = 0, 1, 2, ..., E -2, E -1. E Not greater than M . M This is the size of the interleaving buffer.

[0215] The second specific example is bit selection determination bit selection output bit sequence. e = [ e 0, e 1, ..., e E-1 [This refers to the interleaved output bit sequence] y = [ y 0, y 1, ..., y M-1 The last one in ] E bits, that is, e k = y M-E+k , k = 0, 1, 2,..., E -2, E-1. E Not greater than N . M It is the size of the interleaving buffer.

[0216] The third specific example is that bit selection determines the output bit sequence. e = [ e 0, e 1, ..., e E-1 [This refers to the interleaved output bit sequence] y = [ y 0, y 1, ..., y M-1 The repetition of bits in the middle, that is, e k = d mod(k,N) , k = 0, 1, 2, ..., E -2, E -1. E Not less than M . M This is the size of the interleaving buffer.

[0217] The fourth specific example is determining the bit selection output bit sequence. e = [ e 0, e 1, ..., e E-1 [This refers to the interleaved output bit sequence] y = [ y 0, y 1, ..., y M-1 From the index SE The beginning of the continuous E bits, that is, e k = y S-E+k , k = 0, 1, 2,..., E -2, E -1, where E Not greater than N and S Not less than E .

[0218] The fifth specific example is that the bit selection operation determines the bit selection output bit sequence. e = [ e 0, e 1, ..., e E-1[This refers to the interleaved output bit sequence] y = [ y 0, y 1, ..., y M-1 From the index S The repetition of the initial bit, i.e. e k = y mod(S+k,N) , k = 0, 1, 2, ..., E -2, E -1, where, E Not less than M , S It is not greater than N A non-negative integer. In some embodiments, S = M - E .

[0219] In some embodiments, the bit-selected input bit sequence is the output of a polarization transform operation. In one embodiment, the bit-selected input bit sequence is the output of an interleaving operation. In another embodiment, the bit-selected input bit sequence is the output of a center-aligned superposition operation.

[0220] 3.3.5 Determine the extended bit operation The process of determining the extended bit includes: the first node acquiring the input bit sequence for determining the extended bit, and the first node replicating the bit index set. Determine the extended bit output bit sequence ,in Represents the set of bit indexes for replication The number of elements in It determines the length of the extended bit output bit sequence.

[0221] In some embodiments, the bit index set is copied. The elements in satisfy In some embodiments, there exists i > j , making In copying the bit index set middle.

[0222] In some embodiments, the extended bit input bit sequence is determined to be the output of a freeze bit addition operation. In one embodiment, the extended bit input bit sequence is determined to be the output of a rate analysis operation. In one embodiment, the extended bit input bit sequence is determined to be a freeze bit addition output bit sequence. In one embodiment, the extended bit input bit sequence is determined to be a rate analysis output bit sequence. In one embodiment, the extended bit input bit sequence is determined to be a pre-transformed input bit sequence. In one embodiment, the extended bit input bit sequence is determined to be a polarization transform input bit sequence or a pre-transformed input bit sequence. u = [ u 0, u 1, ..., u N-2 , u N-1 ],in N It is the size of the polarization matrix in the polarization transformation operation. In one embodiment, the bit index set is copied. In the addition of freeze bit operation or rate analysis operation, the data bit index set is... A subset of size K In the first specific example, the extended bit output bit sequence is determined. c ext The i bits It is a polarization transform input sequence u = [ u 0, u 1, ..., u N-2 , u N-1 The first j bits , ,Right now:

[0223] In the second specific example, the extended bit output bit sequence is determined. c ext The i bits It is a polarization transform input sequence u = [ u 0, u 1, ..., u N-2 , u N-1 The first j bits, Right now:

[0224] In some embodiments, the extended bit input bit sequence is determined to be a polarization transform input sequence. u = [ u 0, u 1,..., u N-2 , u N-1 ], and yes A subset of, in N It is the first polarization matrix The size of the polarization matrix, Is the size of the added freeze bit operation or rate analysis operation... K The data bit index set. In the first specific example, the extended bit output bit sequence is determined. c ext The i bits It is a polarization transform input sequence u = [ u 0, u 1, ..., u N-2 , u N-1 The first j bits , ,Right now:

[0225] In the second specific example, the extended bit output bit sequence is determined. c ext The i bits It is a polarization transform input sequence u = [ u 0, u 1, ..., u N-2 , u N-1 The first j bits, Right now:

[0226] In some embodiments, the extended bit input bit sequence is determined to be the input bit sequence. c = [ c 0, c 1, ..., c K-1 ], It is the second set of integers A subset of integers, the second set of integers includes all integers not greater than 1.K non-negative integers, where K It is the input bit sequence c The length of the extended bit output bit sequence is determined in the first specific example. c ext The i bits It is the input bit sequence c = [ c 0, c 1, ..., c K-1 The first j bits , ,Right now:

[0227] In the second specific example, the extended bit output bit sequence is determined. c ext The i bits It is the input bit sequence c = [ c 0, c 1, ..., c K-1 The first j bits , ,Right now:

[0228] 3.3.6 CRC Appending Operation CRC appending operations include: the first node obtaining a length of... CRC additional input bit sequence ; and generating polynomials through loops Determine the CRC additional output bit sequence length ,in and The coefficients are polynomials over GF(2), and CRC Additional Output Bit Sequence The former The bits are the CRC additional input bit sequence. ,back Each bit is a CRC bit (denoted as ). ),Right now: , .

[0229] The encoding is done in a systematic form, which means that in GF(2), the polynomial is: When divided by the corresponding cyclic generating polynomial When the remainder is 0, the remainder is equal to 0.

[0230] In some embodiments, the CRC appended input bit sequence is an input bit sequence. In one embodiment, the CRC appended input bit sequence is the output that determines the extended bit operation.

[0231] 3.3.7 Center Alignment and Overlay Operation The center alignment and overlay operation includes: the first node obtaining the first intermediate bit sequence. w = [ w 0, w 1, ..., w Nw-1 ] and the second intermediate bit sequence w ' = [ w '0, w '1, ..., w ' Nw'-1 ]; and the first node is determined to have a length of at least one of the following: H superimposed bit sequence h = [ h 0, h 1, ..., h H-1 ] : , , , in Nw It is the first intermediate bit sequence w Length, Nw' It is the second intermediate bit sequence w’ The length.

[0232] In some embodiments, the first intermediate bit sequence w = [ w 0, w 1, ..., w Nw-1 [Based on the first polarization matrix] A portion of the output of the polarization transform operation, wherein, Nw Not greater than the first polarization matrix Polarization matrix size N In one embodiment, the first intermediate bit sequence w = [ w 0, w 1, ..., w Nw-1[] is the output of the rate matching operation, i.e., the rate matching output bit sequence. e = [ e 0, e 1, ..., e E-1 Part of ], in which Nw Not greater than the rate-matched output bit sequence E The length of the first intermediate bit sequence. In some embodiments, the first intermediate bit sequence w = [ w 0, w 1, ..., w Nw-1 ] represents the output of the interleaving operation, i.e., the interleaved output bit sequence. y = [ y 0, y 1, ..., y N-1 Part of ], in which Nw Not greater than the size of the polarization matrix N In some embodiments, the first intermediate bit sequence w = [ w 0, w 1, ..., w Nw-1 [] is the output of the bit selection operation, that is, the bit sequence output by the bit selection operation. e = [ e 0, e 1, ..., e E-1 Part of ], in which Nw The length of the output bit sequence is not greater than the bit selection length. E .

[0233] In some embodiments, the second intermediate bit sequence w ' = [ w '0, w '1, ..., w ' Nw'-1 It is based on the second polarization matrix. A portion of the output of the polarization transform operation, wherein, Nw' Not greater than the second polarization matrix Polarization matrix size N' In one embodiment, the second intermediate bit sequence w ' = [ w '0, w '1, ..., w ' Nw'-1 [] is the output of the rate matching operation, i.e., the rate matching output bit sequence. e’ = [ e’0, e’ 1, ..., e’ E’-1 Part of ], in which Nw' Not greater than the length of the rate-matched output bit sequence E' In one embodiment, the second intermediate bit sequence w ' = [ w '0, w '1,..., w ' Nw'-1 ] represents the output of the interleaving operation, i.e., the interleaved output bit sequence. y’ = [ y’ 0, y’ 1, ..., y’ M-1 Part of ], in which Nw' No larger than the size of the interleaving buffer M In some embodiments, the second intermediate bit sequence w ' = [ w '0, w '1,..., w ' Nw'-1 ] is the output of the bit selection operation, that is, the bit sequence output by the bit selection operation. e’ = [ e’ 0, e’ 1, ..., e’ E-1 Part of ], in which Nw' The length of the output bit sequence is not greater than the bit selection length. E' .

[0234] In some embodiments, superimposed bit sequences h = [ h 0, h 1, ..., h H-1 The length of ] is equal to the second intermediate bit sequence. w The length of ', that is H = Nw' In one embodiment, a superimposed bit sequence is used. h = [ h 0, h 1, ..., h H-1 The length of ] is equal to the size of the polarization matrix. N' ,Right now H = N’ In one embodiment, a superimposed bit sequence is used. h = [ h 0, h 1, ..., hH-1 The length of ] is equal to the size of the interleaving buffer. M ,Right now H = M In some embodiments, bit sequences are superimposed. h = [ h 0, h 1, ..., h H-1 The length of ] is equal to the length of the bit selection output bit sequence. E' ,Right now H = E’ .

[0235] In some embodiments, superimposed bit sequences h = [ h 0, h 1, ..., h H-1 The length of ] is equal to the second intermediate bit sequence. w The length of ', that is .

[0236] In some embodiments, for Superimposed bit sequences h = [ h 0, h 1, ..., h H-1 The index in the middle is i bits It is the first intermediate bit sequence w = [ w 0, w 1, ..., w Nw-1 The index in the middle is bits With the second intermediate bit sequence w ' = [ w '0, w '1, ..., w ' Nw'-1 The index in the middle is bits Add to GF(2), that is,

[0237] In the first specific example... In the second specific example, In the third specific example, In the fourth specific example, Figure 8A shows a schematic diagram of the operation. In Figure 8A, the bit sequences are superimposed.h yes w and w The superposition of ', superimposed bit sequences h Length and w The lengths of ' are the same.

[0238] In some embodiments, for Superimposed bit sequences h = [ h 0, h 1, ..., h H-1 The index in ] is i bits Set as the second intermediate bit sequence w ' = [ w '0, w '1, ..., w ' Nw'-1 The index in the middle is bits ,for or In one embodiment, for Superimposed bit sequences h = [ h 0, h 1, ..., h H-1 The index in ] is i bits It is the first intermediate bit sequence w = [ w 0, w 1, ..., w Nw-1 The index in the middle is bits With the second intermediate bit sequence w ' = [ w '0, w '1, ..., w ' Nw'-1 The index in ] is bits On GF(2) The result of the addition is, , In the first specific example... In the second specific example, In the third specific example, In the fourth specific example, Figure 8B shows a schematic diagram of the operation. In Figure 8B, the bit sequences are superimposed.h yes w and w The superposition of ', superimposed bit sequences h Length and w The lengths of the ' bits are the same, and superposition occurs in the superimposed bit sequences. h The middle part, superimposed bit sequence h The top and bottom parts are respectively w Copy the top and bottom parts of '.

[0239] In some embodiments, for Superimposed bit sequences h = [ h 0, h 1, ..., h H-1 The index in the middle is i bits It is the first intermediate bit sequence w = [ w 0, w 1, ..., w Nw-1 The index in the middle is bits With the second intermediate bit sequence w ' = [ w '0, w '1, ..., w ' Nw'-1 The index in the middle is bits Add to GF(2), that is, , In the first specific example... In the second specific example, In the third specific example, In the fourth specific example, Figure 8C shows a schematic diagram of the operation. In Figure 8C, the bit sequences are superimposed. h yes w and w The superposition of ', superimposed bit sequences h Length and w The lengths of ' are the same. In Figure 8C, if w The length is less than w The length of ' allows for copying. w Once or multiple times, until w The total length of the copy and one or more copies is greater than w The superposition operation described in this section applies to... wand one or more copies and w '.

[0240] 3.3.8 Other Operations In some embodiments, the output bit sequence f It is the output of the rate matching operation. In one embodiment, the output bit sequence f The output of the bit selection operation. In one embodiment, the output is a bit sequence. f It is the output of repeated operations. In one embodiment, the output bit sequence f It is a superimposed bit sequence h = [ h 0, h 1, ..., h H-1 ].

[0241] 3.3.8.1 Channel interleaving after rate matching In some embodiments, the output bit sequence f = [ f 0, f 1, ..., f F-1 The channel interleaving operation further interleaves the data into a second output bit sequence. ,in F For the output sequence f The length of the channel interleaving operation and the length used are... F The interleaving operation is the same for different interleaving modes.

[0242] 3.3.8.2 Modulation after rate matching / channel interleaving In some embodiments, the output bit sequence f = [ f 0, f 1, ..., f F-1 The first output symbol sequence is further modulated using one of the following modulation methods. x = [ x 0, x 1, ..., x F / Qm-1 ] : π / 2 binary phase shift keying (π / 2-BPSK), binary phase shift keying (BPSK), quadrature phase shift keying (QPSK), quadrature amplitude modulation (QAM), phase shift keying (PSK), amplitude shift keying (ASK), or amplitude phase shift keying (APSK). Q m It is the modulation order.

[0243] In some embodiments, the second output bit sequence The first output symbol sequence is further modulated using one of the following modulation methods. x = [ x 0, x 1, ..., x F / Qm-1 ]: π / 2 binary phase shift keying (π / 2-BPSK), binary phase shift keying (BPSK), quadrature phase shift keying (QPSK), quadrature amplitude modulation (QAM), phase shift keying (PSK), amplitude keying (ASK), or amplitude phase shift keying (APSK). Q m It is the modulation order.

[0244] 3.3.8.3 Input bit sequence containing CRC bits In some embodiments, the input bit sequence c Includes cyclic generating polynomials with coefficients on GF(2). Definite Lcrc Cyclic Redundancy Check (CRC) bits and K - Lcrc Payload bits.

[0245] In some embodiments, the input bit sequence c From the first node through a length of K - Lcrc The effective payload sequence is generated by a cyclic generator polynomial with coefficients on GF(2). The CRC append operation is performed to determine this.

[0246] 3.4 Example 4: (w = e, w' = e', u -> cext, no ext crc, no pre-transformation) Example 4 is based on Example 3.

[0247] Figure 9A illustrates an embodiment of the disclosed new scheme, wherein the first node acquires a length of K input bit sequence c = [ c 0, c 1, ..., c K-1 ], and determine the length as F Output bit sequence f = [ f 0, f 1, ..., f F-1 As described below.

[0248] Step (1): Determine the first intermediate bit sequence as follows. w = [ w 0, w 1, ...,w Nw-1 ] : (1.1) Perform a bit freeze operation on the input bit sequence. c = [ c 0, c 1, ..., c K-1 Set as the first frozen bit input bit sequence, and by using the index set belonging to the first data bit set The index is i bits (Right now Set as input bit sequence c = [ c 0, c 1, ..., c K-1 bits in ] and will not belong to the first data bit index set index i bits (Right now ) is set to zero, thus determining the size as First data bit index set and the size of the first polarization matrix N Determine the length as N First frozen bit output bit sequence u =[ u 0, u 1, ..., u N-1 ], as shown below.

[0249]

[0250] Wherein, the size of the first polarization matrix N It is the first polarization matrix Size, k It is a sequence of bits no greater than the input bit sequence. K The length of the non-negative integer.

[0251] (1.2) Based on the first polarization matrix G (N) Perform a polarization transformation operation to output the first frozen bit sequence. u = [ u 0, u 1, ..., u N-1 [Set as the first polarization transform input bit sequence, and by using the first polarization transform input bit sequence] u With the first polarization matrix G(N) Multiplication, that is, d = u·G (N) The length is obtained as N First polarization transform output bit sequence d = [ d 0, d 1, ..., d N-1 ],in, N The first polarization matrix The size of the first polarization matrix, vector matrix multiplication is performed on GF(2).

[0252] (1.3) Based on the first interleaver pattern J = [ J 0, J 1, ..., J N-2 , J N-1 ] and the size of the first polarization matrix N Perform an interleaving operation to output the bit sequence of the first polarization transform. d = [ d 0, d 1, ..., d N-1 Set as the first interleaved input bit sequence and determine its length as... N First interleaved output bit sequence y = [ y 0, y 1, ..., y N-1 ]for ,in i = 0,1, 2, ..., N -2, N- 1, i.e., the first interleaved output bit sequence y The i The number of bits equals the first interleaved input bit sequence. d = [ d 0, d 1, ..., d N-1 The first J i 1 bit.

[0253] (1.4) Perform a bit selection operation to output the first interleaved bit sequence. y = [ y 0, y 1, ..., y N-1The first bit is set as the input bit sequence, and its length is determined by one of the following methods: E First bit selection output bit sequence e = [ e 0, e 1, ..., e E-1 ] : (i) Select the first bit to output the bit sequence e = [ e 0, e 1, ..., e E-1 Set as the first bit to select the input bit sequence. y = [ y 0, y 1, ..., y N-1 The former in ] E bits, that is, e k = y k , k = 0, 1, 2, ..., E -2, E -1, that is, select the first bit to output the bit sequence. e The k The first bit is set as the first bit to select the input bit sequence. y The k bits, of which E Not greater than N ; (ii) Select the first bit to output the bit sequence e = [ e 0, e 1, ..., e E-1 Set as the first bit to select the input bit sequence y = [ y 0, y 1, ..., y N-1 The last one in ] E bits, that is e k = y N-E+k , k = 0, 1, 2, ..., E -2, E -1, which is the first bit selection output bit sequence. e The k The first bit is set as the first bit to select the input bit sequence.y The ( N - E + k ) bits, of which, E Not greater than N ; (iii) Select the first bit to output the bit sequence e = [ e 0, e 1, ..., e E-1 Set the first bit to select the input bit sequence y. y = [ y 0, y 1, ..., y N-1 The repetition of bits in ], i.e. e k = y mod(k,N) , k = 0, 1, 2, ..., E -2, E -1, which is the first bit selection output bit sequence. e The k The first bit is set as the first bit to select the input bit sequence. y The mod( k , N ) bits, of which E Not less than N .

[0254] Among them, the first intermediate bit sequence w = [ w 0, w 1, ..., w Nw-1 [ is the first bit selection output bit sequence] e =[ e 0, e 1, ..., e E-1 That is, the first intermediate bit sequence. w The k bits w k Set the first bit to select the output bit sequence e The k bits e k ,Right now, w k = e k , k = 0, 1, 2, ..., Nw -2, Nw -1; First intermediate bit sequence w The length is the first bit selected output bit sequence e The length.

[0255] Step (2): Determine the second intermediate bit sequence in the following manner. w' = [ w' 0, w' 1, ..., w' Nw'-1 ] : (2.1) Based on size Copy bit index set Perform a determined bit extension operation, adding the first frozen bit to the output bit sequence. u = [ u 0, u 1, ..., u N-1 Set to determine the extended bit input sequence, and determine the extended bit output bit sequence. c ext The i bits Set as the first to add frozen bits to the output bit sequence u = [ u 0, u 1, ..., u N-2 , u N-1 The first j The length is determined by bits. Determine the extended bit output bit sequence ,in, ,Right now:

[0256] Among them, the copy bit index set It is the first data bit index set A subset of.

[0257] (2.2) Perform the add freeze bit operation to determine the extended bit input sequence. Set it as the second added frozen bit input bit sequence, and set the index of the second data bit index set as... i bits (Right now Set as the second added frozen bit input bit sequence bits in and will not belong to the second data bit index set The index isi bits (Right now ) is set to zero, thus determining the size as Second data bit index set Second polarization matrix size Determine the length as The second addition of frozen bits to the input bit sequence As shown below:

[0258] Wherein, the size of the second polarization matrix It is the second polarization matrix Size, k It is a non-negative integer, not greater than the second added frozen bit input bit sequence. The length.

[0259] (2.3) Based on the second polarization matrix Perform a polarization transformation operation to add a second frozen bit to the output bit sequence. Set as the input bit sequence for the second polarization transform, and set the input bit sequence for the second polarization transform. Multiply with the second polarization matrix ,Right now To determine the length as The second polarization transform output bit sequence ,in, It is the second polarization matrix The size of the vector matrix is ​​determined, and the vector-matrix multiplication is performed on GF(2).

[0260] (2.4) Based on the second interleaver mode Second polarization matrix size Interleaving is performed to output the second polarization transform bit sequence. Set as the second interleaved input bit sequence, and set the length to be The second interleaved output bit sequence Determined as -1, which is the second interleaved output bit sequence The i The bits are set as the second interleaved input bit sequence. The 1 bit.

[0261] (2.5) Perform a bit selection operation to output the second interleaved bit sequence. Set the second bit to select the input bit sequence, and determine the length using one of the following methods. The second bit selection output bit sequence : (i) Select the second bit to output the bit sequence Set as the second bit to select the input bit sequence The former bits, that is 1, that is, select the second bit to output the bit sequence. The k The first bit is set as the second bit to select the input bit sequence. The k bits, of which Not greater than ; (ii) Select the second bit to output the bit sequence Set as the second bit to select the input bit sequence The end bits, that is That is, the second bit is used to select the output bit sequence. The k The first bit is set as the second bit to select the input bit sequence. The bits, of which Not greater than ; (iii) Select the second bit to output the bit sequence Set as the second bit to select the input bit sequence The repetition, that is That is, the second bit is used to select the output bit sequence. The k The first bit is set as the second bit to select the input bit sequence. The bits, of which Not less than ; (iv) Select the second bit to output the bit sequence Set as the second bit to select the input bit sequence From the index The beginning of the continuous bits, that is ,in Not greater than and Not less than ; (v) Select the second bit to output the bit sequence Set as the second bit to select the input bit sequence From the index The beginning of the continuous bits, that is ,in Not greater than and Not less than ; (vi) Select the second bit to output the bit sequence Set from index The second bit of the initial selection input bit sequence The repetition of bits in, i.e. ,in, It is a non-negative integer not greater than N.

[0262] (vii) Select the second bit to output the bit sequence The first in k The first bit is set as the second bit to select the input bit sequence. The first in bits, that is ; (viii) Select the second bit to output the bit sequence The first in k The first bit is set as the second bit to select the input bit sequence. The first in bits, that is ; (viii) Select the second bit to output the bit sequence The first in k The first bit is set as the second bit to select the input bit sequence. The first in bits, that is ; Among them, the second intermediate bit sequence It is the second bit selection output bit sequence That is, the second intermediate bit sequence w The k bits Set the second bit to select the first bit of the output bit sequence k bits ,Right now 1; Second intermediate bit sequence w The length is the second bit selected output bit sequence The length.

[0263] Step (3): The first intermediate bit sequence is processed using one of the following methods. and the second intermediate bit sequence Perform a center alignment and overlay operation to determine the overlay bit sequence. : (1) For Superimposed bit sequences The index is i The bits are the first intermediate bit sequence The index is bits With the second intermediate bit sequence The index is bits Add over GF(2), that is, , in, It is a superimposed bit sequence The length, and ; It equals one of the following values: .

[0264] (2) For Superimposed bit sequences The index is i bits Set as the second intermediate bit sequence w ' = [ w '0, w '1, ..., w ' Nw'-1 The index in the middle is bits ,in or .for Superimposed bit sequences The index is i bits It is the first intermediate bit sequence The index is bits With the second intermediate bit sequence The index is bits Add them over GF(2), where, ,Right now, , in, It is a superimposed bit sequence The length, and ; It equals one of the following values: .

[0265] (3) For Superimposed bit sequences The index is i bits It is the first intermediate bit sequence The index is bits With the second intermediate bit sequence The index is bits Add over GF(2), that is, , in, It is a superimposed bit sequence The length, and ; It equals one of the following values: .

[0266] Step (4): The length is determined to be F Output bit sequence f = [ f 0, f 1, ..., f F-1 [ is a length of] superimposed bit sequence ,Right now f = h and F = H .

[0267] Then, the first node sends the output bit sequence to the second node. f = [ f 0, f 1, ..., f F-1 [The signal].

[0268] It should be noted that the above steps can be used in an IR-HARQ communication system as follows: In the initial transmission, the first node sends a sequence of first bit selection output bits to the second node. e The signal; in retransmission, the first node sends a sequence of output bits. f The signal. The first bit selects the output bit sequence. e It is the first redundant version (usually denoted as RV0), which outputs a bit sequence. f This is the second redundant version (typically denoted as RV1). Similarly, the steps in the remaining embodiments of this disclosure can also be used in IR-HARQ communication systems.

[0269] 3.5 Example 5: (w = e, w' = e', c -> c) ex (No ext CRC, no pre-transformation) Example 5 is based on Example 3 and Example 4.

[0270] Figure 9B shows an embodiment of the disclosed new solution, wherein the only difference from embodiment 4 is the execution method of step (2.1) as follows: (2.1) Based on size Copy bit index set Perform a deterministic bit extension operation on the input bit sequence. c = [ c 0, c 1, ..., c K-1 Set to determine the extended bit input sequence, and determine the extended bit output bit sequence. c ext The i bits Set as input bit sequence c = [ c 0, c 1, ..., c K-1 The first j bits ,in To determine the length as Determine the extended bit output bit sequence ,Right now,

[0271] in, It is the second set of integers A subset of; Including all not greater than K non-negative integers; K It is the input bit sequence c The length.

[0272] Figure 10 shows the BLER simulation results for a specific example of Figure 9B, where the parameter values ​​are taken from Table 6, and other settings are as follows: Input bit sequence c include Lcrc = 19 cyclic redundancy check (CRC) bits, whose coefficients are taken from the cyclic generator polynomial over GF(2). ,as well as K - Lcrc =64 payload bits determined; First interleaver mode J = [ J 0, J 1, ..., J N-2 , J N-1 Determine as follows:

[0273] Second interleaver mode Determine as follows:

[0274] Where π = [ π 0, π 1, π 2, π 3, π 4, π 5, π 6, π 7, π 8, π 9, π 10 , π 11 , π 12 , π 13 , π 14 , π 15 , π 16 , π 17 , π 18 , π 19 , π 20 , π 21 , π 22 , π 23 , π 24 , π 25 , π 26 , π 27 , π 28 , π 29 , π 30 , π 31The sequence is defined as [0, 1, 2, 4, 3, 5, 6, 7, 8, 16, 9, 17, 10, 18, 11, 19, 12, 20, 13, 21, 14, 22, 15, 23, 24, 25, 26, 28, 27, 29, 30, 31]. It can be shown that the performance of the newly disclosed scheme (solid line) is superior to the scheme in the existing IV standard (dashed line), where the output bit sequence... f = [ f 0, f 1, ..., f F-1 The signal is QPSK modulated and transmitted over an AWGN channel. Note that all simulation results in this disclosure are for receiving the first bit and selecting the output bit sequence. e (or first rate matched output bit sequence) and output bit sequence f The situations of both.

[0275] Table 6 shows the specific example settings corresponding to the embodiment shown in Figure 9B.

[0276] 3.6 Example 6: (w = e, w' = e', u ->cext, with ext crc, no pre-transformation) Example 6 is based on Example 3 and Example 4.

[0277] Figure 9C illustrates an embodiment of the disclosed new scheme.

[0278] Compared to Example 4, the first difference is that for the first intermediate bit sequence w = [ w 0, w 1, ..., w Nw-1 Steps (1.3) and (1.4) are combined into the following new step (1.3).

[0279] (1.3) Based on first-order rate matching index set R = <R (0), R (1), ..., R ( N r -2), R ( N r -1) > Perform a rate matching operation to output the bit sequence of the first polarization transform. d = [ d 0, d 1, ..., d N-1Set the input bit sequence to a first-order rate-matched sequence, and determine the length of the input bit sequence by one of the following methods: E First-order rate-matched output bit sequence e = [ e 0, e 1,..., e E-1 ]: (i) Match the first rate to the output bit sequence e The i Each bit is set as the first rate-matching input bit sequence. d = [ d 0, d 1, ..., d N-1 The first R(i) bits, that is ; (ii) Match the first rate to the output bit sequence e The i Each bit is set as the first rate-matching input bit sequence. d = [ d 0, d 1, ..., d N-1 The first R (mod( i , N )) bits, that is ; in N r It is the size of the first ordered rate matching index set. N r equal N and E The minimum value between, that is, N r = min( N , E ); N It is the first polarization matrix Size; E It is the length of the first rate-matched output bit sequence. The first intermediate bit sequence. w = [ w 0, w 1, ..., w Nw-1 [ is the first rate-matched output bit sequence] e = [ e 0, e 1, ..., e E-1 That is, the first intermediate bit sequence. wThe k bits w k It is the first rate-matched output bit sequence e The k bits e k ,Right now w k = e k , k = 0,1, 2, ..., Nw -2, Nw -1; First intermediate bit sequence w The length is the first rate-matched output bit sequence e The length.

[0280] The second difference from Example 4 is that, for the second intermediate bit sequence w' = [ w' 0, w' 1, ..., w' Nw'-1 Step (2) is the following new step (2).

[0281] (2.1) Based on size Copy bit index set Perform a determined bit extension operation, adding the first frozen bit to the output bit sequence. u = [ u 0, u 1, ..., u N-1 Set to determine the extended bit input sequence, and determine the extended bit output bit sequence. c ext The i bits Set as the first to add frozen bits to the output bit sequence u = [ u 0, u 1, ..., u N-2 , u N-1 The first j bits To determine the length as Determine the extended bit output bit sequence ,in, ,Right now:

[0282] Among them, the copy bit index set It is the first data bit index set A subset of.

[0283] (2.2) Perform the CRC append operation to determine the extended bit input sequence. Set the length to CRC additional input bit sequence And generate polynomials through loops. The length is determined to be CRC additional output bit sequence This causes the CRC to add an output bit sequence. The former These bits are the CRC additional input bit sequence. ,back Each bit is represented as The CRC bits, that is, for , for .

[0284] The encoding is done in a systematic form, which means that in GF(2), the polynomial is: When divided by the corresponding CRC generator polynomial The remainder is 0, where ,and The coefficients are polynomials over GF(2). .

[0285] (2.3) Perform the operation of adding frozen bits to append the CRC to the output bit sequence. Set it as the second added frozen bit input bit sequence, and set the index of the second data bit index set as... i bits (Right now Set as the second added frozen bit input bit sequence bits in and will not belong to the second data bit index set The index is i bits (Right now ) is set to zero, thus determining the size as Second data bit index set Second polarization matrix size Determine the length as The second addition of frozen bits to the input bit sequence As shown below:

[0286] Wherein, the size of the second polarization matrix It is the second polarization matrix Size, k It is a non-negative integer, not greater than the second added frozen bit input bit sequence. The length.

[0287] (2.4) Based on the second polarization matrix Perform a polarization transformation operation to add a second frozen bit to the output bit sequence. Set as the input bit sequence for the second polarization transform, and set the input bit sequence for the second polarization transform. With the second polarization matrix Multiplication, that is To determine the length as The second polarization transform output bit sequence ,in, It is the second polarization matrix The size of the vector matrix is ​​determined, and the vector-matrix multiplication is performed on GF(2).

[0288] (2.5) Based on the second ordered rate matching index set R' = <R’ (0), R’ (1), ..., R’ ( N r’ -2), R’ ( N r’ -1) > Perform a rate-matching operation to output the second polarization transform bit sequence. Set as the second rate-matched input bit sequence, and determine the length by one of the following methods: Second rate-matched output bit sequence : (i) Match the second rate to the output bit sequence The i Each bit is set as the second rate-matching input bit sequence. The R’ ( i ) bits, that is ; (ii) Match the second rate to the output bit sequence The i Each bit is set as the second rate-matching input bit sequence. The R’ (mod( i , N’ )) bits, that is ; in N r’ It is the size of the second ordered rate matching index set. N r’ equal N’ and E’ The minimum value between, i.e. N r’ =min( N’ , E’ ); N’ It is the second polarization matrix The size of the polarization matrix; E’ It is the second rate-matched output bit sequence The length of the second intermediate bit sequence. It is the second rate-matched output bit sequence That is, the second intermediate bit sequence w The k bits Set as the second rate-matched output bit sequence The k 1 bit, that is 1; Second intermediate bit sequence w The length is the second rate-matched output bit sequence The length.

[0289] It should be noted that the above steps can be used in an IR-HARQ communication system as follows: In the initial transmission, the first node sends a sequence of first rate-matched output bits to the second node. e The signal; in retransmission, the first node sends a sequence of output bits. f The signal. First rate-matched output bit sequence. e It is the first redundant version (usually denoted as RV0), which outputs a bit sequence. f This is the second redundant version (typically denoted as RV1). Similarly, the steps in the remaining embodiments of this disclosure can also be used in IR-HARQ communication systems.

[0290] 3.7 Example 7: (w = e, w' = e', v -> cext, no ext crc, with pre-transformation) Example 7 is based on Example 3.

[0291] Figure 9D illustrates an embodiment of the disclosed novel scheme, wherein the second node receives an output bit sequence sent by the first node. f = [ f 0, f 1, ..., f F-1 [The signal, and determine the input bit sequence] c = [ c 0, c1, ..., c K-1 The estimated value of ], where the length is F Output bit sequence f = [ f 0, f 1, ..., f F-1 ] is of length superimposed bit sequence Superimposed bit sequences The first node obtains the first intermediate bit sequence. Second intermediate bit sequence The center alignment overlay operation is determined by one of the following methods: (1) For Superimposed bit sequences The index is i bits It is the first intermediate bit sequence The index is bits With the second intermediate bit sequence The index is bits Add over GF(2), that is, , in, It is a superimposed bit sequence The length, and ; It equals one of the following values: .

[0292] (2) For Superimposed bit sequences The index is i bits Set as the second intermediate bit sequence w ' = [ w '0, w '1, ..., w ' Nw'-1 The index in the middle is bits ,in or .for Superimposed bit sequences The index is i bits It is the first intermediate bit sequence The index is bits With the second intermediate bit sequence The index is bits Add them over GF(2), where, ,Right now, , in, It is a superimposed bit sequence The length, and ; It equals one of the following values: .

[0293] (3) For Superimposed bit sequences The index is i bits It is the first intermediate bit sequence The index is bits With the second intermediate bit sequence The index is bits Add over GF(2), that is, , in, It is a superimposed bit sequence The length, and ; It equals one of the following values: .

[0294] First intermediate bit sequence w = [ w 0, w 1, ..., w Nw-1 The first node is determined through the following steps 1.1 to 1.4.

[0295] (1.1) Perform rate analysis operation on the input bit sequence. c = [ c 0, c 1, ..., c K-1 The input bit sequence is set to the first rate for analysis, and the first data bit index set is used to determine the input bit sequence. The index is i bits (Right now Set as input bit sequence c = [ c 0, c 1, ..., cK-1 bits in ] and will not belong to the first data bit index set index i bits (Right now ) is set to zero, thus determining the size as First data bit index set and the size of the first polarization matrix N Determine the length as N First rate analysis bit output bit sequence v = [ v 0, v 1, ..., v N-1 ], as shown below.

[0296]

[0297] Wherein, the size of the first polarization matrix N It is the first polarization matrix Size, k It is a sequence of bits no greater than the input bit sequence. K The length of the non-negative integer.

[0298] (1.2) Perform a pre-transformation operation to convert the first rate analysis output bit sequence. v = [ v 0, v 1, ..., v N-1 Set as the first pre-transformed input bit sequence, and determine its length by one of the following methods: N First pre-transformed output bit sequence u = [ u 0, u 1, ..., u N-1 ] : (i) Based on the first generating polynomial over GF(2) g ( D ) = g 0+ g 1· D + ... + g m-1 · D m-1 + g m · D m In, or based on the first generated bit sequence g = [ g 0, g1, ..., g m ], for the pre-transformed input bit sequence v = [ v 0, v 1,..., v N-1 Perform a convolution transformation to obtain the first pre-transformed output bit sequence. u = [ u 0, u 1, ..., u N-1 ],in m This is the first memory length. A concrete example of a convolutional transformation is...

[0299] (ii) The first pre-transformed input bit sequence v With the second pre-transformation matrix of N rows and N columns T Multiplication, that is u= v·T , where vector-matrix multiplication is performed on GF(2); (iii) Freeze the first pre-transformed bit sequence r With the first pre-transformed input bit sequence v and the second pre-transformation matrix with N rows and N columns T Add the products together, that is, u=v·T+r Vector-matrix multiplication is performed on GF(2), and vector-to-vector addition is performed on GF(2). The first pre-transformation freezes the bit sequence. r The length is equal to the size of the first polarization matrix. N ; (1) Perform one of the example algorithms shown in Table 2 by at least one of the following: first generating bit sequence g = [ g 0, g 1, ..., g m The first generating polynomial on GF(2) g ( D ) = g 0+ g 1· D + ... + g m-1 · D m-1 + g m · D m First pre-transform input index set First pre-transform output index set First pre-transformed frozen bit sequence r ,in m It is the length of the first memory; (2) Perform one of the example algorithms shown in Table 3 by at least one of the following: first recursive feedback bit sequence q = [ q 0, q 1, ..., q m ], the first recursive feedback polynomial on GF(2) q ( D ) = q 0+ q 1· D + ... + q m-1 · D m-1 + q m · D m First pre-transform input index set First pre-transform output index set First pre-transformed frozen bit sequence r ,in m It is the length of the first memory; (3) Perform one of the example algorithms shown in Table 4 by at least one of the following: generating a bit sequence g =[ g 0, g 1, ..., g m Generating polynomials on GF(2) g ( D ) = g 0+ g 1· D + ... + g m-1 · D m-1 + g m · D m Recursive feedback bit sequence q q = [ q 0, q 1, ..., q m ], recursive feedback polynomial on GF(2) q ( D ) = q 0+ q 1· D+ ... + q m-1 · D m-1 + q m · D m First pre-transform input index set First pre-transform output index set First pre-transformed frozen bit sequence r , length is m +1 first state bit sequence t = [ t 0, t 1, ..., t m-1 , t m ] ,in m This is the length of the first memory.

[0300] (1.3) Based on the first polarization matrix G (N) Perform a polarization transformation operation to output the first pre-transformed output bit sequence. u = [ u 0, u 1, ..., u N-1 [Set as the first polarization transform input bit sequence, and by using the first polarization transform input bit sequence] u With the first polarization matrix G (N) Multiplication, that is, d = u·G (N) The length is obtained as N First polarization transform output bit sequence d = [ d 0, d 1, ..., d N-1 ],in, N The first polarization matrix The size of the first polarization matrix, vector matrix multiplication is performed on GF(2).

[0301] (1.4) Perform a bit selection operation to output the bit sequence of the first polarization transform. d = [ d 0, d 1, ..., d N-1 The first bit is set as the input bit sequence, and its length is determined by one of the following methods: E First bit selection output bit sequencee = [ e 0, e 1, ..., e E-1 ] : (i) Select the first bit to output the bit sequence e = [ e 0, e 1, ..., e E-1 Set as the first bit to select the input bit sequence. d = [ d 0, d 1, ..., d N-1 The former in ] E bits, that is, e k = d k , k = 0, 1, 2, ..., E -2, E -1, that is, select the first bit to output the bit sequence. e The k The first bit is set as the first bit to select the input bit sequence. d The k bits, of which E Not greater than N ; (ii) Select the first bit to output the bit sequence e = [ e 0, e 1, ..., e E-1 Set as the first bit to select the input bit sequence d = [ d 0, d 1, ..., d N-1 The last one in ] E bits, that is e k = d N-E , k = 0, 1, 2, ..., E -2, E -1, which is the first bit selection output bit sequence. e The k The first bit is set as the first bit to select the input bit sequence. d The ( N - E + k) bits, of which, E Not greater than N ; (iii) Select the first bit to output the bit sequence e = [ e 0, e 1, ..., e E-1 Set as the first bit to select the input bit sequence. d = [ d 0, d 1, ..., d N-1 The repetition of bits in ], i.e. e k = d mod(k,N) , k = 0, 1, 2, ..., E -2, E -1, which is the first bit selection output bit sequence. e The k The first bit is set as the first bit to select the input bit sequence. d The mod( k , N ) bits, of which E Not less than N .

[0302] Among them, the first intermediate bit sequence w = [ w 0, w 1, ..., w Nw-1 [ is the first bit selection output bit sequence] e =[ e 0, e 1, ..., e E-1 That is, the first intermediate bit sequence. w The k bits w k Set the first bit to select the output bit sequence e The k bits e k ,Right now, w k = e k , k = 0, 1, 2, ..., Nw -2, Nw -1; First intermediate bit sequence wThe length is the first bit selected output bit sequence e The length.

[0303] Second intermediate bit sequence w' = [ w' 0, w' 1, ..., w' Nw'-1 The first node is determined through the following steps 2.1 to 2.5.

[0304] (2.1) Based on size Copy bit index set Perform a deterministic bit extension operation to output the first rate analysis bit sequence. v = [ v 0, v 1, ..., v N-1 Set to determine the extended bit input sequence, and determine the extended bit output bit sequence. c ext The i bits Set as the first rate to analyze the output bit sequence v = [ v 0, v 1, ..., v N-1 The first j bits ,in To determine the length as Determine the extended bit output bit sequence ,Right now,

[0305] Among them, the copy bit index set It is the first data bit index set A subset of.

[0306] (2.2) Perform rate analysis to determine the extended bit input sequence. Set the input bit sequence to the second rate analysis and assign it to the second data bit index set. The index is i bits (Right now ) is set to determine the extended bit output sequence bits in and will not belong to the second data bit index set The index is i bits (Right now ) is set to zero, thus determining the size as Second data bit index set Second polarization matrix size Determine the length as Second rate analysis output bit sequence As shown below:

[0307] Wherein, the size of the second polarization matrix It is the second polarization matrix Size, k It is a non-negative integer, not greater than the second-rate input bit sequence. The length.

[0308] (2.3) Perform a pre-transformation operation to convert the second rate analysis output bit sequence. Set as the second pre-transformed input bit sequence, and determine its length by one of the following operations (i) to (vi). The second pre-transformed output bit sequence : (i) The second generating polynomial based on GF(2) Or the second generated bit sequence For the second pre-transformed input bit sequence Perform a convolution transformation to obtain the second pre-transformed output bit sequence. ,in This is the second memory length. A concrete example of a convolutional transform is...

[0309] (ii) The second pre-transformed input bit sequence and OK The second pre-transformation matrix of the column Multiplication, that is , where vector-matrix multiplication is performed on GF(2); (iii) Freeze the second pre-transformed bit sequence r With the second pre-transformed input bit sequence and OK The second pre-transformation matrix of the column Add the products together, that is, Vector-matrix multiplication is performed on GF(2), and vector-to-vector addition is performed on GF(2). The second pre-transformation freezes the bit sequence. The length is equal to the size of the second polarization matrix. ; (iv) Perform one of the example algorithms shown in Table 2 by at least one of the following: second generated bit sequence The second generating polynomial on GF(2) Second pre-transform input index set Second pre-transform output index set Second pre-transformed frozen bit sequence ,in It is the length of the second memory; (v) Perform one of the example algorithms shown in Table 3 by at least one of the following: second recursive feedback bit sequence The second recursive feedback polynomial on GF(2) Second pre-transform input index set Second pre-transform output index set Second pre-transformed frozen bit sequence ,in It is the length of the second memory; (vi) Perform one of the example algorithms shown in Table 4 by at least one of the following: second generated bit sequence The second generating polynomial on GF(2) Second recursive feedback bit sequence The second recursive feedback polynomial on GF(2) Second pre-transform input index set Second pre-transform output index set Second pre-transformed frozen bit sequence , length is Second state bit sequence ,in It is the length of the second memory; In some specific examples, the second generator polynomial Equal to the first generator polynomial In some specific examples, the second generator polynomial Not equal to the first generator polynomial In some specific examples, the second generated bit sequence Equal to the first generated bit sequence In some specific examples, the second generated bit sequence Not equal to the first generated bit sequence In some specific examples, the second recursive feedback bit sequence Equal to the first recursive feedback bit sequence In some specific examples, the second recursive feedback bit sequence With the first recursive feedback bit sequence They are not equal. In some specific examples, the second recursive feedback polynomial... Equal to the first recursive feedback polynomial In some specific examples, the second recursive feedback polynomial Not equal to the first recursive feedback polynomial .

[0310] (2.4) Based on the second polarization matrix Perform a polarization transformation operation to output the second pre-transform bit sequence. Set as the input bit sequence for the second polarization transform, and set the input bit sequence for the second polarization transform. With the second polarization matrix Multiplication, that is To determine the length as The second polarization transform output bit sequence ,in, It is the second polarization matrix The size of the vector matrix is ​​determined, and the vector-matrix multiplication is performed on GF(2).

[0311] (2.5) Perform a bit selection operation to output the bit sequence of the second polarization transform. Set the second bit as the input bit sequence and determine the length by one of the following operations (i) to (ix). The second bit selection output bit sequence : (i) Select the second bit to output the bit sequence Set as the second bit to select the input bit sequence The former bits, that is That is, the second bit is used to select the output bit sequence. The k The first bit is set as the second bit to select the input bit sequence. The k bits, of which Not greater than ; (ii) Select the second bit to output the bit sequence Set as the second bit to select the input bit sequence The end bits, that is That is, the second bit is used to select the output bit sequence. The k The first bit is set as the second bit to select the input bit sequence. The bits, of which Not greater than ; (iii) Select the second bit to output the bit sequence Set as the second bit to select the input bit sequence The repetition, that is That is, the second bit is used to select the output bit sequence. The k The first bit is set as the second bit to select the input bit sequence. The bits, of which Not less than ; (iv) Select the second bit to output the bit sequence Set as the second bit to select the input bit sequence From the index The beginning of the continuous bits, that is ,in Not greater than and Not less than ; (v) Select the second bit to output the bit sequence Set as the second bit to select the input bit sequence From the index The beginning of the continuous bits, that is ,in Not greater than and Not greater than ; (vi) Select the second bit to output the bit sequence Set from index The second bit of the initial selection input bit sequence The repetition of bits in, i.e. ; (vii) Select the second bit to output the bit sequence The first in k The first bit is set as the second bit to select the input bit sequence. The first in bits, that is ;in, It is the first bit selection output bit sequence Length; (viii) Select the second bit to output the bit sequence The first in k The first bit is set as the second bit to select the input bit sequence. The first in bits, that is ; (ix) Select the second bit to output the bit sequence The first in k The first bit is set as the second bit to select the input bit sequence. The first in bits, that is ;in, It is the first bit selection output bit sequence Length; Among them, the second intermediate bit sequence It is the second bit selection output bit sequence That is, the second intermediate bit sequence w The k bits Set as the second bit to select the output bit sequence The k bits ,Right now 1; Second intermediate bit sequence w The length is the second bit selected output bit sequence The length.

[0312] 3.8 Example 8: (w = y, w' = e', u -> cext, no ext crc, no pre-transformation) Example 8 is based on Examples 3 and 4.

[0313] Figure 11A illustrates an embodiment of the disclosed new scheme, wherein the only difference from embodiment 4 is that the first node will use the first intermediate bit sequence w = [ w 0, w 1, ..., w Nw-1 The length is determined to be... N First interleaved output bit sequence y That is, the first intermediate bit sequence w The k bits w k Set as the first interleaved output bit sequence y The kth bit y k ,Right now, w k = y k , k = 0, 1, 2, ..., Nw -2, Nw -1, where, Nw It is the first intermediate bit sequence w The length, and NwSet as the first interleaved output bit sequence y The length, i.e. Nw = N . N It is the first polarization matrix Size.

[0314] Figure 12 shows the BLER simulation results for a specific example of Figure 11A, where the parameter values ​​are taken from Table 7, and other settings are as follows: Input bit sequence c include Lcrc = 19 cyclic redundancy check (CRC) bits, whose coefficients are taken from the cyclic generator polynomial over GF(2). ,as well as K - Lcrc = 80 payload bits determined; first interleaver mode J = [ J 0, J 1, ..., J N-2 , J N-1 Determine as follows:

[0315] Second interleaver pattern Determined in the following ways

[0316] Where π = [ π 0, π 1, π 2, π 3, π 4, π 5, π 6, π 7, π 8, π 9, π 10 , π 11 , π 12 , π 13 , π 14 , π 15 , π 16 , π 17 , π 18 , π 19 ,π 20 , π 21 , π 22 , π 23 , π 24 , π 25 , π 26 , π 27 , π 28 , π 29 , π 30 , π 31 The sequence is defined as [0, 1, 2, 4, 3, 5, 6, 7, 8, 16, 9, 17, 10, 18, 11, 19, 12, 20, 13, 21, 14, 22, 15, 23, 24, 25, 26, 28, 27, 29, 30, 31]. It can be shown that the performance of the newly disclosed scheme (solid line) is superior to the scheme in the existing IV standard (dashed line), where the output bit sequence... f = [ f 0, f 1, ..., f F-1 It is QPSK modulated and transmitted through an AWGN channel.

[0317] Table 7 Figure 11A Setting up specific examples corresponding to the implementation embodiments

[0318] 3.9 Example 9: (w = y, w' = e', v -> cext, no ext CRC, with pre-transformation) Example 9 is based on Example 3.

[0319] Figure 11B illustrates an embodiment of the disclosed new scheme, wherein the first node acquires a length of K input bit sequence c = [ c 0, c 1, ..., c K-1 ], and determine the length as F Output bit sequence f = [ f 0, f 1, ..., f F-1As described below.

[0320] Step (1): Determine the first intermediate bit sequence as follows: w = [ w 0, w 1, ..., w Nw-1 ] : (1.1) Perform rate analysis operation on the input bit sequence. c = [ c 0, c 1, ..., c K-1 The input bit sequence is set to the first rate for analysis, and the first data bit index set is used to determine the input bit sequence. The index is i bits (Right now Set as input bit sequence c = [ c 0, c 1, ..., c K-1 bits in ] and will not belong to the first data bit index set index i bits (Right now ) is set to zero, thus determining the size as First data bit index set and the size of the first polarization matrix N Determine the length as N First rate analysis bit output bit sequence v = [ v 0, v 1, ..., v N-1 ], as shown below.

[0321]

[0322] Wherein, the size of the first polarization matrix N It is the first polarization matrix Size, k It is a sequence of bits no greater than the input bit sequence. K The length of the non-negative integer.

[0323] (1.2) Perform a pre-transformation operation to convert the first rate analysis output bit sequence. v = [ v 0, v 1, ..., vN-1 Set as the first pre-transformed input bit sequence, and determine its length by one of the following methods: N First pre-transformed output bit sequence u = [ u 0, u 1, ..., u N-1 ] : (i) Based on the first generating polynomial over GF(2) g ( D ) = g 0+ g 1· D + ... + g m-1 · D m-1 + g m · D m In, or based on the first generated bit sequence g = [ g 0, g 1, ..., g m ], for the pre-transformed input bit sequence v = [ v 0, v 1,..., v N-1 Perform a convolution transformation to obtain the first pre-transformed output bit sequence. u = [ u 0, u 1, ..., u N-1 ],in m This is the first memory length. A concrete example of a convolutional transformation is...

[0324] (ii) The first pre-transformed input bit sequence v and N OK N The second pre-transformation matrix of the column T Multiplication, that is u=v·T , where vector-matrix multiplication is performed on GF(2); (iii) Freeze the first pre-transformed bit sequence r With the first pre-transformed input bit sequence v and N OK N The second pre-transformation matrix of the column T Add the products together, that is, u=v·T+rVector-matrix multiplication is performed on GF(2), and vector-to-vector addition is performed on GF(2). The first pre-transformation freezes the bit sequence. r The length is equal to the size of the first polarization matrix. N ; (iv) Perform one of the example algorithms shown in Table 2 by at least one of the following: first generating a bit sequence g = [ g 0, g 1, ..., g m The first generating polynomial on GF(2) g ( D ) = g 0+ g 1· D + ... + g m-1 · D m-1 + g m · D m First pre-transform input index set First pre-transform output index set First pre-transformed frozen bit sequence r ,in m It is the length of the first memory; (v) Perform one of the example algorithms shown in Table 3 by at least one of the following: first recursive feedback bit sequence q = [ q 0, q 1, ..., q m ], the first recursive feedback polynomial on GF(2) q ( D ) = q 0+ q 1· D + ... + q m-1 · D m-1 + q m · D m First pre-transform input index set First pre-transform output index set First pre-transformed frozen bit sequence r ,in m It is the length of the first memory; (vi) Perform one of the example algorithms shown in Table 4 by at least one of the following: generating a bit sequence g =[ g 0, g 1, ..., g m Generating polynomials on GF(2) g ( D ) = g 0+ g 1· D + ... + g m-1 · D m-1 + g m · D m Recursive feedback bit sequence q = [ q 0, q 1, ..., q m ], recursive feedback polynomial on GF(2) q ( D ) = q 0+ q 1· D + ... + q m-1 · D m-1 + q m · D m First pre-transform input index set First pre-transform output index set First pre-transformed frozen bit sequence r , length is m +1 first state bit sequence t = [ t 0, t 1, ..., t m-1 , t m ] ,in m This is the length of the first memory.

[0325] (1.3) Based on the first polarization matrix G (N) Perform a polarization transformation operation to output the first pre-transformed output bit sequence. u = [ u 0, u 1, ..., u N-1[Set as the first polarization transform input bit sequence, and by using the first polarization transform input bit sequence] u With the first polarization matrix G (N) Multiplication, that is, d = u·G (N) The length is obtained as N First polarization transform output bit sequence d = [ d 0, d 1, ..., d N-1 ],in, N The first polarization matrix The size of the first polarization matrix, vector matrix multiplication is performed on GF(2).

[0326] (1.4) Based on the first interleaver pattern J = [ J 0, J 1, ..., J N-2 , J N-1 ] and the size of the first polarization matrix N Perform an interleaving operation to output the bit sequence of the first polarization transform. d = [ d 0, d 1, ..., d N-1 Set as the first interleaved input bit sequence and determine its length as... First interleaved output bit sequence y for ,in i = 0, 1,2, ..., N -2, N- 1, i.e., the first interleaved output bit sequence y The i The number of bits equals the first interleaved input bit sequence. d =[ d 0, d 1, ..., d N-1 The first J i 1 bit.

[0327] (1.5) Perform a bit selection operation to output the first interleaved bit sequence. y Set the first bit to select the input bit sequence, and determine the length using one of the following methods. First bit selection output bit sequence : (i) Select the first bit to output the bit sequence Set as the first bit to select the input bit sequence y The former bits, that is That is, select the first bit to output the bit sequence. The The first bit is set as the first bit to select the input bit sequence. y The bits, of which Not greater than ; (ii) Select the first bit to output the bit sequence Set as the first bit to select the input bit sequence y = [ y 0, y 1, ..., y N-1 The end of bits, that is That is, select the first bit to output the bit sequence. The The first bit is set as the first bit to select the input bit sequence. y The bits, of which Not greater than N ; (iii) Select the first bit to output the bit sequence Set as the first bit to select the input bit sequence y The repetition, that is That is, select the first bit to output the bit sequence. The The first bit is set as the first bit to select the input bit sequence. y The bits, of which Not less than N ; (iv) Select the first bit to output the bit sequence Set as the first bit to select the input bit sequence y From index The beginning of the continuous bits, that is ,in Not greater than and Not less than ; (v) Select the first bit to output the bit sequence Set as the first bit to select the input bit sequence y From the index The beginning of the continuous bits, that is ,in Not greater than and Not greater than ; (vi) Select the first bit to output the bit sequence Set from index The first bit selects the input bit sequence. y The repetition of bits in, i.e. ; (vii) Select the first bit to output the bit sequence The first in The first bit is set as the first bit to select the input bit sequence. y The first in bits, that is ; (viii) Select the first bit to output the bit sequence The first in The first bit is set as the first bit to select the input bit sequence. y The first in bits, that is ; (ix) Select the first bit to output the bit sequence The first in The first bit is set as the first bit to select the input bit sequence. y The first in bits, that is ; Among them, the first intermediate bit sequence w = [ w 0, w 1, ..., w Nw-1 ] is the first interleaved output bit sequence y = [ y 0, y 1, ..., y N-1 That is, the first intermediate bit sequence. w The k bits w kSet as the first interleaved output bit sequence y The k bits y k ,Right now, w k = y k , k = 0, 1, 2, ..., Nw -2, Nw -1; First intermediate bit sequence w The length is the first interleaved output bit sequence y The length, i.e. Nw = N .

[0328] Step (2): Determine the second intermediate bit sequence as follows: w' = [ w' 0, w' 1, ..., w' Nw'-1 ] : (2.1) Based on size Copy bit index set Perform a deterministic bit extension operation to output the first rate analysis bit sequence. v = [ v 0, v 1, ..., v N-1 Set to determine the extended bit input sequence, and determine the extended bit output bit sequence. c ext The i bits Set as the first rate to analyze the output bit sequence v = [ v 0, v 1, ..., v N-1 The first j bits ,in To determine the length as Determine the extended bit output bit sequence ,Right now,

[0329] Among them, the copy bit index set It is the first data bit index set A subset of.

[0330] (2.2) Perform rate analysis to determine the extended bit input sequence. Set the input bit sequence to the second rate analysis and assign it to the second data bit index set. The index is i bits (Right now ) is set to determine the extended bit output sequence bits in and will not belong to the second data bit index set The index is i bits (Right now ) is set to zero, thus determining the size as Second data bit index set Second polarization matrix size Determine the length as Second rate analysis output bit sequence As shown below:

[0331] Wherein, the size of the second polarization matrix It is the second polarization matrix Size, k It is a non-negative integer, not greater than the second-rate input bit sequence. The length.

[0332] (2.3) Perform a pre-transformation operation to convert the second rate analysis output bit sequence. Set as the second pre-transformed input bit sequence, and determine its length by one of the following operations (i) to (vi). The second pre-transformed output bit sequence : (i) The second pre-transformed input bit sequence and OK The second pre-transformation matrix of the column Multiplication, that is , where vector-matrix multiplication is performed on GF(2); (ii) Freeze the second pre-transformed bit sequence r With the second pre-transformed input bit sequence and OK The second pre-transformation matrix of the column Add the products together, that is, Vector-matrix multiplication is performed on GF(2), and vector-to-vector addition is performed on GF(2). The second pre-transformation freezes the bit sequence. The length is equal to the size of the second polarization matrix. ; (iii) Second generating polynomial based on GF(2) Or the second generated bit sequence For the second pre-transformed input bit sequence Perform a convolution transformation to obtain the second pre-transformed output bit sequence. ,in This is the second memory length. A concrete example of a convolutional transform is...

[0333] (iv) Perform one of the example algorithms shown in Table 2 by at least one of the following: second generated bit sequence The second generating polynomial on GF(2) Second pre-transform input index set Second pre-transform output index set Second pre-transformed frozen bit sequence ,in It is the length of the second memory; (v) Perform one of the example algorithms shown in Table 3 by at least one of the following: second recursive feedback bit sequence The second recursive feedback polynomial on GF(2) Second pre-transform input index set Second pre-transform output index set Second pre-transformed frozen bit sequence ,in It is the length of the second memory; (vi) Perform one of the example algorithms shown in Table 4 by at least one of the following: second generated bit sequence The second generating polynomial on GF(2) Second recursive feedback bit sequence The second recursive feedback polynomial on GF(2) Second pre-transform input index set Second pre-transform output index set Second pre-transformed frozen bit sequence , length is Second state bit sequence ,in It is the length of the second memory; In some specific examples, the second generator polynomial Equal to the first generator polynomial In some specific examples, the second generator polynomial Not equal to the first generator polynomial In some specific examples, the second generated bit sequence Equal to the first generated bit sequence In some specific examples, the second generated bit sequence Not equal to the first generated bit sequence In some specific examples, the second recursive feedback bit sequence Equal to the first recursive feedback bit sequence In some specific examples, the second recursive feedback bit sequence With the first recursive feedback bit sequence They are not equal. In some specific examples, the second recursive feedback polynomial... Equal to the first recursive feedback polynomial In some specific examples, the second recursive feedback polynomial Not equal to the first recursive feedback polynomial .

[0334] (2.4) Based on the second polarization matrix Perform a polarization transformation operation to output the second pre-transform bit sequence. Set as the input bit sequence for the second polarization transform, and set the input bit sequence for the second polarization transform. With the second polarization matrix Multiplication, that is To determine the length as The second polarization transform output bit sequence ,in, It is the second polarization matrix The size of the vector matrix is ​​determined, and the vector-matrix multiplication is performed on GF(2).

[0335] (2.5) Based on the second interleaver mode Second polarization matrix size Perform an interleaving operation to output the second polarization transform bit sequence. Set as the second interleaved input bit sequence, and set the length to be The second interleaved output bit sequence Determined as -1, which is the second interleaved output bit sequence The i The bits are set as the second interleaved input bit sequence. The 1 bit.

[0336] (2.6) Perform a bit selection operation to output the second interleaved bit sequence. Set the second bit as the input bit sequence and determine the length by one of the following operations (i) to (ix). The second bit selection output bit sequence : (i) Select the second bit to output the bit sequence Set as the second bit to select the input bit sequence The former bits, that is That is, the second bit is used to select the output bit sequence. The k The first bit is set as the second bit to select the input bit sequence. The k bits, of which Not greater than ; (ii) Select the second bit to output the bit sequence Set as the second bit to select the input bit sequence The end bits, that is That is, the second bit is used to select the output bit sequence. The k The first bit is set as the second bit to select the input bit sequence. The bits, of which Not greater than ; (iii) Select the second bit to output the bit sequence Set as the second bit to select the input bit sequence The repetition, that is That is, the second bit is used to select the output bit sequence. The k The first bit is set as the second bit to select the input bit sequence. The bits, of which Not less than ; (iv) Select the second bit to output the bit sequence Set as the second bit to select the input bit sequence From the index The beginning of the continuous bits, that is ,in Not greater than and Not less than ; (v) Select the second bit to output the bit sequence Set as the second bit to select the input bit sequence From the index The beginning of the continuous bits, that is ,in Not greater than and Not greater than s ; (vi) Select the second bit to output the bit sequence Set from index The second bit of the initial selection input bit sequence The repetition of bits in, i.e. ; (vii) Select the second bit to output the bit sequence The first in k The first bit is set as the second bit to select the input bit sequence. The first in bits, that is ;in, It is the first bit selection output bit sequence Length; (viii) Select the second bit to output the bit sequence The first in k The first bit is set as the second bit to select the input bit sequence. The first in bits, that is ; (ix) Select the second bit to output the bit sequence The first in k The first bit is set as the second bit to select the input bit sequence. The first in bits, that is ;in, It is the first bit selection output bit sequence Length; Among them, the second intermediate bit sequence It is the second bit selection output bit sequence That is, the second intermediate bit sequence w The k bits Set as the second bit to select the output bit sequence The k bits ,Right now 1; Second intermediate bit sequence The length is the second bit selected output bit sequence The length.

[0337] Step (3): The first intermediate bit sequence is processed using one of the following methods. and the second intermediate bit sequence Perform a center alignment and overlay operation to determine the overlay bit sequence. : (1) For Superimposed bit sequences The index is i The bits are the first intermediate bit sequence The index is bits With the second intermediate bit sequence The index is bits Add over GF(2), that is, , in, It is a superimposed bit sequence The length, and ; It equals one of the following values: .

[0338] (2) For Superimposed bit sequences The index is i bits Set as the second intermediate bit sequence w ' = [ w '0, w '1, ..., w ' Nw'-1 The index in the middle is bits ,in or .for Superimposed bit sequences The index is i bits It is the first intermediate bit sequence The index is bits With the second intermediate bit sequence The index is bits On GF(2) Add, that is, , in, It is a superimposed bit sequence The length, and ; It equals one of the following values: .

[0339] (3) For Superimposed bit sequences The index is i bits It is the first intermediate bit sequence The index is bits With the second intermediate bit sequence The index is bits Add over GF(2), that is, , in, It is a superimposed bit sequence The length, and ; It equals one of the following values: . Step (4): The length is determined to be F Output bit sequence f = [ f 0, f 1, ..., f F-1 [ is a length of] superimposed bit sequence ,Right now f = h and F = H .

[0340] Then, the first node sends the output bit sequence to the second node. f = [ f 0, f 1, ..., f F-1 [The signal].

[0341] Figure 13 shows the BLER simulation results for a specific example of Figure 11B, where the parameter values ​​are taken from Table 8, and other settings are as follows: Input bit sequence c include Lcrc = 19 cyclic redundancy check (CRC) bits, whose coefficients are taken from the cyclic generator polynomial over GF(2). ,as well as K - Lcrc = 40 payload bits determined; first interleaver mode J = [ J 0, J 1, ..., J N-2 , J N-1Determine as follows:

[0342] Second interleaver mode Determine as follows:

[0343] Where π = [ π 0, π 1, π 2, π 3, π 4, π 5, π 6, π 7, π 8, π 9, π 10 , π 11 , π 12 , π 13 , π 14 , π 15 , π 16 , π 17 , π 18 , π 19 , π 20 , π 21 , π 22 , π 23 , π 24 , π 25 , π 26 , π 27 , π 28 , π 29 , π 30 , π 31The sequence is defined as [0, 1, 2, 4, 3, 5, 6, 7, 8, 16, 9, 17, 10, 18, 11, 19, 12, 20, 13, 21, 14, 22, 15, 23, 24, 25, 26, 28, 27, 29, 30, 31]. It can be shown that the performance of the newly disclosed scheme (solid line) is superior to the scheme in the existing IV standard (dashed line), where the output bit sequence... f = [ f 0, f 1, ..., f F-1 It is QPSK modulated and transmitted through an AWGN channel.

[0344] Table 8 shows the specific examples of the settings corresponding to the embodiments in Figure 11B.

[0345] 3.10 Example 10: (w = d, w' = e', u -> cext, no ext crc, no pre-transformation) Example 10 is based on Example 3 and Example 4.

[0346] Figure 14A illustrates an embodiment of the disclosed new scheme, wherein the only difference from embodiment 4 is that the first node will use the first intermediate bit sequence w = [ w 0, w 1, ..., w Nw-1 The length is determined to be... N First polarization transform output bit sequence y That is, the first intermediate bit sequence w The k bits w k Set as the first polarization transform output sequence d The kth bit d k ,Right now, w k = d k , k = 0, 1, 2, ..., Nw -2, Nw -1, where, Nw It is the first intermediate bit sequence w The length, and Nw Set as the output bit sequence of the first polarization transform d The length, i.e. Nw = N . NIt is the first polarization matrix Size.

[0347] 3.11 Example 11: (w = d, w' = e', v -> cext, no ext crc, with pre-transformation) Example 10 is based on Example 3 and Example 9.

[0348] Figure 14B illustrates an embodiment of the disclosed new scheme, wherein one difference from embodiment 9 is that the first node will use the first intermediate bit sequence w = [ w 0, w 1, ..., w Nw-1 The length is determined to be... N First polarization transform output bit sequence d That is, the first intermediate bit sequence w The k bits w k Set as the first polarization transform output sequence d The kth bit d k ,Right now, w k = d k , k = 0, 1, 2, ..., Nw -2, Nw -1, where, Nw It is the first intermediate bit sequence w The length, and Nw Set as the output bit sequence of the first polarization transform d The length, i.e. Nw = N . N It is the first polarization matrix Size.

[0349] 3.12 Example 12: (w = e, w' = y', u -> cext, no ext crc, no pre-transformation) Example 12 is based on Example 3.

[0350] Figure 15A illustrates an embodiment of the disclosed new scheme, wherein the first node acquires a length of K input bit sequence c = [ c 0, c 1, ..., c K-1 ], and determine the length as F Output bit sequence f = [ f 0, f 1, ...,f F-1 As described below.

[0351] Step (1): The length is determined by the same steps (1.1) to (1.4) in Example 4. E First bit selection output bit sequence e = [ e 0, e 1, ..., e E-1 ], and the first intermediate bit sequence w Set the first bit to select the output bit sequence e ,Right now w = e and Nw = E .

[0352] Step (2): The second interleaved output bit sequence is determined by the same steps (2.1) to (2.4) as in Example 4. and the second intermediate bit sequence w' = [ w' 0, w' 1, ..., w' Nw'-1 Set as the second interleaved output bit sequence ,Right now ,and Nw' = N' .

[0353] Step (3): The superimposed bit sequence is determined by the same step (3) as in Example 4. The superimposed bit sequence The length is equal to the second intermediate bit sequence w' The length, i.e. .

[0354] Step (4): The length is determined as follows: F Output bit sequence f = [ f 0, f 1, ..., f F-1 ] : (4.1) Perform a bit selection operation to combine the bit sequences. Set the second bit to select the input bit sequence, and determine the length using one of the following methods. The second bit selection output bit sequence : (i) Select the second bit to output the bit sequence Set as the second bit to select the input bit sequence The former bits, that is 1, that is, select the second bit to output the bit sequence. The k The first bit is set as the second bit to select the input bit sequence. The k bits, of which Not greater than ; (ii) Select the second bit to output the bit sequence Set as the second bit to select the input bit sequence The end bits, that is That is, the second bit is used to select the output bit sequence. The k The first bit is set as the second bit to select the input bit sequence. The bits, of which Not greater than ; (iii) Select the second bit to output the bit sequence Set as the second bit to select the input bit sequence The repetition, that is That is, the second bit is used to select the output bit sequence. The k The first bit is set as the second bit to select the input bit sequence. The bits, of which Not less than ; (iv) Select the second bit to output the bit sequence Set as the second bit to select the input bit sequence From the index The beginning of the continuous bits, that is ,in Not greater than and Not less than ; (v) Select the second bit to output the bit sequence Set as the second bit to select the input bit sequence From the index The beginning of the continuous bits, that is ,in Not greater than and Not greater than ; (vi) Select the second bit to output the bit sequence Set from index The second bit of the initial selection input bit sequence The repetition of bits in, i.e. ,in, It is a non-negative integer not greater than N.

[0355] (vii) Select the second bit to output the bit sequence The first in k The first bit is set as the second bit to select the input bit sequence. The first in bits, that is ; (viii) Select the second bit to output the bit sequence The first in k The first bit is set as the second bit to select the input bit sequence. The first in bits, that is ; (viii) Select the second bit to output the bit sequence The first in k The first bit is set as the second bit to select the input bit sequence. The first in bits, that is ; (4.2) Output the bit sequence f = [ f 0, f 1, ..., f F-1 Set as the second bit to select the output bit sequence. ,Right now f = , .

[0356] Then, the first node sends the output bit sequence to the second node. f = [ f 0, f 1, ..., f F-1 [The signal].

[0357] Figure 16 shows the BLER simulation results for a specific example of Figure 15A, where the parameter values ​​are taken from Table 9, and other settings are as follows: Input bit sequence c include Lcrc= 19 cyclic redundancy check (CRC) bits, whose coefficients are taken from the cyclic generator polynomial over GF(2). ,as well as K - Lcrc =24 payload bits determined; First interleaver mode J = [ J 0, J 1, ..., J N-2 , J N-1 Determine as follows:

[0358] Second interleaver mode Determine as follows:

[0359] Where π = [ π 0, π 1, π 2, π 3, π 4, π 5, π 6, π 7, π 8, π 9, π 10 , π 11 , π 12 , π 13 , π 14 , π 15 , π 16 , π 17 , π 18 , π 19 , π 20 , π 21 , π 22 , π 23 , π 24 , π 25 , π 26 , π 27 ,π 28 , π 29 , π 30 , π 31 The sequence is defined as [0, 1, 2, 4, 3, 5, 6, 7, 8, 16, 9, 17, 10, 18, 11, 19, 12, 20, 13, 21, 14, 22, 15, 23, 24, 25, 26, 28, 27, 29, 30, 31]. It can be shown that the performance of the newly disclosed scheme (solid line) is superior to the scheme in the existing IV standard (dashed line), where the output bit sequence... f = [ f 0, f 1, ..., f F-1 It is QPSK modulated and transmitted through an AWGN channel.

[0360] Table 9 Figure 15A Setting up specific examples corresponding to the implementation embodiments

[0361] 3.13 Example 13: (w = e, w' = y', v -> cext, no ext crc, with pre-transformation) Example 13 is based on Example 3.

[0362] Figure 15B illustrates an embodiment of the disclosed new scheme, wherein the first node acquires a length of K input bit sequence c = [ c 0, c 1, ..., c K-1 ], and determine the length as F Output bit sequence f = [ f 0, f 1, ..., f F-1 As described below.

[0363] Step (1): The length is determined by the same steps (1.1) to (1.5) in Example 9. E First bit selection output bit sequence e = [ e 0, e 1, ..., e E-1 ], and the first intermediate bit sequence w = [w 0, w 1, ..., w Nw-1 Set as the first bit to select the output bit sequence e ,Right now w = e and Nw = E .

[0364] Step (2): The second interleaved output bit sequence is determined by the same steps (2.1) to (2.5) as in Example 9. and the second intermediate bit sequence w' = [ w' 0, w' 1, ..., w' Nw'-1 Set as the second interleaved output bit sequence ,Right now ,and Nw' = N' .

[0365] Step (3): The superimposed bit sequence is determined by the same step (3) as in Example 9. The superimposed bit sequence H The length is equal to the second intermediate bit sequence w' The length, i.e. H = Nw' = N' .

[0366] Step (4): The length is determined as follows: F Output bit sequence f = [ f 0, f 1, ..., f F-1 ] : (4.1) Perform a bit selection operation to combine the bit sequences. Set the second bit to select the input bit sequence, and determine the length using one of the following methods. The second bit selection output bit sequence : (i) Select the second bit to output the bit sequence Set as the second bit to select the input bit sequence The former bits, that is 1, that is, select the second bit to output the bit sequence. The k The first bit is set as the second bit to select the input bit sequence. The k bits, of which Not greater than ; (ii) Select the second bit to output the bit sequence Set as the second bit to select the input bit sequence The end bits, that is That is, the second bit is used to select the output bit sequence. The k The first bit is set as the second bit to select the input bit sequence. The bits, of which Not greater than ; (iii) Select the second bit to output the bit sequence Set as the second bit to select the input bit sequence The repetition, that is That is, the second bit is used to select the output bit sequence. The k The first bit is set as the second bit to select the input bit sequence. The bits, of which Not less than ; (iv) Select the second bit to output the bit sequence Set as the second bit to select the input bit sequence From the index The beginning of the continuous bits, that is ,in Not greater than and Not less than ; (v) Select the second bit to output the bit sequence Set as the second bit to select the input bit sequence From the index The beginning of the continuous bits, that is ,in Not greater than and Not greater than ; (vi) Select the second bit to output the bit sequence Set from index The second bit of the initial selection input bit sequence The repetition of bits in, i.e. ,in, It is a non-negative integer not greater than N.

[0367] (vii) Select the second bit to output the bit sequence The first in k The first bit is set as the second bit to select the input bit sequence. The first in bits, that is ; (viii) Select the second bit to output the bit sequence The first in k The first bit is set as the second bit to select the input bit sequence. The first in bits, that is ; (viii) Select the second bit to output the bit sequence The first in k The first bit is set as the second bit to select the input bit sequence. The first in bits, that is ; (4.2) Output the bit sequence f = [ f 0, f 1, ..., f F-1 Set as the second bit to select the output bit sequence. ,Right now f = , .

[0368] Then, the first node sends the output bit sequence to the second node. f = [ f 0, f 1, ..., f F-1 [The signal].

[0369] 3.14 Example 14: (w = y, w' = y', u -> cext, no ext crc, no pre-transformation) Example 14 is based on Example 3.

[0370] Figure 17A illustrates an embodiment of the disclosed novel scheme, wherein the difference from embodiment 12 is that the first intermediate bit sequence w Determined by the following new step (1): Step (1): The length is determined by the same steps (1.1) to (1.3) in Example 4. N First interleaved output bit sequence and the first intermediate bit sequencew Set as the first interleaved output bit sequence ,Right now w = y and Nw = N .

[0371] 3.15 Example 15: (w = y, w' = y', v -> cext, no ext CRC, with pre-transformation) Example 15 is based on Example 3.

[0372] Figure 17B illustrates an embodiment of the disclosed new scheme, wherein the difference from embodiment 13 is that the first intermediate bit sequence w Determined by the following new step (1): Step (1): The length is determined by the same steps (1.1) to (1.4) in Example 9. N First interleaved output bit sequence and the first intermediate bit sequence w Set as the first interleaved output bit sequence ,Right now w = y and Nw = N .

[0373] 3.16 Example 16: (w = d, w' = y', u -> cext, no ext crc, no pre-transformation) Example 16 is based on Example 3.

[0374] Figure 18A illustrates an embodiment of the disclosed novel scheme, wherein the difference from embodiment 12 is that the first intermediate bit sequence w Determined by the following new step (1): Step (1): The length is determined by the same steps (1.1) to (1.2) in Example 4. N First polarization transform output bit sequence and the first intermediate bit sequence w Set as the output bit sequence of the first polarization transform ,Right now w = d and Nw = N .

[0375] 3.17 Example 17: (w = d, w' = y', v -> cext, no ext crc, with pre-transformation) Example 17 is based on Example 3.

[0376] Figure 18B illustrates an embodiment of the disclosed new scheme, wherein the difference from embodiment 13 is that the first intermediate bit sequence wDetermined by the following new step (1): Step (1): The length is determined by the same steps (1.1) to (1.3) in Example 9. N First polarization transform output bit sequence and the first intermediate bit sequence w Set as the output bit sequence of the first polarization transform ,Right now w = d and Nw = N .

[0377] 3.18 Example 18: (w = e, w' = d', u -> cext, no ext crc, no pre-transformation) Example 18 is based on Example 3.

[0378] Figure 19A illustrates an embodiment of the disclosed new scheme, wherein the first node acquires a length of K input bit sequence c = [ c 0, c 1, ..., c K-1 ], and determine the length as F Output bit sequence f = [ f 0, f 1, ..., f F-1 As described below.

[0379] Step (1): The length is determined by the same steps (1.1) to (1.4) in Example 4. E First bit selection output bit sequence e = [ e 0, e 1, ..., e E-1 ], and the first intermediate bit sequence w Set the first bit to select the output bit sequence e ,Right now w = e and Nw = E .

[0380] Step (2): The second polarization transform output bit sequence is determined by the same steps (2.1) to (2.3) as in Example 4. and the second intermediate bit sequence w' = [ w' 0, w' 1, ..., w'Nw'-1 Set as the output bit sequence of the second polarization transform. ,Right now ,and Nw' = N' .

[0381] Step (3): The superimposed bit sequence is determined by the same step (3) as in Example 4. The superimposed bit sequence The length is equal to the second intermediate bit sequence w' The length, i.e. , Step (4): The length is determined by the following steps (4.1) to (4.3). F Output bit sequence f = [ f 0, f 1,..., f F-1 ].

[0382] (4.1) Based on the second interleaver mode Second polarization matrix size Interleaving will stack the bit sequences. Set as the second interleaved input bit sequence, and set the length to be The second interleaved output bit sequence Determined as -1, which is the second interleaved output bit sequence The i Each bit is set as a superimposed bit sequence. The 1 bit.

[0383] (4.2) Perform a bit selection operation to output the second interleaved bit sequence. Set the second bit to select the input bit sequence, and determine the length using one of the following methods. The second bit selection output bit sequence : (i) Select the second bit to output the bit sequence Set as the second bit to select the input bit sequence The former bits, that is 1, that is, select the second bit to output the bit sequence. The k The first bit is set as the second bit to select the input bit sequence. The k bits, of which Not greater than ; (ii) Select the second bit to output the bit sequence Set as the second bit to select the input bit sequence The end bits, that is That is, the second bit is used to select the output bit sequence. The k The first bit is set as the second bit to select the input bit sequence. The bits, of which Not greater than ; (iii) Select the second bit to output the bit sequence Set as the second bit to select the input bit sequence The repetition, that is That is, the second bit is used to select the output bit sequence. The k The first bit is set as the second bit to select the input bit sequence. The bits, of which Not less than ; (iv) Select the second bit to output the bit sequence Set as the second bit to select the input bit sequence From the index The beginning of the continuous bits, that is ,in Not greater than and Not less than ; (v) Select the second bit to output the bit sequence Set as the second bit to select the input bit sequence From the index The beginning of the continuous bits, that is ,in Not greater than and Not greater than ; (vi) Select the second bit to output the bit sequence Set from index The second bit of the initial selection input bit sequence The repetition of bits in, i.e. ,in, It is a non-negative integer not greater than N.

[0384] (vii) Select the second bit to output the bit sequence The first in k The first bit is set as the second bit to select the input bit sequence. The first in bits, that is ; (viii) Select the second bit to output the bit sequence The first in k The first bit is set as the second bit to select the input bit sequence. The first in bits, that is ; (viii) Select the second bit to output the bit sequence The first in k The first bit is set as the second bit to select the input bit sequence. The first in bits, that is ; (4.3) Output the bit sequence f = [ f 0, f 1, ..., f F-1 Set as the second bit to select the output bit sequence. ,Right now f = , .

[0385] Then, the first node sends the output bit sequence to the second node. f = [ f 0, f 1, ..., f F-1 [The signal].

[0386] Figure 20 shows the BLER simulation results for a specific example of Figure 19A, where the parameter values ​​are taken from Table 10, and other settings are as follows: Input bit sequence c include Lcrc = 19 cyclic redundancy check (CRC) bits, whose coefficients are taken from the cyclic generator polynomial over GF(2). ,as well as K - Lcrc =72 payload bits determined; First interleaver mode J = [ J 0, J 1, ..., J N-2 , J N-1Determine as follows:

[0387] Second interleaver mode Determine as follows:

[0388] Where π = [ π 0, π 1, π 2, π 3, π 4, π 5, π 6, π 7, π 8, π 9, π 10 , π 11 , π 12 , π 13 , π 14 , π 15 , π 16 , π 17 , π 18 , π 19 , π 20 , π 21 , π 22 , π 23 , π 24 , π 25 , π 26 , π 27 , π 28 , π 29 , π 30 , π 31The sequence is defined as [0, 1, 2, 4, 3, 5, 6, 7, 8, 16, 9, 17, 10, 18, 11, 19, 12, 20, 13, 21, 14, 22, 15, 23, 24, 25, 26, 28, 27, 29, 30, 31]. It can be shown that the performance of the newly disclosed scheme (solid line) is superior to the scheme in the existing IV standard (dashed line), where the output bit sequence... f = [ f 0, f 1, ..., f F-1 It is QPSK modulated and transmitted through an AWGN channel.

[0389] Table 10 Figure 19A Setting up specific examples corresponding to the implementation embodiments

[0390] 3.19 Example 19: (w = e, w' = d', v -> cext, no ext crc, with pre-transformation) Example 19 is based on Example 3.

[0391] Figure 19B illustrates an embodiment of the disclosed new scheme, wherein the first node acquires a length of K input bit sequence c = [ c 0, c 1, ..., c K-1 ], and determine the length as F Output bit sequence f = [ f 0, f 1, ..., f F-1 As described below.

[0392] Step (1): The length is determined by the same steps (1.1) to (1.5) in Example 9. E First bit selection output bit sequence e = [ e 0, e 1, ..., e E-1 ], and the first intermediate bit sequence w Set the first bit to select the output bit sequence e ,Right now w = e and Nw = E .

[0393] Step (2): The second polarization transform output bit sequence is determined by the same steps (2.1) to (2.4) as in Example 9. and the second intermediate bit sequence w' = [ w' 0, w' 1, ..., w' Nw'-1 Set as the output bit sequence of the second polarization transform. ,Right now ,and .

[0394] Step (3): The superimposed bit sequence is determined by the same step (3) as in Example 4. The superimposed bit sequence The length is equal to the second intermediate bit sequence w' The length, i.e. .

[0395] Step (4): The length is determined by the following steps (4.1) to (4.3). F Output bit sequence f = [ f 0, f 1,..., f F-1 ].

[0396] (4.1) Based on the second interleaver mode Second polarization matrix size Interleaving will stack the bit sequences. Set as the second interleaved input bit sequence, and set the length to be The second interleaved output bit sequence Determined as -1, which is the second interleaved output bit sequence The i Each bit is set as a superimposed bit sequence. The 1 bit.

[0397] (4.2) Perform a bit selection operation to output the second interleaved bit sequence. Set the second bit to select the input bit sequence, and determine the length using one of the following methods. The second bit selection output bit sequence : (i) Select the second bit to output the bit sequence Set as the second bit to select the input bit sequence The former bits, that is 1, that is, select the second bit to output the bit sequence. The k The first bit is set as the second bit to select the input bit sequence. The k bits, of which Not greater than ; (ii) Select the second bit to output the bit sequence Set as the second bit to select the input bit sequence The end bits, that is That is, the second bit is used to select the output bit sequence. The k The first bit is set as the second bit to select the input bit sequence. The bits, of which Not greater than ; (iii) Select the second bit to output the bit sequence Set as the second bit to select the input bit sequence The repetition, that is That is, the second bit is used to select the output bit sequence. The k The first bit is set as the second bit to select the input bit sequence. The bits, of which Not less than ; (iv) Select the second bit to output the bit sequence Set as the second bit to select the input bit sequence From the index The beginning of the continuous bits, that is ,in Not greater than and Not less than ; (v) Select the second bit to output the bit sequence Set as the second bit to select the input bit sequence From the index The beginning of the continuous bits, that is ,in Not greater than and Not greater than ; (vi) Select the second bit to output the bit sequence Set from index The second bit of the initial selection input bit sequence The repetition of bits in, i.e. ,in, It is a non-negative integer not greater than N.

[0398] (vii) Select the second bit to output the bit sequence The first in k The first bit is set as the second bit to select the input bit sequence. The first in bits, that is ; (viii) Select the second bit to output the bit sequence The first in k The first bit is set as the second bit to select the input bit sequence. The first in bits, that is ; (viii) Select the second bit to output the bit sequence The first in k The first bit is set as the second bit to select the input bit sequence. The first in bits, that is ; (4.3) Output the bit sequence f = [ f 0, f 1, ..., f F-1 Set as the second bit to select the output bit sequence. ,Right now f = , .

[0399] Then, the first node sends the output bit sequence to the second node. f = [ f 0, f 1, ..., f F-1 [The signal].

[0400] 3.20 Example 20: (w = y, w' = d', u -> cext, no ext crc, no pre-transformation) Example 20 is based on Example 3.

[0401] Figure 21A illustrates an embodiment of the disclosed novel scheme, wherein the difference from embodiment 18 is that the first intermediate bit sequence w Determined by the following new step (1): Step (1):The length is determined by the same steps (1.1) to (1.3) in Example 4. N First interleaved output bit sequence and the first intermediate bit sequence w Set as the first interleaved output bit sequence ,Right now w = y and Nw = N .

[0402] 3.21 Example 21: (w = y, w' = d', v -> cext, no ext CRC, with pre-transformation) Example 21 is based on Example 3.

[0403] Figure 21B illustrates an embodiment of the disclosed new scheme, wherein the difference from embodiment 19 is that the first intermediate bit sequence w Determined by the following new step (1): Step (1): The length is determined by the same steps (1.1) to (1.4) in Example 9. N First interleaved output bit sequence and the first intermediate bit sequence w Set as the first interleaved output bit sequence ,Right now w = y and Nw = N .

[0404] 3.22 Example 22: (w = d, w' = d', u -> cext, no ext crc, no pre-transformation) Example 22 is based on Example 3.

[0405] Figure 22A illustrates an embodiment of the disclosed novel scheme, wherein the difference from embodiment 18 is that the first intermediate bit sequence w Determined by the following new step (1): Step (1): The length is determined by the same steps (1.1) to (1.2) in Example 4. N First polarization transform output bit sequence and the first intermediate bit sequence w Set as the output bit sequence of the first polarization transform ,Right now w = d and Nw = N .

[0406] Figure 23 shows the BLER simulation results for a specific example of Figure 22A, where the parameter values ​​are taken from Table 11, and other settings are as follows: Input bit sequence c include Lcrc = 19 cyclic redundancy check (CRC) bits, whose coefficients are taken from the cyclic generator polynomial over GF(2). ,as well as K - Lcrc = 24 payload bits determined; first interleaver mode J = [ J 0, J 1, ..., J N-2 , J N-1 Determine as follows:

[0407] Second interleaver mode Determine as follows:

[0408] Where π = [ π 0, π 1, π 2, π 3, π 4, π 5, π 6, π 7, π 8, π 9, π 10 , π 11 , π 12 , π 13 , π 14 , π 15 , π 16 , π 17 , π 18 , π 19 , π 20 , π 21 , π 22 , π 23 , π 24, π 25 , π 26 , π 27 , π 28 , π 29 , π 30 , π 31 The sequence is defined as [0, 1, 2, 4, 3, 5, 6, 7, 8, 16, 9, 17, 10, 18, 11, 19, 12, 20, 13, 21, 14, 22, 15, 23, 24, 25, 26, 28, 27, 29, 30, 31]. It can be shown that the performance of the newly disclosed scheme (solid line) is superior to the scheme in the existing IV standard (dashed line), where the output bit sequence... f = [ f 0, f 1, ..., f F-1 It is QPSK modulated and transmitted through an AWGN channel.

[0409] Table 11 Figure 22A Setting up specific examples corresponding to the implementation embodiments

[0410] 3.23 Example 23: (w = d, w' = d', v -> cext, no ext crc, with pre-transformation) Example 23 is based on Example 3.

[0411] Figure 22B illustrates an embodiment of the disclosed new scheme, wherein the difference from embodiment 19 is that the first intermediate bit sequence w Determined by the following new step (1): Step (1): The length is determined by the same steps (1.1) to (1.3) in Example 9. N First polarization transform output bit sequence and the first intermediate bit sequence w Set as the output bit sequence of the first polarization transform ,Right now w = d and Nw = N .

[0412] Table 12 shows the determination of the first and second intermediate bit sequences in the embodiments.

[0413]

[0414] 3.24 Example 24: (First example of w and w' based on E, E', N, N') Example 24 is based on Examples 1 to 7.

[0415] As shown in Table 12, in Example 24, the first intermediate bit sequence w = [ w 0, w 1, ..., w Nw-1 ] and the second intermediate bit sequence w' = [ w' 0, w' 1, ..., w' Nw'-1 Configure it as follows: Example 1: For a length of E The first rate-matched output bit sequence (or the first bit-selected output bit sequence) is longer than the length of the second rate-matched output bit sequence (or the second bit-selected output bit sequence) of length E'. E ',Right now , the first intermediate bit sequence w = [ w 0, w 1, ..., w Nw-1 Set to the first rate-matched output bit sequence (or the first bit-selected output bit sequence). e , the second intermediate bit sequence w' = [ w' 0, w' 1, ..., w' Nw'-1 Set to the second rate-matched output bit sequence (or the second bit-selected output bit sequence). e The center alignment and overlay operation is performed as follows: overlaying bit sequences. The index is i bits It is the first intermediate bit sequence The index is bits With the second intermediate bit sequence The index is bits Add to GF(2), that is, , in, It is a superimposed bit sequence The length, and ; It equals one of the following values: Specific examples and embodiments are shown in Examples 4 to 7, and the corresponding illustrations are shown in Figures 9A, 9B, 9C and 9D.

[0416] Example 2: For a length of E The first rate-matched output bit sequence (or the first bit-selected output bit sequence) is less than the length of the second rate-matched output bit sequence (or the second bit-selected output bit sequence) of length E'. E ',Right now , the first intermediate bit sequence w = [ w 0, w 1, ..., w Nw-1 Set to the first rate-matched output bit sequence (or the first bit-selected output bit sequence). e , the second intermediate bit sequence w' = [ w' 0, w' 1, ..., w' Nw'-1 Set to the second rate-matched output bit sequence (or the second bit-selected output bit sequence). e The center alignment and overlay operation is performed as follows: overlaying bit sequences. The index is i bits It is the first intermediate bit sequence The index is bits With the second intermediate bit sequence The index is bits Add to GF(2), that is, , in, It is a superimposed bit sequence The length, and ; It equals one of the following values: Specific examples and embodiments are shown in Examples 4 to 7, and the corresponding illustrations are shown in Figures 9A, 9B, 9C and 9D.

[0417] 3.25 Example 25: (A second example of w and w' based on E, E', N, N') Example 25 is based on Examples 1 to 7.

[0418] As shown in Table 12, in Example 25, the first intermediate bit sequence w = [ w 0, w1, ..., w Nw-1 ] and the second intermediate bit sequence w' = [ w' 0, w' 1, ..., w' Nw'-1 Configure it as follows: Example 1: For a length of E The first rate-matched output bit sequence (or the first bit-selected output bit sequence) is longer than the length of the second rate-matched output bit sequence (or the second bit-selected output bit sequence) of length E'. E ',Right now , the first intermediate bit sequence w = [ w 0, w 1, ..., w Nw-1 Set to the first rate-matched output bit sequence (or the first bit-selected output bit sequence). e , the second intermediate bit sequence w' = [ w' 0, w' 1, ..., w' Nw'-1 Set to the second rate-matched output bit sequence (or the second bit-selected output bit sequence). e The center alignment and overlay operation is performed as follows: overlaying bit sequences. The index is i bits It is the first intermediate bit sequence The index is bits With the second intermediate bit sequence The index is bits Add to GF(2), that is, , in, It is a superimposed bit sequence The length, and ; It equals one of the following values: Specific examples and embodiments are shown in Examples 4 to 7, and the corresponding illustrations are shown in Figures 9A, 9B, 9C and 9D.

[0419] Example 2: The length E of the first rate-matched output bit sequence (or the first bit-selected output bit sequence) is less than the length of the second rate-matched output bit sequence (or the second bit-selected output bit sequence).E 'the situation, that is Then the first intermediate bit sequence w = [ w 0, w 1, ..., w Nw-1 The first rate-matched output bit sequence (or the first bit-selected output bit sequence) is set. e Second intermediate bit sequence w' = [ w' 0, w' 1, ..., w' Nw'-1 The output bit sequence is set to the second rate-matched sequence (or the second bit-selected output bit sequence). e The middle alignment and overlay operation is performed by overlaying bit sequences. The index is i The bits are set as the second intermediate bit sequence w ' = [ w '0, w '1, ..., w ' Nw'-1 The index in the middle is bits ,in, or Superimposed bit sequences The index is i bits It is the first intermediate bit sequence The index is The first bit and the second intermediate bit sequence The index is bits On GF(2) for Add, that is, , in, It is a superimposed bit sequence The length, and ; It equals one of the following values: Specific examples and embodiments are shown in Examples 4 to 7, and the corresponding illustrations are shown in Figures 9A, 9B, 9C and 9D.

[0420] 3.26 Example 26: (A third example of w and w' based on E, E', N, N') Example 26 is based on Examples 1 to 9 and Examples 12 to 15.

[0421] As shown in Table 12, in Example 26, the first intermediate bit sequencew = [ w 0, w 1, ..., w Nw-1 ] and the second intermediate bit sequence w' = [ w' 0, w' 1, ..., w' Nw'-1 Configure it as follows: Example 1: First rate matched output bit sequence (or first bit selected output bit sequence) E The length is less than the size of the first polarization matrix. N ,Right now E < N And the second rate matches the output bit sequence (or the second bit selects the output bit sequence). E' The length is less than the size of the second polarization matrix. N' (Right now E' < N' ), the first intermediate bit sequence w = [ w 0, w 1, ..., w Nw-1 Set to the first rate-matched output bit sequence (or the first bit-selected output bit sequence). e , the second intermediate bit sequence w' = [ w' 0, w' 1, ..., w' Nw'-1 Set to the second rate-matched output bit sequence (or the second bit-selected output bit sequence). e Specific examples and embodiments are shown in Embodiments 4 to 7, and the corresponding illustrations are shown in Figures 9A, 9B, 9C and 9D.

[0422] Example 2: First rate matched output bit sequence (or first bit selected output bit sequence) E The length is less than the size of the first polarization matrix. N ,Right now E < N And the second rate matches the output bit sequence (or the second bit selects the output bit sequence). E' The length is greater than the size of the second polarization matrix. N' (Right now E' > N' ), the first intermediate bit sequence w = [ w 0, w 1, ..., w Nw-1Set to the first rate-matched output bit sequence (or the first bit-selected output bit sequence). e , the second intermediate bit sequence w' = [ w' 0, w' 1, ..., w' Nw'-1 Set as the second interleaved output bit sequence y' Specific examples are Examples 12 and 13, and the corresponding illustrations are shown in Figures 15A and 15B.

[0423] Example 3: First rate matched output bit sequence (or first bit selected output bit sequence) E The length is greater than the size of the first polarization matrix. N ,Right now And the second rate matches the output bit sequence (or the second bit selects the output bit sequence). E' The length is less than the size of the second polarization matrix. N' (Right now E' < N' ), the first intermediate bit sequence w = [ w 0, w 1, ..., w Nw-1 Set as the first interleaved output bit sequence y , the second intermediate bit sequence w' = [ w' 0, w' 1, ..., w' Nw'-1 Set to the second rate-matched output bit sequence (or the second bit-selected output bit sequence). e Specific examples are shown in Examples 8 and 9, and the corresponding illustrations are shown in Figures 11A and 11B.

[0424] Example 4: First rate matched output bit sequence (or first bit selected output bit sequence) E The length is greater than the size of the first polarization matrix. N ,Right now And the second rate matches the output bit sequence (or the second bit selects the output bit sequence). E' The length is greater than the size of the second polarization matrix. N' (Right now E' > N' ), the first intermediate bit sequence w = [ w 0, w 1, ..., w Nw-1Set as the first interleaved output bit sequence y , the second intermediate bit sequence w' = [ w' 0, w' 1, ..., w' Nw'-1 Set as the second interleaved output bit sequence y' Specific examples and embodiments are shown in Examples 14 and 15, and the corresponding illustrations are as follows. Figure 17A , 17B As shown.

[0425] From Examples 1 to 4, if the first intermediate bit sequence The length is greater than the second intermediate bit sequence The length, i.e. Nw > Nw' The center alignment and overlay operation is performed as follows: overlay bit sequences The index is i bits It is the first intermediate bit sequence The index is bits With the second intermediate bit sequence The index is bits Add to GF(2), that is, , in, It is a superimposed bit sequence The length, and ; It equals one of the following values: .

[0426] From examples 1 to 4, if the first intermediate bit sequence The length is less than the second intermediate bit sequence The length, i.e. Nw < Nw' The center alignment and overlay operation is performed as follows: the overlay bit sequence is... The index is i The bits are set as the second intermediate bit sequence w ' = [ w '0, w '1, ..., w ' Nw'-1 The index in ] is bits (against or ).for Superimposed bit sequences The index is i bits It is the first intermediate bit sequence The index is bits With the second intermediate bit sequence The index is The bits in GF(2) are targeted Adding together, that is: , in, It is a superimposed bit sequence The length, and ; It equals one of the following values: .

[0427] 3.27 Example 27: (Fourth example of w and w' based on E, E', N, N') Example 27 is based on Examples 1 to 9 and Examples 12 to 15.

[0428] As shown in Table 12, in Example 27, if N Not equal to N ', then the first intermediate bit sequence w = [ w 0, w 1,..., w Nw-1 [Set to length as] N First polarization transform output bit sequence d , the second intermediate bit sequence w' = [ w' 0, w' 1, ..., w' Nw'-1 [Set to length as] N’ The second polarization transform output bit sequence d’ ,in, N It is the first polarization matrix G (N) The size of the polarization matrix, N’ It is the first polarization matrix G (N’) The polarization matrix size, and the center alignment and stacking operation are performed as follows: (a) For the first intermediate bit sequence The length is greater than the second intermediate bit sequence The length of the case, i.e. Nw > Nw' Superimposed bit sequences The index is i bits It is the first intermediate bit sequence The index is bits With the second intermediate bit sequence The index is bits Add to GF(2), that is, , in, It is a superimposed bit sequence The length, and ; It equals one of the following values: .

[0429] (b) For the first intermediate bit sequence The length is less than the second intermediate bit sequence The length, i.e. Nw < Nw' The center alignment and overlay operation is performed as follows: the overlay bit sequence is... The index is i The bits are set as the second intermediate bit sequence w ' = [ w '0, w '1, ..., w ' Nw'-1 The index in ] is bits (against or ), superimposed bit sequence The index is i bits It is the first intermediate bit sequence The index is bits With the second intermediate bit sequence The index is bits On GF(2) Adding together, that is: , in, It is a superimposed bit sequence The length, and ; It equals one of the following values: .

[0430] 3.28 Example 28: (Fifth example of w and w' based on E, E', N, N') Example 28 is based on Examples 4 to 7, Examples 10 to 11, Examples 18 to 19 and Examples 22 to 23.

[0431] As shown in Table 12, in Example 28, the first intermediate bit sequence w = [ w 0, w 1, ..., w Nw-1 ] and the second intermediate bit sequence w' = [ w' 0, w' 1, ..., w' Nw'-1 Configure it as follows: Example 1: First rate matched output bit sequence (or first bit selected output bit sequence) E The length is less than the size of the first polarization matrix. N ,Right now E < N And the second rate matches the output bit sequence (or the second bit selects the output bit sequence). E' The length is less than the size of the second polarization matrix. N' (Right now E' < N' ), the first intermediate bit sequence w = [ w 0, w 1, ..., w Nw-1 Set to the first rate-matched output bit sequence (or the first bit-selected output bit sequence). e , the second intermediate bit sequence w' = [ w' 0, w' 1, ..., w' Nw'-1 Set to the second rate-matched output bit sequence (or the second bit-selected output bit sequence). e Specific examples and embodiments are shown in Embodiments 4 to 7, and the corresponding illustrations are shown in Figures 9A, 9B, 9C and 9D.

[0432] Example 2: First rate matched output bit sequence (or first bit selected output bit sequence) E The length is less than the size of the first polarization matrix. N ,Right now E < N And the second rate matches the output bit sequence (or the second bit selects the output bit sequence). E' The length is greater than the size of the second polarization matrix. N' (Right nowE' > N' ), the first intermediate bit sequence w = [ w 0, w 1, ..., w Nw-1 Set to the first rate-matched output bit sequence (or the first bit-selected output bit sequence). e , the second intermediate bit sequence w' = [ w' 0, w' 1, ..., w' Nw'-1 Set as the output bit sequence of the second polarization transform. d' Specific examples are shown in Examples 18 and 19, and the corresponding illustrations are shown in Figures 19A and 19B.

[0433] Example 3: First rate matched output bit sequence (or first bit selected output bit sequence) E The length is greater than the size of the first polarization matrix. N ,Right now And the second rate matches the output bit sequence (or the second bit selects the output bit sequence). E' The length is less than the size of the second polarization matrix. N' (Right now E' < N' ), the first intermediate bit sequence w = [ w 0, w 1, ..., w Nw-1 Set as the output bit sequence of the first polarization transform. d , the second intermediate bit sequence w' = [ w' 0, w' 1, ..., w' Nw'-1 Set to the second rate-matched output bit sequence (or the second bit-selected output bit sequence). e Specific examples are Examples 10 and 11, and the corresponding illustrations are shown in Figures 14A and 14B.

[0434] Example 4: First rate matched output bit sequence (or first bit selected output bit sequence) E The length is greater than the size of the first polarization matrix. N ,Right now And the second rate matches the output bit sequence (or the second bit selects the output bit sequence). E' The length is greater than the size of the second polarization matrix. N' (Right nowE' > N' ), the first intermediate bit sequence w = [ w 0, w 1, ..., w Nw-1 Set as the output bit sequence of the first polarization transform. d , the second intermediate bit sequence w' = [ w' 0, w' 1, ..., w' Nw'-1 Set as the output bit sequence of the second polarization transform. d’ Specific examples and embodiments are shown in Examples 22 and 23, and the corresponding illustrations are shown in Figures 22A and 23B.

[0435] From Examples 1 to 4, if the first intermediate bit sequence The length is greater than the second intermediate bit sequence The length, i.e. Nw > Nw' The center alignment and overlay operation is performed as follows: overlay bit sequences The index is i bits It is the first intermediate bit sequence The index is bits With the second intermediate bit sequence The index is bits Add to GF(2), that is, , in, It is a superimposed bit sequence The length, and ; It equals one of the following values: .

[0436] From examples 1 to 4, if the first intermediate bit sequence The length is less than the second intermediate bit sequence The length, i.e. Nw < Nw' The center alignment and overlay operation is performed as follows: the overlay bit sequence is... The index is i The bits are set as the second intermediate bit sequence w ' = [ w '0, w '1, ..., w 'Nw'-1 The index in ] is bits (against or ).for Superimposed bit sequences The index is i bits It is the first intermediate bit sequence The index is bits With the second intermediate bit sequence The index is The bits in GF(2) are targeted Adding together, that is: , in, It is a superimposed bit sequence The length, and ; It equals one of the following values: .

[0437] 3.29 Example 29: (w and w' based on threshold X) 1 ) Example 29 is based on Examples 24 and 28.

[0438] In Example 29, the first intermediate bit sequence w = [ w 0, w 1, ..., w Nw-1 ] and the second intermediate bit sequence w' =[ w' 0, w' 1, ..., w' Nw'-1 Configure it as follows: Example 1: The length of the second rate-matched output bit sequence (or the length of the second bit-selected output bit sequence). E’ Greater than the first threshold X Case 1, i.e. E'>X 1. First intermediate bit sequence w = [ w 0, w 1, ..., w Nw-1 ] and the second intermediate bit sequence w' = [ w' 0, w' 1, ..., w' Nw'-1Set up according to the method in Example 28; Example 2: The length of the second rate-matched output bit sequence (or the length of the second bit-selected output bit sequence). E’ Less than the first threshold X Case 1, i.e. E' <X 1. First intermediate bit sequence w = [ w 0, w 1, ..., w Nw-1 ] and the second intermediate bit sequence w' = [ w' 0, w' 1, ..., w' Nw'-1 The method is set according to Example 24; wherein, the first threshold is... X 1 is one of the following values: ,in E It is the length of the first rate-matched output bit sequence (or the length of the first bit-selected output bit sequence). It is the first polarization matrix Size, and It is a positive real number. The first specific example is . The second specific example is . The third specific example is . The fourth specific example is . The fifth specific example is . The first specific example is . The second specific example is 0. The third specific example is . The fourth specific example is . The fifth specific example is .

[0439] 3.30 Example 30: (w and w' based on) K , E , E '、 N , N 'and two thresholds X 1 、 X 2 ） Example 30 is based on Example 27.

[0440] In Example 29, if Less than the first threshold and Greater than the second threshold Then, the first intermediate bit sequence is set according to the method in Example 27. w = [ w 0, w 1, ..., w Nw-1 ] and the second intermediate bit sequence w' = [ w' 0, w ' 1, ..., w' Nw'-1 ],in K For the input bit sequence c = [ c 0, c 1, ..., c K-1 The length of ]; E The length of the first rate-matched output bit sequence (or the first bit-selected output bit sequence); the first threshold. A real number greater than zero and less than one; second threshold It is one of the following values: ;in, It is the first polarization matrix Size, and It is a positive real number. The first specific example is . The second specific example is . The first specific example is . The second specific example is . The third specific example is . The fourth specific example is . The fifth specific example is . The first specific example is . The second specific example is 0. The third specific example is . The fourth specific example is . The fifth specific example is .

[0441] 3.31 Example 31: (w and w' based on) K , E , E '、 N , N 'and two thresholds X 1 、 X 2） Example 31 is based on Examples 24 and 27.

[0442] In embodiment 31, the first intermediate bit sequence w = [ w 0, w 1, ..., w Nw-1 ] and the second intermediate bit sequence w' =[ w' 0, w' 1, ..., w' Nw'-1 Configure it as follows.

[0443] Example 1: If Less than the first threshold and Greater than the second threshold Then the first intermediate bit sequence w = [ w 0, w 1, ..., w Nw-1 ] and the second intermediate bit sequence w' = [ w' 0, w' 1, ..., w' Nw'-1 Determined according to the method in Example 27.

[0444] Example 2: If Greater than the first threshold Then the first intermediate bit sequence w = [ w 0, w 1, ..., w Nw-1 ] and the second intermediate bit sequence w' = [ w' 0, w' 1, ..., w' Nw'-1 Determined according to the method in Example 24.

[0445] K It is the input bit sequence c = [ c 0, c 1, ..., c K-1 The length of ]; E It is the length of the first rate-matched output bit sequence (or the length of the first bit-selected output bit sequence); the first threshold It is a real number greater than zero and less than one; the second threshold It is one of the following values: ;in, It is the first polarization matrix Size, and It is a positive real number. The first specific example is . The second specific example is . The first specific example is . The second specific example is . The third specific example is . The fourth specific example is . The fifth specific example is . The first specific example is . The second specific example is 0. The third specific example is . The fourth specific example is . The fifth specific example is .

[0446] 3.32 Example 32: (w and w' based on) K , E , E '、 N , N 'and two thresholds X 1 、 X 2 ） Example 33 is based on Examples 25 and 27.

[0447] In embodiment 32, the first intermediate bit sequence w = [ w 0, w 1, ..., w Nw-1 ] and the second intermediate bit sequence w' =[ w' 0, w' 1, ..., w' Nw'-1 Configure it as follows.

[0448] Example 1: If Less than the first threshold and Greater than the second threshold Then the first intermediate bit sequence w = [ w 0,w 1, ..., w Nw-1 ] and the second intermediate bit sequence w' = [ w' 0, w' 1, ..., w' Nw'-1 Determined according to the method in Example 27.

[0449] Example 2: If Greater than the first threshold Then the first intermediate bit sequence w = [ w 0, w 1, ..., w Nw-1 ] and the second intermediate bit sequence w' = [ w' 0, w' 1, ..., w' Nw'-1 Determined according to the method in Example 25.

[0450] K is the length of the input bit sequence c = [c0, c1, ..., cK-1]; E is the length of the first rate-matched output bit sequence (or the length of the first bit-selected output bit sequence); the first threshold is a real number greater than zero and less than one; the second threshold is one of the following values: ;in, It is the first polarization matrix Size, and It is a positive real number. The first specific example is . The second specific example is . The first specific example is . The second specific example is . The third specific example is . The fourth specific example is . The fifth specific example is . The first specific example is . The second specific example is 0. The third specific example is . The fourth specific example is . The fifth specific example is .

[0451] 3.33 Example 33: (w and w' based on) K , E , E '、 N , N 'and two thresholds X 1 、 X 2 ） Example 33 is based on Examples 26 and 27.

[0452] In embodiment 33, the first intermediate bit sequence w = [ w 0, w 1, ..., w Nw-1 ] and the second intermediate bit sequence w' =[ w' 0, w' 1, ..., w' Nw'-1 Configure it as follows.

[0453] Example 1: If Less than the first threshold and Greater than the second threshold Then the first intermediate bit sequence w = [ w 0, w 1, ..., w Nw-1 ] and the second intermediate bit sequence w' = [ w' 0, w' 1, ..., w' Nw'-1 Determined according to the method in Example 27.

[0454] Example 2: If Greater than the first threshold Then the first intermediate bit sequence w = [ w 0, w 1, ..., w Nw-1 ] and the second intermediate bit sequence w' = [ w' 0, w' 1, ..., w' Nw'-1 Determined according to the method in Example 26.

[0455] K It is the input bit sequence c = [ c 0,c 1, ..., c K-1 The length of ]; E It is the length of the first rate-matched output bit sequence (or the length of the first bit-selected output bit sequence); the first The threshold is a real number greater than zero and less than one; the second threshold It is one of the following values: ;in, It is the first polarization matrix Size, and It is a positive real number. The first specific example is . The second specific example is . The first specific example is . The second specific example is . The third specific example is . The fourth specific example is . The fifth specific example is . The first specific example is . The second specific example is 0. The third specific example is . The fourth specific example is . The fifth specific example is .

[0456] 3.34 Example 34: (w and w' based on) K , E , E '、 N , N 'and two thresholds X 1 、 X 2 ） Example 34 is based on Example 27.

[0457] In embodiment 34, the first intermediate bit sequence w = [ w 0, w 1, ..., w Nw-1 ] and the second intermediate bit sequence w' =[ w' 0, w' 1, ..., w' Nw'-1 Configure it as follows.

[0458] Example 1: If Less than the first threshold and Greater than the second threshold Then the first intermediate bit sequence w = [ w 0, w 1, ..., w Nw-1 ] and the second intermediate bit sequence w' = [ w' 0, w' 1, ..., w' Nw'-1 Determined according to the method in Example 27.

[0459] Example 2: If Greater than the first threshold Then the first intermediate bit sequence w = [ w 0, w 1, ..., w Nw-1 ] and the second intermediate bit sequence w' = [ w' 0, w' 1, ..., w' Nw'-1 Determined according to the method in Example 27.

[0460] K It is the input bit sequence c = [ c 0, c 1, ..., c K-1 The length of ]; E It is the length of the first rate-matched output bit sequence (or the length of the first bit-selected output bit sequence); the first The threshold is a real number greater than zero and less than one; the second threshold It is one of the following values: ;in, It is the first polarization matrix Size, and It is a positive real number. The first specific example is . The second specific example is . The first specific example is . The second specific example is . The third specific example is . The fourth specific example is . The fifth specific example is . The first specific example is . The second specific example is 0. The third specific example is . The fourth specific example is . The fifth specific example is .

[0461] 3.35 Example 35: (w and w' based on) K , E , E '、 N , N 'and two thresholds X 1 、 X 2 ） Example 35 is based on Examples 27 and 28.

[0462] In Example 35, the first intermediate bit sequence w = [ w 0, w 1, ..., w Nw-1 ] and the second intermediate bit sequence w' =[ w' 0, w' 1, ..., w' Nw'-1 Configure it as follows.

[0463] Example 1: If Less than the first threshold and Greater than the second threshold Then the first intermediate bit sequence w = [ w 0, w 1, ..., w Nw-1 ] and the second intermediate bit sequence w' = [ w' 0, w' 1, ..., w' Nw'-1 Determined according to the method in Example 27.

[0464] Example 2: If Greater than the first threshold Then the first intermediate bit sequence w = [ w 0, w 1, ..., wNw-1 ] and the second intermediate bit sequence w' = [ w' 0, w' 1, ..., w' Nw'-1 Determined according to the method in Example 28.

[0465] K It is the input bit sequence c = [ c 0, c 1, ..., c K-1 The length of ]; E It is the length of the first rate-matched output bit sequence (or the length of the first bit-selected output bit sequence); the first The threshold is a real number greater than zero and less than one; the second threshold It is one of the following values: ;in, It is the first polarization matrix Size, and It is a positive real number. The first specific example is . The second specific example is . The first specific example is . The second specific example is . The third specific example is . The fourth specific example is . The fifth specific example is . The first specific example is . The second specific example is 0. The third specific example is . The fourth specific example is . The fifth specific example is .

[0466] 3.36 Example 36: (A device for sending data from the first node to the second node) Example 36 is based on at least one of Examples 1 and Examples 3 to 35.

[0467] 3.37 Example 37: (A device for the second node to receive signals from the first node) Example 37 is based on at least one of Examples 2 to 35.

[0468] The technology described in this patent application includes the following aspects: A first digital communication (e.g., wireless communication) method includes: a first node acquiring an input bit sequence. c =[ c 0, c 1, ..., c K-1 The first node determines the first intermediate bit sequence. w = [ w 0, w 1, ..., w Nw-1 ] and the second intermediate bit sequence w' = [ w' 0, w' 1, ..., w' Nw'-1 The first node processes the first intermediate bit sequence. w = [ w 0, w 1, ..., w Nw-1 ] and the second intermediate bit sequence w' = [ w' 0, w' 1, ..., w' Nw'-1 Perform a center alignment and overlay operation to determine the overlay bit sequence. h = [ h 0, h 1, ..., h H-1 The first node is based on a superimposed bit sequence. h = [ h 0, h 1, ..., h H-1 Determine the output bit sequence f = [ f 0, f 1, ..., f F-1 ]; and the first node sends the output bit sequence to the second node. f =[ f 0, f 1, ..., f F-1 [The signal].

[0469] The second digital communication method includes: a second node receiving an output bit sequence sent by a first node.f =[ f 0, f 1, ..., f F-1 The signal; the second node determines the input bit sequence. c = [ c 0, c 1, ..., c K-1 The estimation of ; where the output bit sequence f = [ f 0, f 1, ..., f F-1 The first node determines the result based on the superimposed bit sequence. h = [ h 0, h 1, ..., h H-1 Determined; among which, superimposed bit sequences h = [ h 0, h 1, ..., h H-1 The first node processes the first intermediate bit sequence. w = [ w 0, w 1, ..., w Nw-1 ] and the second intermediate bit sequence w ' = [ w '0, w '1, ..., w ' Nw'-1 The intermediate bit sequence is determined by performing intermediate alignment and superposition; wherein, the first intermediate bit sequence w = [ w 0, w 1, ..., w Nw-1 The first node determines the input bit sequence based on the input bit sequence. c = [ c 0, c 1, ..., c K-1 Confirmed, second intermediate bit sequence w ' = [ w '0, w '1, ..., w ' Nw'-1 The first node determines the input bit sequence based on the input bit sequence. c = [ c 0, c 1, ..., cK-1 A portion of ] has been determined.

[0470] In some embodiments, the first intermediate bit sequence w = [ w 0, w 1, ..., w Nw-1 This is determined by performing at least one of the following operations: adding frozen bits, rate analysis, pre-transformation, or based on the first polarization matrix. Polarization transformation operation, interleaving operation, bit selection operation, rate matching operation.

[0471] In some embodiments, the second intermediate bit sequence w ' = [ w '0, w '1, ..., w ' Nw'-1 This is determined by performing at least one of the following operations: determining the extended bit operation, CRC appending operation, adding frozen bits operation, rate analysis operation, pre-transformation operation, or based on the second polarization matrix. Polarization transformation operation, interleaving operation, bit selection operation, rate matching operation.

[0472] In some embodiments, the output bit sequence f = [ f 0, f 1, ..., f F-1 This is determined by performing at least one of the following operations: outputting the bit sequence. f = [ f 0, f 1, ..., f F-1 Set to equal the superimposed bit sequence. h = [ h 0, h 1, ..., h H-1 Interleaving operation, bit selection operation.

[0473] In some embodiments, the first polarization matrix Not equal to the second polarization matrix .

[0474] In one embodiment, the first intermediate bit sequence w = [ w 0, w 1, ..., w Nw-1 The length of the input bit sequence is determined by at least one of the following:K Data bit index set Q First polarization matrix First polarization matrix Size N Output length of bit selection operation E Output length of rate matching operation E Ordered rate matching index set R = <R (0), R (1), ..., R ( N r -2), R ( N r -1) > Interleaver pattern J Generate bit sequence on GF(2) g = [ g 0, g 1, ..., g m Generating polynomials on GF(2) g ( D ) = g 0+ g 1· D + ... + g m-1 · D m-1 + g m · D m The recursive feedback bit sequence on GF(2) q = [ q 0, q 1, ..., q m ], recursive feedback polynomial on GF(2) q ( D ) = q 0+ q 1· D + ... + q m · D m , length is m +1 state bit sequence t = [ t 0, t 1, ..., t m-1 , t m ], pre-transformation matrix T Pre-transformed input index setP I Pre-transformed output index set P O Pre-transformed frozen bit sequence r , memory length m.

[0475] In some embodiments, the second intermediate bit sequence w ' = [ w '0, w '1, ..., w ' Nw'-1 Determined by at least one of the following: replicating the bit index set Data bit index set Q’ Second polarization matrix Second polarization matrix Size N’ Output length of bit selection operation E’ Output length of rate matching operation E’ Ordered rate matching index set R' = <R’ (0), R’ (1), ..., R’ ( N r -2) Interweaver Mode J’ Generate bit sequence on GF(2) g’ = [ g’ 0, g’ 1, ..., g’ m Generating polynomials on GF(2) g’ ( D ) = g’ 0+ g’ 1· D + ... + g’ m-1 · D m-1 + g’ m · D m The recursive feedback bit sequence on GF(2) q’ = [ q’ 0, q’ 1, ..., q’ m ] , recursive feedback polynomial on GF(2) q’ ( D ) = q’ 0+ q’ 1· D + ... + q’ m ·D m , length is m’ +1 state bit sequence t’ = [ t’ 0, t’ 1, ..., t’ m-1 , t’ m ], pre-transformation matrix T’ Pre-transformed input index set P’ I Pre-transformed output index set P’ O Pre-transformed frozen bit sequence r’ Memory length m’ , generating polynomials in a loop .

[0476] In some embodiments, the first intermediate bit sequence w = [ w 0, w 1, ..., w Nw-1 The length of ] is equal to one of the following values: the output length of the rate matching operation, the output length of the bit selection operation, the output length of the interleaving operation, or the length based on the first polarization matrix. The output length of the polarization transform, the first polarization matrix The size of the polarization matrix.

[0477] In some cases, the second intermediate bit sequence w’ = [ w’ 0, w’ 1, ..., w’ Nw’-1 The length of ] is equal to one of the following values: the output length of the rate matching operation, the output length of the bit selection operation, the output length of the interleaving operation, or the length based on the second polarization matrix. The output length of the polarization transform, the second polarization matrix Polarization matrix size, output bit sequence f The length.

[0478] In some embodiments, the first intermediate bit sequence w = [ w 0, w 1, ..., w Nw-1 [Icons] is one of the following: a portion of the output of a rate matching operation, a portion of the output of a bit selection operation, a portion of the output of an interleaving operation, or based on the first polarization matrix. It is a part of the output of the polarization transform.

[0479] In some embodiments, the second intermediate bit sequence w’ = [ w’ 0, w’ 1, ..., w’ Nw’-1 [Icons] is one of the following: a portion of the output of a rate matching operation, a portion of the output of a bit selection operation, a portion of the output of an interleaving operation, or based on a second polarization matrix. It is a part of the output of the polarization transform.

[0480] In some embodiments, superimposed bit sequences h = [ h 0, h 1, ..., h H-1 The length of ] is equal to the second intermediate bit sequence. w ' = [ w '0, w '1, ..., w ' Nw'-1 The length of ].

[0481] In some embodiments, the intermediate alignment and overlay operation includes: the first node obtaining a first intermediate bit sequence. w =[ w 0, w 1, ..., w Nw-1 ] and the second intermediate bit sequence w ' = [ w '0, w '1, ..., w ' Nw'-1 ]; and the first node is determined to have a length of at least one of the following: H superimposed bit sequence h = [ h 0, h 1, ..., h H-1 ] : , , , in, Nw It is the first intermediate bit sequence w Length, Nw' It is the second intermediate bit sequence w The length of '.

[0482] In some embodiments, for Superimposed bit sequences h = [ h 0, h 1, ...,h H-1 The index in the middle is i bits It is the first intermediate bit sequence w = [ w 0, w 1, ..., w Nw-1 The index in the middle is bits With the second intermediate bit sequence w ' = [ w '0, w '1, ..., w ' Nw'-1 The index in the middle is bits Add to GF(2), that is,

[0483] in, It equals one of the following values: .

[0484] In one embodiment, for Superimposed bit sequences h = [ h 0, h 1, ..., h H-1 The index in the middle is i bits Set as the second intermediate bit sequence w ' = [ w '0, w '1, ..., w ' Nw'-1 The index in the middle is bits ,in or , It equals one of the following values: .

[0485] In one embodiment, for Superimposed bit sequences h = [ h 0, h 1, ..., h H-1 The index in ] is i bits It is the first intermediate bit sequence w = [ w 0, w 1, ...,w Nw-1 The index in the middle is bits With the second intermediate bit sequence w ' = [ w '0, w '1, ..., w ' Nw'-1 The index in ] is bits The result of adding over GF(2), ,Right now, , in, It equals one of the following values: .

[0486] In some embodiments, for Superimposed bit sequences h = [ h 0, h 1, ..., h H-1 The index in the middle is i bits It is the first intermediate bit sequence w = [ w 0, w 1, ..., w Nw-1 The index in the middle is bits With the second intermediate bit sequence w ' = [ w '0, w '1, ..., w ' Nw'-1 The index in the middle is bits Add to GF(2), that is, , in, It equals one of the following values: .

[0487] In one embodiment, the first intermediate bit sequence w = [ w 0, w 1, ..., w Nw-1 ] and the second intermediate bit sequence w’ = [ w’ 0, w’ 1, ...,w’ Nw’-1 The length of the input bit sequence is determined by at least one of the following: the length of the rate matching operation after polarization transformation through the first polarization matrix, the output length of the rate matching operation after polarization transformation through the second polarization matrix, the output length of the bit selection operation after polarization transformation through the first polarization matrix, the output length of the bit selection operation after polarization transformation through the second polarization matrix, the size of the first polarization matrix, the size of the second polarization matrix, the first threshold and / or the second threshold.

[0488] Figure 24 shows an example flowchart for transmitting signals. Operation 2402 includes the first node acquiring the input bit sequence. c = [ c 0, c 1, ..., c K-1 ],in K This is the input length of the input bit sequence. Operation 2404 includes the first node being based on the input bit sequence. c = [ c 0, c 1, ..., c K-1 One or more operations are performed to determine the first intermediate bit sequence. w = [ w 0, w 1, ..., w Nw-1 ] and the second intermediate bit sequence w' = [ w' 0, w' 1, ..., w' Nw'-1 ],in Nw It is the first intermediate bit sequence w The first length, Nw ' is the second intermediate bit sequence w' The second length. Operation 2406 includes, first node, by processing the first intermediate bit sequence. w = [ w 0, w 1, ..., w Nw-1 ] and the second intermediate bit sequence w ' =[ w '0, w '1, ..., w ' Nw'-1 Perform a center alignment and overlay operation to determine the overlay bit sequence. h = [ h 0, h1, ..., h H-1 ],in H It is the third length of the superimposed bit sequence. Operation 2408 includes the first node being based on the superimposed bit sequence. h = [ h 0, h 1, ..., h H-1 Determine the output bit sequence. f = [ f 0, f 1, ..., f F-1 ],in F This is the fourth length of the output bit sequence. Operation 2410 includes the first node sending the output bit sequence to the second node. f = [ f 0, f 1, ..., f F-1 [The signal].

[0489] Figure 25 illustrates an example method for estimating an input bit sequence. Operation 2502 includes a second node receiving a signal transmitted by a first node, the signal comprising the output bit sequence. f = [ f 0, f 1, ..., f F-1 ], where the output bit sequence f = [ f 0, f 1, ..., f F-1 Based on superimposed bit sequences h = [ h 0, h 1, ..., h H-1 ], superimposed bit sequence h = [ h 0, h 1, ..., h H-1 Based on the first intermediate bit sequence w = [ w 0, w 1, ..., w Nw-1 ] and the second intermediate bit sequence w ' =[ w '0, w '1, ..., w ' Nw'-1The intermediate alignment and overlay operation performed, wherein the first intermediate bit sequence w = [ w 0, w 1,..., w Nw-1 Based on the input bit sequence c = [ c 0, c 1, ..., c K-1 ], second intermediate bit sequence w ' = [ w '0, w '1,..., w ' Nw'-1 Based on the input bit sequence c = [ c 0, c 1, ..., c K-1 Part of ], in which K It is the input length of the input bit sequence. Nw It is the first intermediate bit sequence w The first length, Nw ' is the second intermediate bit sequence w' The second length, H It is the third length of the superimposed bit sequence. F This is the fourth length of the output bit sequence. Operation 2504 includes determining the input bit sequence by the second node. c = [ c 0, c 1, ..., c K-1 The estimate.

[0490] In some embodiments, the first intermediate bit sequence w = [ w 0, w 1, ..., w Nw-1 This is determined by performing one or more of the following operations: adding frozen bits, rate analysis, pre-transformation, or based on the first polarization matrix. The polarization transformation operation, interleaving operation, bit selection operation, and / or rate matching operation. In one embodiment, the input bit sequence... c = [ c 0, c 1, ..., c K-1 Perform add / freeze bit operations and / or rate analysis operations. In one embodiment, this can be performed based on the input bit sequence. c= [ c 0, c 1, ..., c K-1 The obtained information is used to perform a pre-transformation operation based on the first polarization matrix. Polarization transformation operations, interleaving operations, bit selection operations, and / or rate matching operations. In some embodiments, the first polarization matrix... Not equal to the second polarization matrix .

[0491] In some embodiments, the second intermediate bit sequence w ' = [ w '0, w '1, ..., w ' Nw'-1 This is determined by performing one or more of the following operations: determining the extended bit operation, CRC appending operation, adding frozen bits operation, rate analysis operation, pre-transformation operation, and operation based on the second polarization matrix. The polarization transformation operation, interleaving operation, bit selection operation, and / or rate matching operation. In some embodiments, determining the extended bit operation is performed on the input bit sequence. c = [ c 0, c 1, ..., c K-1 This is performed as part of the process. In one embodiment, it is based on the input bit sequence. c = [ c 0, c 1, ..., c K-1 The information obtained from a portion of the data is used to perform CRC appending, adding frozen bits, rate analysis, pre-transformation, and second polarization matrix-based operations. Polarization transformation operations, interleaving operations, bit selection operations, and / or rate matching operations.

[0492] In some embodiments, the first polarization matrix Not equal to the second polarization matrix In some embodiments, the output bit sequence f = [ f 0, f 1, ..., f F-1 This is determined by performing one or more of the following operations: outputting the bit sequence. f = [ f 0, f 1, ..., f F-1 Set to equal the superimposed bit sequence.h = [ h 0, h 1, ..., h H-1 Interleaving operation, bit selection operation. In one embodiment, the first intermediate bit sequence w = [ w 0, w 1, ..., w Nw-1 One or more of the following determine: the length of the input bit sequence K Data bit index set Q First polarization matrix First polarization matrix Size N The fifth length of the output of the bit selection operation E The sixth length of the output of the rate matching operation E Ordered rate matching index set R =<R (0), R (1), ..., R ( N r -2), R ( N r -1) > Interleaver pattern J Generate bit sequence on GF(2) g = [ g 0, g 1,..., g m Generating polynomials on GF(2) g ( D ) = g 0+ g 1· D + ... + g m-1 · D m-1 + g m · D m The recursive feedback bit sequence on GF(2) q = [ q 0, q 1, ..., q m ], recursive feedback polynomial on GF(2) q ( D ) = q 0+ q 1·D + ... + q m · D m , length is m +1 state bit sequence t = [ t 0, t 1, ..., t m-1 , t m ], pre-transformation matrix T Pre-transformed input index set P I Pre-transformed output index set P O Pre-transformed frozen bit sequence r , or the memory length m.

[0493] In some embodiments, the second intermediate bit sequence w ' = [ w '0, w '1, ..., w ' Nw'-1 Determined by one or more of the following: replicating bit index set Data bit index set Q’ Second polarization matrix Second polarization matrix Size N’ The fifth length of the output of the bit selection operation E’ The sixth length of the output of the rate matching operation E’ Ordered rate matching index set R' = <R’ (0), R’ (1), ..., R’ ( N r -2) Interweaver Mode J’ Generate bit sequence on GF(2) g’ = [ g’ 0, g’ 1, ..., g’ m Generating polynomials on GF(2) g’ ( D ) = g’ 0+ g’ 1· D + ... + g’ m-1 · D m-1 + g’ m ·D m The recursive feedback bit sequence on GF(2) q’ =[ q’ 0, q’ 1, ..., q’ m ] , recursive feedback polynomial on GF(2) q’ ( D ) = q’ 0+ q’ 1· D + ... + q’ m · D m , length is m’ +1 state bit sequence t’ = [ t’ 0, t’ 1, ..., t’ m-1 , t’ m ], pre-transformation matrix T’ Pre-transformed input index set P’ I Pre-transformed output index set P’ O Pre-transformed frozen bit sequence r’ Memory length m’ or generate polynomials in a loop .

[0494] In some embodiments, the first intermediate bit sequence w = [ w 0, w 1, ..., w Nw-1 The length of ] is equal to one of the following values: the sixth length of the output of the rate matching operation, the fifth length of the output of the bit selection operation, the seventh length of the output of the interleaving operation, and the length based on the first polarization matrix. The eighth length of the output of the polarization transform, the first polarization matrix The size of the polarization matrix. In some embodiments, the second intermediate bit sequence w’ = [ w’ 0, w’ 1, ..., w’ Nw’-1 The length of ] is equal to one of the following values: the sixth length of the output of the rate matching operation, the fifth length of the output of the bit selection operation, the seventh length of the output of the interleaving operation, or the length based on the second polarization matrix. The eighth length and the second polarization matrix of the output of the polarization transformation Polarization matrix size, output bit sequence f The fourth length.

[0495] In some embodiments, the first intermediate bit sequence w = [ w 0, w 1, ..., w Nw-1 [ is] one of the following: a portion of the second output of the rate matching operation, a portion of the first output of the bit selection operation, a portion of the third output of the interleaving operation, based on the first polarization matrix. Part of the fourth output of the polarization transform. In some embodiments, the second intermediate bit sequence w’ = [ w’ 0, w’ 1, ..., w’ Nw’-1 [ ] is one of the following items: a portion of the second output of the rate matching operation, a portion of the first output of the bit selection operation, a portion of the third output of the interleaving operation, based on the second polarization matrix. Part of the fourth output of the polarization transform. In some embodiments, the superimposed bit sequence h =[ h 0, h 1, ..., h H-1 The third length is equal to the second intermediate bit sequence. w ' = [ w '0, w '1, ..., w ' Nw'-1 The second length of ].

[0496] In some embodiments, performing the intermediate alignment and overlay operation includes: the first node obtaining a first intermediate bit sequence. w = [ w 0, w 1, ..., w Nw-1 ] and the second intermediate bit sequence w ' = [ w '0, w '1, ..., w ' Nw'-1 ]; and the first node determines the third length by one or more of the following: H superimposed bit sequence h = [ h 0, h 1, ..., h H-1 ] : , , , in Nw It is the first intermediate bit sequence w The first length, Nw' It is the second intermediate bit sequence w The second length of '. In some embodiments, for Superimposed bit sequences h = [ h 0, h 1, ..., h H-1 The index in the middle is i bits It is the first intermediate bit sequence w = [ w 0, w 1, ..., w Nw-1 The index in the middle is bits With the second intermediate bit sequence w ' = [ w '0, w '1, ..., w ' Nw'-1 The index in the middle is bits Add them on GF(2).

[0497] In some embodiments, ,in It equals one of the following values: In one embodiment, for Superimposed bit sequences h = [ h 0, h 1, ..., h H-1 The index in the middle is i bits Set as the second intermediate bit sequence w ' = [ w '0, w '1, ..., w ' Nw'-1 The index in the middle is bits ,in or , It equals one of the following values: In one embodiment, for Superimposed bit sequences h = [ h 0,h 1, ..., h H-1 The index in ] is i bits It is the first intermediate bit sequence w = [ w 0, w 1, ..., w Nw-1 The index in the middle is bits With the second intermediate bit sequence w ' = [ w '0, w '1, ..., w ' Nw'-1 The index in ] is bits The result of adding over GF(2), where, In some embodiments, It equals one of the following values: .

[0498] In some embodiments, for Superimposed bit sequences h = [ h 0, h 1, ..., h H-1 The index in the middle is i bits It is the first intermediate bit sequence w = [ w 0, w 1, ..., w Nw-1 The index in the middle is bits With the second intermediate bit sequence w ' = [ w '0, w '1, ..., w ' Nw'-1 The index in the middle is bits Add over GF(2). In some embodiments, ,in It equals one of the following values: .

[0499] In one embodiment, the first intermediate bit sequence w = [ w 0, w 1, ..., w Nw-1] and the second intermediate bit sequence w’ = [ w’ 0, w’ 1, ..., w’ Nw’-1 The length is determined by one or more of the following: the length of the input bit sequence, the sixth length of the output of the rate matching operation after polarization transformation through the first polarization matrix, the sixth length of the output of the rate matching operation after polarization transformation through the second polarization matrix, the fifth length of the output of the bit selection operation after polarization transformation through the first polarization matrix, the fifth length of the output of the bit selection operation after polarization transformation through the second polarization matrix, the size of the first polarization matrix, the size of the second polarization matrix, the first threshold and / or the second threshold.

[0500] Figure 26 shows an exemplary block diagram of a hardware platform 2600, which may be part of a network device (e.g., a base station) or a communication device (e.g., a user equipment (UE)). The hardware platform 2600 includes at least one processor 2610 and a memory 2605 storing instructions. When executed by the processor 2610, the instructions cause the hardware platform 2600 to perform the operations described in Figures 1 to 2600 of this patent document. Figure 25 And the operations described in the various embodiments. Transmitter 2615 sends or transmits information or data to another device. For example, a network device transmitter can send a message to a user device. Receiver 2620 receives information or data sent or transmitted by another device. For example, a user device can receive a message from a network device.

[0501] The implementation methods discussed above are applied to wireless communication. Figure 27 illustrates an example of a wireless communication system (e.g., a 5G or NR cellular network) including a base station 2720 and one or more user equipments (UEs) 2711, 2712, and 2713. In some embodiments, the UE accesses the BS (e.g., the network) using a communication link to the network (sometimes referred to as the uplink direction, as shown by dashed arrows 2731, 2732, and 2733), and then performs subsequent communication (e.g., the direction from the network to the UE, sometimes referred to as the downlink direction, as shown by arrows 2741, 2742, and 2743). In some embodiments, the BS sends information to the UE (sometimes referred to as the downlink direction, as shown by arrows 2741, 2742, and 2743), and then performs subsequent communication (e.g., the direction from the UE to the BS, sometimes referred to as the uplink direction, as shown by dashed arrows 2731, 2732, and 2733). UE can be, for example, a smartphone, tablet, mobile computer, machine-to-machine (M2M) device, Internet of Things (IoT) device, etc.

[0502] In this document, the term “exemplary” is used to mean “an example of” and, unless otherwise stated, does not imply an ideal or preferred embodiment.

[0503] Some embodiments described herein are described in the general context of methods or processes that may be implemented in one embodiment by a computer program product embodied in a computer-readable medium, including computer-executable instructions, such as program code executable by a computer in a networked environment. Computer-readable media may include removable and non-removable storage devices, including but not limited to read-only memory (ROM), random access memory (RAM), compact disc (CD), digital versatile disc (DVD), etc. Therefore, computer-readable media may include non-transitory storage media. Typically, program modules may include routines, programs, objects, components, data structures, etc., that perform a specific task or implement a specific abstract data type. Computer or processor-executable instructions, associated data structures, and program modules represent examples of program code for performing the steps of the methods disclosed herein. Specific sequences of these executable instructions or associated data structures represent examples of corresponding actions that implement the functionality described in these steps or processes.

[0504] Some of the disclosed embodiments may be implemented using hardware circuitry, software, or a combination thereof as devices or modules. For example, hardware circuitry implementations may include discrete analog and / or digital components, integrated, for example, as part of a printed circuit board. Alternatively or additionally, the disclosed components or modules may be implemented as application-specific integrated circuits (ASICs) and / or field-programmable gate arrays (FPGAs) devices. Some implementations may additionally or alternatively include a digital signal processor (DSP), a special-purpose microprocessor having an architecture optimized for the digital signal processing operational requirements associated with the functions disclosed herein. Similarly, various components or sub-components within each module may be implemented as software, hardware, or firmware. Connectivity between modules and / or between components within a module may be provided using any connection methods and media known in the art, including but not limited to communication via the Internet, wired or wireless networks using appropriate protocols.

[0505] While this document contains numerous specific details, these should not be construed as limiting the scope of the claimed invention, but rather as descriptions of features of particular embodiments. Certain features described in the context of individual embodiments may also be implemented in combination in a single embodiment. Conversely, various features described in the context of a single embodiment may also be implemented individually or in any suitable sub-combination in multiple embodiments. Furthermore, although features may be described above as acting in certain combinations or even initially claimed in this way, in some cases one or more features may be removed from the claimed combination, and the claimed combination may be for sub-combinations or variations thereof. Similarly, although operations are depicted in a specific order in the drawings, this should not be construed as requiring these operations to be performed in the specific order or sequence shown, or requiring the performance of all illustrated operations to achieve the desired result.

[0506] Only some implementation methods and examples have been described and illustrated. Other implementation methods, enhancements and variations may be made based on the content described and illustrated in this disclosure.

Claims

1. A data communication method, comprising: The first node obtains the input bit sequence. c = [ c 0, c 1, ..., c K-1 ],in K It is the input length of the input bit sequence; The first node is based on the input bit sequence. c = [ c 0, c 1, ..., c K-1 Perform one or more operations to determine the first intermediate bit sequence. w = [ w 0, w 1, ..., w Nw-1 ] and the second intermediate bit sequence w' = [ w' 0, w' 1, ..., w' Nw'-1 ],in Nw It is the first intermediate bit sequence w The first length, and Nw ' is the second intermediate bit sequence w The second length of '; The first node processes the first intermediate bit sequence. w = [ w 0, w 1, ..., w Nw-1 ] and the second intermediate bit sequence w ' =[ w '0, w '1, ..., w ' Nw'-1 Perform a center alignment and overlay operation to determine the overlay bit sequence. h = [ h 0, h 1, ..., h H-1 ],in H It is the third length of the superimposed bit sequence; The first node is based on a superimposed bit sequence. h = [ h 0, h 1, ..., h H-1 Determine the output bit sequence f = [ f 0, f 1, ..., f F-1 ],in F It is the fourth length of the output bit sequence; The first node sends a signal to the second node, the signal including an output bit sequence. f = [ f 0, f 1, ..., f F-1 ].

2. A data communication method, comprising: The second node receives a signal sent by the first node, the signal including an output bit sequence. f = [ f 0, f 1, ..., f F-1 ], The output bit sequence f = [ f 0, f 1, ..., f F-1 Based on superimposed bit sequences h = [ h 0, h 1, ..., h H-1 ], superimposed bit sequence h = [ h 0, h 1, ..., h H-1 Based on the first intermediate bit sequence w = [ w 0, w 1, ..., w Nw-1 ] and the second intermediate bit sequence w ' = [ w '0, w '1, ..., w ' Nw'-1 The intermediate alignment and overlay operation performed, wherein the first intermediate bit sequence w = [ w 0, w 1, ..., w Nw-1 Based on the input bit sequence c = [ c 0, c 1, ..., c K-1 ], second intermediate bit sequence w '= [ w '0, w '1, ..., w ' Nw'-1 Based on the input bit sequence c = [ c 0, c 1, ..., c K-1 Part of ], in which K It is the input length of the input bit sequence. Nw It is the first intermediate bit sequence w The first length, Nw ' is the second intermediate bit sequence w' The second length, H It is the third length of the superimposed bit sequence. F It is the fourth length of the output bit sequence; The second node determines the input bit sequence. c = [ c 0, c 1, ..., c K-1 The estimate.

3. The method according to claim 1 or 2, wherein, First intermediate bit sequence w = [ w 0, w 1, ..., w Nw-1 This is determined by performing one or more of the following operations: adding frozen bits, rate analysis, pre-transformation, or based on the first polarization matrix. Polarization transformation operation, interleaving operation, bit selection operation, and / or rate matching operation.

4. The method according to claim 3, wherein, For the input bit sequence c = [ c 0, c 1, ..., c K-1 Perform the add freeze bit operation and / or rate analysis operation.

5. The method according to claim 3, wherein, For input bit sequence c = [ c 0, c 1, ..., c K-1 The resulting information is used to perform: pre-transformation operation, based on the first polarization matrix. Polarization transformation operation, interleaving operation, bit selection operation, and / or rate matching operation.

6. The method according to claim 3, wherein, First polarization matrix Not equal to the second polarization matrix .

7. The method according to claim 1 or 2, wherein, Second intermediate bit sequence w ' = [ w '0, w '1, ..., w ' Nw'-1 This is determined by performing one or more of the following operations: determining the extended bit operation, CRC appending operation, adding frozen bits operation, rate analysis operation, pre-transformation operation, and operation based on the second polarization matrix. Polarization transformation operation, interleaving operation, bit selection operation, and / or rate matching operation.

8. The method according to claim 7, wherein, Determine the extended bit operation for the input bit sequence c = [ c 0, c 1,..., c K-1 The aforementioned part is executed.

9. The method according to claim 7, wherein, For input bit sequence c = [ c 0, c 1, ..., c K-1 The information obtained from the aforementioned part of the process involves: CRC appending, adding frozen bits, rate analysis, pre-transformation, and operation based on the second polarization matrix. Polarization transformation operation, interleaving operation, bit selection operation, and / or rate matching operation.

10. The method according to claim 7, wherein, First polarization matrix Not equal to the second polarization matrix .

11. The method according to claim 1 or 2, wherein, Output bit sequence f = [ f 0, f 1, ..., f F-1 This is determined by performing one or more of the following operations: outputting the bit sequence. f = [ f 0, f 1, ..., f F-1 Set to equal the superimposed bit sequence. h = [ h 0, h 1, ..., h H-1 Interleaving operation, bit selection operation.

12. The method according to claim 1 or 2, wherein, First intermediate bit sequence w = [ w 0, w 1, ..., w Nw-1 One or more of the following determine: the length of the input bit sequence K Data bit index set Q First polarization matrix First polarization matrix Size N The fifth length of the output of the bit selection operation E The sixth length of the output of the rate matching operation E Ordered rate matching index set R = <R (0), R (1), ..., R ( N r -2), R ( N r -1) > Interleaver pattern J Generate bit sequence on GF(2) g = [ g 0, g 1, ..., g m Generating polynomials on GF(2) g ( D ) = g 0+ g 1· D + ... + g m-1 · D m-1 + g m · D m The recursive feedback bit sequence on GF(2) q = [ q 0, q 1, ..., q m ], recursive feedback polynomial on GF(2) q ( D ) = q 0+ q 1· D + ... + q m · D m , length is m +1 state bit sequence t = [ t 0, t 1, ..., t m-1 , t m ], pre-transformation matrix T Pre-transformed input index set P I Pre-transformed output index set P O Pre-transformed frozen bit sequence r , or the memory length m.

13. The method according to claim 1 or 2, wherein, Second intermediate bit sequence w ' = [ w '0, w '1, ..., w ' Nw'-1 Determined by one or more of the following: replicating bit index set Data bit index set Q’ Second polarization matrix Second polarization matrix Size N’ The fifth length of the output of the bit selection operation E’ The sixth length of the output of the rate matching operation E’ Ordered rate matching index set R' = <R’ (0), R’ (1), ..., R’ ( N r -2) Interweaver Mode J’ Generate bit sequence on GF(2) g’ = [ g’ 0, g’ 1, ..., g’ m Generating polynomials on GF(2) g’ ( D ) = g’ 0+ g’ 1· D + ... + g’ m-1 · D m-1 + g’ m · D m The recursive feedback bit sequence on GF(2) q’ = [ q’ 0, q’ 1, ..., q’ m ], recursive feedback polynomial on GF(2) q’ ( D ) = q’ 0+ q’ 1· D + ... + q’ m · D m , length is m’ +1 state bit sequence t’ = [ t’ 0, t’ 1, ..., t’ m-1 , t’ m ], pre-transformation matrix T’ Pre-transformed input index set P’ I Pre-transformed output index set P’ O Pre-transformed frozen bit sequence r’ Memory length m’ or generate polynomials in a loop .

14. The method according to claim 1 or 2, wherein, First intermediate bit sequence w = [ w 0, w 1, ..., w Nw-1 The first length is equal to one of the following values: the sixth length of the output of the rate matching operation, the fifth length of the output of the bit selection operation, the seventh length of the output of the interleaving operation, and the length based on the first polarization matrix. The eighth length of the output of the polarization transform, the first polarization matrix The size of the polarization matrix.

15. The method according to claim 1 or 2, wherein, Second intermediate bit sequence w’ = [ w’ 0, w’ 1, ..., w ’ Nw’-1 The second length of ] is equal to one of the following values: the sixth length of the output of the rate matching operation, the fifth length of the output of the bit selection operation, the seventh length of the output of the interleaving operation, or the length based on the second polarization matrix. The eighth length and the second polarization matrix of the output of the polarization transformation Polarization matrix size, output bit sequence f The fourth length.

16. The method according to claim 1 or 2, wherein, First intermediate bit sequence w = [ w 0, w 1, ..., w Nw-1 [ is] one of the following: a portion of the second output of the rate matching operation, a portion of the first output of the bit selection operation, a portion of the third output of the interleaving operation, based on the first polarization matrix. It is part of the fourth output of the polarization transformation.

17. The method according to claim 1 or 2, wherein, Second intermediate bit sequence w’ = [ w’ 0, w’ 1, ..., w ’ Nw’-1 [ ] is one of the following items: a portion of the second output of the rate matching operation, a portion of the first output of the bit selection operation, a portion of the third output of the interleaving operation, based on the second polarization matrix. It is part of the fourth output of the polarization transformation.

18. The method according to claim 1 or 2, wherein, Superimposed bit sequence h = [ h 0, h 1, ..., h H-1 The third length is equal to the second intermediate bit sequence. w ' = [ w '0, w '1, ..., w ' Nw'-1 The second length of ].

19. The method according to claim 1 or 2, wherein, Performing center alignment overlay operations includes: The first node obtains the first intermediate bit sequence. w = [ w 0, w 1, ..., w Nw-1 ] and the second intermediate bit sequence w ' =[ w '0, w '1, ..., w ' Nw'-1 ];as well as The first node determines the third length by one or more of the following: H superimposed bit sequence h = [ h 0, h 1, ..., h H-1 ]: , , , in, Nw It is the first intermediate bit sequence w The first length, Nw' It is the second intermediate bit sequence w The second length of '.

20. The method according to claim 18, wherein, for Superimposed bit sequences h = [ h 0, h 1, ..., h H-1 The index in the middle is i bits It is the first intermediate bit sequence w = [ w 0, w 1, ..., w Nw-1 The index in the middle is bits With the second intermediate bit sequence w ' = [ w '0, w '1, ..., w ' Nw'-1 The index in the middle is bits Add them on GF(2).

21. The method according to claim 20, in, ， in It equals one of the following values: .

22. The method according to claim 18, wherein, for Superimposed bit sequences h = [ h 0, h 1, ..., h H-1 The index in the middle is i bits Set as the second intermediate bit sequence w ' = [ w '0, w '1, ..., w ' Nw'-1 The index in the middle is bits ,in or , It equals one of the following values: .

23. The method according to claim 18, wherein, in, for Superimposed bit sequences h = [ h 0, h 1,..., h H-1 The index in the middle is i bits It is the first intermediate bit sequence w = [ w 0, w 1, ..., w Nw-1 The index in the middle is bits With the second intermediate bit sequence w ' = [ w '0, w '1, ..., w ' Nw'-1 The index in the middle is bits On GF(2) Add them together.

24. The method according to claim 23, in, ， in It equals one of the following values: .

25. The method according to claim 18, wherein, for Superimposed bit sequences h = [ h 0, h 1, ..., h H-1 The index in the middle is i bits It is the first intermediate bit sequence w = [ w 0, w 1, ..., w Nw-1 The index in the middle is bits With the second intermediate bit sequence w ' = [ w '0, w '1, ..., w ' Nw'-1 The index in the middle is bits Add them on GF(2).

26. The method according to claim 24, in, ， in It equals one of the following values: .

27. The method according to claim 1 or 2, wherein, First intermediate bit sequence w = [ w 0, w 1, ..., w Nw-1 ] and the second intermediate bit sequence w ' = [ w' 0, w' 1, ..., w' Nw'-1 Determine according to one or more of the following: The length of the input bit sequence, The sixth length of the output of the rate matching operation after the first polarization transformation through the first polarization matrix. The sixth length of the output of the rate matching operation after the second polarization transformation through the second polarization matrix. The fifth length of the output of the bit selection operation after the first polarization transformation through the first polarization matrix. The fifth length of the output of the bit selection operation after the second polarization transformation through the second polarization matrix. The size of the first polarization matrix, The size of the second polarization matrix, First threshold And / or a second threshold.

28. A wireless communication device, including a processor configured to perform the method described in the product or component of claims 1 to 27.

29. A non-transitory computer essential program storage medium having code stored thereon, which, when executed by a processor, causes the processor to perform any one of the calculation methods described in claims 1 to 27.

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