Biasing circuit and electronic equipment
By adjusting the resistance parameters and setting up a negative feedback loop in the bias circuit, an adjustable bias voltage is generated, which solves the problem of difficult temperature characteristics adjustment in the prior art, realizes flexible bias current generation, reduces chip area and power consumption, and improves the flexibility of circuit design.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- HANGZHOU RUIMENG TECH
- Filing Date
- 2026-03-17
- Publication Date
- 2026-04-17
AI Technical Summary
In existing technologies, the bias circuits have difficulty in flexibly adjusting temperature characteristics, resulting in increased chip area, increased power consumption, and inflexible design, which cannot meet the diverse needs of circuit applications.
By adjusting several resistor parameters inside the bias circuit, setting a current with opposite temperature coefficients and superimposing it on the third resistor, two negative feedback loops are configured to stabilize the branch operation, generating an adjustable bias voltage, and achieving a bias current with zero, positive or negative temperature coefficients.
It enables flexible adjustment of the temperature characteristics of the bias current without relying on complex external compensation circuits, reducing chip area and power consumption, and improving circuit design flexibility.
Smart Images
Figure CN121879504A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of power electronics technology, and in particular to a bias circuit and electronic device. Background Technology
[0002] In HBT (Heterojunction Bipolar Transistor) technology, the performance of the bias circuit directly affects the accuracy and stability of the entire analog or RF integrated circuit. Currently, the industry commonly uses an architecture based on a bandgap reference voltage to generate the bias current, with a typical structure as follows: Figure 1 As shown, the bias current generated by this circuit exhibits a single positive temperature characteristic.
[0003] However, bias currents with only a positive temperature coefficient are insufficient to meet the diverse needs of circuit applications. For example, in some applications requiring temperature compensation or specific temperature characteristics, bias currents with zero or even negative temperature coefficients are necessary. To achieve this, traditional methods typically require the introduction of additional compensation circuits or complex structures, which not only increases chip area and power consumption but also leads to complex and inflexible circuit designs, making it difficult to achieve a good balance between area and performance.
[0004] Therefore, there is an urgent need for a bias circuit solution that can flexibly adjust temperature characteristics, has a compact structure, and is suitable for a wide power supply voltage range. Summary of the Invention
[0005] The purpose of this invention is to provide a bias circuit and electronic device that can flexibly and continuously configure bias currents with zero temperature coefficient, positive temperature coefficient, or negative temperature coefficient by simply adjusting a few resistor parameters integrated within the infrastructure, without relying on any externally added complex compensation circuits. This can solve the technical problems of increased chip area, increased power consumption, and inflexible design caused by adjusting the temperature coefficient in the prior art.
[0006] In a first aspect, the present invention provides a bias circuit, comprising: It has three branches, two negative feedback loops, and a current output branch. Each of the three branches has three resistors. The first branch generates a first current with a first temperature coefficient through the first resistor; The second branch generates a second current with a second temperature coefficient through the second resistor; The first branch and the second branch are respectively connected to the reference potential through the third resistor in the third branch. The first current and the second current are superimposed on the third resistor to generate a first bias voltage on the third resistor. The second temperature coefficient is opposite to the first temperature coefficient. The current output branch is connected to the third branch and is used to generate an output bias current based on the first bias voltage; the temperature coefficient of the output bias current is related to the resistance value of the first resistor and the resistance value of the second resistor, and the magnitude of the output bias current is related to the resistance values of all three resistors. The first negative feedback loop is connected to the three branches respectively, and the second negative feedback loop is connected to the first branch and the third branch respectively; the two negative feedback loops work together to ensure that each branch works stably.
[0007] Preferably, the first negative feedback loop includes three transistors, wherein: The first terminal of the first transistor is connected to the first terminal of the first resistor, the second terminal of the first resistor is connected to the control terminal of the second transistor, the first terminal of the second transistor is connected to the control terminal of the third transistor, the first terminal of the third transistor and the first terminal of the second transistor are both connected to the power supply, the second terminal of the third transistor is connected to the control terminal of the first transistor, the first terminal of the second resistor and the current output branch respectively, and the second terminal of the first transistor is connected to the second terminal of the third resistor and the second resistor respectively.
[0008] Preferably, the first negative feedback loop further includes a first compensation circuit, which includes a fourth resistor and a first capacitor; One end of the fourth resistor is connected to the control terminal of the second transistor, the other end of the fourth resistor is connected to one end of the first capacitor, and the other end of the first capacitor is connected to the first terminal of the second transistor.
[0009] Preferably, the second negative feedback loop includes three transistors, a fifth resistor, and a sixth resistor, wherein: The control terminal of the fourth transistor is connected to the first terminal of the first resistor and the first terminal of the first transistor. The first terminal of the fourth transistor is connected to the power supply and the control terminal of the fifth transistor. The second terminal of the fourth transistor is connected to the second terminal of the second transistor and the first terminal of the sixth transistor. The first terminal of the fifth transistor is connected to the power supply. The second terminal of the fifth transistor is connected to the first terminal of the fifth resistor. The second terminal of the fifth resistor is connected to the first terminal of the sixth resistor and the control terminal of the sixth transistor. The second terminal of the sixth transistor and the second terminal of the sixth resistor are both connected to a reference potential.
[0010] Preferably, the second negative feedback loop further includes a second capacitor, which is connected in parallel with the fifth resistor.
[0011] Preferably, the device further includes two current transformers, wherein one end of the first current transformer is connected to the power supply, the other end of the first current transformer is connected to the first end of the fourth transistor, one end of the second current transformer is connected to the power supply, and the other end of the second current transformer is connected to the first end of the second transistor and the control terminal of the third transistor, respectively.
[0012] Preferred options also include: The driving circuit has its output terminal connected to the second terminal of the first resistor and the control terminal of the second transistor, respectively.
[0013] Preferably, the driving circuit includes a first driving switch, a first terminal of the first driving switch is connected to the power supply, a second terminal of the first driving switch is connected to the second terminal of the first resistor and the control terminal of the second transistor respectively, and the control terminal of the first driving switch is configured to receive a driving signal for generating a bias current.
[0014] Preferably, the current output branch includes a second drive switch and a load resistor; The control terminal of the second drive switch serves as the input terminal of the current output branch, and the first or second terminal of the second drive switch is connected to the load resistor.
[0015] In a second aspect, the present invention provides an electronic device including the bias circuit described above.
[0016] This invention provides a bias circuit and electronic device, relating to the field of power electronics technology. A first current and a second current with opposite temperature coefficients are set, and these two currents are superimposed across a third resistor to generate an adjustable bias voltage. Two negative feedback loops are configured to work together to ensure stable operation of each branch, effectively ensuring stable circuit operation on top of an embedded temperature coefficient adjustment mechanism. The temperature characteristic of the final output bias current is determined by the resistance ratio of the first and second resistors, which respectively determine the temperature coefficients of the first and second currents; while the magnitude of the current is determined by the combined resistance values of the three resistors. This allows for flexible and continuous configuration of bias currents with zero, positive, or negative temperature coefficients simply by adjusting a few resistor parameters integrated within this basic architecture, without relying on any externally added complex compensation circuits. This solves the technical problems of increased chip area, increased power consumption, and inflexible design caused by adjusting the temperature coefficient in existing technologies. Attached Figure Description
[0017] To more clearly illustrate the embodiments of the present invention, the accompanying drawings used in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0018] Figure 1 This is a schematic diagram of a bias circuit implementation in the prior art; Figure 2 A circuit diagram of a bias circuit provided by the present invention; Figure 3 A schematic diagram of a zero-temperature-drift current curve provided by the present invention; Figure 4 A schematic diagram of a current curve for negative temperature drift provided by the present invention; Figure 5 A schematic diagram of a positive temperature drift current curve provided by the present invention; Figure 6 This is a schematic diagram of the bias current versus power supply voltage provided by the present invention. Detailed Implementation
[0019] The core of this invention is to provide a bias circuit and electronic device that can flexibly and continuously configure bias currents with zero temperature coefficient, positive temperature coefficient, or negative temperature coefficient by simply adjusting a few resistor parameters integrated within the infrastructure, without relying on any externally added complex compensation circuits. This can solve the technical problems of increased chip area, increased power consumption, and inflexible design caused by adjusting the temperature coefficient in the prior art.
[0020] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.
[0021] like Figure 2 In a first aspect, the present invention provides a bias circuit, comprising: It has three branches, two negative feedback loops, and a current output branch. Each of the three branches has three resistors. The first branch passes through the first resistor R. P1 A first current with a first temperature coefficient is generated; The second branch passes through the second resistor R. P2 A second current with a second temperature coefficient is generated; The first and second branches are respectively connected to the third resistor R. P3 Connected to a reference potential, the first and second currents are connected to the third resistor R. P3 Superimposed on top, in the third resistor R P3 A first bias voltage is generated; the second temperature coefficient is opposite to the first temperature coefficient; The current output branch is connected to the third branch and is used to generate an output bias current based on the first bias voltage; the temperature coefficient of the bias current is related to the first resistance R. P1 The resistance value, the second resistor R P2 The magnitude of the bias current is related to the resistance values of all three resistors. The first negative feedback loop is connected to the three branches respectively, and the second negative feedback loop is connected to the first branch and the third branch respectively; the two negative feedback loops work together to ensure that each branch works stably.
[0022] This embodiment provides a bias circuit that generates currents with opposite temperature coefficients through two branches, and then superimposes these two currents to convert them into a voltage, thereby generating an output bias current with adjustable temperature characteristics. This embodiment does not rely on the complex external compensation circuitry found in traditional bandgap reference structures; instead, it achieves flexible temperature coefficient setting within the basic circuit architecture. Specifically, the first branch utilizes a first resistor R... P1 A first current with a first temperature coefficient is generated, and the second branch utilizes the second resistor R. P2 A second current with a second temperature coefficient is generated, and these two temperature coefficients are opposite. In this way, the temperature characteristics of the output current can be adjusted at the circuit principle level.
[0023] Specifically, the temperature coefficients of the currents generated by the first and second branches can, but are not limited to, be a combination of positive and negative temperature coefficients. For example, the first temperature coefficient can be positive, in which case the first current increases with increasing temperature; the second temperature coefficient, on the other hand, is a corresponding negative temperature coefficient, in which case the second current decreases with increasing temperature. The generation of this current with opposite temperature characteristics can, but is not limited to, be achieved through physical mechanisms such as the negative temperature characteristic of the forward conduction voltage and the positive temperature characteristic of the thermal voltage of a transistor. This embodiment, by reasonably setting the component parameters in the branches, ensures that the currents output by the two branches have the expected and stable temperature correlation.
[0024] Both the first and second branches pass through the third resistor R. P3 Connected to a reference potential, this allows the first current and the second current to flow within the third resistor R. P3 The current is superimposed. The superposition of currents directly affects the third resistor R. P3 A voltage drop is generated across the two ends, the first bias voltage and R P3The voltage drop across the terminals is related (specifically in Figure 2 This is expressed as: First bias voltage = R P3 Voltage drop across +Q P1 V BE Voltage, the first bias voltage is also Q P1 (Base voltage). Since the first current and the second current have opposite temperature characteristics, they are in the third resistor R. P3 The superposition effects of these voltages can cancel each other out or enhance each other as temperature changes, thus making the temperature characteristic of the first bias voltage an adjustable variable. The current output branch generates the final output bias current based on this first bias voltage; therefore, the temperature coefficient of the output bias current is determined by the first resistor R, which in turn determines the temperature coefficients of the first and second currents. P1 Second resistor R P2 The resistance values of the resistors together determine the current. Meanwhile, the magnitude of the output bias current is determined by the first resistor R. P1 Second resistor R P2 and the third resistor R P3 The resistance values of these three resistors are all related; by adjusting their values, the amplitude of the output current can be independently adjusted. Since this voltage is the result of the combined effect of a positive temperature drift current and a negative temperature drift current, its final temperature characteristic is no longer fixed but depends on the ratio of their magnitudes. The magnitude of the first current and the second current can be determined by adjusting the first resistor R. P1 Second resistor R P2 The resistance value can be precisely adjusted to achieve a continuously adjustable first bias voltage, ranging from negative temperature drift to zero temperature drift and then to positive temperature drift. Ultimately, the current output branch uses this flexibly adjustable first bias voltage to generate the output bias current, the temperature coefficient of which can be set by combining the resistance values of several resistors.
[0025] The first and second negative feedback loops in this embodiment are primarily designed to ensure that the first, second, and third branches can establish and maintain a stable DC operating point during operation, and to suppress current drift that may be caused by fluctuations in circuit parameters or temperature changes. Without these loops, relying solely on the aforementioned branch structure, the circuit may struggle to self-start or enter abnormal operating states. This embodiment connects the first negative feedback loop simultaneously to the first, second, and third branches, and the second negative feedback loop simultaneously to the first and third branches, thus creating a stable system with automatic adjustment capabilities for the entire bias network.
[0026] Specifically, the first negative feedback loop can, but is not limited to, monitor the voltage or current of a key node in the first branch and compare it with an internal reference, thereby adjusting the bias conditions of the first or third branch to lock the potential of that node. Similarly, the second negative feedback loop performs a similar adjustment function, but its monitoring and control node differs from the first loop. The two loops operate in parallel, cooperating to constrain the current and voltage relationships of each branch in the entire circuit, preventing them from being excessively affected by slight fluctuations in power supply voltage or excessive initial deviations in transistor characteristics. This ensures that the first and second currents can be stably generated according to a preset temperature coefficient relationship, ultimately reaching the third resistor R. P3 A stable bias voltage is obtained, and the first bias voltage is related to this bias voltage (specifically in...). Figure 2 In the middle, the first bias voltage is V c It is also Q P1 (The base voltage of Q1 and the base voltage of Q2).
[0027] In summary, the bias circuit provided by this invention sets a first current and a second current with opposite temperature coefficients, and connects them across a third resistor R. P3 An adjustable bias voltage is generated by superimposing a layer on top of the bias voltage. Two negative feedback loops work together to ensure stable operation of each branch, effectively guaranteeing circuit stability while incorporating an embedded temperature coefficient adjustment mechanism. The temperature characteristic of the final output bias current is determined by the first resistor R, which determines the temperature coefficients of the first and second currents, respectively. P1 Second resistor R P2 The resistance ratio is determined; and the current magnitude can be determined by the combined resistance values of the three resistors. This allows for flexible and continuous configuration of bias currents with zero, positive, or negative temperature coefficients simply by adjusting the parameters of a few resistors integrated within the infrastructure, without relying on any external, complex compensation circuits. This solves the technical problems of increased chip area, increased power consumption, and inflexible design caused by adjusting the temperature coefficient in existing technologies.
[0028] like Figure 2 As shown, in a preferred embodiment, the first negative feedback loop includes three transistors, wherein: First transistor Q P1 The first terminal is connected to the first resistor R P1 The first terminal, the first resistor R P1 The second terminal is connected to the second transistor Q. P2 The control terminal, the second transistor Q P2 The first terminal is connected to the third transistor Q. P3 The control terminal, the third transistor Q P3 The first terminal, the second transistor Q P2The first terminal is connected to the power supply VDD, and the third transistor Q P3 The second terminal is connected to the first transistor Q. P1 Control terminal, second resistor R P2 The first terminal and current output branch, the first transistor Q P1 The second terminal is connected to the third resistor R. P3 and the second resistor R P2 The second end.
[0029] In this embodiment, the first negative feedback loop, through a specific connection of three transistors, forms a closed-loop control system capable of automatically establishing and locking the operating point. The third transistor Q... P3 The voltage at the second terminal is fed back to the first transistor Q. P1 The control terminal forms a direct negative feedback path. If, for some reason, the current flows through the first resistor R... P1 If the current deviates from the preset value, this feedback mechanism can automatically adjust the first transistor Q. P1 With the second transistor Q P2 The operating state of the circuit suppresses this deviation in the opposite direction, forcing the loop current to return to stability.
[0030] The specific working process of this loop may include, but is not limited to: stabilizing the first transistor Q. P1 Control terminal and second transistor Q P2 The potential relationship between the control terminals. Through this stabilizing effect, this embodiment ensures the voltage applied to the first resistor R. P1 The voltage difference across the two ends is precisely set, allowing the first current to be generated stably according to the expected first temperature coefficient (e.g., positive temperature coefficient). This stabilized current forms the basis for subsequent temperature coefficient adjustments. Furthermore, the loop also provides a stable bias voltage (i.e., for the third transistor Q). P3 The voltage at the second terminal is simultaneously supplied to the second resistor R. P2 The current output branch provides a crucial voltage reference for the operation of the entire circuit.
[0031] In a preferred embodiment, the first negative feedback loop further includes a first compensation circuit, which includes a fourth resistor R. p4 and the first capacitor C P0 ; Fourth resistor R p4 One end is connected to the second transistor Q P2 The control terminal, the fourth resistor R p4 The other end is connected to the first capacitor C P0 One end, the first capacitor C P0 The other end is connected to the second transistor Q. P2 The first end.
[0032] In this embodiment, the introduction of the first compensation circuit aims to address the stability issue of the first negative feedback loop at high frequencies. The fourth resistor R... p4 With the first capacitor C P0 The network formed by the series connection is often referred to as a Miller compensation structure in circuit analysis. The structure works by using a node with voltage gain in the loop (here, the second transistor Q). P2 A series RC network is introduced between the control terminal and the first terminal, thereby generating a dominant pole and an adjustable zero in the frequency response of the loop.
[0033] This embodiment adjusts the fourth resistor R. p4 The resistance value and the first capacitor C P0 The capacitance value can change the frequency position of this additional pole and zero. For example, increasing the first capacitor C P0 The capacitance value will lower the dominant pole frequency, thereby expanding the phase margin of the loop; while the fourth resistor R p4 The presence of a zero point can generate a zero to counteract the adverse effects of an existing parasitic pole in the loop. Therefore, the parameters of these two components can be flexibly configured according to the actual transistor parameters and the parasitic effects caused by the layout and wiring, so that the first negative feedback loop can have sufficient stability margin under various process angles and temperatures, avoid oscillations, and ensure the reliability of its DC bias function.
[0034] In a preferred embodiment, the second negative feedback loop includes three transistors and a fifth resistor R. p5 and the sixth resistor R p6 ,in: Fourth transistor Q p4 The control terminals are respectively connected to the first resistor R P1 The first terminal and the first transistor Q P1 The first terminal, the fourth transistor Q p4 The first terminal is connected to the power supply and the fifth transistor Q, respectively. p5 The control terminal, the fourth transistor Q p4 The second terminals are respectively connected to the second transistor Q. P2 The second terminal, the sixth transistor Q p6 The first terminal, the fifth transistor Q p5 The first terminal is connected to the power supply, and the fifth transistor Q... p5 The second terminal is connected to the fifth resistor R. p5 The first terminal, the fifth resistor R p5 The second terminal is connected to the sixth resistor R. p6 The first terminal and the sixth transistor Q p6 The control terminal, the sixth transistor Q p6 The second terminal and the sixth resistor Rp6 The second end of each is connected to a reference potential.
[0035] The second negative feedback loop in this embodiment is used to generate and stabilize a second current with a specific negative temperature coefficient. This loop is connected to the fourth transistor Q. p4 The fifth transistor Q p5 and the sixth transistor Q p6 In conjunction with the fifth resistor R p5 With the sixth resistor R p6 This constitutes another independent negative feedback regulation system. The working principle of this system is to use the sixth transistor Q... p6 The second terminal potential information is fed back to the fourth transistor Q. p4 The control terminal forms a closed-loop control, thereby locking the current and voltage relationship of each node in the loop.
[0036] Specifically, this loop can, but is not limited to, cause current to flow through the fifth resistor R. p5 The current and the sixth resistor R p6 A defined proportional relationship is established between the currents. This embodiment, through this structure, enables the fourth transistor Q to... p4 Control terminal (i.e., the first resistor R) P1 The voltage at the first terminal is maintained near a value that keeps the second current constant. Therefore, regardless of process variations or temperature changes, this loop can automatically compensate to ensure the second resistor R in the second branch remains constant. P2 The second current flowing through it maintains a stable and predictable negative temperature coefficient characteristic. This stable negative temperature coefficient current, together with the positive temperature coefficient current provided by the first negative feedback loop, flows into the third resistor R. P3 This allows for flexible adjustment of the final output bias current temperature characteristics.
[0037] In a preferred embodiment, the second negative feedback loop further includes a second capacitor C. P1 The second capacitor C P1 With the fifth resistor R p5 in parallel.
[0038] In this embodiment, a second capacitor C is introduced into the second negative feedback loop. P1 and connect it with the fifth resistor R p5 The main purpose of parallel connection is to optimize the high-frequency response characteristics of this loop to ensure stable operation. This parallel structure is implemented in the fifth transistor Q. p5 A controllable capacitive load is introduced between the second terminal and the reference potential. In the small-signal model of the circuit, the fifth resistor R p5 With the second capacitor C P1The parallel combination introduces an additional pole in the loop's frequency transfer function. The frequency location of this pole is directly determined by the fifth resistor R. p5 The resistance value and the second capacitor C P1 The product of the capacitance values is determined.
[0039] By adjusting the fifth resistor R p5 The resistance value or the second capacitor C P1 The capacitance value allows for flexible adjustment of the pole's position on the frequency axis in this embodiment. For example, increasing the second capacitor C... P1 The capacitance value will shift the pole to a lower frequency, which helps to attenuate the loop gain in the high-frequency range, thereby expanding the loop's phase margin; conversely, it may retain a higher bandwidth. The values of these two components can be precisely configured based on the transistor's transconductance, junction capacitance, and other parasitic parameters introduced by the layout and wiring. This ensures that the second negative feedback loop is precisely stabilized at the DC operating point while also having sufficient stability margin across the entire frequency domain, effectively suppressing potential oscillation risks and guaranteeing the stability of the negative temperature coefficient second current it generates.
[0040] In a preferred embodiment, the system further includes two current transformers, wherein one end of the first current transformer is connected to the power supply, the other end of the first current transformer is connected to the first terminal of the fourth transistor, one end of the second current transformer is connected to the power supply, and the other end of the second current transformer is connected to the first terminal of the second transistor and the control terminal of the third transistor, respectively.
[0041] In this embodiment, two current transformers are introduced primarily for real-time monitoring and isolated sampling of the current in critical branches. The first current transformer is connected between the power supply and the first terminal of the fourth transistor to obtain the current information of the branch containing the fourth transistor. The second current transformer is connected between the power supply and the junction of the first terminal of the second transistor and the control terminal of the third transistor to obtain the current information at that junction. The two current transformers can proportionally convert the measured current signal into a lower current or voltage signal, providing it to an external monitoring circuit or internal control unit to achieve real-time monitoring or closed-loop adjustment of the bias circuit's operating status. The signals fed back from the current transformers can dynamically adjust the drive signal or bias conditions, thereby compensating for current drift caused by temperature changes or device aging, further improving the long-term stability of the circuit.
[0042] As a preferred embodiment, it also includes: The drive circuit, whose output terminals are respectively connected to the first resistor R P1 The second terminal and the second transistor Q P2 The control terminal.
[0043] The added driving circuit in this embodiment primarily serves to provide the necessary initial bias or enhanced driving capability for the startup and normal operation of the first negative feedback loop. Its output is simultaneously connected to the first resistor R. P1 The second terminal and the second transistor Q P2 Without a drive circuit, the control terminal may fail to start automatically due to an uncertain initial potential, or it may respond slowly when the load changes due to insufficient drive capability.
[0044] Specifically, the driving circuit in this embodiment can be considered, but is not limited to, a voltage buffer or a current source. It ensures that the sensitive node is quickly pulled to or maintained at a suitable potential, thereby helping the first negative feedback loop to rapidly and reliably establish a preset stable operating state. For example, at power-on, the driving circuit can actively inject current into the node, forcing the loop out of its zero-current degenerate state and into normal amplification and feedback regulation mode. Once the loop is stable, the effect of the driving circuit can be weakened or continued to enhance robustness. Therefore, this driving circuit is a crucial part of this embodiment in ensuring that the entire bias circuit can be reliably initialized and operate stably under various conditions.
[0045] In a preferred embodiment, the driving circuit includes a first driving switch Q1, the first terminal of which is connected to a power supply, and the second terminal of which is connected to a first resistor R. P1 The second terminal and the second transistor Q P2 The control terminal of the first drive switch Q1 is configured to receive a drive signal for generating a bias current.
[0046] In this embodiment, the driving circuit provides a definite and controllable bias condition for the circuit through the specific connection method of the first driving switch Q1. The first driving switch Q1 is set between the power supply and the first resistor R. P1 The second terminal, the second transistor Q P2 Between the control terminals, each control terminal receives an independent drive signal. This design allows the node's potential to no longer passively depend on the initial state of the first negative feedback loop itself, but rather to be actively set or adjusted via this external signal.
[0047] In this embodiment, the first drive switch Q1 can, but is not limited to, function as a current source or voltage follower controlled by a drive signal. When the drive signal is valid, Q1 turns on, injecting current into the sensitive node from its second terminal or providing a low-impedance voltage path. This ensures that when power-on or operating conditions change abruptly, the node can be quickly driven to a preset potential, thereby forcing the first negative feedback loop out of any abnormal states such as cutoff or saturation, entering the linear operating region, and beginning to establish normal negative feedback regulation. The drive signal can be a fixed enable level or a control signal related to power supply or temperature, which provides additional design freedom for the startup timing, power management, or implementation of special operating modes of the entire bias circuit.
[0048] In a preferred embodiment, the current output branch includes a second drive switch Q2 and a load resistor R; The control terminal of the second drive switch Q2 serves as the input terminal of the current output branch. The first or second terminal of the second drive switch Q2 is connected to one end of the load resistor R, and the other end of the load resistor R is grounded.
[0049] In this embodiment, the current output branch includes a second drive switch Q2 and a load resistor R. The control terminal of Q2 serves as the input terminal of the entire branch, receiving a first bias voltage generated by the preceding circuit. Depending on the magnitude of this voltage, Q2 is biased into a corresponding on-state.
[0050] In this embodiment, the second drive switch Q2 can, but is not limited to, be configured as a common-emitter or common-source amplifier structure. Its first or second terminal is connected in series with the load resistor R, between the power supply and the reference potential. The current flowing through the load resistor R is the final output bias current. Its working principle is that the temperature-adjustable first bias voltage generated by the pre-amplifier stage produces the final bias voltage Vc at the control terminal of Q2. By controlling the conduction level of Q2, the total current flowing through this branch is precisely adjusted. Since the output current is directly determined by the current flowing through the load resistor R, and this current is controlled by Vc, which is related to the first bias voltage, the output bias current inherits and amplifies the temperature characteristics set by the first bias voltage. By adjusting the first resistor R in the pre-amplifier stage… P1 With the second resistor R P2 By setting the temperature coefficient of the first bias voltage using the resistance ratio, this embodiment can ultimately achieve flexible configuration of the temperature coefficient of the output bias current.
[0051] When the second resistor R P2 With the first resistor R P1 When the ratio of the resistance values of the two resistors satisfies the first preset condition, the temperature coefficient of the output bias current is zero; when the ratio of the resistance values of the two resistors R satisfies the first preset condition, the temperature coefficient of the output bias current is zero; P2 With the first resistor R P1When the ratio of the resistance values is less than a first preset condition, the temperature coefficient of the output bias current is negative; when the second resistor R... P2 With the first resistor R P1 When the ratio of the resistance values is greater than the first preset condition, the temperature coefficient of the output bias current is positive.
[0052] Specifically, such as Figure 2 As shown, after the entire circuit has stabilized, the current flowing through resistor R P1 Current I P1 By NPN transistor Q P2 With Q P4 The base voltage difference determines this. Assume Q... P4 The number of tubes is m, and the base voltage is V. B4 The voltage difference between the base and emitter is V. BE4 Q P2 The number of transistors is 1, and the base voltage is V. B2 The voltage difference between the base and emitter is V. BE2 Then the current I P1 The expression is as follows: ; In the above formula, It has a positive temperature coefficient. Therefore, I P1 The current has a positive temperature coefficient.
[0053] Flow through resistor R P2 Current I P2 By NPN transistor Q P1 The voltage difference V between the base and emitter BE1 If determined, then the current I P2 The expression is as follows: ; In the above formula, It has a negative temperature coefficient. Therefore, I P2 Current with a negative temperature coefficient.
[0054] Flow through resistor R P3 Current I P3 Due to current I P1 With current I P2 The current I is obtained by superposition. P3 The expression is as follows: ; In the above formula, by adjusting the resistance R P1 With R P2 The magnitude of the value can be used to adjust the current I. P3 Temperature coefficient.
[0055] Let the NPN transistor Q P1The base voltage is V C Using Kirchhoff's voltage law (KVL) and current law (KCL), we can obtain: ; In the above formula, voltage V C It is the bias voltage output by the circuit.
[0056] bias voltage V C Together with transistor Q2 and resistor R, they constitute the output bias current I. The expression for current I is as follows: (1); where, V BE2’ Q is the voltage difference between the base and emitter of Q2. P1 Uses the same size NPN tube as Q2. V BE1 = V BE2’ .
[0057] By adjusting the resistance R P1 R P2 and R P3 The temperature coefficient and magnitude of the bias current I can be flexibly adjusted by determining the value of the bias current. The adjustment principle is shown below.
[0058] make : when hour, This allows for zero temperature drift of the bias current I; when hour, This allows for negative temperature drift of the bias current I; when hour, This allows for positive temperature drift of the bias current I.
[0059] In addition, in formula (1), the bias current I is independent of the power supply voltage, so a bias current independent of the power supply voltage can be achieved.
[0060] Based on the above formula derivation, the advantage of this invention is that it can flexibly adjust the temperature characteristics of the bias current I, and is independent of the power supply voltage, making it applicable to various power supply voltages.
[0061] when The curve of current I changing with temperature T is as follows: Figure 3 As shown, the bias current I changes by only 230 nA with temperature T, which is a current with zero temperature drift.
[0062] when The curve of current I changing with temperature T is as follows: Figure 4 As shown in the figure above, the bias current I changes negatively with temperature T, indicating a negative temperature drift current.
[0063] when The curve of current I changing with temperature T is as follows: Figure 5 As shown, it can be seen that the bias current I changes positively with temperature T, and is the current with positive temperature drift.
[0064] The curve of current I versus power supply voltage VDC is as follows: Figure 6 As shown, when the power supply voltage VDC changes from 2.7V to 5.5V, the bias current I changes by only 885nA, which is very small and almost unaffected by the change in power supply voltage.
[0065] This invention addresses the shortcomings and deficiencies of existing technologies by providing a bias circuit with flexible and adjustable current-temperature characteristics, applicable to various power supply voltages. This is achieved by adjusting the resistor R. P1 R P2 R P3 The relationship between the magnitude and temperature characteristics of the bias current I allows for flexible adjustment of the magnitude and temperature characteristics. This facilitates the achievement of zero-temperature drift bias current in the bias circuit using a smaller circuit area and enables bias circuits independent of the power supply voltage.
[0066] In summary, the present invention aims to protect the entire architecture of the bias circuit, as well as the NPN transistor Q in the circuit. P1 ~Q P6 and Q2; resistors R and R P1 ~R P6 Capacitor C P0 ~C P1 Devices, etc. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this invention shall be included within the scope of protection of this invention.
[0067] Secondly, the present invention provides an electronic device including the bias circuit described above.
[0068] For a description of the electronic device, please refer to the above-described embodiment of the bias circuit; further details will not be provided here.
[0069] It should also be noted that, in this specification, relational terms such as "first" and "second" are used only to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.
[0070] The above description of the disclosed embodiments enables those skilled in the art to make or use the invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the invention. Therefore, the invention is not to be limited to the embodiments shown herein, but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.
Claims
1. A biasing circuit, characterized by, include: It has three branches, two negative feedback loops, and a current output branch. Each of the three branches has three resistors. The first branch generates a first current with a first temperature coefficient through the first resistor; The second branch generates a second current with a second temperature coefficient through the second resistor; The first branch and the second branch are respectively connected to the reference potential through the third resistor in the third branch. The first current and the second current are superimposed on the third resistor, generating a first bias voltage on the third resistor. The second temperature coefficient is the opposite of the first temperature coefficient; The current output branch is connected to the third branch and is used to generate an output bias current based on the first bias voltage; the temperature coefficient of the output bias current is related to the resistance value of the first resistor and the resistance value of the second resistor, and the magnitude of the output bias current is related to the resistance values of all three resistors. The first negative feedback loop is connected to the three branches respectively, and the second negative feedback loop is connected to the first branch and the third branch respectively; the two negative feedback loops work together to ensure that each branch works stably.
2. The biasing circuit of claim 1, wherein, The first negative feedback loop includes three transistors, wherein: The first terminal of the first transistor is connected to the first terminal of the first resistor, the second terminal of the first resistor is connected to the control terminal of the second transistor, the first terminal of the second transistor is connected to the control terminal of the third transistor, the first terminal of the third transistor and the first terminal of the second transistor are both connected to the power supply, the second terminal of the third transistor is connected to the control terminal of the first transistor, the first terminal of the second resistor and the current output branch respectively, and the second terminal of the first transistor is connected to the second terminal of the third resistor and the second resistor respectively.
3. The biasing circuit of claim 2, wherein, The first negative feedback loop further includes a first compensation circuit, which includes a fourth resistor and a first capacitor; One end of the fourth resistor is connected to the control terminal of the second transistor, the other end of the fourth resistor is connected to one end of the first capacitor, and the other end of the first capacitor is connected to the first terminal of the second transistor.
4. The biasing circuit of claim 2, wherein, The second negative feedback loop includes three transistors, a fifth resistor, and a sixth resistor, wherein: The control terminal of the fourth transistor is connected to the first terminal of the first resistor and the first terminal of the first transistor. The first terminal of the fourth transistor is connected to the power supply and the control terminal of the fifth transistor. The second terminal of the fourth transistor is connected to the second terminal of the second transistor and the first terminal of the sixth transistor. The first terminal of the fifth transistor is connected to the power supply. The second terminal of the fifth transistor is connected to the first terminal of the fifth resistor. The second terminal of the fifth resistor is connected to the first terminal of the sixth resistor and the control terminal of the sixth transistor. The second terminal of the sixth transistor and the second terminal of the sixth resistor are both connected to a reference potential.
5. The biasing circuit of claim 4, wherein, The second negative feedback loop also includes a second capacitor, which is connected in parallel with the fifth resistor.
6. The biasing circuit of claim 4, wherein, It also includes two current transformers, wherein one end of the first current transformer is connected to the power supply, and the other end of the first current transformer is connected to the first end of the fourth transistor; one end of the second current transformer is connected to the power supply, and the other end of the second current transformer is connected to the first end of the second transistor and the control terminal of the third transistor, respectively.
7. The bias circuit as described in claim 3, characterized in that, Also includes: The driving circuit has its output terminal connected to the second terminal of the first resistor and the control terminal of the second transistor, respectively.
8. The bias circuit as described in claim 7, characterized in that, The driving circuit includes a first driving switch, a first end of which is connected to the power supply, and a second end of which is connected to the second end of the first resistor and the control terminal of the second transistor, respectively. The control terminal of the first driving switch is configured to receive a driving signal for generating an output bias current.
9. The biasing circuit of any one of claims 1-8, wherein, The current output branch includes a second drive switch and a load resistor; The control terminal of the second drive switch serves as the input terminal of the current output branch. The first or second terminal of the second drive switch is connected to one end of the load resistor, and the other end of the load resistor is grounded.
10. An electronic device, comprising: Includes the bias circuit as described in any one of claims 1-9.