Cross-card operation implementation method and device based on Scale-Up domain, equipment and medium
By employing address substitution and process ID replacement mechanisms within the Scale-Up domain, the challenges of memory management in large-scale Scale-Up systems are solved, enabling efficient management of cross-card memory operations and improving system efficiency.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- 太初(无锡)电子科技有限公司
- Filing Date
- 2025-12-30
- Publication Date
- 2026-04-17
AI Technical Summary
Traditional memory management methods for small-scale scale-up systems are not applicable to large-scale scale-up systems, thus limiting the use of large-scale scale-up systems.
Within the Scale-Up domain, cross-card memory operations are achieved through address substitution and process ID replacement mechanisms. This includes performing a first-level substitution based on a pre-configured address substitution page table when the first compute card initiates a memory operation instruction, obtaining a global virtual address, and replacing the process ID through the process ID mapping table of the multi-card high-speed interconnect link. Finally, physical address substitution is performed on the second compute card.
It enables efficient memory management for large-scale scale-up systems, improving the efficiency and reliability of cross-card operations.
Smart Images
Figure CN121880231A_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of memory access technology, and in particular to a method, apparatus, device and medium for implementing cross-card operations based on the Scale-Up domain. Background Technology
[0002] With the explosive growth in computing power demands from applications such as large AI models and scientific computing, a single chip can no longer meet the requirements. The mainstream technology approach is to tightly interconnect dozens or even hundreds of computing cards through the scale-up method to form a powerful single system image.
[0003] However, as the system scales up, the memory management methods of traditional small-scale scale-up systems (such as 2-8 way servers) are not applicable to large-scale scale-up systems, thus limiting the use of large-scale scale-up systems. Summary of the Invention
[0004] This application provides a method, apparatus, device, and medium for cross-card operation based on the Scale-Up domain, so as to achieve effective memory management in large-scale Scale-Up systems.
[0005] In a first aspect, embodiments of this application provide a method for implementing cross-card operations based on a Scale-Up domain, the method comprising:
[0006] When the first compute card in the Scale-Up domain initiates a memory operation instruction from the first compute card to the second compute card, the virtual address corresponding to the memory operation instruction is replaced by a first-level replacement according to the address replacement page table pre-configured in the first compute card, so as to obtain the global virtual address corresponding to the memory operation instruction.
[0007] The process ID is replaced according to the global virtual address, the process ID in the first computing card, and the pre-configured process ID mapping table in the multi-card high-speed interconnect link. Based on the replaced process ID, the memory operation instructions, the global virtual address, and the replaced process ID are sent to the second computing card.
[0008] The second computing card performs address substitution based on memory operation instructions, global virtual address, and the replaced process ID to obtain the physical address in the second computing card, and then operates on the memory pointed to by the physical address according to the memory operation instructions.
[0009] Secondly, embodiments of this application provide a cross-card operation implementation apparatus based on a Scale-Up domain, including:
[0010] The first substitution module is used to replace the virtual address corresponding to the memory operation instruction by first substitution through a first-level substitution in the first computing card in the Scale-Up domain, when the first computing card initiates a memory operation instruction from the first computing card to the second computing card, so as to obtain the global virtual address corresponding to the memory operation instruction.
[0011] The replacement transmission module is used to replace the process ID according to the global virtual address, the process ID in the first computing card and the pre-configured process ID mapping table in the multi-card high-speed interconnect link, and send the memory operation instructions, the global virtual address and the replaced process ID to the second computing card based on the replaced process ID;
[0012] The second replacement module is used by the second computing card to perform address replacement based on memory operation instructions, global virtual address and the replaced process ID to obtain the physical address in the second computing card, and to operate on the memory pointed to by the physical address according to the memory operation instructions.
[0013] Thirdly, embodiments of this application also provide a cross-card operation implementation device based on a Scale-Up domain, the cross-card operation implementation device based on a Scale-Up domain comprising:
[0014] One or more processors;
[0015] Storage device for storing one or more programs.
[0016] When one or more programs are executed by one or more processors, the one or more processors implement the cross-card operation implementation method based on the Scale-Up domain provided in any embodiment of this application.
[0017] Fourthly, embodiments of this application also provide a computer-readable storage medium storing a computer program thereon, characterized in that, when the program is executed by a processor, it implements the cross-card operation implementation method based on the Scale-Up domain provided in any embodiment of this application.
[0018] The technical solution of this application embodiment, when a memory operation instruction from the first computing card to the second computing card is initiated within the Scale-Up domain, performs address substitution on the virtual address corresponding to the memory operation instruction through a first-level substitution based on the address substitution page table pre-configured in the first computing card, obtaining the global virtual address corresponding to the memory operation instruction; performs process ID substitution based on the global virtual address, the process ID in the first computing card, and the process ID mapping table pre-configured in the multi-card high-speed interconnect link, and sends the memory operation instruction, the global virtual address, and the replaced process ID to the second computing card based on the replaced process ID; the second computing card performs address substitution based on the memory operation instruction, the global virtual address, and the replaced process ID to obtain the physical address in the second computing card, and operates on the memory pointed to by the physical address according to the memory operation instruction. Based on this, by establishing an address substitution mechanism, cross-card memory operation at the hardware level is realized. Attached Figure Description
[0019] Figure 1 This is a flowchart illustrating the cross-card operation implementation method based on the Scale-Up domain provided in Embodiment 1 of this application;
[0020] Figure 2 This is a schematic diagram of the structure of the cross-card operation implementation device based on the Scale-Up domain provided in Embodiment 2 of this application;
[0021] Figure 3 This is a schematic diagram of the structure of a cross-card operation implementation device based on the Scale-Up domain, provided in Embodiment 4 of this application;
[0022] Figure 4 This is a schematic diagram of a Scale-Up domain address planning provided for Embodiment 1 of this application. Detailed Implementation
[0023] The present application will now be described in further detail with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the application and not intended to limit its scope. Furthermore, it should be noted that, for ease of description, the accompanying drawings show only the parts relevant to the present application, not the entire structure.
[0024] Example 1
[0025] Figure 1 This is a flowchart illustrating the cross-card operation implementation method based on the Scale-Up domain provided in Embodiment 1 of this application, as follows: Figure 1 As shown, the cross-card operation implementation method based on the Scale-Up domain provided in this embodiment can be implemented based on a cross-card operation implementation device based on the Scale-Up domain equipped with a video acquisition end, and may specifically include the following steps:
[0026] Step 101: When the first compute card in the Scale-Up domain initiates a memory operation instruction from the first compute card to the second compute card, the virtual address corresponding to the memory operation instruction is replaced by a first-level replacement according to the address replacement page table pre-configured in the first compute card, so as to obtain the global virtual address corresponding to the memory operation instruction.
[0027] In this embodiment, the example of the first computing card initiating a memory operation instruction to the second computing card is used for explanation. This memory operation instruction can be a read instruction or a write instruction, etc.
[0028] As a foundation, in this embodiment, each card has its own VA (Visual Identity), which can be established through page tables and mapped to a globally unique GVA (Global Visual Identity). In the second computing card, the GVA is then transformed into its own VA through the process ID established by this card, and further PA (Pattern Identity) replacement is performed. Each card has its own VA, and there is no connection between cards. The memory semantic operations of all chips in the Scale-Up domain are completed only by establishing a 512G large page of global GVA.
[0029] For scale-up domain address planning, please refer to [link / reference]. Figure 4 , Figure 4 This is a schematic diagram of a Scale-Up domain address planning provided for Embodiment 1 of this application.
[0030] like Figure 4 As shown, a 512GB bigpage is created within each card's scale-up domain, covering all cards in that bigpage. This bigpage is only valid within that card. Each card occupies a 512GB bigpage. A mapping is established between the Virtual Address (VA) and the Physical Address (PA) of each card, and the ATU (Automatic Address Unit) performs the conversion between the card's virtual address and physical address.
[0031] Each cross-card transmission requires a VA to be translated into a GVA (Global Virtual Address). The GVA consists of the GPUID and the VA within the target GPU. The GPUID is provided to the underlying layer for routing and forwarding. The mapping relationship between the VA and GVA for each card is determined by each card itself.
[0032] It should be noted that this process can occur while the host is performing a task, such as an AI training task.
[0033] Taking this AI training task as an example, after receiving the AI training job, the Host analyzes the resource requirements of the target AI training task (such as the number of computing cards, the number of processes per card, memory capacity, etc.) and confirms the total number of cards participating in the job (denoted as G, the number of network cards).
[0034] Then, a unique ASID (address space identifier, used to isolate the process address space) is assigned to each process on each card; at the same time, an independent page table (the core data structure used for address translation) is requested for each process.
[0035] Then, the STATP register (which stores key address translation information such as page table base address) and ASID number corresponding to each process are written into the process allocation table of ATU (Address Translation Unit); ATU supports Scale-Up domain global configuration, and its capacity is the number of network cards (G) × the number of processes per card (P), which just matches the total number of processes of the job (G×P).
[0036] After completing the hardware configuration, establish GVA→VA address mapping and LINK intra-process number mapping respectively to support intra-process address translation and cross-card process addressing.
[0037] The memory operation instructions initiated by the computing core or DMA of the first computing card are based on the AXI bus protocol (a high-performance on-chip bus protocol that supports burst transfers, out-of-order completion, and other features to meet the high bandwidth requirements of AI training). The key identifier is carried through the user-defined bit field (AXIAWUSER / ARUSER) – the ASID number of this card (the address space identifier of the process currently initiating the operation on the first computing card, used for process isolation and subsequent addressing).
[0038] During address substitution, the virtual address corresponding to the memory operation instruction is substituted through a first-level substitution based on the address substitution page table pre-configured in the first computing card to obtain the global virtual address corresponding to the memory operation instruction.
[0039] Specifically, the address translation unit (ATU) of the first computing card has been pre-configured by the host and stores the STATP register (page table base address) and ASID number corresponding to the current process. The STATP of the corresponding page table can be matched through the ASID number of this card, providing a basis for address translation.
[0040] In this embodiment, the operation is a cross-card operation from the first computing card to the second computing card. Therefore, a first-level substitution is required. With a 512G super-large page as the mapping granularity, there is no need to traverse multiple levels of page tables. The leaf page table, which is the final level of the page table, is directly found. It stores the address mapping relationship and outputs the GVA (Global Virtual Address) with CHIPID.
[0041] The CHIPID (i.e., the second computing card GPUID) is embedded in the GVA and is used to identify the computing card corresponding to the address. At this time, it is not converted into a physical address (PA), but only the global marking of the virtual address is completed.
[0042] Step 102: Replace the process ID according to the global virtual address, the process ID in the first computing card, and the pre-configured process ID mapping table in the multi-card high-speed interconnect link, and send the memory operation instructions, the global virtual address, and the replaced process ID to the second computing card based on the replaced process ID.
[0043] In this step, when performing process ID replacement, the card identifier of the second computing card can be resolved from the global virtual address; using the card identifier and process ID of the second computing card as the query key, the process ID mapping table pre-configured in the multi-card high-speed interconnect link is queried to obtain the process ID corresponding to the second computing card; and the process ID in the memory operation instruction is replaced with the obtained process ID corresponding to the second computing card.
[0044] In a specific example, the second computing card CHIPID (GPUID) can be parsed from the input GVA, and the ASID number of this card can be obtained from the AXI custom bit field.
[0045] Then, using "Second computing card CHIPID + this card ASID" as the query key, search in the process number mapping table built into LINK (the number of entries in this table is the number of network cards × the number of processes per card, pre-configured).
[0046] After a successful query, the ASID number corresponding to the second computing card is obtained, and the ASID number of the first computing card in the AXI custom bit field is replaced with the ASID number of the second computing card, providing a basis for process addressing of the second computing card.
[0047] It should be noted that during the transmission process, the protocol of the memory operation instructions, global virtual address, and replaced process ID can be converted from the AXI bus protocol of the first computing card to the target LINK interconnect protocol; the converted memory operation instructions, global virtual address, and replaced process ID are then sent to the second computing card.
[0048] The protocol adaptation module inside LINK completes the format conversion based on the incoming on-chip GVA, that is, converts the AXI bus protocol of the first computing card into a dedicated protocol supported by LINK Interconnect, such as the serial high-speed protocol, to adapt to long-distance, high-bandwidth cross-card transmission. Compared with the AXI protocol, it saves more pin resources and increases the transmission distance.
[0049] In addition, if the second computing card is directly connected to the first computing card via LINK (such as a 2-card or 4-card direct connection architecture), the operation command and GVA (with target CHIPID) and target ASID number are directly transmitted to the second computing card via the point-to-point LINK link.
[0050] If the second computing card is not directly connected to the first computing card (such as in a large-scale cluster of 8 or 16 cards), the operation is forwarded to an external network switch (such as an NVSwitch) through the LINK interface, and the switch completes the addressing and data forwarding of the second computing card.
[0051] Step 103: The second computing card performs address substitution based on the memory operation instructions, the global virtual address, and the replaced process ID to obtain the physical address in the second computing card, and then operates on the memory pointed to by the physical address according to the memory operation instructions.
[0052] In the second computing card, the global virtual address can be converted to the corresponding virtual address in the second computing card according to the pre-configured second process allocation table in the second computing card and the replaced process number; the virtual address can be replaced with the physical address of the second computing card.
[0053] Specifically, the protocol adaptation module inside the second computing card LINK can be used to restore the LINK dedicated interconnect protocol to the AXI bus operation consistent with the initiator, while retaining the second computing card ASID number and GVA address.
[0054] The restored AXI operation is then sent to the ATU module of the second computing card. The ATU first uses the ASID number of the second computing card as the query key to search in the pre-configured GVA to VA mapping table to complete the adaptation and conversion of GVA (Global Virtual Address) to VA (Local Virtual Address of the Second Computing Card).
[0055] The ATU in the second computing card matches the corresponding Satp register (which stores the base address of the page table of the target process) in its own process allocation table using the second computing card's ASID number.
[0056] This process involves multi-level conversion. Corresponding to the single-level conversion above, the multi-level conversion starts with the page table base address in the STATP register, combines it with the converted VA (local virtual address), traverses the page table layer by layer (multi-level substitution), and finally converts it into the local physical address (PA) of the second computing card.
[0057] In a specific example, taking RISC-VSV48 as an example, the virtual address format is: {VPN3[8:0],VPN2[8:0],VPN1[8:0],VPN0[8:0],Offset[11:0]}; where VPN[3:0] is a four-level page table index, with 9 bits per level; it can create page tables with space sizes of 4K, 2M, 1GB, and 512GB.
[0058] The SATP register format is: SATP = {MODE (indicating Sv48 mode), ASID (address space identifier (optional), PPN (physical page number of the root page table)). ASID is used as the process ID.
[0059] ATU Replacement Process: The software configures address replacement page tables for all processes, as well as the SATA registers for all processes on the card. When the ATU receives an access address (in AXI operations, the User carries the process ID, i.e., ASID), it first queries all SATA registers to match the ASID process ID, finds the SATA for that process, and obtains the PPN. A first-level page table access is performed using the PPN and VPN3. If a leaf node is accessed and the page table is valid, the access ends. The PPN3 recorded in the leaf node, combined with VPN2, VPN1, VPN0, and Offset, constitutes the PA. If it is not a leaf node, a second-level page table access is performed based on the read-back PPN3 and VPN2. If a leaf node is accessed and the page table is valid, the access ends. The PPN3 and PPN2 recorded in the leaf node, combined with VPN1, VPN0, and Offset, constitute the PA. This process is used to perform a VA replacement. A maximum of four levels of replacement can be performed to find a leaf node. The number of replacements is related to the established page table space.
[0060] Once the physical address is obtained, the corresponding memory operations can be performed.
[0061] In this embodiment, when a memory operation instruction from the first compute card to the second compute card is initiated within the Scale-Up domain, the virtual address corresponding to the memory operation instruction is replaced using a first-level substitution based on the address substitution page table pre-configured in the first compute card, resulting in the global virtual address corresponding to the memory operation instruction. Then, the process ID is replaced using the global virtual address, the process ID in the first compute card, and the process ID mapping table pre-configured in the multi-card high-speed interconnect link. Based on the replaced process ID, the memory operation instruction, the global virtual address, and the replaced process ID are sent to the second compute card. The second compute card performs address substitution based on the memory operation instruction, the global virtual address, and the replaced process ID to obtain the physical address in the second compute card, and then operates on the memory pointed to by the physical address according to the memory operation instruction. Based on this, by establishing an address substitution mechanism, cross-card memory operations at the hardware level are achieved.
[0062] Example 2
[0063] Figure 2This is a schematic diagram of a cross-card operation implementation device based on a Scale-Up domain, provided in Embodiment 2 of this application. The cross-card operation implementation device based on a Scale-Up domain provided in this embodiment can execute the cross-card operation implementation method based on a Scale-Up domain provided in any embodiment of this application, and possesses the corresponding functional modules and beneficial effects of the method. This device can be implemented in software and / or hardware, such as... Figure 2 As shown, the device includes:
[0064] The first substitution module 201 is used to replace the virtual address corresponding to the memory operation instruction by first substitution through a first-level substitution in the first computing card in the Scale-Up domain, when the first computing card initiates a memory operation instruction from the first computing card to the second computing card, so as to obtain the global virtual address corresponding to the memory operation instruction.
[0065] The replacement transmission module 202 is used to replace the process ID according to the global virtual address, the process ID in the first computing card and the pre-configured process ID mapping table in the multi-card high-speed interconnection link, and send the memory operation instructions, the global virtual address and the replaced process ID to the second computing card based on the replaced process ID;
[0066] The second replacement module 203 is used by the second computing card to perform address replacement based on memory operation instructions, global virtual address and the replaced process number to obtain the physical address in the second computing card, and to operate on the memory pointed to by the physical address according to the memory operation instructions.
[0067] Furthermore, the replacement transmission module is specifically used for:
[0068] The card identifier of the second computing card is resolved from the global virtual address;
[0069] Using the card identifier and process number of the second computing card as the query key, a query is performed in the pre-configured process number mapping table in the multi-card high-speed interconnection link to obtain the process number corresponding to the second computing card;
[0070] Replace the process ID in the memory operation instructions with the process ID corresponding to the second computing card.
[0071] Example 3
[0072] Figure 3 This is a schematic diagram of the structure of a cross-card operation implementation device based on the Scale-Up domain, as provided in Embodiment 4 of this application. Figure 3As shown, the scale-up domain-based cross-card operation implementation device further includes a processor 310, a memory 320, an input device 330, and an output device 340; the number of processors 310 in the scale-up domain-based cross-card operation implementation device can be one or more. Figure 3 Taking a processor 310 as an example; in the cross-card operation implementation device based on the Scale-Up domain, the processor 310, memory 320, input device 330, and output device 340 can be connected via a bus or other means. Figure 3 Taking the example of a connection between China and Israel via a bus.
[0073] The memory 320, as a computer-readable storage medium, can be used to store software programs, computer-executable programs, and modules, such as the program instructions / modules corresponding to the Scale-Up domain-based cross-card operation implementation method in this embodiment of the invention. The processor 310 executes the software programs, instructions, and modules stored in the memory 320 to perform various functional applications and data processing of the Scale-Up domain-based cross-card operation implementation device, thereby implementing the aforementioned Scale-Up domain-based cross-card operation implementation method.
[0074] When the first compute card in the Scale-Up domain initiates a memory operation instruction from the first compute card to the second compute card, the virtual address corresponding to the memory operation instruction is replaced by a first-level replacement according to the address replacement page table pre-configured in the first compute card, so as to obtain the global virtual address corresponding to the memory operation instruction.
[0075] The process ID is replaced according to the global virtual address, the process ID in the first computing card, and the pre-configured process ID mapping table in the multi-card high-speed interconnect link. Based on the replaced process ID, the memory operation instructions, the global virtual address, and the replaced process ID are sent to the second computing card.
[0076] The second computing card performs address substitution based on memory operation instructions, global virtual address, and the replaced process ID to obtain the physical address in the second computing card, and then operates on the memory pointed to by the physical address according to the memory operation instructions.
[0077] Furthermore, based on the address substitution page table pre-configured in the first computing card, the virtual address corresponding to the memory operation instruction is substituted through a first-level substitution process to obtain the global virtual address corresponding to the memory operation instruction, including:
[0078] Furthermore, process ID replacement is performed based on the global virtual address, the process ID in the first computing card, and the pre-configured process ID mapping table in the multi-card high-speed interconnect link, including:
[0079] The card identifier of the second computing card is resolved from the global virtual address;
[0080] Using the card identifier and process number of the second computing card as the query key, a query is performed in the pre-configured process number mapping table in the multi-card high-speed interconnection link to obtain the process number corresponding to the second computing card;
[0081] Replace the process ID in the memory operation instructions with the process ID corresponding to the second computing card.
[0082] Furthermore, based on the replaced process ID, memory operation instructions, global virtual addresses, and the replaced process ID are sent to the second computing card, including:
[0083] The protocol for memory operation instructions, global virtual addresses, and the replaced process IDs is converted from the AXI bus protocol of the first computing card to the target LINK interconnect protocol.
[0084] The converted memory operation instructions, global virtual address, and replaced process ID are sent to the second computing card.
[0085] Furthermore, the second computing card performs address substitution based on memory operation instructions, global virtual addresses, and the replaced process ID to obtain the physical addresses in the second computing card, including:
[0086] Based on the pre-configured second process allocation table in the second computing card and the replaced process ID, the global virtual address is converted to the corresponding virtual address in the second computing card;
[0087] Replace the virtual address with the physical address of the second computing card.
[0088] The memory 320 may primarily include a program storage area and a data storage area. The program storage area may store the operating system and at least one application program required for a given function; the data storage area may store data created based on terminal usage. Furthermore, the memory 320 may include high-speed random access memory and non-volatile memory, such as at least one disk storage device, flash memory device, or other non-volatile solid-state storage device. In some instances, the memory 320 may further include memory remotely configured relative to the processor 310, which can be connected via a network to a scale-up domain-based cross-card operation implementation device. Examples of such networks include, but are not limited to, the Internet, corporate intranets, local area networks, mobile communication networks, and combinations thereof.
[0089] Example 4
[0090] Embodiment 4 of this application also provides a storage medium containing computer-executable instructions, which, when executed by a computer processor, are used to perform a cross-card operation implementation method based on a scale-up domain, the method comprising:
[0091] When the first compute card in the Scale-Up domain initiates a memory operation instruction from the first compute card to the second compute card, the virtual address corresponding to the memory operation instruction is replaced by a first-level replacement according to the address replacement page table pre-configured in the first compute card, so as to obtain the global virtual address corresponding to the memory operation instruction.
[0092] The process ID is replaced according to the global virtual address, the process ID in the first computing card, and the pre-configured process ID mapping table in the multi-card high-speed interconnect link. Based on the replaced process ID, the memory operation instructions, the global virtual address, and the replaced process ID are sent to the second computing card.
[0093] The second computing card performs address substitution based on memory operation instructions, global virtual address, and the replaced process ID to obtain the physical address in the second computing card, and then operates on the memory pointed to by the physical address according to the memory operation instructions.
[0094] Furthermore, process ID replacement is performed based on the global virtual address, the process ID in the first computing card, and the pre-configured process ID mapping table in the multi-card high-speed interconnect link, including:
[0095] The card identifier of the second computing card is resolved from the global virtual address;
[0096] Using the card identifier and process number of the second computing card as the query key, a query is performed in the pre-configured process number mapping table in the multi-card high-speed interconnection link to obtain the process number corresponding to the second computing card;
[0097] Replace the process ID in the memory operation instructions with the process ID corresponding to the second computing card.
[0098] Furthermore, based on the replaced process ID, memory operation instructions, global virtual addresses, and the replaced process ID are sent to the second computing card, including:
[0099] The protocol for memory operation instructions, global virtual addresses, and the replaced process IDs is converted from the AXI bus protocol of the first computing card to the target LINK interconnect protocol.
[0100] The converted memory operation instructions, global virtual address, and replaced process ID are sent to the second computing card.
[0101] Furthermore, the second computing card performs address substitution based on memory operation instructions, global virtual addresses, and the replaced process ID to obtain the physical addresses in the second computing card, including:
[0102] Based on the pre-configured second process allocation table in the second computing card and the replaced process ID, the global virtual address is converted to the corresponding virtual address in the second computing card;
[0103] Replace the virtual address with the physical address of the second computing card.
[0104] Of course, the computer-executable instructions provided in the embodiments of this application are not limited to the above-described method operations, but can also execute related operations in the cross-card operation implementation method based on the Scale-Up domain provided in any embodiment of this application.
[0105] Based on the above description of the implementation methods, those skilled in the art can clearly understand that this application can be implemented using software and necessary general-purpose hardware, and of course, it can also be implemented using hardware, but in many cases the former is a better implementation method. Based on this understanding, the technical solution of this application, in essence, or the part that contributes to the prior art, can be embodied in the form of a software product. This computer software product can be stored in a computer-readable storage medium, such as a computer floppy disk, read-only memory (ROM), random access memory (RAM), flash memory, hard disk, or optical disk, etc., including several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute the methods of the various embodiments of this application.
[0106] It is worth noting that in the embodiments of the search device described above, the various units and modules included are only divided according to functional logic, but are not limited to the above division, as long as the corresponding functions can be achieved; in addition, the specific names of each functional unit are only for easy differentiation and are not used to limit the scope of protection of this application.
[0107] Note that the above description is merely a preferred embodiment and the technical principles employed in this application. Those skilled in the art will understand that this application is not limited to the specific embodiments described herein, and various obvious changes, readjustments, and substitutions can be made without departing from the scope of protection of this application. Therefore, although this application has been described in detail through the above embodiments, this application is not limited to the above embodiments. Many other equivalent embodiments may be included without departing from the concept of this application, and the scope of this application is determined by the scope of the appended claims.
Claims
1. A method for implementing cross-card operations based on Scale-Up domains, characterized in that, The method includes: When the first compute card in the Scale-Up domain initiates a memory operation instruction from the first compute card to the second compute card, the virtual address corresponding to the memory operation instruction is replaced by a first-level replacement according to the address replacement page table pre-configured in the first compute card, so as to obtain the global virtual address corresponding to the memory operation instruction. The process ID is replaced according to the global virtual address, the process ID in the first computing card, and the pre-configured process ID mapping table in the multi-card high-speed interconnect link. The memory operation instruction, the global virtual address, and the replaced process ID are then sent to the second computing card based on the replaced process ID. The second computing card performs address substitution based on the memory operation instructions, the global virtual address, and the replaced process ID to obtain the physical address in the second computing card, and then operates on the memory pointed to by the physical address according to the memory operation instructions.
2. The method according to claim 1, characterized in that, The process ID replacement based on the global virtual address, the process ID in the first computing card, and the pre-configured process ID mapping table in the multi-card high-speed interconnect link includes: The card identifier of the second computing card is resolved from the global virtual address; Using the card identifier of the second computing card and the process number as the query key, a query is performed in the process number mapping table pre-configured in the multi-card high-speed interconnection link to obtain the process number corresponding to the second computing card; Replace the process ID in the memory operation instruction with the process ID corresponding to the second computing card.
3. The method according to claim 1, characterized in that, The step of sending the memory operation instructions, the global virtual address, and the replaced process ID to the second computing card based on the replaced process ID includes: The protocol for memory operation instructions, the global virtual address, and the replaced process ID is converted from the AXI bus protocol of the first computing card to the target LINK interconnect protocol. The converted memory operation instructions, the global virtual address, and the replaced process ID are sent to the second computing card.
4. The method according to claim 1, characterized in that, The second computing card performs address substitution based on the memory operation instructions, the global virtual address, and the replaced process ID to obtain the physical address in the second computing card, including: Based on the second process allocation table pre-configured in the second computing card and the replaced process number, the global virtual address is converted into the corresponding virtual address in the second computing card; Replace the virtual address with the physical address of the second computing card.
5. A cross-card operation implementation device based on Scale-Up domain, characterized in that, include: The first substitution module is used to perform address substitution on the virtual address corresponding to the memory operation instruction by first substitution through a first-level substitution based on the address substitution page table pre-configured in the first computing card when the first computing card initiates a memory operation instruction from the first computing card to the second computing card, so as to obtain the global virtual address corresponding to the memory operation instruction. The replacement transmission module is used to replace the process ID according to the global virtual address, the process ID in the first computing card and the pre-configured process ID mapping table in the multi-card high-speed interconnection link, and send the memory operation instruction, the global virtual address and the replaced process ID to the second computing card based on the replaced process ID; The second replacement module is used by the second computing card to perform address replacement according to the memory operation instructions, the global virtual address and the replaced process ID to obtain the physical address in the second computing card, and to operate on the memory pointed to by the physical address according to the memory operation instructions.
6. The apparatus according to claim 5, characterized in that, The replacement transmission module is specifically used for: The card identifier of the second computing card is resolved from the global virtual address; Using the card identifier of the second computing card and the process number as the query key, a query is performed in the process number mapping table pre-configured in the multi-card high-speed interconnection link to obtain the process number corresponding to the second computing card; Replace the process ID in the memory operation instruction with the process ID corresponding to the second computing card.
7. The apparatus according to claim 5, characterized in that, The replacement transmission module is specifically used for: The protocol for memory operation instructions, the global virtual address, and the replaced process ID is converted from the AXI bus protocol of the first computing card to the target LINK interconnect protocol. The converted memory operation instructions, the global virtual address, and the replaced process ID are sent to the second computing card.
8. The apparatus according to claim 5, characterized in that, The second-generation replacement module is specifically used for: Based on the second process allocation table pre-configured in the second computing card and the replaced process number, the global virtual address is converted into the corresponding virtual address in the second computing card; Replace the virtual address with the physical address of the second computing card.
9. A device for implementing cross-card operation based on a Scale-Up domain, characterized in that, include: One or more processors; Storage device for storing one or more programs. When the one or more programs are executed by the one or more processors, the one or more processors implement the cross-card operation implementation method based on any one of claims 1-4.
10. A computer-readable storage medium having a computer program stored thereon, characterized in that, When executed by the processor, the program implements the cross-card operation method based on the Scale-Up domain as described in any one of claims 1-4.