Driving circuit of D-mode cascade GaN power tube

Abstract

According to the D-mode cascade mode GaN power tube driving circuit provided by the invention, the short circuit detection and protection sub-circuit is led out through the source electrode side of the low-voltage MOSFET, the short circuit working condition is monitored by using the current or voltage formed by the stray inductance of the source electrode of the cascade power device, the protection trigger signal is output to the driving chip when the short circuit is detected, the low-voltage MOSFET is driven to be quickly turned off, and the driving circuit is simple in structure and low in cost. Therefore, rapid turn-off protection of the cascade power device is realized. Meanwhile, an anti-wrong-conduction sub-circuit is arranged between the grid electrode of the low-voltage MOSFET and the clamping control end of the driving chip, the current introduced by the Miller capacitor is clamped, and the low-voltage MOSFET is prevented from being mistakenly conducted in the high-speed switching and fault turn-off processes. On the premise of not additionally increasing the conduction loss of a main power loop, rapid detection and protection of a D-mode cascade GaN power tube bridge arm short circuit fault can be realized, and the anti-interference capability of the driving circuit under a high-frequency working condition is improved.

Description

Technical Field

[0001] This disclosure relates to the field of power electronics technology, and more specifically, to a driving circuit for a D-mode cascaded GaN power transistor. Background Technology

[0002] In recent years, wide-bandgap power devices such as GaN have been widely used in high-frequency, high-power-density power conversion devices due to their advantages such as high voltage withstand capability, low on-resistance, and fast switching speed. Among them, D-mode (enhancement / depletion-mode normally-on) GaN power transistors, being normally-on devices, typically need to be cascaded with low-voltage MOSFETs to form a cascaded power device. The indirect turn-off and turn-on of the GaN power transistor are achieved by controlling the gate of the low-voltage MOSFET. In practical applications, the cascaded structure needs to detect and turn off short-circuit faults within the bridge arm in an extremely short time. Simultaneously, it must suppress mis-turn-on and gate oscillations caused by Miller capacitance, stray inductance, and parasitic capacitance under the high-speed switching conditions of GaN devices with large voltage and current change rates.

[0003] Existing solutions commonly employ short-circuit protection by using a series shunt resistor in the main circuit or by employing the desaturation detection approach of traditional IGBT / Si MOSFETs, and simply adding a gate resistor or clamping diode at the drive end to suppress interference. However, these solutions often suffer from slow short-circuit detection signal establishment, reliance on insignificant voltage changes in the main circuit devices, poor adaptability to D-mode cascaded topologies, and a tendency for low-voltage MOSFETs to falsely turn on at high frequencies, making it difficult to balance protection speed and system reliability. Summary of the Invention

[0004] This disclosure provides at least one driving circuit for a D-mode cascaded GaN power transistor. By extending a short-circuit detection and protection sub-circuit from the source side of the low-voltage MOSFET, and utilizing the current or voltage generated by the stray inductance of the cascaded power device's source, a protection trigger signal is output to the desaturation protection terminal of the driving chip upon detection. The driving chip then drives the low-voltage MOSFET to turn off rapidly, thus achieving rapid turn-off protection for the cascaded power device. Simultaneously, an anti-misoperation turn-on sub-circuit is provided between the gate of the low-voltage MOSFET and the clamping control terminal of the driving chip to clamp the current introduced by the Miller capacitor, limiting the gate voltage rise and preventing the low-voltage MOSFET from being misoperated during high-speed switching and fault turn-off. With this structure, rapid and reliable detection and protection against short-circuit faults in the bridge arm of the D-mode cascaded GaN power transistor is achieved without increasing the main power circuit conduction losses, and the anti-interference capability and operational reliability of the entire driving circuit under high-frequency conditions are significantly improved.

[0005] This disclosure provides a driving circuit for a D-mode cascaded GaN power transistor, including: A cascaded power device is composed of a GaN power transistor and a low-voltage MOSFET cascaded together. The gate of the low-voltage MOSFET serves as the drive control terminal, and its source is connected to the gate of the GaN power transistor. The driver chip receives control signals on its primary side and is connected to the source of the low-voltage MOSFET on its secondary side, and is used to control the turn-off and turn-on of the cascaded power devices. The short-circuit detection and protection sub-circuit is connected to the source of the low-voltage MOSFET. It is used to monitor the short-circuit condition of the cascaded power device based on the current or voltage formed by the source stray inductance of the cascaded power device, and output a protection trigger signal to the driver chip when the short-circuit condition is detected, so as to trigger the rapid turn-off of the cascaded power device. An anti-misoperation circuit is disposed between the gate of the low-voltage MOSFET and the clamping control terminal of the driving chip. It is used to clamp the current flowing through the Miller capacitor during the switching process of the cascaded power device to limit the rise of the gate voltage and prevent the low-voltage MOSFET from misoperating.

[0006] In one optional implementation, the short-circuit detection and protection sub-circuit includes: A current sensor, with its input terminal connected to the source of the low-voltage MOSFET; The comparator has its first input terminal connected to the output terminal of the current sensor, its second input terminal connected to a reference voltage, and its output terminal connected to the desaturation protection terminal of the driver chip.

[0007] In one optional implementation, the anti-misleading communication circuit includes: The Miller clamp MOSFET has its source connected to power ground and its drain connected to the gate of the low-voltage MOSFET. The gate is connected to the clamp control terminal of the driver chip. A gate resistor is disposed between the source and the gate of the Miller-clamped MOSFET.

[0008] In one optional implementation, the Miller clamp MOSFET is configured to turn on when the low-voltage MOSFET is off or when the short-circuit detection and protection sub-circuit detects the short-circuit condition, so as to preferentially introduce the additional current caused by stray inductance and parasitic capacitance of the cascaded power devices during switching through the Miller capacitor to the power ground, thereby limiting the rise of the gate potential of the low-voltage MOSFET.

[0009] In one optional implementation, the protection trigger signal is used to trigger the driver chip to output a protection drive signal to the gate of the low-voltage MOSFET, drive the low-voltage MOSFET to turn off, thereby turning off the cascaded power device to achieve short-circuit protection of the cascaded power device.

[0010] In one optional implementation, a resonant filter circuit is also included; The resonant filter circuit is disposed between the gate of the low-voltage MOSFET and the signal output terminal of the driver chip.

[0011] In one optional embodiment, the resonant filter circuit includes: a ferrite bead, a first resistor, a second resistor, and a diode; One end of the magnetic bead is connected to the gate of the low-voltage MOSFET, and the other end is connected to the first resistor; The first resistor is connected between the magnetic bead and the cathode of the diode, and the anode of the diode is connected to the signal output terminal; One end of the second resistor is connected to the connection node between the ferrite bead and the first resistor, and the other end is connected to the signal output terminal.

[0012] In one optional implementation, the short-circuit detection and protection sub-circuit includes: A current sensing resistor is connected between the source of the low-voltage MOSFET and ground; The comparator has a first input terminal connected between the current sensing resistor and the source of the low-voltage MOSFET, a second input terminal connected to a reference voltage, a negative power supply terminal connected between the current sensing resistor and ground, and an output terminal connected to the desaturation protection terminal of the driver chip.

[0013] In one optional implementation, the short-circuit detection and protection sub-circuit adopts a voltage-type detection method: The source current of the low-voltage MOSFET is detected by the current sensor, and the voltage detection quantity is determined based on the rate of change of the source current and the source stray inductance. The detected voltage is compared with the reference voltage, and when the detected voltage is greater than the reference voltage, the protection trigger signal is output to the driver chip through the output terminal of the comparator.

[0014] In one optional implementation, the short-circuit detection and protection sub-circuit employs a current-type detection method: The voltage across the current sensing resistor is detected, and the current sensing quantity is determined based on the voltage across the resistor and the resistance value of the current sensing resistor. When the detected current exceeds a preset current threshold, the protection trigger signal is output to the driver chip through the output of the comparator.

[0015] This disclosure provides a driving circuit for a D-mode cascaded GaN power transistor. By extending a short-circuit detection and protection sub-circuit from the source side of the low-voltage MOSFET, and utilizing the current or voltage generated by the stray inductance of the cascaded power device's source, a protection trigger signal is output to the desaturation protection terminal of the driving chip upon detection. This triggers the low-voltage MOSFET to turn off rapidly, thus achieving rapid turn-off protection for the cascaded power device. Simultaneously, an anti-misoperation turn-on sub-circuit is provided between the gate of the low-voltage MOSFET and the clamping control terminal of the driving chip. This clamps the current introduced by the Miller capacitor, limiting the gate voltage rise and preventing the low-voltage MOSFET from being misoperated during high-speed switching and fault turn-off. With this structure, rapid and reliable detection and protection against short-circuit faults in the bridge arm of the D-mode cascaded GaN power transistor is achieved without increasing the main power circuit's conduction losses. Furthermore, the anti-interference capability and operational reliability of the entire driving circuit under high-frequency conditions are significantly improved.

[0016] To make the above-mentioned objects, features and advantages of this disclosure more apparent and understandable, preferred embodiments are described below in detail with reference to the accompanying drawings. Attached Figure Description

[0017] To more clearly illustrate the technical solutions of the embodiments of this disclosure, the accompanying drawings used in the embodiments will be briefly described below. These drawings are incorporated in and constitute a part of this specification. They illustrate embodiments conforming to this disclosure and, together with the specification, serve to explain the technical solutions of this disclosure. It should be understood that the following drawings only show some embodiments of this disclosure and should not be considered as limiting the scope. Those skilled in the art can obtain other related drawings based on these drawings without creative effort.

[0018] Figure 1 A schematic diagram of a driving circuit for a D-mode cascaded GaN power transistor provided in an embodiment of this disclosure is shown; Figure 2 A schematic diagram of a driving circuit for another D-mode cascaded GaN power transistor provided in an embodiment of this disclosure is shown; Figure 3 A schematic diagram of one of the short-circuit detection and protection sub-circuits provided in an embodiment of this disclosure is shown; Figure 4 This is a second schematic diagram of a short-circuit detection and protection sub-circuit provided in an embodiment of the present disclosure. Detailed Implementation

[0019] To make the objectives, technical solutions, and advantages of the embodiments of this disclosure clearer, the technical solutions of the embodiments of this disclosure will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this disclosure, and not all of them. The components of the embodiments of this disclosure described and shown in the accompanying drawings can generally be arranged and designed in various different configurations. Therefore, the following detailed description of the embodiments of this disclosure provided in the accompanying drawings is not intended to limit the scope of the claimed disclosure, but merely represents selected embodiments of this disclosure. All other embodiments obtained by those skilled in the art based on the embodiments of this disclosure without inventive effort are within the scope of protection of this disclosure.

[0020] It should be noted that similar labels and letters in the following figures indicate similar items. Therefore, once an item is defined in one figure, it does not need to be further defined and explained in subsequent figures.

[0021] In this document, the term "and / or" merely describes a relationship, indicating that three relationships can exist. For example, A and / or B can represent three cases: A alone, A and B simultaneously, and B alone. Furthermore, the term "at least one" in this document means any combination of at least two of any one or more elements. For example, including at least one of A, B, and C can mean including any one or more elements selected from the set consisting of A, B, and C.

[0022] Research has revealed that existing solutions for driving D-mode cascaded GaN power transistors commonly involve using a series shunt resistor in the main circuit or employing the desaturation detection approach of traditional IGBT / Si MOSFETs for short-circuit protection, and simply adding a gate resistor or clamping diode at the drive end to suppress interference. However, these solutions often suffer from slow short-circuit detection signal establishment, reliance on insignificant voltage changes in the main circuit devices, poor adaptability to D-mode cascaded topologies, and a tendency for low-voltage MOSFETs to falsely turn on at high frequencies, making it difficult to balance protection speed and system reliability.

[0023] Based on the above research, this disclosure provides a driving circuit for a D-mode cascaded GaN power transistor. By introducing a short-circuit detection and protection sub-circuit on the source side of the low-voltage MOSFET, and utilizing the current or voltage formed by the stray inductance of the cascaded power device's source, a protection trigger signal is output to the desaturation protection terminal of the driving chip when a short circuit is detected. The driving chip then drives the low-voltage MOSFET to turn off rapidly, thereby achieving rapid turn-off protection for the cascaded power device. Simultaneously, an anti-misoperation turn-on sub-circuit is set between the gate of the low-voltage MOSFET and the clamping control terminal of the driving chip to clamp the current introduced by the Miller capacitor, limiting the gate voltage rise and preventing the low-voltage MOSFET from being misoperated during high-speed switching and fault turn-off. With this structure, rapid and reliable detection and protection against short-circuit faults in the bridge arm of the D-mode cascaded GaN power transistor is achieved without increasing the conduction loss of the main power circuit, and the anti-interference capability and operational reliability of the entire driving circuit under high-frequency conditions are significantly improved.

[0024] To facilitate understanding of this embodiment, a detailed description of the driving circuit for a D-mode cascaded GaN power transistor disclosed in this disclosure embodiment will be provided first. See [link to documentation]. Figure 1 The diagram shown is a schematic of a driving circuit for a D-mode cascaded GaN power transistor provided in an embodiment of this disclosure.

[0025] like Figure 1 As shown, the driving circuit for the D-mode cascaded GaN power transistor includes: cascaded power device Q1, driver chip U1, short-circuit detection and protection sub-circuit, and anti-misoperation sub-circuit.

[0026] Specifically, the cascaded power device consists of a GaN power transistor and a low-voltage MOSFET cascaded together. The gate of the low-voltage MOSFET serves as the drive control terminal, and its source is connected to the gate of the GaN power transistor. The short-circuit detection and protection sub-circuit is connected to the source of the low-voltage MOSFET. It monitors the short-circuit condition of the cascaded power device module based on the current or voltage formed by the stray inductance of the source of the cascaded power device, and outputs a protection trigger signal to the driver chip when a short-circuit condition is detected to trigger the rapid turn-off of the cascaded power device. The anti-misoperation turn-on sub-circuit is located between the gate of the low-voltage MOSFET and the clamping control terminal of the driver chip. It clamps the current flowing through the Miller capacitor during the switching process of the cascaded power device to limit the rise of the gate voltage and prevent the low-voltage MOSFET from misoperating.

[0027] The above functional units form a complete drive and protection system through predetermined connection relationships. The drive chip U1 provides normal turn-on and turn-off drive for the cascaded power device Q1; the short-circuit detection and protection sub-circuit is used to quickly protect the cascaded power device Q1 under abnormal operating conditions; and the anti-misoperation turn-on sub-circuit is used to suppress the misoperation phenomenon caused by parasitic parameters during high-frequency switching, thereby ensuring the stable and reliable operation of the drive circuit.

[0028] Here, the cascaded power device Q1 is composed of a GaN power transistor and a low-voltage MOSFET cascaded together. The gate of the low-voltage MOSFET serves as the drive control terminal, indirectly controlling the cascaded power device Q1 through the drive signal output by the drive chip U1. The source of the low-voltage MOSFET is electrically connected to the gate of the GaN power transistor, allowing the on / off state of the low-voltage MOSFET to directly determine the gate bias state of the GaN power transistor, thereby controlling the on / off state of the GaN power transistor. Through this cascaded structure, the gate drive capability of the low-voltage MOSFET can be utilized to achieve safe and controllable drive of the D-mode GaN power transistor, meeting the turn-off reliability requirements of D-mode GaN normally open devices in applications.

[0029] Here, the short-circuit detection and protection sub-circuit is connected to the source side of the low-voltage MOSFET. Since stray inductance inevitably exists in the source loop of the cascaded power device Q1, when an abnormal operating condition such as a short circuit occurs, the current flowing through this loop will change abruptly in a very short time, resulting in a significant current or voltage change across the source stray inductance. The short-circuit detection and protection sub-circuit utilizes this characteristic to monitor the short-circuit condition of the cascaded power device Q1 based on the current or voltage generated by the source stray inductance.

[0030] When a change in current or voltage is detected that meets the short-circuit judgment condition, the short-circuit detection and protection sub-circuit outputs a protection trigger signal to the driver chip U1. After receiving the protection trigger signal, the driver chip U1 quickly changes the driving state of the low-voltage MOSFET, thereby triggering the rapid turn-off of the cascaded power device Q1, realizing a rapid response and protection against short-circuit faults, and avoiding continuous overcurrent acting on the power device and causing device damage.

[0031] It should be noted that the protection trigger signal is used to trigger the driver chip U1 to output a protection drive signal to the gate of the low-voltage MOSFET, drive the low-voltage MOSFET to turn off, and thus turn off the cascaded power device Q1, so as to realize the short-circuit protection of the cascaded power device Q1.

[0032] Here, the anti-misdirection circuit is located between the gate of the low-voltage MOSFET and the clamping control terminal of the driver chip U1. During the high-speed switching process of the cascaded power device Q1, due to the parasitic capacitances of the GaN power transistor and the low-voltage MOSFET (especially the Miller capacitance between the gate and drain) and the presence of circuit stray parameters, when the main circuit voltage changes rapidly, interference current will be induced on the gate of the low-voltage MOSFET through the Miller capacitance, causing the gate voltage to surge, and even causing misdirection when the low-voltage MOSFET should be in the off state.

[0033] Among them, the anti-misoperation circuit clamps the interference current flowing through the Miller capacitor and effectively guides this current to the clamping control terminal CLAMP or reference potential of the driver chip U1, thereby limiting the rise of the low-voltage MOSFET gate voltage and keeping it within a safe range, preventing the low-voltage MOSFET from misoperating during normal switching and fault shutdown.

[0034] Thus, through the above structural arrangement, the cascaded power device Q1, driver chip U1, short-circuit detection and protection sub-circuit, and anti-misoperation turn-on sub-circuit in this embodiment form a mutually cooperating whole: Under normal operating conditions, driver chip U1 reliably drives the D-mode cascaded GaN power device by controlling the gate of the low-voltage MOSFET; under abnormal short-circuit conditions, the short-circuit detection and protection sub-circuit can quickly identify the short circuit using the current or voltage formed by the source stray inductance, and trigger the driver chip U1 to quickly turn off the cascaded power device Q1 through the protection trigger signal; at the same time, the anti-misoperation turn-on sub-circuit clamps the gate interference caused by Miller capacitance, suppressing the risk of misoperation turn-on, thereby improving the anti-interference capability and operational reliability of the driver circuit in high-frequency environments while ensuring fast protection response.

[0035] Further, see Figure 2 The diagram shown is a schematic of a driving circuit for a GaN power transistor in another D-mode cascade configuration provided in this embodiment of the present disclosure.

[0036] like Figure 2 As shown, the driving circuit of the D-mode cascaded GaN power transistor includes: cascaded power device Q1, driver chip U1, short circuit detection and protection sub-circuit, and anti-misoperation sub-circuit, as well as resonant filtering sub-circuit.

[0037] Specifically, the anti-misdirection circuit includes a Miller clamp MOSFET Q2 and a gate resistor R3. The source of the Miller clamp MOSFET Q2 is connected to power ground GND2, and the drain is connected to the gate of the low-voltage MOSFET. The gate is connected to the clamping control terminal CLAMP of the driver chip U1. The gate resistor R3 is positioned between the source and gate of the Miller clamp MOSFET Q2. The resonant filter circuit is positioned between the gate of the low-voltage MOSFET and the signal output terminal OUT of the driver chip U1. The resonant filter circuit includes a ferrite bead FB1, a first resistor R1, a second resistor R2, and a diode. One end of the ferrite bead FB1 is connected to the gate of the low-voltage MOSFET, and the other end is connected to the first resistor R1. The first resistor R1 is connected between the ferrite bead FB1 and the cathode of the diode, and the anode of the diode is connected to the signal output terminal. One end of the second resistor R2 is connected to the connection node between the ferrite bead FB1 and the first resistor R1, and the other end is connected to the signal output terminal OUT.

[0038] exist Figure 1 Based on the structure shown, the driving circuit of the D-mode cascaded GaN power transistor in this embodiment includes a cascaded power device Q1, a driver chip U1, a short-circuit detection and protection sub-circuit, and an anti-misdirection switching sub-circuit, and further includes a resonant filtering sub-circuit. By introducing a resonant filtering sub-circuit in the gate drive path of the low-voltage MOSFET and setting an anti-misdirection switching sub-circuit between the gate and the clamping control terminal, the driving circuit can effectively suppress interference currents caused by high-frequency oscillations and the Miller effect while maintaining fast driving capability, thereby improving the stability and anti-interference capability of the cascaded power device Q1 during high-speed switching.

[0039] In practical applications, when the cascaded power device Q1 is turned on and off, the switching process inevitably involves current changes di / dt and voltage changes dv / dt. Stray inductance and capacitance will both cause additional voltage and current, and resonance may also occur between the inductor and capacitor. Therefore, during the switching process, this additional current flows from the Miller capacitor to R3. When the gate voltage reaches the turn-on voltage threshold, it can cause the low-voltage MOSFET to mis-turn on, or even lead to short circuits and other faults.

[0040] Here, the anti-misoperation circuit includes a Miller clamp MOSFET Q2 and a gate resistor R3. The source of the Miller clamp MOSFET Q2 is connected to power ground GND2, and the drain is connected to the gate of the low-voltage MOSFET. The gate is connected to the clamp control terminal CLAMP of the driver chip U1. Through the above connection, when the clamp control terminal CLAMP of the driver chip U1 outputs the corresponding control level, it can control the conduction or cutoff state of the Miller clamp MOSFET Q2. When Q2 is on, a low-impedance path is formed between the gate of the low-voltage MOSFET and power ground GND2, which can quickly discharge the interference current on the gate to power ground, thereby clamping and limiting the gate voltage and preventing it from rising abnormally.

[0041] Among them, Miller clamp MOSFET Q2 is used to turn on when the low voltage MOSFET is in the off state or when the short circuit detection and protection sub-circuit detects a short circuit. It preferentially introduces the extra current caused by stray inductance and parasitic capacitance of cascaded power device Q1 during the switching process into power ground through Miller capacitance, so as to limit the rise of gate potential of low voltage MOSFET.

[0042] Here, the gate resistor R3 is positioned between the source and gate of the Miller clamp MOSFET Q2 to dampen and limit the gate signal of Q2. On one hand, the gate resistor R3 can appropriately buffer the drive signal applied to the gate of Q2 by the CLAMP terminal, preventing unnecessary oscillations caused by excessively abrupt turn-on and turn-off of Q2. On the other hand, during the transient process of Q2 being on or off, the gate resistor R3 can limit the spike current in the gate circuit, which helps to improve the operating stability of the Miller clamp MOSFET Q2, ensuring its reliable conduction when the low-voltage MOSFET gate voltage rises abnormally, and achieving effective clamping of the Miller current.

[0043] Here, a resonant filter circuit is positioned between the gate of the low-voltage MOSFET and the signal output terminal OUT of the driver chip U1 to suppress high-frequency oscillation components in the drive signal transmission path. The resonant filter circuit includes a ferrite bead FB1, a first resistor R1, a second resistor R2, and a diode D. One end of the ferrite bead FB1 is connected to the gate of the low-voltage MOSFET, and the other end is connected to the first resistor R1. The first resistor R1 is connected between the ferrite bead FB1 and the cathode of the diode D, and the anode of the diode D is connected to the signal output terminal OUT. One end of the second resistor R2 is connected to the connection node between the ferrite bead FB1 and the first resistor R1, and the other end is connected to the signal output terminal OUT.

[0044] Through the above connection, the signal output terminal OUT of the driver chip U1 is connected to the node where one end of the magnetic bead FB1 is located via the second resistor R2 and the diode D, and then the magnetic bead FB1 is connected to the gate of the low voltage MOSFET, thus forming the main transmission path of the gate drive signal.

[0045] Among them, the ferrite bead FB1 exhibits high impedance under high-frequency conditions, which can dampen the high-frequency resonant current in the gate circuit during switching transients; the first resistor R1, connected in series with the ferrite bead FB1, further increases the attenuation effect of high-frequency oscillation; the second resistor R2 provides a resistive path between the drive signal output terminal OUT and the connection node between the ferrite bead FB1 and the first resistor R1, which is beneficial to forming a suitable gate charging and discharging path during conduction and turn-off; the diode D is connected to the signal output terminal OUT in series with the first resistor R1, providing a fast path for the gate signal in a specific conduction direction, thereby ensuring the gate driving speed while suppressing the resonance effect caused by stray inductance and parasitic capacitance of the gate circuit, and significantly reducing the oscillation amplitude of the low-voltage MOSFET gate voltage.

[0046] Therefore, through the synergistic effect of the anti-misdirection circuit and the resonant filtering circuit, on the one hand, the interference current introduced by the Miller clamp MOSFET Q2 and the gate resistor R3 is used to clamp the low-voltage MOSFET when it should be in the off state and prevent it from being misdirected; on the other hand, the resonant filtering network composed of the ferrite bead FB1, the first resistor R1, the second resistor R2 and the diode D filters and dampens the high-frequency oscillation components in the gate circuit, thereby improving the gate waveform quality and enhancing the overall stability and reliability of the D-mode cascaded GaN power transistor drive circuit while ensuring the driving speed.

[0047] Further, see Figure 3 The diagram shown is one of the schematic diagrams of a short-circuit detection and protection sub-circuit provided in an embodiment of this disclosure.

[0048] like Figure 3 As shown, the short-circuit detection and protection sub-circuit includes a current sensor and a comparator. The current sensor's input terminal is connected to the source of a low-voltage MOSFET; the comparator's first input terminal is the output terminal of the current sensor, its second input terminal is connected to a reference voltage Vref, and its output terminal is connected to the desaturation protection terminal Desat of the driver chip U1.

[0049] The short-circuit detection and protection sub-circuit is used to monitor the short-circuit conditions that may occur during the operation of the cascaded power device Q1, and to provide a protection trigger signal to the driver chip U1 when a short-circuit condition is detected, so that the driver chip U1 can use its own protection function to shut down the low-voltage MOSFET and the cascaded power device.

[0050] Here, the short-circuit detection and protection sub-circuit includes a current sensor and a comparator. The input terminal of the current sensor is connected to the source of the low-voltage MOSFET to detect the current flowing through the source circuit of the low-voltage MOSFET and converts the detected current information into a corresponding electrical signal output, such as a detection voltage related to the current magnitude or current change. By placing the current sensor on the source side of the low-voltage MOSFET, the conduction current of the cascaded power device Q1 can be directly reflected. When an abnormality such as a short circuit occurs in the circuit, the rapid change in the source current will be promptly reflected in the electrical signal output by the current sensor.

[0051] Specifically, by utilizing the stray inductance Ls of the source, there is a higher rate of current change compared to a normal switch when GaN is short-circuited. The current value is converted into a voltage output by a current sensor. The generated voltage value U is compared with the reference voltage Vref of the high-speed detection comparator. When U > Vref, the output voltage of the comparator drives Q1 to turn off, thereby achieving short-circuit protection.

[0052] In other words, the first input of the comparator is connected to the output of the current sensor to receive the detection signal from the current sensor. The second input of the comparator is connected to a reference voltage Vref, which serves as a comparison benchmark for short-circuit detection. When the detection signal output by the current sensor is lower than the reference voltage Vref, it indicates that the cascaded power device Q1 is in normal operating condition, and the output of the comparator remains at a normal level. When the detection signal rises and exceeds the reference voltage Vref, it indicates that the source current has reached or exceeded a preset threshold, corresponding to a possible abnormal operating condition such as a short circuit. At this time, the output of the comparator flips to a protection trigger level. The output of the comparator is connected to the desaturation protection terminal Desat of the driver chip U1. When the desaturation protection terminal Desat receives the protection trigger signal from the comparator, the driver chip U1 activates its internal protection logic to adjust the gate drive of the low-voltage MOSFET, thereby cooperating to complete the fast turn-off protection of the cascaded power device Q1.

[0053] In practical implementation, the short-circuit detection and protection sub-circuit of this structure adopts a voltage-type detection method. It detects the source current of the low-voltage MOSFET through a current sensor, and determines the voltage detection quantity (Us=Ls*di / dt) based on the rate of change of the source current di / dt and the source stray inductance Ls. The voltage detection quantity is compared with the reference voltage Vref, and when the voltage detection quantity is greater than the reference voltage Vref, a protection trigger signal is output to the driver chip U1 through the output of the comparator.

[0054] Further, see Figure 4 The diagram shown is a second schematic of a short-circuit detection and protection sub-circuit provided in an embodiment of this disclosure.

[0055] like Figure 4 As shown, the short-circuit detection and protection sub-circuit includes: a current sensing resistor Rs and a comparator. The current sensing resistor Rs is connected between the source of the low-voltage MOSFET and ground; the first input terminal of the comparator is connected between the current sensing resistor Rs and the source of the low-voltage MOSFET, the second input terminal is connected to the reference voltage Vref, the negative power supply terminal is connected between the current sensing resistor Rs and ground, and the output terminal is connected to the desaturation protection terminal Desat of the driver chip U1.

[0056] The short-circuit detection and protection sub-circuit in this embodiment is also used to monitor whether a short circuit occurs in the cascaded power device Q1 during operation, and to provide a protection trigger signal to the driver chip U1 when a short circuit is detected, so that the driver chip U1 can quickly turn off the low-voltage MOSFET and the cascaded power device Q1 through its desaturation protection function. Figure 3 Unlike the illustrated embodiment, this embodiment uses a current sensing resistor Rs to detect the source current of the low-voltage MOSFET.

[0057] Here, the short-circuit detection and protection sub-circuit includes a current-sensing resistor Rs and a comparator. The current-sensing resistor Rs is connected between the source of the low-voltage MOSFET and ground. It converts the current flowing through the source circuit of the low-voltage MOSFET into a voltage signal when the MOSFET is turned on; that is, the voltage generated across Rs reflects the magnitude of the source current. When the cascaded power device Q1 is operating normally, the current flowing through the current-sensing resistor Rs is within a predetermined range, and the voltage across it is relatively small. When an abnormal condition such as a short circuit occurs, the current flowing through the current-sensing resistor Rs increases sharply, and the voltage across it rises significantly, thus providing a voltage basis for short-circuit detection.

[0058] Here, the first input terminal of the comparator is connected to the connection node between the current sensing resistor Rs and the source of the low-voltage MOSFET, and is used to receive the voltage signal generated by the current sensing resistor Rs; the second input terminal of the comparator is connected to the reference voltage Vref, which serves as the comparison reference for current sensing and is used to set the short-circuit judgment threshold; the negative power supply terminal of the comparator is connected to the connection node between the current sensing resistor Rs and ground to ensure that the comparator operates within a suitable potential range.

[0059] The output of the comparator is connected to the desaturation protection terminal Desat of the driver chip U1. When the detection level corresponding to the voltage on the current sensing resistor Rs is lower than the reference voltage Vref, the output of the comparator remains at the normal level, and the driver chip U1 drives the low-voltage MOSFET normally in a predetermined manner. When the voltage on the current sensing resistor Rs increases, making the level at the first input terminal higher than the reference voltage Vref, the output of the comparator flips to the protection trigger level and is transmitted to the driver chip U1 through the desaturation protection terminal Desat. The driver chip U1 then initiates the protection action, turns off the gate drive of the low-voltage MOSFET, and thus realizes short-circuit protection for the cascaded power device Q1.

[0060] In practical implementation, the short-circuit detection and protection sub-circuit of this structure adopts a current-type detection method, which detects the voltage U across the current detection resistor Rs, and determines the current detection quantity ΔI based on the voltage across the resistor and the resistance value R of the current detection resistor (U=ΔI*R); when the current detection quantity ΔI is greater than the preset current threshold, a protection trigger signal is output to the driver chip U1 through the output of the comparator.

[0061] This disclosure provides a driving circuit for a D-mode cascaded GaN power transistor. By extending a short-circuit detection and protection sub-circuit from the source side of the low-voltage MOSFET, and utilizing the current or voltage generated by the stray inductance of the cascaded power device's source, a protection trigger signal is output to the desaturation protection terminal of the driving chip upon detection. This triggers the low-voltage MOSFET to turn off rapidly, thus achieving rapid turn-off protection for the cascaded power device. Simultaneously, an anti-misoperation turn-on sub-circuit is provided between the gate of the low-voltage MOSFET and the clamping control terminal of the driving chip. This clamps the current introduced by the Miller capacitor, limiting the gate voltage rise and preventing the low-voltage MOSFET from being misoperated during high-speed switching and fault turn-off. With this structure, rapid and reliable detection and protection against short-circuit faults in the bridge arm of the D-mode cascaded GaN power transistor is achieved without increasing the main power circuit's conduction losses. Furthermore, the anti-interference capability and operational reliability of the entire driving circuit under high-frequency conditions are significantly improved.

[0062] Finally, it should be noted that the above-described embodiments are merely specific implementations of this disclosure, used to illustrate the technical solutions of this disclosure, and not to limit it. The protection scope of this disclosure is not limited thereto. Although this disclosure has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that any person skilled in the art can still modify or easily conceive of changes to the technical solutions described in the foregoing embodiments, or make equivalent substitutions for some of the technical features, within the scope of the technology disclosed in this disclosure. Such modifications, changes, or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of this disclosure, and should all be covered within the protection scope of this disclosure. Therefore, the protection scope of this disclosure should be determined by the protection scope of the claims.

Claims

1. A driving circuit of a D-mode cascode GaN power transistor, characterized in that, include: A cascaded power device is composed of a GaN power transistor and a low-voltage MOSFET cascaded together. The gate of the low-voltage MOSFET serves as the drive control terminal, and its source is connected to the gate of the GaN power transistor. The driver chip receives control signals on its primary side and is connected to the source of the low-voltage MOSFET on its secondary side, and is used to control the turn-off and turn-on of the cascaded power devices. The short-circuit detection and protection sub-circuit is connected to the source of the low-voltage MOSFET. It is used to monitor the short-circuit condition of the cascaded power device based on the current or voltage formed by the source stray inductance of the cascaded power device, and output a protection trigger signal to the driver chip when the short-circuit condition is detected, so as to trigger the rapid turn-off of the cascaded power device. An anti-misoperation circuit is disposed between the gate of the low-voltage MOSFET and the clamping control terminal of the driving chip. It is used to clamp the current flowing through the Miller capacitor during the switching process of the cascaded power device to limit the rise of the gate voltage and prevent the low-voltage MOSFET from misoperating.

2. The driving circuit of the D-mode cascode GaN power transistor according to claim 1, wherein, The short-circuit detection and protection sub-circuit includes: A current sensor, with its input terminal connected to the source of the low-voltage MOSFET; The comparator has its first input terminal connected to the output terminal of the current sensor, its second input terminal connected to a reference voltage, and its output terminal connected to the desaturation protection terminal of the driver chip.

3. The driving circuit of the D-mode cascode GaN power transistor according to claim 1, wherein The anti-misleading communication sub-circuit includes: The Miller clamp MOSFET has its source connected to power ground and its drain connected to the gate of the low-voltage MOSFET. The gate is connected to the clamp control terminal of the driver chip. A gate resistor is disposed between the source and the gate of the Miller-clamped MOSFET.

4. The driving circuit for D-mode cascaded GaN power transistors according to claim 3, characterized in that: The Miller clamp MOSFET is used to turn on when the low-voltage MOSFET is in the off state or when the short-circuit detection and protection sub-circuit detects the short-circuit condition, so as to preferentially introduce the extra current caused by stray inductance and parasitic capacitance of the cascaded power device during the switching process into the power ground through the Miller capacitor, thereby limiting the rise of the gate potential of the low-voltage MOSFET.

5. The driving circuit for D-mode cascaded GaN power transistors according to claim 1, characterized in that: The protection trigger signal is used to trigger the driver chip to output a protection drive signal to the gate of the low-voltage MOSFET, drive the low-voltage MOSFET to turn off, and thus turn off the cascaded power device to achieve short-circuit protection of the cascaded power device.

6. The driving circuit of the D-mode cascode GaN power transistor according to claim 1, wherein It also includes a resonant filter circuit; The resonant filter circuit is disposed between the gate of the low-voltage MOSFET and the signal output terminal of the driver chip.

7. The driving circuit for D-mode cascaded GaN power transistors according to claim 6, characterized in that, The resonant filter circuit includes: a ferrite bead, a first resistor, a second resistor, and a diode; One end of the magnetic bead is connected to the gate of the low-voltage MOSFET, and the other end is connected to the first resistor; The first resistor is connected between the magnetic bead and the cathode of the diode, and the anode of the diode is connected to the signal output terminal; One end of the second resistor is connected to the connection node between the ferrite bead and the first resistor, and the other end is connected to the signal output terminal.

8. The driving circuit for D-mode cascaded GaN power transistors according to claim 1, characterized in that, The short-circuit detection and protection sub-circuit includes: A current sensing resistor is connected between the source of the low-voltage MOSFET and ground; The comparator has a first input terminal connected between the current sensing resistor and the source of the low-voltage MOSFET, a second input terminal connected to a reference voltage, a negative power supply terminal connected between the current sensing resistor and ground, and an output terminal connected to the desaturation protection terminal of the driver chip.

9. The driving circuit for D-mode cascaded GaN power transistors according to claim 2, characterized in that, The short-circuit detection and protection sub-circuit adopts a voltage-type detection method: The source current of the low-voltage MOSFET is detected by the current sensor, and the voltage detection quantity is determined based on the rate of change of the source current and the source stray inductance. The detected voltage is compared with the reference voltage, and when the detected voltage is greater than the reference voltage, the protection trigger signal is output to the driver chip through the output terminal of the comparator.

10. The driving circuit for D-mode cascaded GaN power transistors according to claim 8, characterized in that, The short-circuit detection and protection sub-circuit adopts a current-type detection method: The voltage across the current sensing resistor is detected, and the current sensing quantity is determined based on the voltage across the resistor and the resistance value of the current sensing resistor. When the detected current exceeds a preset current threshold, the protection trigger signal is output to the driver chip through the output of the comparator.

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