Signal acquisition circuit
By combining photodiodes, noise gain compensation modules, and bias compensation modules, the shortcomings of existing signal acquisition circuits in terms of dynamic range and bias capability are solved, enabling efficient processing of small current signals from photoelectric sensors and high dynamic range signal acquisition, thereby improving signal quality and stability.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- BEIJING SEMICON EQUIP INST THE 45TH RES INST OF CETC
- Filing Date
- 2025-12-30
- Publication Date
- 2026-04-17
AI Technical Summary
Existing signal acquisition circuits, while achieving wide dynamic range and low bias capability, suffer from the effects of adjustable bias voltage changes on phase delay and noise gain. Preamplifier offset compensation circuits are not suitable for processing small current signals from photoelectric sensors and are prone to drift. Multi-stage amplification increases costs and cannot switch between stages, resulting in poor signal quality.
By employing a combination of photodiodes, noise gain compensation modules, multi-stage gain switching modules, transimpedance amplifiers, and bias compensation modules, signal bias is reduced through noise gain compensation and bias compensation modules, thereby achieving high dynamic range signal acquisition, including multi-stage gain switching and bias compensation.
This technology enables efficient processing of small current signals output by photodiodes, improves the dynamic range and quality of signal acquisition, reduces signal bias, and enhances the stability and accuracy of signal acquisition.
Smart Images
Figure CN121887199A_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of signal acquisition and processing technology, and in particular to a signal acquisition circuit. Background Technology
[0002] Existing signal acquisition circuits that integrate wide dynamic range (meaning a large signal acquisition range) and low bias capability mainly adopt a combination of multi-stage amplification (mainly multiple operational amplifiers in series) and dynamic compensation to simultaneously achieve wide dynamic range and low bias error. The key technologies used include: adjustable reverse bias mechanism and preamplifier offset compensation circuit based on JFET (junction field-effect transistor).
[0003] The adjustable reverse bias mechanism mainly provides an adjustable bias voltage Vbias to the signal acquisition circuit through a DAC or a precision resistor network. However, the limitation of this technology is that the change in the adjustable bias voltage Vbias will cause the junction capacitance of the photodiode (PD) to change, which in turn affects the overall phase delay and noise gain of the circuit, causing the system response characteristics to shift with the bias voltage.
[0004] The preamplifier offset compensation circuit based on JFET mainly combines the ultra-low noise and high input impedance characteristics of discrete junction field-effect transistors (JFETs) to compensate for the noise caused by the operational amplifier offset voltage. It can process the small signals generated by the sensor. However, this solution is not suitable for processing the small current signals output by the photoelectric sensor. Furthermore, the preamplifier offset compensation circuit will drift with the changes in time and temperature, and this drift will also suppress the bias processing effect.
[0005] On the other hand, the signal acquisition circuits provided by existing technologies use a series connection of front and rear stages to increase the signal processing range, which requires the connection of multiple operational amplifiers, increasing the cost of the acquisition circuit. Furthermore, they cannot switch between different levels according to the photoelectric signal requirements, and cannot avoid the noise effect caused by signal gain, resulting in poor quality of the final acquired signal. Summary of the Invention
[0006] In view of this, the purpose of this application is to provide at least one signal acquisition circuit. The signal acquisition circuit provided by this application can complete the processing of the small current signal output by the photodiode, so that the circuit has a high dynamic range signal acquisition capability, and the bias compensation module further reduces the signal bias and improves the signal acquisition quality.
[0007] This application mainly includes the following aspects: In a first aspect, embodiments of this application provide a signal acquisition circuit, which includes a photodiode, a noise gain compensation module, a multi-stage gain switching module, a transimpedance amplifier, and a bias compensation module. The cathode of the photodiode is connected to a given bias voltage, and the anode of the photodiode is connected to the input terminals of the noise gain compensation module, the bias compensation module, and one end of the multi-stage gain switching module. The first output terminal of the bias compensation module is connected to the inverting input terminal of the transimpedance amplifier, and the non-inverting input terminal of the transimpedance amplifier is connected to the second output terminal of the bias compensation module. The other end of the multi-stage gain switching module is connected to the output terminal of the transimpedance amplifier. The positive power supply input terminal of the transimpedance amplifier is connected to a first operating voltage, and the negative power supply input terminal is connected to a second operating voltage. The noise gain compensation module and the multi-stage gain switching module are also connected to a gain switching signal. The multi-stage gain switching module responds to the gain switching signal by switching the operating gain of the transimpedance amplifier, and the noise gain compensation module responds to the gain switching signal by compensating for the switched operating gain of the transimpedance amplifier. The bias compensation module performs bias compensation on the transimpedance amplifier.
[0008] In one possible implementation, the multi-stage gain switching module includes a first gain switching unit, a second gain switching unit, a transition gain driving module, a low gain driving module, a low gain unit, a transition gain unit, and a high gain unit. The gain switching signals include a transition gain switching signal and a low gain switching signal. The input terminal of the transition gain driving module is connected to the first gain driving signal, and the output terminal of the transition gain driving module outputs the transition gain switching signal. The input terminal of the low gain driving module is connected to the second gain driving signal, and the output terminal of the low gain driving module outputs the low gain switching signal. The first connection terminals of the first gain switching unit are respectively connected to the first connection terminals of the second gain switching unit. The first gain switching unit has one end connected to the anode of the photodiode, the noise gain compensation module, the input terminal of the bias compensation module, and one end of the high gain unit. The control terminal of the first gain switching unit is connected to the transition gain switching signal. The other ends of the transition gain unit and the high gain unit are respectively connected to the output terminal of the transimpedance amplifier. The second end of the second gain switching unit is connected to one end of the low gain unit. The control terminal of the second gain switching unit is connected to the low gain switching signal. The other end of the low gain unit is connected to the output terminal of the transimpedance amplifier. The noise gain compensation module is also connected to the transition gain switching signal and the low gain switching signal.
[0009] In one possible implementation, the low-gain unit includes a low-gain resistor and a low-gain capacitor, the transition gain unit includes a transition gain resistor and a transition gain capacitor, and the high-gain unit includes a high-gain resistor and a high-gain capacitor. One end of the low-gain resistor is connected to one end of the low-gain capacitor and then to the second connection terminal of the second gain switching unit. The other end of the low-gain resistor is connected to the other end of the low-gain capacitor and then to the output terminal of the transimpedance amplifier. One end of the transition gain resistor is connected to one end of the transition gain capacitor and then to the first connection terminal of the first gain switching unit and the first connection terminal of the second gain switching unit. The other end of the transition gain resistor is connected to the other end of the transition gain capacitor and then to the output terminal of the transimpedance amplifier. One end of the high-gain resistor is connected to one end of the high-gain capacitor and then to the anode of the photodiode, the second connection terminal of the first gain switching unit, the input terminal of the noise gain compensation module, and the input terminal of the bias compensation module, respectively. The other end of the high-gain resistor is connected to the other end of the high-gain capacitor and then to the output terminal of the transimpedance amplifier.
[0010] In one possible implementation, the first gain switching unit includes a first optocoupler switch, a first pull-up resistor, and a first control switch. The transition gain switching signal includes a first transition gain switching signal and a second transition gain switching signal. The anode of the input side of the first optocoupler switch is connected to a first operating voltage through the first pull-up resistor, and the cathode of the input side of the first optocoupler switch is connected to the first transition gain switching signal. One end of the output side of the first optocoupler switch is connected to the first connection terminal of the second gain switching unit and the first connection terminal of the first control switch, respectively. The other end of the output side of the first optocoupler switch is connected to the anode of the photodiode, one end of the high-gain unit, the input terminal of the noise gain compensation module, and the input terminal of the bias compensation module, respectively. The second connection terminal of the first control switch is grounded, and the control terminal of the first control switch is connected to the second transition gain switching signal.
[0011] In one possible implementation, the second gain switching unit includes a second control switch and a third control switch, and the low gain switching signal includes a first low gain switching signal and a second low gain switching signal. The control terminal of the second control switch is connected to the first low gain switching signal, the first connection terminal of the second control switch is connected to the first connection terminal of the third control switch and one end of the low gain unit, the second connection terminal of the second control switch is connected to the first connection terminal of the first gain switching unit and one end of the transition gain unit, the control terminal of the third control switch is connected to the second low gain switching signal, and the second connection terminal of the third control switch is grounded.
[0012] In one possible implementation, the noise gain compensation module includes a second optocoupler switch and its corresponding second pull-up resistor, a fourth control switch, a low-gain compensation capacitor, and a transition gain compensation capacitor. The transition gain switching signal includes a first transition gain switching signal, and the low-gain switching signal includes a first low-gain switching signal. The anode of the input side of the second optocoupler switch is connected to a first operating voltage via the second pull-up resistor, and the cathode of the input side of the second optocoupler switch is connected to the first transition gain switching signal. One end of the output side of the second optocoupler switch is connected to the anode of the photodiode, the input terminal of the bias compensation module, one end of the high-gain unit, and the second connection terminal of the first gain switching unit. The other end of the output side of the second optocoupler switch is connected to one end of the low-gain compensation capacitor and one end of the transition gain compensation capacitor. The control terminal of the fourth control switch is connected to the second low-gain switching signal, the first connection terminal of the fourth control switch is connected to the other end of the low-gain compensation capacitor, and the second connection terminal of the fourth control switch is connected to the other end of the transition gain compensation capacitor and then grounded.
[0013] In one possible implementation, the transition gain drive module includes a first resistor, a second resistor, a third resistor, a fourth resistor, a first transistor, and a second transistor. One end of the first resistor and one end of the second resistor are connected to receive a first gain drive signal. The other end of the first resistor is connected to the base of the first transistor. The collector of the first transistor outputs a first transition gain switching signal. The emitter of the first transistor is connected to the emitter of the second transistor and then grounded. The other end of the second resistor is connected to one end of the third resistor and the base of the second transistor. The collector of the second transistor is connected to one end of the fourth resistor and outputs a second transition gain switching signal. The other end of the third resistor and the other end of the fourth resistor are connected to receive a third operating voltage.
[0014] In one possible implementation, the low-gain drive module includes a fifth resistor, a sixth resistor, a seventh resistor, an eighth resistor, a ninth resistor, a third transistor, and a fourth transistor. One end of the fifth resistor is connected to a second gain drive signal, and the other end of the fifth resistor is connected to one end of the sixth resistor and the base of the third transistor. The emitter of the third transistor is grounded, and the collector of the third transistor outputs a second low-gain switching signal, which is connected to one end of the seventh resistor and one end of the eighth resistor. The other end of the sixth resistor is connected to the other end of the seventh resistor and then connected to a third operating voltage. The other end of the eighth resistor is connected to the base of the fourth transistor, and the emitter of the fourth transistor is connected to the third operating voltage. The collector of the fourth transistor outputs a first low-gain switching signal and is connected to one end of the ninth resistor, and the other end of the ninth resistor is grounded.
[0015] In one possible implementation, the bias compensation module includes a JFET-based pre-offset compensation unit and a drift compensation unit. The signal input terminal of the pre-offset compensation unit is connected to the anode of the photodiode, the compensation control input terminal of the pre-offset compensation unit is connected to the drift compensation unit, the first output terminal of the pre-offset compensation unit is connected to the inverting input terminal of the transimpedance amplifier, and the second output terminal of the pre-offset compensation unit is connected to the non-inverting input terminal of the transimpedance amplifier. The pre-offset compensation unit suppresses the bias voltage generated by the transimpedance amplifier, and the drift compensation unit is used to compensate for the drift generated by the pre-offset compensation unit during operation.
[0016] In one possible implementation, the pre-offset compensation unit includes a first junction field-effect transistor (JFET), a second JFET, a tenth resistor, an eleventh resistor, and a follower resistor. The control terminal of the first JFET is connected to the anode of the photodiode and one end of the follower resistor, respectively. The other end of the follower resistor is connected to the output terminal of the transimpedance amplifier. The first connection terminal of the first JFET is connected to the second connection terminal of the second JFET and then connected to a third operating voltage. The second connection terminal of the first JFET is connected to the inverting input terminal of the transimpedance amplifier and, through the tenth resistor, to a second operating voltage. The second connection terminal of the second JFET is connected to the non-inverting input terminal of the transimpedance amplifier and, through the eleventh resistor, to the second operating voltage. The control terminal of the second JFET is connected to the drift compensation unit.
[0017] In one possible implementation, the drift compensation unit includes a twelfth resistor, a thirteenth resistor, a variable resistor, a fourteenth resistor, a fifteenth resistor, and a bypass capacitor. One end of the twelfth resistor is connected to a fourth operating voltage, and the other end of the twelfth resistor is connected to one end of the thirteenth resistor and the first fixed terminal of the variable resistor. The other end of the thirteenth resistor is connected to the second fixed terminal of the variable resistor and then grounded. The sliding terminal of the variable resistor is connected to one end of the fourteenth resistor. The other end of the fourteenth resistor is connected to one end of the fifteenth resistor, one end of the bypass capacitor, and the compensation control input terminal of the pre-offset compensation unit. The other end of the fifteenth resistor is connected to a fifth operating voltage, and the other end of the bypass capacitor is grounded.
[0018] This application provides a signal acquisition circuit, comprising: a photodiode whose cathode is connected to a given bias voltage; a photodiode whose anode is connected to the input terminals of a noise gain compensation module, a bias compensation module, and one end of a multi-stage gain switching module; a first output terminal of the bias compensation module connected to the inverting input terminal of a transimpedance amplifier; a non-inverting input terminal of the transimpedance amplifier connected to the second output terminal of the bias compensation module; and the other end of the multi-stage gain switching module connected to the output terminal of the transimpedance amplifier. The noise gain compensation module and the multi-stage gain switching module are also connected to a gain switching signal. The multi-stage gain switching module performs gain switching on the transimpedance amplifier. The bias compensation module performs bias compensation. The signal acquisition circuit provided by this application can process the small current signal output by the photodiode, enabling the circuit to have a high dynamic range signal acquisition capability. Furthermore, the bias compensation module further reduces the signal bias, improving the signal acquisition quality.
[0019] To make the above-mentioned objectives, features and advantages of this application more apparent and understandable, preferred embodiments are described below in detail with reference to the accompanying drawings. Attached Figure Description
[0020] To more clearly illustrate the technical solutions of the embodiments of this application, the accompanying drawings used in the embodiments will be briefly introduced below. It should be understood that the following drawings only show some embodiments of this application and should not be regarded as a limitation of the scope. For those skilled in the art, other related drawings can be obtained based on these drawings without creative effort.
[0021] Figure 1 This illustration shows one of the structural schematic diagrams of a signal acquisition circuit provided in an embodiment of this application; Figure 2 This is a second schematic diagram of the structure of a signal acquisition circuit provided in an embodiment of this application; Figure 3 This is shown as a third schematic diagram of a signal acquisition circuit provided in an embodiment of this application; Figure 4 This paper shows a schematic diagram of the structure of a transition gain driving module provided in an embodiment of this application; Figure 5 This paper shows a schematic diagram of the structure of a low-gain drive module provided in an embodiment of this application; Figure 6 This paper shows a schematic diagram of the structure of a bias compensation module provided in an embodiment of this application; Figure 7 A schematic diagram of another bias compensation module provided in an embodiment of this application is shown. Detailed Implementation
[0022] To make the objectives, technical solutions, and advantages of the embodiments of this application clearer, the technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. It should be understood that the drawings in this application are for illustrative and descriptive purposes only and are not intended to limit the scope of protection of this application. Furthermore, it should be understood that the schematic drawings are not drawn to scale. The flowcharts used in this application illustrate operations implemented according to some embodiments of this application. It should be understood that the operations in the flowcharts may not be implemented in sequence, and steps without logical contextual relationships may be reversed or implemented simultaneously. In addition, those skilled in the art, guided by the content of this application, may add one or more other operations to the flowcharts, or remove one or more operations from the flowcharts.
[0023] Furthermore, the described embodiments are merely some, not all, of the embodiments of this application. The components of the embodiments of this application described and illustrated herein can typically be arranged and designed in various different configurations. Therefore, the following detailed description of the embodiments of this application provided in the accompanying drawings is not intended to limit the scope of the claimed application, but merely to illustrate selected embodiments of the application. All other embodiments obtained by those skilled in the art based on the embodiments of this application without inventive effort are within the scope of protection of this application.
[0024] Existing signal acquisition circuits that integrate wide dynamic range (meaning a large signal acquisition range) and low bias capability mainly adopt a combination of multi-stage amplification (mainly multiple operational amplifiers in series) and dynamic compensation to simultaneously achieve wide dynamic range and low bias error. The key technologies used include: adjustable reverse bias mechanism and preamplifier offset compensation circuit based on JFET (junction field-effect transistor).
[0025] The adjustable reverse bias mechanism mainly provides an adjustable bias voltage Vbias to the signal acquisition circuit through a DAC or a precision resistor network. However, the limitation of this technology is that the change in the adjustable bias voltage Vbias will cause the junction capacitance of the photodiode (PD) to change, which in turn affects the overall phase delay and noise gain of the circuit, causing the system response characteristics to shift with the bias voltage.
[0026] The preamplifier offset compensation circuit based on JFET mainly combines the ultra-low noise and high input impedance characteristics of discrete junction field-effect transistors (JFETs) to compensate for the noise caused by the operational amplifier offset voltage. It can process the small signals generated by the sensor. However, this solution is not suitable for processing the small current signals output by the photoelectric sensor. Furthermore, the preamplifier offset compensation circuit will drift with the changes in time and temperature, and this drift will also suppress the bias processing effect.
[0027] On the other hand, the signal acquisition circuits provided by existing technologies use a series connection of front and rear stages to increase the signal processing range, which requires the connection of multiple operational amplifiers, increasing the cost of the acquisition circuit. Furthermore, they cannot switch between different levels according to the photoelectric signal requirements, and cannot avoid the noise effect caused by signal gain, resulting in poor quality of the final acquired signal.
[0028] Based on this, the present application provides a signal acquisition circuit. This circuit can process the small current signal output by the photodiode, enabling the circuit to acquire signals with a high dynamic range. Furthermore, the bias compensation module further reduces the signal bias and improves the signal acquisition quality, as detailed below: Please see Figure 1 , Figure 1 This illustration shows one of the structural schematic diagrams of a signal acquisition circuit provided in an embodiment of this application. For example... Figure 1 As shown, the signal acquisition circuit provided in this application embodiment includes a photodiode U1, a noise gain compensation module 10, a multi-stage gain switching module 11, a transimpedance amplifier U2, and a bias compensation module 12.
[0029] Preferably, the cathode of photodiode U1 is connected to a given bias voltage Vbias, and the anode of photodiode U1 is connected to the input terminals of noise gain compensation module 10, bias compensation module 12, and one end of multi-stage gain switching module 11, respectively. The first output terminal of bias compensation module 12 is connected to the inverting input terminal of transimpedance amplifier U2, the non-inverting input terminal of transimpedance amplifier U2 is connected to the second output terminal of bias compensation module 12, and the other end of multi-stage gain switching module 11 is connected to the output terminal of transimpedance amplifier U2. The positive power supply input terminal of transimpedance amplifier U2 is connected to the first operating voltage VCC1, and the negative power supply input terminal of transimpedance amplifier U2 is connected to the second operating voltage VCC2. The noise gain compensation module 10 and multi-stage gain switching module 11 are also connected to the gain switching signal FETX.
[0030] In the signal acquisition circuit provided in this application, the multi-stage gain switching module 11 provides a variety of selectable gains. In response to the gain switching signal FETX, the multi-stage gain switching module 11 switches the operating gain of the transimpedance amplifier U2 to the target selectable gain. In response to the gain switching signal FETX, the noise gain compensation module 10 performs noise compensation on the transimpedance amplifier U2 under the target selectable gain. The bias compensation module 12 performs bias compensation on the transimpedance amplifier U2.
[0031] In one specific embodiment, photodiode U1 is used to convert the incident light signal into a current signal under the drive of bias voltage Vbias. The photodiode U1 provided in this application is a photodiode with a pigtail, which makes the coupling between the optical fiber and photodiode U1 optimal (about 95%). In addition, it makes the position of photodiode U1 on the circuit board (the signal acquisition circuit provided in this application is integrated on a circuit board) flexible, and makes the connection between the external optical fiber and the circuit board stable after the photodiode U1 is connected. In addition, in the signal acquisition circuit provided in this application, photodiode U1 adopts a reverse bias connection form to ensure that the junction capacitance of the coupling is small.
[0032] Preferably, the first working voltage VCC1 is +5V and the second working voltage VCC2 is -30V.
[0033] In a preferred embodiment, please refer to Figure 2 , Figure 2 This is a second schematic diagram of a signal acquisition circuit provided in an embodiment of this application. For example... Figure 2 As shown, the multi-level gain switching module 11 includes a first gain switching unit 110, a second gain switching unit 111, a transition gain driving module 112, a low gain driving module 113, a low gain unit 114, a transition gain unit 115, and a high gain unit 116. The gain switching signal FETX includes a transition gain switching signal MG_X and a low gain switching signal LG_X.
[0034] Preferably, the input terminal of the transition gain driving module 112 is connected to the first gain driving signal GAIN_CTL1, the output terminal of the transition gain driving module 112 outputs the transition gain switching signal MG_X, the input terminal of the low gain driving module 113 is connected to the second gain driving signal GAIN_CTL0, and the output terminal of the low gain driving module 113 outputs the low gain switching signal LG_X.
[0035] The first connection terminal of the first gain switching unit 110 is connected to the first connection terminal of the second gain switching unit 111 and one end of the transition gain unit 115. The second connection terminal of the first gain switching unit 111 is connected to the anode of the photodiode U1, one end of the noise gain compensation module 10, one end of the high gain unit 116, and the input terminal of the bias compensation module 12. The control terminal of the first gain switching unit 110 is connected to the transition gain switching signal MG_X. The other end of the transition gain unit 115 and the other end of the high gain unit 116 are connected to the output terminal of the transimpedance amplifier U2. The second connection terminal of the second gain switching unit 111 is connected to one end of the low gain unit 114. The control terminal of the second gain switching unit 111 is connected to the low gain switching signal LG_X. The other end of the low gain unit 114 is connected to the output terminal of the transimpedance amplifier U2. The noise gain compensation module 10 is also connected to the transition gain switching signal MG_X and the low gain switching signal LG_X.
[0036] In one specific embodiment, the highest and lowest light intensities of the input light corresponding to photodiode U1 differ by a factor of 200,000. Therefore, transimpedance amplifier U2 requires at least three different gain settings to be applicable to photoelectric signals with a wide dynamic range. Specifically, in this application, the three different gain settings of transimpedance amplifier U2 are provided by a low-gain unit 114, a transition gain unit 115, and a high-gain unit 116, respectively. The low-gain unit 114 provides low gain to process the upper limit signal of light intensity acquisition from the anode output of photodiode U1, and the high-gain unit 116 provides high gain to process the lower limit signal of light intensity acquisition from the anode output of photodiode U1. Since the transition from high gain to low gain of transimpedance amplifier U2 will cause a sharp drop in signal-to-noise ratio, this application also provides at least one transition gain unit 115 to provide at least one intermediate gain setting between high gain and low gain for transimpedance amplifier U2. By providing low-gain unit 114, transition gain unit 115, and high-gain unit 116, this application makes the SNR change as gradual as possible when the entire signal acquisition circuit switches gains.
[0037] like Figure 2 As shown, the low-gain unit 114 includes a low-gain resistor. and low-gain capacitors The transition gain unit 115 includes a transition gain resistor. and transition gain capacitor The high-gain unit 116 includes a high-gain resistor. and high-gain capacitors .
[0038] Preferably, low-gain resistors One end is connected to the low-gain capacitor After one end is connected, it is connected to the second connection terminal of the second gain switching unit 111, low gain resistor. The other end is connected to a low-gain capacitor. The other end is connected to the output of the transimpedance amplifier U2, and the transition gain resistor is connected to it. One end and transition gain capacitor After one end is connected, it is connected to the first connection terminal of the first gain switching unit 110 and the first connection terminal of the second gain switching unit 111, and the transition gain resistor is connected to the first connection terminal of the second gain switching unit 111. The other end and the transition gain capacitor The other end is connected to the output of the transimpedance amplifier U2, and the high-gain resistor is connected thereafter. one end and high-gain capacitor After one end is connected, it is respectively connected to the anode of photodiode U1, the second connection terminal of the first gain switching unit 110, the input terminals of noise gain compensation module 10 and bias compensation module 12, and the high gain resistor. The other end and the high-gain capacitor After connecting the other end, connect it to the output terminal of the transimpedance amplifier U2.
[0039] In one specific embodiment, the low-gain resistor The resistance value determines the upper limit of the light intensity collected by photodiode U1; high-gain resistor The resistance value determines the lower limit of the light intensity collected by photodiode U1. Based on the input light intensity of photodiode U1 and the selection of photodiode U1 (the highest and lowest light intensities corresponding to photodiode U1 differ by a factor of 200,000), this application preferably uses a low-gain resistor. Select a 20kΩ high-gain resistor Select a 100 MΩ resistor, and a transition gain resistor. The selection requirement is between low gain resistors and high-gain resistors Therefore, the transition gain resistor A 4.64MΩ resistor can be selected.
[0040] Please see Figure 3 , Figure 3 This is shown as a third schematic diagram of a signal acquisition circuit according to an embodiment of this application. Figure 3 As shown, the first gain switching unit 110 includes a first optocoupler switch S1 and a first pull-up resistor. The first control switch K1 and the transition gain switching signal MG_X include the first transition gain switching signal MG_SW and the second transition gain switching signal MG_FET_N.
[0041] Preferably, the anode terminal of the input side of the first optocoupler switch S1 is connected to a first pull-up resistor. Connected to the first operating voltage VCC1, the input cathode of the first optocoupler switch S1 is connected to the first transition gain switching signal MG_SW. One end of the output of the first optocoupler switch S1 is connected to the first connection terminal of the second gain switching unit 111 and the first connection terminal of the first control switch K1, respectively. The other end of the output of the first optocoupler switch S1 is connected to the anode of the photodiode U1 and the high-gain resistor, respectively. One end, high-gain capacitor One end of the first control switch K1 is connected to the input terminals of the noise gain compensation module 10 and the bias compensation module 12. The second connection terminal of the first control switch K1 is grounded to GND. The control terminal of the first control switch K1 is connected to the second transition gain switching signal MG_FET_N.
[0042] In one specific embodiment, the first optocoupler switch S1 is model AQY221N2V, which has an output capacitance of 1pF and an on-resistance of approximately 10Ω, and can handle output voltages up to 40V. One end of the output side of the first optocoupler switch S1 is the output emitter, and the other end is the output collector. The first control switch K1 is an N-channel depletion-type field-effect transistor (specifically model BF1107). The first connection terminal of the first control switch K1 is the drain, the second connection terminal is the source, and the control terminal is the gate. A first pull-up resistor is also included. The selected model is 1kΩ.
[0043] Please see Figure 4 , Figure 4 A schematic diagram of a transition gain driving module provided in an embodiment of this application is shown. Figure 4 As shown, the transition gain drive module 112 includes a first resistor R1, a second resistor R2, a third resistor R3, a fourth resistor R4, a first transistor Q1, and a second transistor Q2. Preferably, the first resistor R1, the third resistor R3, and the fourth resistor R4 are all 10kΩ, the second resistor R2 is 5.9kΩ, and the first transistor Q1 and the second transistor Q2 have opposite polarities. Specifically, the first transistor Q1 is an NPN transistor, and the second transistor Q2 is a PNP transistor.
[0044] Preferably, one end of the first resistor R1 and one end of the second resistor R2 are connected to the first gain drive signal GAIN_CTL0. The other end of the first resistor R1 is connected to the base of the first transistor Q1. The collector of the first transistor Q1 outputs the first transition gain switching signal MG_SW. The emitter of the first transistor Q1 is connected to the emitter of the second transistor Q2 and grounded to GND. The other end of the second resistor R2 is connected to one end of the third resistor R3 and the base of the second transistor Q2. The collector of the second transistor Q2 is connected to one end of the fourth resistor R4 and outputs the second transition gain switching signal MG_FET_N. The other end of the third resistor R3 and the other end of the fourth resistor R4 are connected to the third operating voltage VCC3. For example, the third operating voltage VCC3 is -5V.
[0045] In a preferred embodiment, return Figure 3 The second gain switching unit 111 includes a second control switch K2 and a third control switch K3, and the low gain switching signal LG_X includes a first low gain switching signal LG_FET and a second low gain switching signal LG_FET_N.
[0046] Preferably, the control terminal of the second control switch K2 is connected to the first low-gain switching signal LG_FET, and the first connection terminal of the second control switch K2 is connected to the first connection terminal of the third control switch K3 and the low-gain resistor, respectively. one end and low-gain capacitor One end of the second control switch K2 is connected to one end of the output side of the first optocoupler switch S1 and the transition gain resistor, respectively. One end and transition gain capacitor One end of the third control switch K3 is connected to the second low-gain switching signal LG_FET_N, and the second connection end of the third control switch K3 is grounded to GND.
[0047] In one specific embodiment, the second control switch K2 and the third control switch K3 are both N-channel depletion-type field-effect transistors (model BF1107). The first connection terminal of the second control switch K2 and the first connection terminal of the third control switch K3 are the drains, the second connection terminal of the second control switch K2 and the second connection terminal of the third control switch K3 are the sources, and the control terminals of the second control switch K2 and the third control switch K3 are the gates.
[0048] Please see Figure 5 , Figure 5 A schematic diagram of a low-gain drive module provided in an embodiment of this application is shown. Figure 5As shown, the low-gain drive module 113 includes a fifth resistor R5, a sixth resistor R6, a seventh resistor R7, an eighth resistor R8, a ninth resistor R9, a third transistor Q3, and a fourth transistor Q4. Specifically, the sixth resistor R6, the seventh resistor R7, the eighth resistor R8, and the ninth resistor R9 are all 10kΩ, and the fifth resistor R5 is 5kΩ. The third transistor Q3 and the fourth transistor Q4 have opposite polarities. Specifically, the third transistor Q3 is a PNP type transistor, and the fourth transistor Q4 is an NPN type transistor.
[0049] Preferably, one end of the fifth resistor R5 is connected to the second gain drive signal GAIN_CTL1, and the other end of the fifth resistor R5 is connected to one end of the sixth resistor R6 and the base of the third transistor Q3. The emitter of the third transistor Q3 is grounded to GND. The collector of the third transistor Q3 outputs the second low gain switching signal LG_FET_N and is connected to one end of the seventh resistor R7 and one end of the eighth resistor R8. The other end of the sixth resistor R6 is connected to the other end of the seventh resistor R7 and then connected to the third operating voltage VCC3. The other end of the eighth resistor R8 is connected to the base of the fourth transistor Q4. The emitter of the fourth transistor Q4 is connected to the third operating voltage VCC3. The collector of the fourth transistor Q4 outputs the first low gain switching signal LG_FET and is connected to one end of the ninth resistor R9. The other end of the ninth resistor R9 is grounded to GND.
[0050] In another preferred embodiment, during the gain switching process between the low-gain unit 114, the transition gain unit 115, and the high-gain unit 116, in addition to the switching of mutual impedance, it is also necessary to reasonably control the capacitance of the transimpedance amplifier U2 to ground or between the input and the output. For example, when the transimpedance amplifier U2 is in a high-gain state, the capacitance to ground or between the input and the output should be minimized. Therefore, in order to achieve the above function, this application provides a noise gain compensation module 10 to compensate for noise gain during the gain switching process.
[0051] like Figure 3 As shown, the noise gain compensation module 10 includes a second optocoupler switch S2 and its corresponding second pull-up resistor. Fourth control switch K4, low gain compensation capacitor and transition gain compensation capacitor Specifically, the second optocoupler switch S2 is model AQY221N2V. One end of the output side of the second optocoupler switch S2 is the output emitter, and the other end is the output collector. The fourth control switch K4 is an N-channel depletion-type field-effect transistor (specifically model BF1107). The first connection terminal of the fourth control switch K4 is the drain, the second connection terminal is the source, and the control terminal is the gate. The second pull-up resistor... The selected model is 1kΩ.
[0052] Preferably, the anode on the input side of the second optocoupler switch S2 is connected to a second pull-up resistor. Connected to the first operating voltage VCC1, the cathode of the input side of the second optocoupler switch S2 is connected to the first transition gain switching signal MG_SW, and one end of the output side of the second optocoupler switch S2 is connected to the anode of the photodiode U1, the input terminal of the bias compensation module 12, and the high-gain resistor, respectively. One end, high-gain capacitor One end of the first optocoupler switch S1 and the other end of the output side of the first optocoupler switch S1, and the other end of the output side of the second optocoupler switch S2 are respectively connected to the low-gain compensation capacitor. One end and transition gain compensation capacitor One end of the fourth control switch K4 is connected to the control terminal of the second low-gain switching signal LG_FET, and the first connection terminal of the fourth control switch K4 is connected to the low-gain compensation capacitor. At the other end, the second connection terminal of the fourth control switch K4 is connected to the transition gain compensation capacitor. The other end is connected to ground GND.
[0053] In a preferred embodiment, Table 1 provides a truth table for a switch signal.
[0054] Table 1
[0055] Table 1 shows the switching signals corresponding to starting different gain units (high gain unit corresponds to high gain High, transition gain unit corresponds to intermediate gain Mid and low gain unit corresponds to low gain Low) of the transimpedance amplifier provided in this application, as well as the switching signals when no gain is started. Specifically, taking the transimpedance amplifier starting the high gain unit (i.e., the transimpedance amplifier U2 uses high gain High) as an example, at this time, the processor (not shown in the figure) outputs the first gain drive signal Gain_CTL0=0 (low level) and the second gain drive signal Gain_CTL1=0.
[0056] On one hand, after the first gain drive signal Gain_CTL0 is input to the transition gain drive module 112, it outputs the first transition gain switching signal MG_SW = High Z (high impedance state) and the second transition gain switching signal MG_FET_N = 0V. Under the action of the first transition gain switching signal MG_SW, the first optocoupler switch S1 is open and the second optocoupler switch S2 is open. Under the action of the second transition gain switching signal MG_FET_N, the first control switch K1 is connected to V. SG The output capacitance is 1.5pF when the source-gate voltage of the first control switch K1 is 0V.
[0057] On the other hand, after the second gain drive signal Gain_CTL1 is input to the low gain drive module 113, it outputs the first low gain switching signal LG_FET = -5V and the second low gain switching signal LG_FET_N = 0V. At this time, under the action of the first low gain switching signal LG_FET, the second control switch K2 is open and the fourth control switch K4 is open. Under the action of the second low gain switching signal LG_FET_N, the third control switch K3 is connected to V. SG The output capacitance is 1.5pF when the source-gate voltage of the third control switch K1 is 0V.
[0058] Under the aforementioned signal action, the low-gain unit 114 and the transition gain unit 115 are disconnected, and the high-gain unit 116 is connected to the transimpedance amplifier U2, causing the transimpedance amplifier U2 to operate in a high-gain state. At this time, the low-gain compensation capacitor... and transition gain compensation capacitor With both switches disconnected, the equivalent capacitance to ground at the signal output of the transimpedance amplifier U2 consists of the output capacitance of the first control switch K1 and the third control switch K3, and the high-gain capacitor. When switching to medium gain, the first optocoupler switch S1 closes, MG_FET_N = -5V, and the first control switch K1 is connected to V. SG The output capacitance at -5V is 0.9pF. The capacitance change introduced by the closing of the first optocoupler switch S1 will be compensated by the first control switch K1.
[0059] The switching action of the transimpedance amplifier U2 at other gain levels is shown in Table 1, and will not be elaborated upon here.
[0060] In order to achieve the widest dynamic range of the transimpedance amplifier U2 in the signal acquisition circuit provided in this application, a high-voltage bipolar operational amplifier is selected for the transimpedance amplifier U2.
[0061] In a preferred embodiment, please refer to Figure 6 , Figure 6A schematic diagram of the structure of a bias compensation module provided in an embodiment of this application is shown. Figure 6 As shown, the bias compensation module 12 includes a JFET-based pre-offset compensation unit 120 and a drift compensation unit 121. The signal input terminal of the pre-offset compensation unit 120 is connected to the anode of the photodiode U1, the compensation control input terminal of the pre-offset compensation unit 120 is connected to the drift compensation unit 121, the first output terminal of the pre-offset compensation unit 120 is connected to the inverting input terminal of the transimpedance amplifier U2, and the second output terminal of the pre-offset compensation unit 120 is connected to the non-inverting input terminal of the transimpedance amplifier U2.
[0062] In this application, the pre-offset compensation unit 120 suppresses the bias voltage generated by the transimpedance amplifier U2, and the drift compensation unit 121 is used to compensate for the drift generated by the pre-offset compensation unit 120 during operation.
[0063] In a preferred embodiment, such as Figure 6 As shown, the pre-offset compensation unit 120 includes a first junction field-effect transistor JEFT1, a second junction field-effect transistor JEFT2, a tenth resistor R10, an eleventh resistor R11, and a follower resistor RM.
[0064] Preferably, the control terminal of the first junction field-effect transistor JEFT1 is connected to the anode of the photodiode U1 and one end of the follower resistor RM, respectively. The other end of the follower resistor RM is connected to the output terminal of the transimpedance amplifier U2. The first connection terminal of the first junction field-effect transistor JEFT1 is connected to the second connection terminal of the second junction field-effect transistor JEFT2 and then connected to the third operating voltage VCC3 (+5V). The second connection terminal of the first junction field-effect transistor JEFT1 is connected to the inverting input terminal of the transimpedance amplifier U2 and connected to the second operating voltage VCC2 (-30V) through the tenth resistor R10. The second connection terminal of the second junction field-effect transistor JEFT2 is connected to the non-inverting input terminal of the transimpedance amplifier U2 and connected to the second operating voltage VCC2 through the eleventh resistor R11. The control terminal of the second junction field-effect transistor JEFT2 is connected to the drift compensation unit 121.
[0065] In another preferred embodiment, the drift compensation unit 121 includes a twelfth resistor R12, a thirteenth resistor R13, a variable resistor RP, a fourteenth resistor R14, a fifteenth resistor R15, and a bypass capacitor CP. One end of the twelfth resistor R12 is connected to the fourth operating voltage R2V0. The other end of the twelfth resistor R12 is connected to one end of the thirteenth resistor R13 and the first fixed terminal of the variable resistor RP. The other end of the thirteenth resistor R13 is connected to the second fixed terminal of the variable resistor RP and then grounded. The sliding terminal of the variable resistor RP is connected to one end of the fourteenth resistor R14. The other end of the fourteenth resistor R14 is connected to one end of the fifteenth resistor R15, one end of the bypass capacitor CP, and the control terminal of the second junction field-effect transistor JEFT2. The other end of the fifteenth resistor R15 is connected to the fifth operating voltage R2V0N, and the other end of the bypass capacitor CP is grounded.
[0066] In this application, the first junction field-effect transistor JEFT1 is used as a source follower. This application combines the bandwidth of the transimpedance amplifier U2 (bipolar operational amplifier) with the low current noise of the JFET. Since the light input is DC coupled, the noise of the transimpedance amplifier U2 will be sent to the subsequent amplifier along with the acquired signal. This means that the output bias of the transimpedance amplifier U2 should be very small and stable. Since the inverting input of the transimpedance amplifier U2 uses the first junction field-effect transistor JEFT1 as a source follower, the output offset voltage of the transimpedance amplifier U2 is approximately equal to the gate-source voltage of the first junction field-effect transistor JEFT1. The spread range of this voltage will be very high and will drift with time and temperature. That is, although the pre-offset compensation unit 120 can compensate the bias of the transimpedance amplifier U2, it will also generate bias drift itself. Therefore, this application proposes to add an "equivalent" JFET source follower (i.e., the second junction field-effect transistor JEFT2) at the non-inverting input of the transimpedance amplifier U2 to solve this problem. The second junction field-effect transistor JEFT2 will be stabilized at approximately the same gate-source voltage as the first junction field-effect transistor JEFT1, and will have approximately the same drift. The remaining difference in the gate-source voltage of JEFT1 will be compensated by the drift compensation unit, specifically by changing the common-mode voltage.
[0067] In this application, the variable resistor RP is a non-volatile digital potentiometer used to apply voltage to the non-inverting input terminal of the transimpedance amplifier U2. In this application, before the signal acquisition circuit is put into operation, the variable resistor RP is modulated so that the output signal of the transimpedance amplifier U2 is 0. The resistance value of the variable resistor RP connected to the circuit at this time will be stored in the variable resistor RP and permanently retained for the service life of the circuit board encapsulated by the signal acquisition circuit.
[0068] In a preferred embodiment, please refer to Figure 7 , Figure 7 A schematic diagram of another bias compensation module provided in an embodiment of this application is shown. Figure 7 As shown, another structure of the pre-offset compensation unit 120 includes a first junction field-effect transistor JEFT1, a second junction field-effect transistor JEFT2, a sixteenth resistor R16, a seventeenth resistor R17, an eighteenth resistor R18, a nineteenth resistor R19, and a follower resistor RM.
[0069] In this circuit, the control terminal of the first junction field-effect transistor JEFT1 is connected to the anode of the photodiode U1 and one end of the follower resistor RM. The first connection terminal of the first junction field-effect transistor JEFT1 is connected to the first connection terminal of the second junction field-effect transistor JEFT2, and then connected to the third operating voltage VCC3 (+5V) through the sixteenth resistor R16. The second connection terminal of the first junction field-effect transistor JEFT1 is connected to the inverting input terminal of the transimpedance amplifier U2 and one end of the seventeenth resistor R17. The other end of the seventeenth resistor R17 is connected to one end of the eighteenth resistor R18 and connected to the second operating voltage VCC2 (-30V) through the nineteenth resistor R19. The other end of the eighteenth resistor R18 is connected to the second connection terminal of the second junction field-effect transistor JEFT2 and the non-inverting input terminal of the transimpedance amplifier U2. The control terminal of the second junction field-effect transistor JEFT2 is connected to the drift compensation unit 121, and the other end of the follower resistor RM is connected to the output terminal of the transimpedance amplifier U2.
[0070] exist Figure 7 In another embodiment of the drift compensation unit 121 shown, the drift compensation unit 121 includes a twentieth resistor R20, a bypass capacitor CP, a twenty-first resistor R21, a twenty-second resistor R22, a twenty-third resistor R23, and a variable resistor RP.
[0071] Preferably, one end of the twenty-first resistor R21 is connected to the fourth operating voltage R2V0, and the other end of the twenty-first resistor R21 is connected to the first fixed terminal of the variable resistor RP. The second fixed terminal of the variable resistor RP is grounded. The sliding terminal of the variable resistor RP is connected to one end of the twenty-second resistor R22. The other end of the twenty-second resistor R22 is connected to one end of the twenty-third resistor R23, one end of the twenty-tenth resistor R20, and one end of the bypass capacitor CP. The other end of the twenty-tenth resistor R20 and the other end of the bypass capacitor CP are grounded. The other end of the twenty-third resistor R23 is connected to the fifth operating voltage R2VN. The fourth operating voltage R2V0 and the fifth operating voltage R2VN have opposite voltages.
[0072] The signal acquisition circuit provided in this application adopts a three-stage gain selection and low-noise JEFT to form a composite amplifier with an operational amplifier, while expanding the power supply voltage of the operational amplifier, effectively expanding the dynamic range of optical signal input.
[0073] In the signal acquisition circuit provided in this application, the photodiode U1 can be replaced according to the actual light intensity and wavelength. The model of the transimpedance amplifier U1, the form of the gain switching switch (relay or MOS switch, etc.), the resistance value of the gain resistor, the model of the variable resistor, and the model of the JFET used in the pre-offset compensation unit are not specifically limited here and can all be replaced according to the actual signal requirements.
[0074] The advantages of this application are: 1. This application sets up a multi-level gain switching module (including multiple gain units with gains from high to low) and combines them with corresponding switching switches to enable the transimpedance amplifier to handle the high dynamic range of photoelectric signals. This allows the entire signal acquisition circuit to be used not only for the small signals generated by ordinary sensors, but also for the photoelectric signals generated by photodiodes under various light intensities.
[0075] 2. This application uses a combination of a pre-offset compensation unit (source follower) with a symmetrical JFET structure and a drift compensation unit (compensated by changing the common-mode voltage) to compensate for the input offset voltage of the transimpedance amplifier. This can effectively compensate for the shift in the response characteristics of the transimpedance amplifier with the bias voltage, reduce signal bias, and improve compensation accuracy.
[0076] 3. The signal acquisition circuit of this application introduces a noise gain compensation module, which mainly controls the on / off state of the gain compensation capacitor through a switch. It can be combined with the gain unit selected by the transimpedance amplifier to control the connection of different gain compensation capacitors in the circuit for noise gain compensation, so as to keep the noise gain of different gain levels as consistent as possible.
[0077] Those skilled in the art will clearly understand that, for the sake of convenience and brevity, the specific working process of the signal acquisition circuit described above can be referred to the corresponding process in the foregoing method embodiments, and will not be repeated here. In the several embodiments provided in this application, it should be understood that the disclosed signal acquisition circuit can be implemented in other ways. The signal acquisition circuit embodiments described above are merely illustrative. For example, the division of units is only a logical functional division; in actual implementation, there may be other division methods. Furthermore, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed.
[0078] The units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the units can be selected to achieve the purpose of this embodiment according to actual needs.
[0079] In addition, the functional units in the various embodiments of this application can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit.
[0080] The above are merely specific embodiments of this application, but the scope of protection of this application is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.
Claims
1. A signal acquisition circuit, characterized in that, The signal acquisition circuit includes a photodiode, a noise gain compensation module, a multi-stage gain switching module, a transimpedance amplifier, and a bias compensation module. In this configuration, the cathode of the photodiode is connected to a given bias voltage. The anode of the photodiode is connected to the input terminals of the noise gain compensation module, the bias compensation module, and one end of the multi-stage gain switching module. The first output terminal of the bias compensation module is connected to the inverting input terminal of the transimpedance amplifier, the non-inverting input terminal of the transimpedance amplifier is connected to the second output terminal of the bias compensation module, and the other end of the multi-stage gain switching module is connected to the output terminal of the transimpedance amplifier. The positive power supply input terminal of the transimpedance amplifier is connected to a first operating voltage, and the negative power supply input terminal of the transimpedance amplifier is connected to a second operating voltage. The noise gain compensation module and the multi-stage gain switching module are also connected to a gain switching signal. The multi-stage gain switching module responds to the gain switching signal to switch the working gain of the transimpedance amplifier, and the noise gain compensation module responds to the gain switching signal to compensate for the working gain of the switching transimpedance amplifier. The bias compensation module performs bias compensation on the transimpedance amplifier.
2. The signal acquisition circuit according to claim 1, characterized in that, The multi-level gain switching module includes a first gain switching unit, a second gain switching unit, a transition gain driving module, a low gain driving module, a low gain unit, a transition gain unit, and a high gain unit. The gain switching signals include a transition gain switching signal and a low gain switching signal. The input of the transition gain drive module is connected to the first gain drive signal, and the output of the transition gain drive module outputs a transition gain switching signal. The input of the low gain drive module is connected to the second gain drive signal, and the output of the low gain drive module outputs a low gain switching signal. The first connection terminal of the first gain switching unit is connected to the first connection terminal of the second gain switching unit and one end of the transition gain unit, respectively. The second connection terminal of the first gain switching unit is connected to the anode of the photodiode, the noise gain compensation module, the input terminal of the bias compensation module and one end of the high gain unit. The control terminal of the first gain switching unit is connected to the transition gain switching signal. The other end of the transition gain unit and the other end of the high gain unit are respectively connected to the output terminal of the transimpedance amplifier. The second connection terminal of the second gain switching unit is connected to one end of the low gain unit, the control terminal of the second gain switching unit is connected to the low gain switching signal, and the other end of the low gain unit is connected to the output terminal of the transimpedance amplifier. The noise gain compensation module is also connected to the transition gain switching signal and the low gain switching signal, respectively.
3. The signal acquisition circuit according to claim 2, characterized in that, The low-gain unit includes a low-gain resistor and a low-gain capacitor; the transition-gain unit includes a transition-gain resistor and a transition-gain capacitor; and the high-gain unit includes a high-gain resistor and a high-gain capacitor. One end of the low-gain resistor is connected to one end of the low-gain capacitor and then connected to the second connection terminal of the second gain switching unit. The other end of the low-gain resistor is connected to the other end of the low-gain capacitor and then connected to the output terminal of the transimpedance amplifier. One end of the transition gain resistor and one end of the transition gain capacitor are connected to the first connection terminal of the first gain switching unit and the first connection terminal of the second gain switching unit. The other end of the transition gain resistor and the other end of the transition gain capacitor are connected to the output terminal of the transimpedance amplifier. One end of the high-gain resistor and one end of the high-gain capacitor are connected to the anode of the photodiode, the second connection terminal of the first gain switching unit, the input terminal of the noise gain compensation module and the bias compensation module, respectively. The other end of the high-gain resistor and the other end of the high-gain capacitor are connected to the output terminal of the transimpedance amplifier.
4. The signal acquisition circuit according to claim 2, characterized in that, The first gain switching unit includes a first optocoupler switch, a first pull-up resistor, and a first control switch. The transition gain switching signal includes a first transition gain switching signal and a second transition gain switching signal. In this configuration, the anode of the input side of the first optocoupler switch is connected to the first operating voltage via a first pull-up resistor, the cathode of the input side of the first optocoupler switch is connected to the first transition gain switching signal, one end of the output side of the first optocoupler switch is connected to the first connection terminal of the second gain switching unit and the first connection terminal of the first control switch, the other end of the output side of the first optocoupler switch is connected to the anode of the photodiode, one end of the high gain unit, the input terminal of the noise gain compensation module and the bias compensation module, the second connection terminal of the first control switch is grounded, and the control terminal of the first control switch is connected to the second transition gain switching signal.
5. The signal acquisition circuit according to claim 2, characterized in that, The second gain switching unit includes a second control switch and a third control switch, and the low gain switching signal includes a first low gain switching signal and a second low gain switching signal. Wherein, the control terminal of the second control switch is connected to the first low-gain switching signal, the first connection terminal of the second control switch is connected to the first connection terminal of the third control switch and one end of the low-gain unit, the second connection terminal of the second control switch is connected to the first connection terminal of the first gain switching unit and one end of the transition gain unit, the control terminal of the third control switch is connected to the second low-gain switching signal, and the second connection terminal of the third control switch is grounded.
6. The signal acquisition circuit according to claim 2, characterized in that, The noise gain compensation module includes a second optocoupler switch and its corresponding second pull-up resistor, a fourth control switch, a low-gain compensation capacitor, and a transition gain compensation capacitor. The transition gain switching signal includes a first transition gain switching signal, and the low-gain switching signal includes a first low-gain switching signal. Wherein, the anode of the input side of the second optocoupler switch is connected to the first operating voltage through the second pull-up resistor, the cathode of the input side of the second optocoupler switch is connected to the first transition gain switching signal, one end of the output side of the second optocoupler switch is connected to the anode of the photodiode, the input terminal of the bias compensation module, one end of the high gain unit and the second connection terminal of the first gain switching unit respectively, and the other end of the output side of the second optocoupler switch is connected to one end of the low gain compensation capacitor and one end of the transition gain compensation capacitor respectively; The control terminal of the fourth control switch is connected to the second low-gain switching signal, the first connection terminal of the fourth control switch is connected to the other end of the low-gain compensation capacitor, and the second connection terminal of the fourth control switch is connected to the other end of the transition gain compensation capacitor and then grounded.
7. The signal acquisition circuit according to claim 4, characterized in that, The transition gain drive module includes a first resistor, a second resistor, a third resistor, a fourth resistor, a first transistor, and a second transistor. Wherein, one end of the first resistor and one end of the second resistor are connected to the first gain drive signal, the other end of the first resistor is connected to the base of the first transistor, the collector of the first transistor outputs the first transition gain switching signal, and the emitter of the first transistor is connected to the emitter of the second transistor and then grounded. The other end of the second resistor is connected to one end of the third resistor and the base of the second transistor. The collector of the second transistor is connected to one end of the fourth resistor and outputs the second transition gain switching signal. The other end of the third resistor is connected to the other end of the fourth resistor and then connected to the third operating voltage.
8. The signal acquisition circuit according to claim 4, characterized in that, The low-gain drive module includes a fifth resistor, a sixth resistor, a seventh resistor, an eighth resistor, a ninth resistor, a third transistor, and a fourth transistor. Wherein, one end of the fifth resistor is connected to the second gain drive signal, the other end of the fifth resistor is connected to one end of the sixth resistor and the base of the third transistor respectively, the emitter of the third transistor is grounded, the collector of the third transistor outputs the second low gain switching signal and is connected to one end of the seventh resistor and one end of the eighth resistor respectively, and the other end of the sixth resistor is connected to the other end of the seventh resistor and then connected to the third working voltage. The other end of the eighth resistor is connected to the base of the fourth transistor, the emitter of the fourth transistor is connected to the third operating voltage, the collector of the fourth transistor outputs the first low-gain switching signal and is connected to one end of the ninth resistor, and the other end of the ninth resistor is grounded.
9. The signal acquisition circuit according to claim 1, characterized in that, The bias compensation module includes a JFET-based pre-offset compensation unit and a drift compensation unit. Wherein, the signal input terminal of the pre-offset compensation unit is connected to the anode of the photodiode, the compensation control input terminal of the pre-offset compensation unit is connected to the drift compensation unit, the first output terminal of the pre-offset compensation unit is connected to the inverting input terminal of the transimpedance amplifier, and the second output terminal of the pre-offset compensation unit is connected to the non-inverting input terminal of the transimpedance amplifier. The pre-offset compensation unit suppresses the bias voltage generated by the transimpedance amplifier, and the drift compensation unit is used to compensate for the drift generated by the pre-offset compensation unit during operation.
10. The signal acquisition circuit according to claim 9, characterized in that, The pre-offset compensation unit includes a first junction field-effect transistor, a second junction field-effect transistor, a tenth resistor, an eleventh resistor, and a follower resistor. Wherein, the control terminal of the first junction field-effect transistor is connected to the anode of the photodiode and one end of the follower resistor, the other end of the follower resistor is connected to the output terminal of the transimpedance amplifier, the first connection terminal of the first junction field-effect transistor is connected to the second connection terminal of the second junction field-effect transistor and then connected to the third operating voltage, and the second connection terminal of the first junction field-effect transistor is connected to the inverting input terminal of the transimpedance amplifier and connected to the second operating voltage through the tenth resistor. The second connection terminal of the second junction field-effect transistor is connected to the non-inverting input terminal of the transimpedance amplifier and to the second operating voltage through the eleventh resistor, respectively. The control terminal of the second junction field-effect transistor is connected to the drift compensation unit.
11. The signal acquisition circuit according to claim 9, characterized in that, The drift compensation unit includes a twelfth resistor, a thirteenth resistor, a variable resistor, a fourteenth resistor, a fifteenth resistor, and a bypass capacitor. Wherein, one end of the twelfth resistor is connected to the fourth working voltage, the other end of the twelfth resistor is connected to one end of the thirteenth resistor and the first fixed end of the variable resistor, the other end of the thirteenth resistor is connected to the second fixed end of the variable resistor and then grounded, and the sliding end of the variable resistor is connected to one end of the fourteenth resistor. The other end of the fourteenth resistor is connected to one end of the fifteenth resistor, one end of the bypass capacitor, and the compensation control input terminal of the pre-offset compensation unit. The other end of the fifteenth resistor is connected to the fifth operating voltage, and the other end of the bypass capacitor is grounded.