One-key start-stop and emergency stop control circuit for lithium battery test system

Abstract

The invention belongs to the technical field of lithium battery testing, and discloses a one-key start-stop and sudden-stop control circuit for a lithium battery testing system, and the circuit comprises a one-key start-stop module which is used for receiving a start-stop operation signal, and outputting a start-stop trigger signal to a hardware processing module after the start-stop operation signal is logically processed; the emergency stop module is used for receiving an emergency stop operation signal, generating an emergency stop control signal and transmitting the emergency stop control signal to the hardware processing module; the hardware processing module is used for receiving the start-stop trigger signal and the sudden stop control signal, outputting an execution control signal to the execution module after logical operation and state keeping processing, and realizing switching and keeping of start-stop states and sudden stop reset control; and the execution module is used for driving an execution component to act based on the execution control signal so as to realize on-off switching of the main power circuit. According to the invention, a pure hardware scheme is adopted, a key jitter elimination function is provided, software intervention control is not needed, and the reliability of circuit operation is improved.

Description

Technical Field

[0001] This invention relates to the field of lithium battery testing technology, and in particular to a one-button start / stop and emergency stop control circuit for a lithium battery testing system. Background Technology

[0002] With the development of the new energy and energy storage industry, batteries, as key components, play a crucial role. Before batteries leave the factory, they need to be subjected to dynamic performance tests using a battery testing system to ensure their reliability and safety. Among these tests, the start-stop and emergency stop control functions of the battery testing system are indispensable.

[0003] Currently, there are two main methods for start-stop and emergency stop control: one is software control, with separate start, stop, and emergency stop buttons. However, this method requires software control, resulting in slow response and low reliability. The other method uses relays for latching control, but relays are mechanical components with limited lifespan and also suffer from low reliability. Therefore, a highly reliable start-stop and emergency stop control circuit is urgently needed to improve the reliability and safety of lithium battery testing systems.

[0004] Therefore, how to provide a one-button start / stop and emergency stop control circuit for lithium battery testing systems is an urgent problem to be solved. Summary of the Invention

[0005] This invention provides a one-button start / stop and emergency stop control circuit for a lithium battery testing system to solve the problems mentioned above in the prior art.

[0006] According to a first aspect of the present invention, a one-button start / stop and emergency stop control circuit for a lithium battery testing system is provided.

[0007] In one embodiment, the one-button start / stop and emergency stop control circuit for the lithium battery testing system includes: The one-button start / stop module is used to receive start / stop operation signals. After logical processing, the start / stop operation signals are output to the hardware processing module. The emergency stop module is used to receive emergency stop operation signals and generate emergency stop control signals to transmit to the hardware processing module. The hardware processing module receives start / stop trigger signals and emergency stop control signals, performs logical operations and status holding processing, and outputs execution control signals to the execution module to realize the switching, holding and emergency stop reset control of start / stop states. The execution module is used to drive the execution components to operate based on the execution control signal, so as to realize the switching of the main power circuit. The one-button start / stop module is electrically connected to the hardware processing module, and the hardware processing module is electrically connected to both the emergency stop module and the execution module.

[0008] According to a second aspect of the present invention, a one-button start / stop and emergency stop control method for a lithium battery testing system is provided.

[0009] In one embodiment, the one-button start / stop and emergency stop control method for a lithium battery testing system includes: At time t0, when the lithium battery testing system is powered on, based on the characteristic that the voltage of the capacitor cannot change abruptly, the RB pin of the D flip-flop chip U2 first goes high, resetting the QB pin of the D flip-flop chip U2 to low, while the QB pin goes high. When transistor VT1 is turned on, pin RB of D flip-flop chip U2 goes low. Since reset button T1 is not pressed, pins 1A and 1B of NAND gate U1 are low, pins 1Y, 2A, and 2B of NAND gate U1 are high, pin 2Y of NAND gate U1 and pin CA of D flip-flop chip U2 are low. Since capacitor C12 is not charged, pins QA and CB of D flip-flop chip U2 are low. At time t1, when the self-reset button T1 is pressed, the NAND gate U1 outputs a high level to the CA pin of the D flip-flop chip U2. On the rising edge of the high level on the CA pin, the D flip-flop chip U2 outputs a high level, driving the execution module to power on the main power circuit. After the self-reset button T1 is released, the NAND gate U1 outputs a low level, and the CA pin of the D flip-flop chip U2 returns to a low level. During time t2, when the voltage of capacitor C12 is charged to meet the high-level logic voltage, the RA pin of D flip-flop chip U2 becomes high, resetting the QA pin of D flip-flop chip U2 to low. During time t2, the voltage of the QB pin remains high. At time t3, when the self-reset button T1 is pressed again, the NAND gate U1 outputs a high level to the CA pin of the D flip-flop chip U2. On the rising edge of the high level on the CA pin, the D flip-flop chip U2 outputs a low level, driving the execution module to power off the main power circuit. After the self-reset button T1 is released, the NAND gate U1 outputs a low level, and the CA pin of the D flip-flop chip U2 returns to a low level. During time t4, when the voltage of capacitor C12 is charged to meet the high-level logic voltage, the RA pin of D flip-flop chip U2 becomes high, resetting the QA pin of D flip-flop chip U2 to low. During time t4, the voltage of QB pin remains low. At time t5, the control process between time t1 and time t4 is repeated. At any time, the emergency stop button T2 is pressed, transistor VT1 is cut off, the RB pin of D flip-flop chip U2 becomes high level, the QB pin of D flip-flop chip U2 is reset to low level, transistor VT2 is cut off, the DC contactor RL1 contacts open, and the main power circuit is de-energized.

[0010] In one embodiment, when the self-reset button T1 is pressed, the NAND gate U1 outputs a high level to the CA pin of the D flip-flop chip U2. On the rising edge of the high level on the CA pin, the D flip-flop chip U2 outputs a high level, driving the execution module to power on the main power circuit. After the self-reset button T1 is released, the NAND gate U1 outputs a low level, and the CA pin of the D flip-flop chip U2 returns to a low level, including: When the self-reset button T1 is pressed, pins 1A and 1B of NAND gate U1 become high level, pin 1Y becomes low level, pins 2A and 2B of NAND gate U1 become low level, pin 2Y becomes high level, pin CA of D flip-flop chip U2 becomes high level. At this time, on the rising edge of pin CA becoming high level, the high level of pin DA is output to pin QA, pin QA becomes high level, and capacitor C12 is charged through resistor R8. When the QA pin of the D flip-flop chip U2 goes high, the CB pin also goes high. On the rising edge of the CB pin going high, the high level of the DB pin is output to the QB pin, the transistor VT2 turns on, the DC contactor RL1 contacts close, and the main power circuit is powered on. When the self-reset button T1 is released, pins 1A and 1B of NAND gate U1 go low, pin 1Y goes high, pins 2A and 2B of NAND gate U1 go high, pin 2Y goes low, and pin CA of D flip-flop chip U2 goes low.

[0011] In one embodiment, when the self-reset button T1 is pressed again, the NAND gate U1 outputs a high level to the CA pin of the D flip-flop chip U2. On the rising edge of the high level on the CA pin, the D flip-flop chip U2 outputs a low level, driving the execution module to power off the main power circuit. After the self-reset button T1 is released, the NAND gate U1 outputs a low level, and the CA pin of the D flip-flop chip U2 returns to a low level, including: When the reset button T1 is pressed again, pins 1A and 1B of NAND gate U1 become high and pin 1Y becomes low. Pins 2A and 2B of NAND gate U1 become low and pin 2Y becomes high. Pin CA of D flip-flop chip U2 becomes high. At this time, on the rising edge of pin CA becoming high, the high level of pin DA is output to pin QA. Pin QA becomes high and charges capacitor C12 through resistor R8. When the QA pin of the D flip-flop chip U2 goes high, the CB pin also goes high. On the rising edge of the CB pin going high, the low level of the DB pin is output to the QB pin, the transistor VT2 is cut off, the DC contactor RL1 contacts open, and the main power circuit is de-energized. When the self-reset button T1 is released, pins 1A and 1B of NAND gate U1 go low, pin 1Y goes high, pins 2A and 2B of NAND gate U1 go high, pin 2Y goes low, and pin CA of D flip-flop chip U2 goes low.

[0012] The technical solutions provided by the embodiments of the present invention may include the following beneficial effects: This invention employs a pure hardware solution with button debouncing functionality. It uses two stages of Schmitt triggers and NOT gate circuits in the front stage to shape and process minor bounces when the button is pressed, and a capacitor charging delay in the rear stage to process larger bounces, effectively preventing accidental button triggering. No software intervention is required, thus improving the reliability of circuit operation. At the same time, it uses semiconductor control devices to replace the commonly used relay control method, solving the mechanical lifespan problem of current relay control.

[0013] It should be understood that the above general description and the following detailed description are exemplary and explanatory only, and are not intended to limit the invention. Attached Figure Description

[0014] The accompanying drawings, which are incorporated in and form part of this specification, illustrate embodiments consistent with the invention and, together with the description, serve to explain the principles of the invention.

[0015] Figure 1 This is a schematic block diagram of a one-button start / stop and emergency stop control circuit for a lithium battery testing system, according to an exemplary embodiment. Figure 2 This is a circuit diagram illustrating a one-button start / stop and emergency stop control circuit for a lithium battery testing system according to an exemplary embodiment. Figure 3 This is a logic control diagram of a one-button start / stop and emergency stop control circuit for a lithium battery testing system, according to an exemplary embodiment. Figure 4 This is a waveform diagram of the front-end debounce control circuit for a one-button start / stop and emergency stop control circuit for a lithium battery testing system, according to an exemplary embodiment. Figure 5 This is a waveform diagram of the post-stage debouncing stage of a one-button start / stop and emergency stop control circuit for a lithium battery testing system, according to an exemplary embodiment. Detailed Implementation

[0016] The following description and accompanying drawings fully illustrate specific embodiments described herein to enable those skilled in the art to practice them. Some portions and features of certain embodiments may be included in or replace portions and features of other embodiments. The scope of the embodiments herein includes the entire scope of the claims and all available equivalents thereof. The various embodiments described herein are presented in a progressive manner, with each embodiment focusing on its differences from other embodiments; similar or identical parts between embodiments can be referred to interchangeably.

[0017] The modules in the apparatus or system of this application can be implemented entirely or partially through software, hardware, or a combination thereof. These modules can be embedded in or independent of the processor in a computer device in hardware form, or stored in the memory of a computer device in software form, so that the processor can call and execute the operations corresponding to each module.

[0018] Where there is no conflict, the embodiments and features in the embodiments of the present invention can be combined with each other.

[0019] Figure 1 An embodiment of a one-button start / stop and emergency stop control circuit for a lithium battery testing system according to the present invention is shown.

[0020] In this optional embodiment, the one-button start / stop and emergency stop control circuit for the lithium battery testing system includes: One-button start / stop module 1 is used to receive start / stop operation signals. After logical processing, the start / stop operation signals are output to the hardware processing module as start / stop trigger signals. Emergency stop module 2 is used to receive emergency stop operation signals and generate emergency stop control signals to transmit to the hardware processing module. Hardware processing module 3 is used to receive start / stop trigger signals and emergency stop control signals, and after logic operation and state holding processing, output execution control signals to execution module 4 to realize the switching, holding and emergency stop reset control of start / stop states; Execution module 4 is used to drive the execution components to operate based on execution control signals in order to achieve the switching of the main power circuit. The one-button start / stop module 1 is electrically connected to the hardware processing module 3, and the hardware processing module 3 is electrically connected to the emergency stop module 2 and the execution module 4 respectively.

[0021] In this alternative embodiment, such as Figure 2 As shown, the one-button start / stop module 1 includes a resistor R1, a self-reset button T1, a capacitor C2, a resistor R2, a resistor R3, a capacitor C3, a NAND gate U1, a capacitor C6, a resistor R4, and a resistor R5; the self-reset button T1 is a normally open contact, and the NAND gate U1 is model HEF4093BT.

[0022] Wherein, one end of resistor R1 is connected to a 15V power supply, and the other end of resistor R1 is connected to one end of the self-reset button T1. The other end of the self-reset button T1 is connected to one end of capacitor C2, one end of resistor R2, and pins 1A and 1B of NAND gate U1. The other end of capacitor C2 is connected to the other end of resistor R2 and one end of capacitor C3 and grounded. The other end of capacitor C3 is connected to one end of resistor R3, pins 2A and 2B of NAND gate U1, and the other end of resistor R3 is connected to pin 1Y of NAND gate U1. One end of capacitor C6 is grounded, and the other end of capacitor C6 is connected to the VDD pin of NAND gate U1 and connected to a 15V power supply. One end of resistor R4 is connected to a 15V power supply, and the other end of resistor R4 is connected to the 3Y pin of NAND gate U1. One end of resistor R5 is connected to a 15V power supply, and the other end of resistor R5 is connected to the 4Y pin of NAND gate U1. The 3A and 3B pins of NAND gate U1 are connected to ground, the 4A and 4B pins of NAND gate U1 are connected to ground, the VSS pin of NAND gate U1 is grounded, and the 2Y pin of NAND gate U1 is connected to the hardware processing module 3.

[0023] In this alternative embodiment, such as Figure 2 As shown, the emergency stop module 2 includes an emergency stop button T2, a resistor R10, a transistor VT1, a resistor R9, a resistor R11, and a capacitor C10. The emergency stop button T2 is a normally open contact. The D flip-flop chip U2 is model MC14013BDG. In this configuration, one end of the emergency stop button T2 is connected to a 15V power supply, and the other end of the emergency stop button T2 is connected to one end of the resistor R10. The other end of the resistor R10 is connected to the base of the transistor VT1. The collector of the transistor VT1 is connected to one end of the resistor R9 and one end of the resistor R11, respectively. The emitter of the transistor VT1 is grounded. The other end of the resistor R9 is connected to a 15V power supply, and the other end of the resistor R11 is connected to one end of the capacitor C11 and the hardware processing module 3, respectively. The other end of the capacitor C10 is connected to a 15V power supply.

[0024] In this alternative embodiment, such as Figure 2 As shown, the hardware processing module 3 includes resistor R8, capacitor C12, capacitor C7, capacitor C15 and D flip-flop chip U2. In this configuration, one end of resistor R8 is connected to the QA and CB pins of the D flip-flop chip U2, and the other end of resistor R8 is connected to one end of capacitor C12 and the RA pin of the D flip-flop chip U2. The other end of capacitor C12 is grounded. One end of capacitor C7 is connected to the DA pin of the D flip-flop chip U2 and connected to a 15V power supply. The other end of capacitor C7 is connected to the SA and VSS pins of the D flip-flop chip U2 and grounded. One end of capacitor C15 is grounded, and the other end of capacitor C15 is connected to the D flip-flop chip U2 and connected to a 1.5V power supply. The DB pin of the D flip-flop chip U2 is connected to the QB pins. The SB pin of the D flip-flop chip U2 is grounded. The QB pin of the D flip-flop chip U2 is connected to the execution module 4.

[0025] In this alternative embodiment, such as Figure 2 As shown, the execution module 4 includes a resistor R12, a diode D1, a transistor VT2, and a DC contactor RL1; In this configuration, one end of the resistor R12 is connected to the hardware processing module 3, and the other end of the resistor R12 is connected to the base of the transistor VT2. The emitter of the transistor VT2 is grounded. The anode of the diode D1 is connected to one end of the coil of the DC contactor RL1 and is also connected to the collector of the transistor VT2. The cathode of the diode D1 is connected to the other end of the coil of the DC contactor RL1 and is also connected to the 24V power supply.

[0026] like Figure 3 As shown, to facilitate understanding of the above technical solutions of the present invention, the following further explains the above technical solutions of the present invention from the perspective of architecture and principle, as follows: At time t0, when the lithium battery testing system is powered on, due to the non-sudden change characteristic of the capacitor voltage, the RB pin of the D flip-flop chip U2 first goes high, resetting the QB pin of the D flip-flop chip U2 to low, while the QB pin goes high; the transistor VT1 is turned on, and the RB pin of the D flip-flop chip U2 goes low; since the self-reset button T1 is not pressed, at this time the 1A and 1B pins of the NAND gate U1 are low, the 1Y, 2A, and 2B pins of the NAND gate U1 are all high, and the 2Y pin of the NAND gate U1 and the CA pin of the D flip-flop chip U2 are low; since the capacitor C12 is not charged, the QA and CB pins of the D flip-flop chip U2 are both low. At time t1, when the reset button T1 is pressed, pins 1A and 1B of NAND gate U1 go high, pin 1Y goes low, pins 2A and 2B of NAND gate U1 go low, and pin 2Y goes high. Pin CA of D flip-flop chip U2 goes high. At this time, on the rising edge of pin CA going high, the high level of pin DA is output to pin QA, causing pin QA to go high and charge capacitor C12 through resistor R8. Specifically, when pin QA of D flip-flop chip U2... When the CB pin goes high, the CB pin also goes high. On the rising edge of the CB pin going high, the high level of the DB pin is output to the QB pin, the transistor VT2 turns on, the DC contactor RL1 contacts close, and the main power circuit is powered on. When the self-reset button T1 is released, the 1A and 1B pins of the NAND gate U1 go low, the 1Y pin goes high, the 2A and 2B pins of the NAND gate U1 go high, the 2Y pin goes low, and the CA pin of the D flip-flop chip U2 goes low. During time t2, when the voltage of capacitor C12 is charged to meet the high-level logic voltage, the RA pin of D flip-flop chip U2 becomes high, resetting the QA pin of D flip-flop chip U2 to low. During time t2, the voltage of the QB pin remains high. At time t3, pressing the reset button T1 again causes pins 1A and 1B of NAND gate U1 to go high and pin 1Y to go low. Pins 2A and 2B of NAND gate U1 go low and pin 2Y goes high. Pin CA of D flip-flop chip U2 goes high. At the rising edge of pin CA going high, the high level of pin DA is output to pin QA, causing pin QA to go high and charging capacitor C12 through resistor R8. When pin QA of D flip-flop chip U2... When the CB pin goes high, the CB pin also goes high. On the rising edge of the CB pin going high, the low level of the DB pin is output to the QB pin, the transistor VT2 is cut off, the DC contactor RL1 contacts open, and the main power circuit is de-energized. When the self-reset button T1 is released, the 1A and 1B pins of the NAND gate U1 go low, the 1Y pin goes high, the 2A and 2B pins of the NAND gate U1 go high, the 2Y pin goes low, and the CA pin of the D flip-flop chip U2 goes low. During time t4, when the voltage of capacitor C12 is charged to meet the high-level logic voltage, the RA pin of D flip-flop chip U2 becomes high, resetting the QA pin of D flip-flop chip U2 to low. During time t4, the voltage of QB pin remains low. At time t5, the control process between time t1 and time t4 is repeated. During the process from t1 to t4, if the emergency stop button T2 is pressed at any time, transistor VT1 is cut off, the RB pin of D flip-flop chip U2 becomes high level, the QB pin of D flip-flop chip U2 is reset to low level, transistor VT2 is cut off, the DC contactor RL1 contacts open, and the main power circuit is de-energized.

[0027] This invention features a two-stage debounce function to prevent accidental button triggering. The following describes the process in conjunction with... Figure 4 and Figure 5 The principle of de-shake is explained: Preamplifier de-shake: such as Figure 4 As shown, when the self-reset button T1 is pressed, there is a slight jitter. The high level of pins 1A and 1B of the NAND gate U1 will fluctuate slightly. At this time, it can be shaped by the NAND gate circuit of two Schmitt triggers to obtain the ideal high level.

[0028] Power amplifier debouncing: such as Figure 5 As shown, when the self-reset button T1 is pressed, there may be a relatively large bounce, causing the CA pin of the D flip-flop chip U2 to produce an erroneous logic level. At this time, as long as the time for capacitor C12 to charge to a high level is greater than the time the button is pressed, the QA pin of the D flip-flop chip U2 can be guaranteed to always be at a high level.

[0029] The charging time of capacitor C12 (assuming the minimum logic high voltage is 0.75 times the logic voltage) is as follows: ; This invention adopts a pure hardware solution with button debouncing function, which does not require software intervention and improves reliability; at the same time, it uses semiconductor control devices to solve the mechanical life problem of commonly used relay control.

[0030] This invention is not limited to the structures described above and shown in the accompanying drawings, and various modifications and changes can be made without departing from its scope. The scope of this invention is limited only by the appended claims.

Claims

1. A one-button start / stop and emergency stop control circuit for a lithium battery testing system, characterized in that, The circuit includes: The one-button start / stop module is used to receive start / stop operation signals. After logical processing, the start / stop operation signals are output to the hardware processing module. The emergency stop module is used to receive emergency stop operation signals and generate emergency stop control signals to transmit to the hardware processing module. The hardware processing module receives start / stop trigger signals and emergency stop control signals, performs logical operations and status holding processing, and outputs execution control signals to the execution module to realize the switching, holding and emergency stop reset control of start / stop states. The execution module is used to drive the execution components to operate based on the execution control signal, so as to realize the switching of the main power circuit. The one-button start / stop module is electrically connected to the hardware processing module, and the hardware processing module is electrically connected to both the emergency stop module and the execution module.

2. The one-button start / stop and emergency stop control circuit for a lithium battery testing system according to claim 1, characterized in that, The one-button start / stop module includes resistor R1, self-reset button T1, capacitor C2, resistor R2, resistor R3, capacitor C3, NAND gate U1, capacitor C6, resistor R4, and resistor R5. Wherein, one end of resistor R1 is connected to a 15V power supply, and the other end of resistor R1 is connected to one end of the self-reset button T1. The other end of the self-reset button T1 is connected to one end of capacitor C2, one end of resistor R2, and pins 1A and 1B of NAND gate U1. The other end of capacitor C2 is connected to the other end of resistor R2 and one end of capacitor C3 and grounded. The other end of capacitor C3 is connected to one end of resistor R3, pins 2A and 2B of NAND gate U1, and the other end of resistor R3 is connected to pin 1Y of NAND gate U1. One end of capacitor C6 is grounded, and the other end of capacitor C6 is connected to the VDD pin of NAND gate U1 and connected to a 15V power supply. One end of resistor R4 is connected to a 15V power supply, and the other end of resistor R4 is connected to the 3Y pin of NAND gate U1. One end of resistor R5 is connected to a 15V power supply, and the other end of resistor R5 is connected to the 4Y pin of NAND gate U1. Pins 3A and 3B of NAND gate U1 are connected to ground, pins 4A and 4B of NAND gate U1 are connected to ground, the VSS pin of NAND gate U1 is grounded, and the 2Y pin of NAND gate U1 is connected to the hardware processing module.

3. The one-button start / stop and emergency stop control circuit for a lithium battery testing system according to claim 2, characterized in that, The self-reset button T1 is a normally open contact, and the NAND gate U1 is model HEF4093BT.

4. The one-button start / stop and emergency stop control circuit for a lithium battery testing system according to claim 3, characterized in that, The emergency stop module includes an emergency stop button T2, a resistor R10, a transistor VT1, a resistor R9, a resistor R11, and a capacitor C10; In this configuration, one end of the emergency stop button T2 is connected to a 15V power supply, and the other end of the emergency stop button T2 is connected to one end of the resistor R10. The other end of the resistor R10 is connected to the base of the transistor VT1. The collector of the transistor VT1 is connected to one end of the resistor R9 and one end of the resistor R11, respectively. The emitter of the transistor VT1 is grounded. The other end of the resistor R9 is connected to a 15V power supply, and the other end of the resistor R11 is connected to one end of the capacitor C11 and the hardware processing module, respectively. The other end of the capacitor C10 is connected to a 15V power supply.

5. The one-button start / stop and emergency stop control circuit for a lithium battery testing system according to claim 4, characterized in that, The emergency stop button T2 is a normally open contact; the D trigger chip U2 is model MC14013BDG.

6. The one-button start / stop and emergency stop control circuit for a lithium battery testing system according to claim 5, characterized in that, The hardware processing module includes resistor R8, capacitor C12, capacitor C7, capacitor C15, and D flip-flop chip U2. In this configuration, one end of resistor R8 is connected to the QA and CB pins of the D flip-flop chip U2, and the other end of resistor R8 is connected to one end of capacitor C12 and the RA pin of the D flip-flop chip U2. The other end of capacitor C12 is grounded. One end of capacitor C7 is connected to the DA pin of the D flip-flop chip U2 and connected to a 15V power supply. The other end of capacitor C7 is connected to the SA and VSS pins of the D flip-flop chip U2 and grounded. One end of capacitor C15 is grounded, and the other end of capacitor C15 is connected to the D flip-flop chip U2 and connected to a 1.5V power supply. The DB pin of the D flip-flop chip U2 is connected to the QB pins. The SB pin of the D flip-flop chip U2 is grounded. The QB pin of the D flip-flop chip U2 is connected to the execution module.

7. The one-button start / stop and emergency stop control circuit for a lithium battery testing system according to claim 6, characterized in that, The execution module includes a resistor R12, a diode D1, a transistor VT2, and a DC contactor RL1; In this configuration, one end of the resistor R12 is connected to the hardware processing module, and the other end of the resistor R12 is connected to the base of the transistor VT2. The emitter of the transistor VT2 is grounded. The anode of the diode D1 is connected to one end of the coil of the DC contactor RL1 and is also connected to the collector of the transistor VT2. The cathode of the diode D1 is connected to the other end of the coil of the DC contactor RL1 and is also connected to the 24V power supply.

8. A one-button start / stop and emergency stop control method for a lithium battery testing system, comprising using the one-button start / stop and emergency stop control circuit for a lithium battery testing system as described in claim 7, characterized in that, The method includes: At time t0, when the lithium battery testing system is powered on, based on the characteristic that the voltage of the capacitor cannot change abruptly, the RB pin of the D flip-flop chip U2 first goes high, resetting the QB pin of the D flip-flop chip U2 to low, while the QB pin goes high. When transistor VT1 is turned on, pin RB of D flip-flop chip U2 goes low. Since reset button T1 is not pressed, pins 1A and 1B of NAND gate U1 are low, pins 1Y, 2A, and 2B of NAND gate U1 are high, pin 2Y of NAND gate U1 and pin CA of D flip-flop chip U2 are low. Since capacitor C12 is not charged, pins QA and CB of D flip-flop chip U2 are low. At time t1, when the self-reset button T1 is pressed, the NAND gate U1 outputs a high level to the CA pin of the D flip-flop chip U2. On the rising edge of the high level on the CA pin, the D flip-flop chip U2 outputs a high level, driving the execution module to power on the main power circuit. After the self-reset button T1 is released, the NAND gate U1 outputs a low level, and the CA pin of the D flip-flop chip U2 returns to a low level. During time t2, when the voltage of capacitor C12 is charged to meet the high-level logic voltage, the RA pin of D flip-flop chip U2 becomes high, resetting the QA pin of D flip-flop chip U2 to low. During time t2, the voltage of the QB pin remains high. At time t3, when the self-reset button T1 is pressed again, the NAND gate U1 outputs a high level to the CA pin of the D flip-flop chip U2. On the rising edge of the high level on the CA pin, the D flip-flop chip U2 outputs a low level, driving the execution module to power off the main power circuit. After the self-reset button T1 is released, the NAND gate U1 outputs a low level, and the CA pin of the D flip-flop chip U2 returns to a low level. During time t4, when the voltage of capacitor C12 is charged to meet the high-level logic voltage, the RA pin of D flip-flop chip U2 becomes high, resetting the QA pin of D flip-flop chip U2 to low. During time t4, the voltage of QB pin remains low. At time t5, the control process between time t1 and time t4 is repeated. At any time, the emergency stop button T2 is pressed, transistor VT1 is cut off, the RB pin of D flip-flop chip U2 becomes high level, the QB pin of D flip-flop chip U2 is reset to low level, transistor VT2 is cut off, the DC contactor RL1 contacts open, and the main power circuit is de-energized.

9. The one-button start / stop and emergency stop control method for a lithium battery testing system according to claim 8, characterized in that, When the self-reset button T1 is pressed, the NAND gate U1 outputs a high level to the CA pin of the D flip-flop chip U2. On the rising edge of the high level on the CA pin, the D flip-flop chip U2 outputs a high level, driving the execution module to power on the main power circuit. When the self-reset button T1 is released, the NAND gate U1 outputs a low level, and the CA pin of the D flip-flop chip U2 returns to a low level, including: When the self-reset button T1 is pressed, pins 1A and 1B of NAND gate U1 become high level, pin 1Y becomes low level, pins 2A and 2B of NAND gate U1 become low level, pin 2Y becomes high level, pin CA of D flip-flop chip U2 becomes high level. At this time, on the rising edge of pin CA becoming high level, the high level of pin DA is output to pin QA, pin QA becomes high level, and capacitor C12 is charged through resistor R8. When the QA pin of the D flip-flop chip U2 goes high, the CB pin also goes high. On the rising edge of the CB pin going high, the high level of the DB pin is output to the QB pin, the transistor VT2 turns on, the DC contactor RL1 contacts close, and the main power circuit is powered on. When the self-reset button T1 is released, pins 1A and 1B of NAND gate U1 go low, pin 1Y goes high, pins 2A and 2B of NAND gate U1 go high, pin 2Y goes low, and pin CA of D flip-flop chip U2 goes low.

10. The one-button start / stop and emergency stop control method for a lithium battery testing system according to claim 8, characterized in that, When the self-reset button T1 is pressed again, the NAND gate U1 outputs a high level to the CA pin of the D flip-flop chip U2. On the rising edge of the high level on the CA pin, the D flip-flop chip U2 outputs a low level, driving the execution module to de-energize the main power circuit. After releasing the self-reset button T1, the NAND gate U1 outputs a low level, and the CA pin of the D flip-flop chip U2 returns to a low level, including: When the reset button T1 is pressed again, pins 1A and 1B of NAND gate U1 become high and pin 1Y becomes low. Pins 2A and 2B of NAND gate U1 become low and pin 2Y becomes high. Pin CA of D flip-flop chip U2 becomes high. At this time, on the rising edge of pin CA becoming high, the high level of pin DA is output to pin QA. Pin QA becomes high and charges capacitor C12 through resistor R8. When the QA pin of the D flip-flop chip U2 goes high, the CB pin also goes high. On the rising edge of the CB pin going high, the low level of the DB pin is output to the QB pin, the transistor VT2 is cut off, the DC contactor RL1 contacts open, and the main power circuit is de-energized. When the self-reset button T1 is released, pins 1A and 1B of NAND gate U1 go low, pin 1Y goes high, pins 2A and 2B of NAND gate U1 go high, pin 2Y goes low, and pin CA of D flip-flop chip U2 goes low.

Images