Thin film with full-key non-punching function, key and thin film keyboard

Abstract

The invention discloses a film with a full-key punching-free function, a key and a film keyboard, the film is divided into an upper layer, a middle layer and a lower layer, the lower layer film is an FPC, the top layer is a wiring layer, the middle layer film is an isolation layer, and the bottom layer of the upper layer film is a wiring layer. The FPC top layer contact of the lower-layer film and the bottom layer contact of the upper-layer film correspondingly form two conductive contacts of one film key, the FPC top layer conductive contacts are connected with corresponding chip control signal pins, and all the contacts of the bottom layer of the upper-layer film are grounded; the chip is arranged on the lower film FPC of the full-key impact-free film, and the chip is one of a full color control chip, a full load color control chip, a color control chip, a load color control chip, a fantasy color control chip, a full device control chip and a fantasy device control chip. The membrane keyboard is completely compatible with components and assembly processes of a traditional membrane keyboard, has a full-key non-punching function, has GRB indication, and is better in experience feeling. And meanwhile, the keyboard has a hot standby function, is good in reliability and can be widely applied to notebook membrane keyboards.

Description

Technical Field

[0001] This invention relates to keyboards, and more particularly to a membrane keyboard, keys, and a membrane keyboard with full key rollover functionality. Background Technology

[0002] To make the original thin film have full-bond non-overlap functionality, one approach is to add a diode, and another is to multiply the number of pins on the thin film communication terminal. There is also a more advanced method that utilizes the different impedances of silver paste and carbon oil to make full-bond non-overlap. If GRB illumination is included, the thin film needs to be added even more. Summary of the Invention

[0003] The purpose of this invention is to overcome the shortcomings and deficiencies of the prior art and provide a thin film with full bond knock-off function and GRB indication function.

[0004] Another object of the present invention is to provide a button.

[0005] Another object of the present invention is to provide a membrane keyboard.

[0006] The objective of this invention is achieved through the following technical solution: A thin film with full bond knock-off function is divided into three layers: upper film, middle film, and lower film. The lower film is an FPC, and the top layer of the lower film is the first wiring layer; The intermediate thin film serves as an isolation layer; The bottom layer of the upper thin film is the second wiring layer; The first routing layer has several top-level contacts, which are connected to the control signal interface pins of the corresponding chip; the second routing layer has several bottom-level contacts, all of which are grounded; one top-level contact and one bottom-level contact form two conductive contacts for a button; one chip corresponds to more than one button; an isolation layer is provided between the top-level contacts and the bottom-level contacts with a thin film isolation ring; The chip with control signal interface pins is set on the lower thin film, and the middle thin film and the upper thin film are respectively provided with the chip's clearance via.

[0007] Furthermore, the chip is a full-color chip; The Yuquancai chip contains GRB LEDs and integrates a control signal interface circuit, a GRB color driving circuit, an address code memory, and a serial communication circuit with a single bus in series and parallel connections. It includes control signal interface pins, power supply pins, ground pins, parallel data line pins, address code input pins, and address code output pins. The power supply pin is used to power the Yuquancai chip, and the ground pin is used for signal grounding and power grounding. The control signal interface pins are connected to the top-level contacts of the FPC for communication. The control signal interface circuit is responsible for processing the top-level contact signals of the FPC and connecting them to the serial communication circuit of the serial single bus in series and parallel connection. The address code input pins and address code output pins of n full-color chips are cascaded to form a series data line network DIN(1)-DOUT(n). The two ends of the series data line network DIN(1) and DOUT(n) are connected to the MCU respectively. The MCU writes the sequence bit formed by the cascaded full-color chips into the address code memory through the series data line network DIN(1)-DOUT(n) and uses it as the communication address code. The power supply pins of n full-color chips are connected in parallel to share the power supply network VCC, the ground pins are connected in parallel to share the ground network GND, and the parallel data line pins are connected in parallel to form a parallel data line network DIO, which is then connected to the MCU. Serial-parallel single-bus serial communication circuits are used to process serial data line network information and parallel data line network information. GRB RGB information and membrane key switch information can be transmitted on the parallel data line network DIO; GRB RGB information and membrane key switch information can also be transmitted on the serial data line network DIN(1)-DOUT(n); Both the parallel data line network DIO and the serial data line network DIN(1)-DOUT(n) use the serial single-bus communication protocol to transmit GRB RGB information and membrane key switch information, and are hot-backed for each other.

[0008] Furthermore, the chip is a full-color chip; The Yuquan color chip contains GRB LED beads and integrates a control signal interface circuit, a GRB color driving circuit, an address code memory, and a serial communication circuit with a single bus. It includes a control signal interface pin, a power supply pin, a ground pin, an address code input pin, and an address code output pin. The power supply pin is used to power the Yuquan color chip and transmit data information, and the ground pin is used for signal grounding and power grounding. The control signal interface pins are connected to the top-level contacts of the FPC for communication. The control signal interface circuit is responsible for processing the top-level contact signals of the FPC and connecting them to the serial communication circuit of the serial single bus in series and parallel connection. The address code input pins and address code output pins of n full-color chips are cascaded to form a series data line network DIN(1)-DOUT(n). The two ends of the series data line network DIN(1) and DOUT(n) are connected to the MCU respectively. The MCU writes the sequence bit formed by the cascaded full-color chips into the address code memory through the series data line network DIN(1)-DOUT(n) and uses it as the communication address code. The data information is modulated on the power network VCC and transmitted to the MCU by power line carrier. The power network VCC is the parallel carrier data line network VCC(DIO). The serial and parallel single bus serial communication circuit is used to process the information of the series data line network and the information of the parallel carrier data line network. GRB RGB information and membrane keypad switch information can be transmitted on the parallel carrier data line network VCC (DIO); GRB RGB information and membrane key switch information can also be transmitted on the serial data line network DIN(1)-DOUT(n); The parallel carrier data line network VCC(DIO) and the serial data line network DIN(1)-DOUT(n) both use the serial single-bus communication protocol to transmit GRB RGB information and membrane key switch information, and are hot-backed for each other.

[0009] Furthermore, the chip is a Yuhuicai chip; The Yuhui Color chip contains GRB LED beads and integrates a control signal interface circuit, a GRB color driving circuit, an address code memory, and a parallel single-bus serial communication circuit; it includes control signal interface pins, power supply pins, ground pins, and parallel data line pins. The power supply pins are used to power the Yuhui Color chip, and the ground pins are used for signal grounding and power grounding. The control signal interface pins are connected to the top-level contacts of the FPC for communication. The control signal interface circuit is responsible for processing the signals of the top-level contacts of the FPC and connecting them to the parallel single-bus serial communication circuit. The parallel data lines are connected together to form a parallel data line network (DIO), which is then connected to the MCU. The address code of the Yuhuicai chip is written into the address code memory through an external fixture and used as the communication address code. Parallel single-bus serial communication circuits are used to process information from parallel data line networks; GRB RGB information and membrane key switch information are transmitted on the parallel data line network DIO; The parallel data line network uses a serial single-bus communication protocol to transmit GRB RGB information and membrane key switch information.

[0010] Furthermore, the chip is a color chip; The chip contains GRB LEDs and integrates a control signal interface circuit, a GRB color driving circuit, an address code memory, and a parallel single-bus serial communication circuit. It includes a control signal interface pin, a power supply pin, and a ground pin. The power supply pin is used to power the chip and transmit data information, and the ground pin is used for signal grounding and power grounding. The control signal interface pins are connected to the top-level contacts of the FPC for communication. The control signal interface circuit is responsible for processing the signals of the top-level contacts of the FPC and connecting them to the parallel single-bus serial communication circuit. Data information is modulated and transmitted to the MCU via power line carrier on the power network VCC, which is also the parallel carrier data line network VCC (DIO); the address code of the carrier chip is written into the address code memory through an external fixture and used as the communication address code; Parallel single-bus serial communication circuits are used to process information from parallel carrier data line networks; GRB RGB information and membrane keypad switch information can be transmitted on the parallel carrier data line network VCC (DIO); The parallel carrier data line network uses a serial single-bus communication protocol to transmit GRB holographic information and membrane key switch information.

[0011] Furthermore, the chip is a Yuhuancai chip; The Yuhuancai chip contains GRB LED beads and integrates a control signal interface circuit, a GRB RGB driver circuit, and a serial single-bus serial communication circuit, including a control signal interface pin, a power supply pin, a ground pin, a serial signal input pin, and a serial signal output pin; the power supply pin is used to power the Yuhuancai chip, and the ground pin is used for signal grounding and power grounding; The control signal interface pins are connected to the top-level contacts of the FPC for communication. The control signal interface circuit is responsible for processing the signals of the top-level contacts of the FPC and connecting them to the serial communication circuit of the serial single bus. The serial signal input pins and serial signal output pins of n GRB chips are cascaded to form a serial data line network DIN(1)-DOUT(n). The two ends of the serial data line network DIN(1) and DOUT(n) are connected to the MCU respectively. The MCU transmits GRB information and membrane key switch information to the MCU through the serial data line network DIN(1)-DOUT(n). A serial single-bus serial communication circuit is used to process information from a serial data line network. Both GRB RGB information and membrane key switch information are transmitted on the serial data line network DIN(1)-DOUT(n); The serial data line network uses a serial single-bus communication protocol to transmit GRB RGB information and membrane key switch information.

[0012] Furthermore, the chip is a driver chip; The controller chip integrates a control signal interface circuit, an address code memory, and a serial communication circuit with a single bus; it includes control signal interface pins, power supply pins, ground pins, parallel data line pins, address code input pins, and address code output pins; the power supply pin is used to power the controller chip, and the ground pin is used for signal grounding and power grounding; The control signal interface pins are connected to the top-level contacts of the FPC for communication. The control signal interface circuit is responsible for processing the signals of the top-level contacts of the FPC and connecting them to the serial communication circuit of the serial bus in series and parallel connection. The address code input pins and address code output pins of n controller chips are cascaded to form a serial data line network DIN(1)-DOUT(n). The two ends of the serial data line network DIN(1) and DOUT(n) are connected to the MCU respectively. The MCU writes the sequence bit formed by the cascaded controller chips into the address code memory through the serial data line network DIN(1)-DOUT(n) and uses it as the communication address code. The power supply pins of the n controller chips are connected in parallel to share the power supply network VCC, the ground pins are connected in parallel to share the ground network GND, and the parallel data line pins are connected in parallel to form a parallel data line network DIO, which is then connected to the MCU. Serial-parallel single-bus serial communication circuits are used to process serial data line network information and parallel data line network information. Membrane key switch information can be transmitted on the parallel data line network (DIO). Membrane key switch information can also be transmitted on the serial data line network DIN(1)-DOUT(n); Both the parallel data line network DIO and the serial data line network DIN(1)-DOUT(n) use the serial single-bus communication protocol to transmit membrane key switch information and are hot backups for each other.

[0013] Furthermore, the chip is a magic-controlling chip; The device chip integrates a control signal interface circuit and a serial single-bus serial communication circuit, including a control signal interface pin, a power supply pin, a ground pin, a serial signal input pin, and a serial signal output pin; the power supply pin is used to power the device chip, and the ground pin is used for signal grounding and power grounding; The control signal interface pins are connected to the top-level contacts of the FPC for communication. The control signal interface circuit is responsible for processing the signals of the top-level contacts of the FPC and connecting them to the serial communication circuit of the serial single bus. The serial signal input pins and serial signal output pins of n control chip are cascaded to form a serial data line network DIN(1)-DOUT(n). The two ends of the serial data line network DIN(1) and DOUT(n) are connected to the MCU respectively. The MCU transmits the membrane key switch information to the MCU through the serial data line network DIN(1)-DOUT(n). A serial single-bus serial communication circuit is used to process information from a serial data line network. Information from membrane key switches is transmitted on the serial data line network DIN(1)-DOUT(n); The serial data line network uses a serial single-bus communication protocol to transmit membrane key switch information.

[0014] Furthermore, the controller chip and the magic controller chip include at least one control signal interface pin.

[0015] Another objective of this invention is achieved through the following technical solution: A key includes a keycap, a key reset element, and a key pressing component, characterized in that the keycap is mounted on the key pressing component; when the keycap is pressed down, the bottom contact and the top contact make contact and conduction; when the keycap is released, the bottom contact and the top contact do not make contact. The button reset element is a silicone spring, a spring, or a metal spring; the button pressing component is a scissor-type component or a crater-type component.

[0016] Another objective of this invention is achieved through the following technical solution: An integrated membrane keyboard includes the aforementioned membrane and the aforementioned keys.

[0017] A detachable membrane keyboard includes the aforementioned membrane and the aforementioned keys; the connecting wires between the detachable membrane keyboards are 5-pin, 4-pin, 3-pin, or 2-pin electrical networks.

[0018] Compared with the prior art, the present invention has the following advantages and beneficial effects: 1. The membrane of this invention is compatible with the key conduction method of traditional membrane keyboards and can be directly adopted into any existing type of membrane keyboard, especially scissor-switch membrane keyboards.

[0019] 2. The Full Color Chip, Full Color Carrier Chip, Full Color Convergence Chip, Full Color Carrier Chip, Full Color Chip, Full Color Device Chip, and Full Color Device Chip used in this invention have independent control signal interface pins for each button, providing a natural full-key anti-ghosting function.

[0020] 3. This invention uses a full-color chip, or a full-load color chip, or a color-enhancing chip, or a color-enhancing chip, or a color-enhancing chip. All of the above chips have built-in GRB LEDs for illumination, making them more convenient to use. They can perform both membrane button functions and illumination, which is something that traditional membrane buttons simply cannot do.

[0021] 4. This invention uses a full-color chip, or a full-carrier color chip, or a color-enhancing chip, or a carrier color chip, or a magic color chip, or a full-function chip, or a magic chip. It can communicate with the keyboard MCU with a maximum of 5 pins (VCC, GND, DIO, DIN, and DOUT) and a minimum of only 2 pins (VCC (DIO) and GND). It is very simple and this is something that traditional thin films simply cannot do.

[0022] 5. The overall circuit of this invention, composed of a full-color chip, a full-load color chip, a color-coordinated chip, a color-coordinated chip, a color-coordinated carrier chip, a color-coordinated holographic chip, a full-function chip, or a holographic chip, is simpler. The MCU with USB function can be externally placed at the wire end, making the heart of the keyboard (MCU) less susceptible to contamination by external liquids and dust. The MCU has good reliability, and the reliability and stability of the keyboard are further enhanced.

[0023] 6. This invention uses a full-color chip, or a full-carrier chip, or a full-device chip as a serial communication circuit connected in series and parallel. The series and parallel connections serve as hot standby for each other. This hot standby is not a simple repetitive dual-serial hot standby, nor is it the same as a simple dual-parallel hot standby. The series-parallel hot standby has stronger complementarity, better hot standby effect, and more stable performance.

[0024] 7. This invention uses a full-color chip, a full-carrier color chip, or a full-device chip to write code, which can be completed by the serial data network formed by the cascading of the chips themselves. It does not require any external fixtures, which simplifies the process, improves reliability and stability, and reduces manufacturing costs.

[0025] 8. In order to minimize power consumption, the control signal interface pin of this invention operates in a time-division multiplexing manner: when the button is being detected, it is an input port (INPUT); when the button is not being detected, the control signal interface pin is an output port (OUTPUT), which can output a low level, and the button is in a zero power consumption state.

[0026] 9. This invention uses the controller chip as a serial communication circuit with parallel connection. The external control signal interface circuit can have several pins, and multiple buttons can be connected at the same time, further reducing product cost.

[0027] 10. Each of the external control I / O ports of the chip described in this invention corresponds to a membrane key, which naturally provides full key rollover, something that traditional membrane keyboards simply cannot achieve. Attached Figure Description

[0028] Figure 1 This is a functional schematic diagram of the full-color chip described in Embodiment 1 of the present invention.

[0029] Figure 2 This is a functional schematic diagram of the full-color chip described in Embodiment 2 of the present invention.

[0030] Figure 3 This is a functional schematic diagram of the Yuhuicai chip described in Embodiment 3 of the present invention.

[0031] Figure 4 This is a functional schematic diagram of the color chip described in Embodiment 4 of the present invention.

[0032] Figure 5 This is a functional schematic diagram of the iridescent chip described in Embodiment 5 of the present invention.

[0033] Figure 6 This is a functional schematic diagram of the controller chip described in Embodiment 6 of the present invention.

[0034] Figure 7 This is a functional schematic diagram of the controller chip described in Embodiment 7 of the present invention.

[0035] Figure 8 This is a schematic diagram of the overall thin-film electronic function of the full-color chip of the present invention.

[0036] Figure 9 This is a schematic diagram of the overall thin-film functional structure of the full-color chip of the present invention.

[0037] Figure 10 This is a schematic diagram of the functional structure of the underlying thin-film FPC of the full-color chip of the present invention.

[0038] Figure 11 This is a schematic diagram of the functional structure of the middle layer isolation layer of the overall thin film of the full-color chip of the present invention.

[0039] Figure 12 This is a schematic diagram of the upper layer functional structure of the overall thin film of the full-color chip of the present invention.

[0040] Figure 13 for Figure 9 A magnified view of a portion of region A.

[0041] Figure 14-1 This is a schematic diagram of the overall thin-film functional structure of the controller chip of the present invention.

[0042] Figure 14-2 for Figure 14-1 A magnified view of a portion of region B.

[0043] Figure 15 This is a schematic diagram of the controller chip package with 5 control signal pins of the present invention.

[0044] Figure 16 This is a schematic diagram of the controller chip package with three control signal pins of the present invention.

[0045] The meanings of the reference numerals in the attached figures are as follows: 1-Top layer contact, 2-Bottom layer contact, 3-Isolation layer thin film isolation ring, 4-Upper layer thin film through hole, 5-Isolation layer thin film through hole, 6-Full-color control chip, 7-Control chip with multiple control signal pins. Detailed Implementation

[0046] The present invention will be further described in detail below with reference to the embodiments and accompanying drawings, but the embodiments of the present invention are not limited thereto. Example 1

[0047] like Figures 8 to 13 A thin film with full bond knock-off function, consisting of three layers: upper film, middle film, and lower film; The lower film is an FPC, and the top layer of the lower film is the first wiring layer; The intermediate thin film serves as an isolation layer; The bottom layer of the upper thin film is the second wiring layer; The first wiring layer has several top-level contacts 1, which are connected to the control signal interface pins of the corresponding chip; the second wiring layer has several bottom-level contacts 2, all of which are grounded; one top-level contact 1 and one bottom-level contact 2 form two conductive contacts for a button; one chip corresponds to more than one button; an isolation layer thin film isolation ring 3 is provided between the top-level contacts 1 and the bottom-level contacts 2. A chip with control signal interface pins is disposed on the lower thin film, and the middle thin film and the upper thin film are respectively provided with chip avoidance vias; the avoidance vias are the isolation layer thin film via 5 and the upper thin film via 4.

[0048] like Figure 1 The chip is the Yuquancai chip 6; the Yuquancai chip 6 contains GRB LED beads and integrates a control signal interface circuit, a GRB color driving circuit, an address code memory, and a serial communication circuit with a single bus; it includes control signal interface pins, power supply pins, ground pins, parallel data line pins, address code input pins, and address code output pins; the power supply pin is used to supply power to the Yuquancai chip 6, and the ground pin is used for signal grounding and power grounding; The control signal interface pin is connected to the top contact 1 of the FPC for communication. The control signal interface circuit is responsible for processing the signals of the top contact 1 of the FPC and connecting them to the serial communication circuit of the serial single bus in series and parallel connection. The address code input pins and address code output pins of n Yuquancai chips 6 are cascaded to form a series data line network DIN(1)-DOUT(n). The two ends of the series data line network DIN(1) and DOUT(n) are connected to the MCU respectively. The MCU writes the sequence bit formed by the cascaded Yuquancai chips 6 into the address code memory through the series data line network DIN(1)-DOUT(n) and uses it as the communication address code. The power supply pins of n Yuquancai chips 6 are connected in parallel to share the power supply network VCC, the ground pins are connected in parallel to share the ground network GND, and the parallel data line pins are connected in parallel to form a parallel data line network DIO, which is then connected to the MCU. Serial-parallel single-bus serial communication circuits are used to process serial data line network information and parallel data line network information. GRB RGB information and membrane key switch information can be transmitted on the parallel data line network DIO; GRB RGB information and membrane key switch information can also be transmitted on the serial data line network DIN(1)-DOUT(n); Both the parallel data line network DIO and the serial data line network DIN(1)-DOUT(n) use the serial single-bus communication protocol to transmit GRB RGB information and membrane key switch information, and are hot-backed for each other.

[0049] A key includes a keycap positioned above the aforementioned bottom contact 2; when the keycap is pressed down, the bottom contact 2 and the top contact 1 make contact and conduct; when the keycap is released, the bottom contact 2 and the top contact 1 no longer make contact.

[0050] The keycap is provided with a key reset element and a key pressing component below it; the key reset element is a silicone spring or a spring; the key pressing component is a scissor-switch component or a crater-type component.

[0051] The button and two conductive contacts on the membrane form a membrane key switch.

[0052] An integrated membrane keyboard includes the aforementioned membrane and keys. The entire membrane keyboard has 68 keys, each with two corresponding conductive contacts. The lower FPC layer has 68 circular contacts, each connected to a corresponding chip control signal interface pin. These 68 circular contacts on the lower FPC layer are also connected together to the GND PIN. (It should be noted that the grounding of these 68 contacts is determined by the performance of the chip control signal pin; a chip connected to VCC at this end could also be designed). The upper membrane via 4 and the isolation layer membrane via 5 provide clearance for the chip. The isolation layer membrane isolation ring 3 provides precise guidance for contact when the keys are pressed, conducting when pressed and isolating the upper and lower contacts when not pressed.

[0053] In Example 1, the pins for communication between the entire thin film and the keyboard MCU are VCC, DIN(1), DOUT(n), DIO, and GND.

[0054] The lower FPC's GND is on the top layer, and the upper film's GND is on the bottom layer; they are pressed together.

[0055] A one-piece membrane keyboard that is not foldable, but can also be configured to be foldable to form a foldable one-piece keyboard. Example 2

[0056] Example 2 is identical to Example 1 except for the following content: like Figure 2 The chip is a Yuquan ZaiCai chip; the Yuquan ZaiCai chip contains GRB LED beads and integrates a control signal interface circuit, a GRB color driving circuit, an address code memory, and a serial communication circuit with a single bus; it includes a control signal interface pin, a power supply pin, a ground pin, an address code input pin, and an address code output pin; the power supply pin is used to power the Yuquan ZaiCai chip and transmit data information, and the ground pin is used for signal grounding and power grounding; The control signal interface pins are connected to the top-level contacts of the FPC for communication. The control signal interface circuit is responsible for processing the top-level contact signals of the FPC and connecting them to the serial communication circuit of the serial single bus in series and parallel connection. The address code input pins and address code output pins of n full-color chips are cascaded to form a series data line network DIN(1)-DOUT(n). The two ends of the series data line network DIN(1) and DOUT(n) are connected to the MCU respectively. The MCU writes the sequence bit formed by the cascaded full-color chips into the address code memory through the series data line network DIN(1)-DOUT(n) and uses it as the communication address code. The data information is modulated on the power network VCC and transmitted to the MCU by power line carrier. The power network VCC is the parallel carrier data line network VCC(DIO). The serial and parallel single bus serial communication circuit is used to process the information of the series data line network and the information of the parallel carrier data line network. GRB RGB information and membrane keypad switch information can be transmitted on the parallel carrier data line network VCC (DIO); GRB RGB information and membrane key switch information can also be transmitted on the serial data line network DIN(1)-DOUT(n); The parallel carrier data line network VCC(DIO) and the serial data line network DIN(1)-DOUT(n) both use the serial single-bus communication protocol to transmit GRB RGB information and membrane key switch information, and are hot-backed for each other.

[0057] In Example 2, the pins for communication between the entire thin film and the keyboard MCU are VCC (DIO), DIN (1), DOUT (n), and GND. Example 3

[0058] Example 3 is identical to Example 1 except for the following content: like Figure 3 The chip is a Yuhuicai chip; the Yuhuicai chip contains GRB LED beads and integrates a control signal interface circuit, a GRB color driving circuit, an address code memory, and a parallel single-bus serial communication circuit; it includes control signal interface pins, power supply pins, ground pins, and parallel data line pins. The power supply pins are used to supply power to the Yuhuicai chip, and the ground pins are used for signal grounding and power grounding. The control signal interface pins are connected to the top-level contacts of the FPC for communication. The control signal interface circuit is responsible for processing the signals of the top-level contacts of the FPC and connecting them to the parallel single-bus serial communication circuit. The parallel data lines are connected together to form a parallel data line network (DIO), which is then connected to the MCU. The address code of the Yuhuicai chip is written into the address code memory through an external fixture and used as the communication address code. Parallel single-bus serial communication circuits are used to process information from parallel data line networks; GRB RGB information and membrane key switch information are transmitted on the parallel data line network DIO; The parallel data line network uses a serial single-bus communication protocol to transmit GRB RGB information and membrane key switch information.

[0059] In Example 3, the pins for communication between the entire thin film and the keyboard MCU are VCC, DIO, and GND. Example 4

[0060] Example 4 is identical to Example 1 except for the following content: like Figure 4 The chip is a color chip; the color chip contains GRB LED beads and integrates a control signal interface circuit, a GRB color driving circuit, an address code memory, and a parallel single-bus serial communication circuit; it includes a control signal interface pin, a power supply pin, and a ground pin. The power supply pin is used to supply power to the color chip and transmit data information, and the ground pin is used for signal grounding and power grounding. The control signal interface pins are connected to the top-level contacts of the FPC for communication. The control signal interface circuit is responsible for processing the signals of the top-level contacts of the FPC and connecting them to the parallel single-bus serial communication circuit. Data information is modulated and transmitted to the MCU via power line carrier on the power network VCC, which is also the parallel carrier data line network VCC (DIO); the address code of the carrier chip is written into the address code memory through an external fixture and used as the communication address code; Parallel single-bus serial communication circuits are used to process information from parallel carrier data line networks; GRB RGB information and membrane keypad switch information can be transmitted on the parallel carrier data line network VCC (DIO); The parallel carrier data line network uses a serial single-bus communication protocol to transmit GRB holographic information and membrane key switch information.

[0061] In Example 4, the pins for communication between the entire thin film and the keyboard MCU are VCC (DIO) and GND. Example 5

[0062] Example 5 is identical to Example 1 except for the following content: like Figure 5 The chip is a Yuhuancai chip; the Yuhuancai chip contains GRB LED beads and integrates a control signal interface circuit, a GRB RGB driving circuit, and a serial single-bus serial communication circuit, including a control signal interface pin, a power supply pin, a ground pin, a serial signal input pin, and a serial signal output pin; the power supply pin is used to supply power to the Yuhuancai chip, and the ground pin is used for signal grounding and power grounding; The control signal interface pins are connected to the top-level contacts of the FPC for communication. The control signal interface circuit is responsible for processing the signals of the top-level contacts of the FPC and connecting them to the serial communication circuit of the serial single bus. The serial signal input pins and serial signal output pins of n GRB chips are cascaded to form a serial data line network DIN(1)-DOUT(n). The two ends of the serial data line network DIN(1) and DOUT(n) are connected to the MCU respectively. The MCU transmits GRB information and membrane key switch information to the MCU through the serial data line network DIN(1)-DOUT(n). A serial single-bus serial communication circuit is used to process information from a serial data line network. Both GRB RGB information and membrane key switch information are transmitted on the serial data line network DIN(1)-DOUT(n); The serial data line network uses a serial single-bus communication protocol to transmit GRB RGB information and membrane key switch information.

[0063] In Example 5, the pins for communication between the entire thin film and the keyboard MCU are VCC, DIN(1), DOUT(n), and GND. Example 6

[0064] Example 6 is identical to Example 1 except for the following content: like Figure 6 The chip is a driver chip; the driver chip integrates a control signal interface circuit, an address code memory, and a serial communication circuit with a single bus; it includes control signal interface pins, power supply pins, ground pins, parallel data line pins, address code input pins, and address code output pins; the power supply pin is used to supply power to the driver chip, and the ground pin is used for signal grounding and power grounding; The control signal interface pins are connected to the top-level contacts of the FPC for communication. The control signal interface circuit is responsible for processing the signals of the top-level contacts of the FPC and connecting them to the serial communication circuit of the serial bus in series and parallel connection. The address code input pins and address code output pins of n controller chips are cascaded to form a serial data line network DIN(1)-DOUT(n). The two ends of the serial data line network DIN(1) and DOUT(n) are connected to the MCU respectively. The MCU writes the sequence bit formed by the cascaded controller chips into the address code memory through the serial data line network DIN(1)-DOUT(n) and uses it as the communication address code. The power supply pins of the n controller chips are connected in parallel to share the power supply network VCC, the ground pins are connected in parallel to share the ground network GND, and the parallel data line pins are connected in parallel to form a parallel data line network DIO, which is then connected to the MCU. Serial-parallel single-bus serial communication circuits are used to process serial data line network information and parallel data line network information. Membrane key switch information can be transmitted on the parallel data line network (DIO). Membrane key switch information can also be transmitted on the serial data line network DIN(1)-DOUT(n); Both the parallel data line network DIO and the serial data line network DIN(1)-DOUT(n) use the serial single-bus communication protocol to transmit membrane key switch information and are hot backups for each other.

[0065] In Example 6, the pins for communication between the entire thin film and the keyboard MCU are VCC, DIN(1), DOUT(n), DIO, and GND. Example 7

[0066] Example 7 is identical to Example 1 except for the following content: like Figure 7 The chip is a magic controller chip; the magic controller chip integrates a control signal interface circuit and a serial single-bus serial communication circuit, including a control signal interface pin, a power supply pin, a ground pin, a serial signal input pin, and a serial signal output pin; the power supply pin is used to supply power to the magic controller chip, and the ground pin is used for signal grounding and power grounding; The control signal interface pins are connected to the top-level contacts of the FPC for communication. The control signal interface circuit is responsible for processing the signals of the top-level contacts of the FPC and connecting them to the serial communication circuit of the serial single bus. The serial signal input pins and serial signal output pins of n control chip are cascaded to form a serial data line network DIN(1)-DOUT(n). The two ends of the serial data line network DIN(1) and DOUT(n) are connected to the MCU respectively. The MCU transmits the membrane key switch information to the MCU through the serial data line network DIN(1)-DOUT(n). A serial single-bus serial communication circuit is used to process information from a serial data line network. Information from membrane key switches is transmitted on the serial data line network DIN(1)-DOUT(n); The serial data line network uses a serial single-bus communication protocol to transmit membrane key switch information.

[0067] In Example 7, the pins for communication between the entire thin film and the keyboard MCU are VCC, DIN(1), DOUT(n), and GND.

[0068] The chips described in Examples 6 and 7 include at least one control signal interface pin; such as Figure 15 As shown, the controller chip 7 has 5 external control signal interface pins, which can simultaneously connect to 5 membrane buttons; for example... Figure 16 As shown, the All-in-One Chip 7 has three external control signal interface pins, which can connect to three membrane keys simultaneously. However, regardless of how many membrane keys are connected to the All-in-One Chip 7, the external control I / O port of the chip corresponding to each membrane key is unique (the same applies to other types of chips), resulting in natural full-key rollover, which is something that traditional membrane keyboards simply cannot provide.

[0069] As shown in Figure 14, the control signal interface pins of the control chip are connected to multiple FPC top-level contacts for communication. The control signal interface circuit is responsible for processing the FPC top-level contact signals and connecting them to the serial communication circuit of the serial bus in series and parallel connection. In Examples 1 to 7, it should be noted that in the same electrical system, all networks with the same name (such as VCC, GND, DIO, DIN, DOUT) are electrically connected. Furthermore, VCC and VCC(DIO) are essentially the same electrical network.

[0070] In Examples 1 to 7, in order to minimize power consumption, the control signal interface pin operates in a time-division multiplexing manner: when the button is being detected, it is an input port (INPUT); when the button is not being detected, the control signal interface pin is an output port (OUTPUT), which can output a low level, and the button is in a zero-power state.

[0071] In embodiments 1 to 7, the integral membrane keyboard can also be designed as a separate membrane keyboard. The connection between the separate membrane keyboards is a 5-pin electrical network (VCC, GND, DIO, DIN, DOUT) or a 4-pin electrical network (VCC (DIO), GND, DIN, DOUT or VCC, GND, DIN, DOUT) or a 3-pin electrical network (VCC, GND, DIO) or a 2-pin electrical network (VCC (DIO), GND).

[0072] The above embodiments are preferred embodiments of the present invention, but the embodiments of the present invention are not limited to the above embodiments. Any changes, modifications, substitutions, combinations, or simplifications made without departing from the spirit and principle of the present invention shall be considered equivalent substitutions and shall be included within the protection scope of the present invention.

Claims

1. A thin film with full bond knock-off function, characterized in that, It consists of three layers: an upper film, a middle film, and a lower film. The lower film is an FPC, and the top layer of the lower film is the first wiring layer; The intermediate thin film serves as an isolation layer; The bottom layer of the upper thin film is the second wiring layer; The first routing layer has several top-level contacts, which are connected to the control signal interface pins of the corresponding chip; the second routing layer has several bottom-level contacts, all of which are grounded; one top-level contact and one bottom-level contact form two conductive contacts for a button; one chip corresponds to more than one button; an isolation layer is provided between the top-level contacts and the bottom-level contacts with a thin film isolation ring; The chip with control signal interface pins is set on the lower thin film FPC, and the middle and upper thin films are respectively provided with chip avoidance vias.

2. The thin film with full bond knock-off function according to claim 1, characterized in that, The chip in question is a full-color chip; The full-color chip contains GRB LEDs and integrates a control signal interface circuit, a GRB color driving circuit, an address code memory, and a serial communication circuit with a single bus; it includes control signal interface pins, power supply pins, ground pins, parallel data line pins, address code input pins, and address code output pins. The power pin is used to power the full-color chip, and the ground pin is used for signal grounding and power grounding. The control signal interface pins are connected to the top-level contacts of the FPC for communication. The control signal interface circuit is responsible for processing the top-level contact signals of the FPC and connecting them to the serial communication circuit of the serial single bus in series and parallel connection. The address code input pins and address code output pins of n full-color chips are cascaded to form a series data line network DIN(1)-DOUT(n). The two ends of the series data line network DIN(1) and DOUT(n) are connected to the MCU respectively. The MCU writes the sequence bit formed by the cascaded full-color chips into the address code memory through the series data line network DIN(1)-DOUT(n) and uses it as the communication address code. The power supply pins of n full-color chips are connected in parallel to share the power supply network VCC, the ground pins are connected in parallel to share the ground network GND, and the parallel data line pins are connected in parallel to form a parallel data line network DIO, which is then connected to the MCU. Serial-parallel single-bus serial communication circuits are used to process serial data line network information and parallel data line network information. GRB RGB information and membrane key switch information can be transmitted on the parallel data line network DIO; GRB RGB information and membrane key switch information can also be transmitted on the serial data line network DIN(1)-DOUT(n); Both the parallel data line network DIO and the serial data line network DIN(1)-DOUT(n) use the serial single-bus communication protocol to transmit GRB RGB information and membrane key switch information, and are hot-backed for each other.

3. The thin film with full bond knock-off function according to claim 1, characterized in that, The chip is a full-color chip; The Yuquan color chip contains GRB LED beads and integrates a control signal interface circuit, a GRB color driving circuit, an address code memory, and a serial communication circuit with a single bus; it includes control signal interface pins, power supply pins, ground pins, address code input pins, and address code output pins. The power pin is used to supply power to the chip and transmit data information, while the ground pin is used for signal grounding and power grounding. The control signal interface pins are connected to the top-level contacts of the FPC for communication. The control signal interface circuit is responsible for processing the top-level contact signals of the FPC and connecting them to the serial communication circuit of the serial single bus in series and parallel connection. The address code input pins and address code output pins of n full-color chips are cascaded to form a series data line network DIN(1)-DOUT(n). The two ends of the series data line network DIN(1) and DOUT(n) are connected to the MCU respectively. The MCU writes the sequence bit formed by the cascaded full-color chips into the address code memory through the series data line network DIN(1)-DOUT(n) and uses it as the communication address code. The data information is modulated on the power network VCC and transmitted to the MCU by power line carrier. The power network VCC is the parallel carrier data line network VCC(DIO). The serial and parallel single bus serial communication circuit is used to process the information of the series data line network and the information of the parallel carrier data line network. GRB RGB information and membrane keypad switch information can be transmitted on the parallel carrier data line network VCC (DIO); GRB RGB information and membrane key switch information can also be transmitted on the serial data line network DIN(1)-DOUT(n); Both the parallel carrier data line network VCC(DIO) and the serial data line network DIN(1)-DOUT(n) use the serial single-bus communication protocol to transmit GRB RGB information and membrane key switch information, and are hot-backed for each other.

4. The thin film with full bond knock-off function according to claim 1, characterized in that, The chip in question is a Yuhuicai chip; The Yuhui Color chip contains GRB LED beads and integrates a control signal interface circuit, a GRB color driving circuit, an address code memory, and a parallel single-bus serial communication circuit; it includes control signal interface pins, power supply pins, ground pins, and parallel data line pins. The power supply pins are used to power the Yuhui Color chip, and the ground pins are used for signal grounding and power grounding. The control signal interface pins are connected to the top-level contacts of the FPC for communication. The control signal interface circuit is responsible for processing the signals of the top-level contacts of the FPC and connecting them to the parallel single-bus serial communication circuit. The parallel data lines are connected together to form a parallel data line network (DIO), which is then connected to the MCU. The address code of the Yuhuicai chip is written into the address code memory through an external fixture and used as the communication address code. Parallel single-bus serial communication circuits are used to process information from parallel data line networks; GRB RGB information and membrane key switch information are transmitted on the parallel data line network DIO; The parallel data line network uses a serial single-bus communication protocol to transmit GRB RGB information and membrane key switch information.

5. The thin film with full bond knock-off function according to claim 1, characterized in that, The chip is a Yuzai color chip; The chip contains GRB LEDs and integrates a control signal interface circuit, a GRB color driving circuit, an address code memory, and a parallel single-bus serial communication circuit. It includes a control signal interface pin, a power supply pin, and a ground pin. The power supply pin is used to power the chip and transmit data information, and the ground pin is used for signal grounding and power grounding. The control signal interface pins are connected to the top-level contacts of the FPC for communication. The control signal interface circuit is responsible for processing the signals of the top-level contacts of the FPC and connecting them to the parallel single-bus serial communication circuit. Data information is modulated and transmitted to the MCU via power line carrier on the power network VCC, which is also known as the parallel carrier data line network VCC (DIO); the address code of the carrier chip is written into the address code memory through an external fixture and used as the communication address code; Parallel single-bus serial communication circuits are used to process information from parallel carrier data line networks; GRB RGB information and membrane keypad switch information can be transmitted on the parallel carrier data line network VCC (DIO); The parallel carrier data line network uses a serial single-bus communication protocol to transmit GRB holographic information and membrane key switch information.

6. The thin film with full bond knock-off function according to claim 1, characterized in that, The chip in question is the Yuhuancai chip; The Yuhuancai chip contains GRB LED beads and integrates a control signal interface circuit, a GRB Huancai driver circuit, and a serial single-bus serial communication circuit, including control signal interface pins, power supply pins, ground pins, serial signal input pins, and serial signal output pins. The power pin is used to supply power to the Yuhuancai chip, and the ground pin is used for signal grounding and power grounding. The control signal interface pins are connected to the top-level contacts of the FPC for communication. The control signal interface circuit is responsible for processing the signals of the top-level contacts of the FPC and connecting them to the serial communication circuit of the serial single bus. The serial signal input pins and serial signal output pins of n GRB chips are cascaded to form a serial data line network DIN(1)-DOUT(n). The two ends of the serial data line network DIN(1) and DOUT(n) are connected to the MCU respectively. The MCU transmits GRB information and membrane key switch information to the MCU through the serial data line network DIN(1)-DOUT(n). A serial single-bus serial communication circuit is used to process information from a serial data line network. Both GRB RGB information and membrane key switch information are transmitted on the serial data line network DIN(1)-DOUT(n); The serial data line network uses a serial single-bus communication protocol to transmit GRB RGB information and membrane key switch information.

7. The thin film with full bond knock-off function according to claim 1, characterized in that, The chip is a driver chip; The controller chip integrates a control signal interface circuit, an address code memory, and a serial communication circuit with a single bus; it includes control signal interface pins, power supply pins, ground pins, parallel data line pins, address code input pins, and address code output pins. The power pin is used to supply power to the controller chip, and the ground pin is used for signal grounding and power grounding. The control signal interface pins are connected to the top-level contacts of the FPC for communication. The control signal interface circuit is responsible for processing the signals of the top-level contacts of the FPC and connecting them to the serial communication circuit of the serial bus in series and parallel connection. The address code input pins and address code output pins of n controller chips are cascaded to form a serial data line network DIN(1)-DOUT(n). The two ends of the serial data line network DIN(1) and DOUT(n) are connected to the MCU respectively. The MCU writes the sequence bit formed by the cascaded controller chips into the address code memory through the serial data line network DIN(1)-DOUT(n) and uses it as the communication address code. The power supply pins of the n controller chips are connected in parallel to share the power supply network VCC, the ground pins are connected in parallel to share the ground network GND, and the parallel data line pins are connected in parallel to form a parallel data line network DIO, which is then connected to the MCU. Serial-parallel single-bus serial communication circuits are used to process serial data line network information and parallel data line network information. Membrane key switch information can be transmitted on the parallel data line network (DIO). Membrane key switch information can also be transmitted on the serial data line network DIN(1)-DOUT(n); Both the parallel data line network DIO and the serial data line network DIN(1)-DOUT(n) use the serial single-bus communication protocol to transmit membrane key switch information and are hot backups for each other.

8. The thin film with full bond knock-off function according to claim 1, characterized in that, The chip is a magic-controlling chip; The device chip integrates a control signal interface circuit and a serial single-bus serial communication circuit, including a control signal interface pin, a power supply pin, a ground pin, a serial signal input pin, and a serial signal output pin; the power supply pin is used to power the device chip, and the ground pin is used for signal grounding and power grounding. The control signal interface pins are connected to the top-level contacts of the FPC for communication. The control signal interface circuit is responsible for processing the signals of the top-level contacts of the FPC and connecting them to the serial communication circuit of the serial single bus. The serial signal input pins and serial signal output pins of n control chip are cascaded to form a serial data line network DIN(1)-DOUT(n). The two ends of the serial data line network DIN(1) and DOUT(n) are connected to the MCU respectively. The MCU transmits the membrane key switch information to the MCU through the serial data line network DIN(1)-DOUT(n). A serial single-bus serial communication circuit is used to process information from a serial data line network. Information from membrane key switches is transmitted on the serial data line network DIN(1)-DOUT(n); The serial data line network uses a serial single-bus communication protocol to transmit membrane key switch information.

9. The thin film with full bond knock-off function according to claim 7 or 8, characterized in that, The chip includes at least one control signal interface pin.

10. A key, comprising a keycap, a key reset element, and a key pressing component, characterized in that, The keycap is mounted on the key pressing component; when the keycap is pressed down, the bottom contact and the top contact of any one of claims 1 to 8 make contact and conduct; when the keycap is released, the bottom contact and the top contact do not make contact. The button reset element is a silicone spring, a spring, or a metal spring; the button pressing component is a scissor-type component or a crater-type component.

11. An integrated membrane keyboard, characterized in that, It includes the thin film as described in any one of claims 1 to 8, and the button as described in claim 10.

12. A detachable membrane keyboard, characterized in that, Includes the membrane as described in any one of claims 1 to 8, and the key as described in claim 10; the connecting wires between the separate membrane keyboards are 5-pin electrical networks, 4-pin electrical networks, 3-pin electrical networks, or 2-pin electrical networks.

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