Double-sided texturing method of silicon wafer and heterojunction solar cell

Abstract

The invention relates to the technical field of photovoltaic cells, in particular to a double-sided texturing method of a silicon wafer and a heterojunction solar cell. The invention provides a double-sided texturing method for a silicon wafer, which comprises the following steps of: sequentially carrying out cleaning, polishing treatment, surface oxide layer removal and double-sided high-temperature gettering treatment on an N-type monocrystalline silicon wafer to obtain a clean N-type monocrystalline silicon wafer; carrying out first phosphorosilicate glass layer removal treatment on the front surface of the clean N-type monocrystalline silicon wafer, and carrying out single-surface texturing treatment on the front surface to obtain a single-textured silicon wafer; and carrying out second phosphorosilicate glass layer removal treatment on the back surface of the single-suede silicon wafer, and then carrying out double-sided texturing to obtain the double-suede silicon wafer. The silicon wafer obtained by the double-sided texturing method provided by the invention can effectively improve the photoelectric conversion efficiency of a heterojunction solar cell, and the preparation process is simple and easy for industrial application.

Description

Technical Field

[0001] This invention relates to the field of photovoltaic cell technology, and in particular to a method for texturing a silicon wafer on both sides and a heterojunction solar cell. Background Technology

[0002] Heterojunction solar cells (HJTs) are a type of N-type solar cell. Their high conversion efficiency, low degradation, and excellent temperature coefficient have made them a core focus of photovoltaic technology iteration, particularly suitable for bifacial power generation and thin-film applications. However, their high cost and demanding manufacturing processes compared to other existing solar cells remain constraints on industrialization. Reducing costs and improving photoelectric conversion efficiency are key breakthroughs for mass production.

[0003] Existing technologies involve polishing the backside of silicon wafers to remove the pyramidal texture after texturing, thereby increasing the reflectivity, passivation effect, and absorption of long-wavelength light. However, the photoelectric conversion efficiency of heterojunction solar cells fabricated from silicon wafers prepared by first texturing both sides and then polishing the backside remains limited. Furthermore, the excessively flat backside after polishing leads to poor adhesion of the printing paste to the grid lines during printing, causing the grid lines to easily detach after curing. This poses a risk of poor electrode-cell contact, resulting in increased local contact resistance and localized heat generation at the finished module, leading to hot spots and reducing the module's lifespan. Therefore, there is an urgent need for a simple double-sided texturing method that can effectively improve the photoelectric conversion efficiency of heterojunction solar cells. Summary of the Invention

[0004] This invention provides a method for double-sided texturing of silicon wafers, a heterojunction solar cell and its fabrication method. The silicon wafers obtained by the double-sided texturing method provided by this invention can effectively improve the photoelectric conversion efficiency of heterojunction solar cells, and the fabrication process is simple and easy to industrialize.

[0005] To solve the above-mentioned technical problems, the present invention provides the following technical method: This invention provides a method for texturing both sides of a silicon wafer, comprising the following steps: (1) The N-type monocrystalline silicon wafer is sequentially cleaned, polished, has its surface oxide layer removed, and undergoes double-sided high-temperature gettering to obtain a clean N-type monocrystalline silicon wafer. (2) The clean N-type single-crystal silicon wafer is subjected to a first removal of the phosphosilicate glass layer on its front side, and then a single-sided texturing process is performed on the front side to obtain a single-textured silicon wafer. (3) The back side of the single-textured silicon wafer is subjected to a second removal of the phosphosilicate glass layer, and then double-textured to obtain a double-textured silicon wafer.

[0006] In some specific embodiments, the cleaning involves immersing the N-type monocrystalline silicon wafer in an aqueous solution containing HF, HCl, and O3, followed by rinsing in water to obtain a cleaned N-type monocrystalline silicon wafer, wherein the concentration of HF is 4-8 wt%, the concentration of HCl is 0.5-2 wt%, and the concentration of O3 is 20-40 ppm.

[0007] In some specific embodiments, the polishing process involves polishing the cleaned N-type monocrystalline silicon wafer in a polishing solution, followed by rinsing in water to obtain a polished N-type monocrystalline silicon wafer; the polishing solution is a strong alkaline aqueous solution, which is an aqueous solution of KOH and / or NaOH, wherein the concentration of KOH and / or NaOH is 3-5 wt%; the polishing temperature is 65-80℃, and the polishing time is 120-180s.

[0008] In some specific embodiments, the removal of the surface oxide layer involves immersing the polished N-type monocrystalline silicon wafer in a mixed aqueous solution of HF and HCl, rinsing it in water, and then performing a first drying to obtain an N-type monocrystalline silicon wafer with the surface oxide layer removed; wherein the concentration of HF is 5-10 wt%, the concentration of HCl is 0.5-1 wt%, and the first drying is performed in a protective atmosphere.

[0009] In some specific embodiments, the double-sided high-temperature gettering process is a high-temperature tubular gettering process, and the gettering medium used is phosphorus oxychloride.

[0010] In some specific embodiments, the first process of removing the phosphosilicate glass layer involves spraying a water film onto the back of the clean N-type single crystal silicon wafer, then using a first etching solution in a chain cleaning machine to remove the phosphosilicate glass layer on the front side, followed by sequential water washing and drying; wherein the first etching solution is a mixed aqueous solution of HF and HCl, wherein the concentration of HF is 5-10 wt% and the concentration of HCl is 0.5-1 wt%.

[0011] In some specific embodiments, before the single-sided texturing, the N-type single crystal silicon wafer after the first removal of the phosphosilicate glass layer is cleaned in a mixed solution of KOH and hydrogen peroxide, wherein the concentration of KOH is 0.4-0.8 wt% and the concentration of hydrogen peroxide is 1-2 wt%, the cleaning temperature is 60-70°C and the cleaning time is 100-250 s.

[0012] In some specific embodiments, the texturing solution used for single-sided texturing is a mixed aqueous solution of KOH and texturing additives, wherein the concentration of KOH in the texturing solution is 0.05-0.5wt%; the temperature of single-sided texturing is 78-88℃, and the time of single-sided texturing is 450-600s; the reflectivity of the front side obtained by single-sided texturing is 11-11.5%.

[0013] In some specific embodiments, the second process of removing the phosphosilicate glass layer involves placing the single-textured silicon wafer in a second etching solution to remove the phosphosilicate glass layer on the back side, followed by rinsing with water; wherein the second etching solution is a mixed aqueous solution of HF and HCl, with the concentration of HF being 2-5 wt% and the concentration of HCl being 0.2-0.5 wt%.

[0014] In some specific embodiments, the texturing solution used for double-sided texturing is a mixed aqueous solution of KOH and texturing additives, wherein the concentration of KOH in the texturing solution is 0.05-0.2wt%; the temperature for double-sided texturing is 78-88℃, and the time for double-sided texturing is 120-240s; the front reflectance of the double-textured silicon wafer is 9-11%, and the back reflectance is 15-19%.

[0015] A second aspect of the present invention also provides a heterojunction solar cell, comprising, from top to bottom, a front electrode, a front conductive thin film layer, a front microcrystalline silicon thin film layer, an N-type monocrystalline silicon wafer, a back microcrystalline silicon thin film layer, a back conductive thin film layer, and a back electrode, wherein the N-type monocrystalline silicon wafer is a double-textured silicon wafer obtained by the above-described preparation method, the front side of the double-textured silicon wafer is in contact with the front microcrystalline silicon thin film layer, and the back side of the double-textured silicon wafer is in contact with the back microcrystalline silicon thin film layer.

[0016] In some specific embodiments, the front conductive thin film layer and the back conductive thin film layer are each independently a transparent conductive oxide layer, and the thickness of the front conductive thin film layer and the back conductive thin film layer is each independently 65-85nm.

[0017] In some specific embodiments, the front microcrystalline silicon thin film layer comprises, from top to bottom, an N-type microcrystalline silicon layer and a first intrinsic microcrystalline silicon layer; the thickness of the N-type microcrystalline silicon layer is 20-25 nm, and the thickness of the first intrinsic microcrystalline silicon layer is 5-10 nm.

[0018] In some specific embodiments, the back microcrystalline silicon thin film layer comprises, from top to bottom, a second intrinsic microcrystalline silicon layer and a P-type microcrystalline silicon layer, wherein the thickness of the P-type microcrystalline silicon layer is 20-30 nm and the thickness of the second intrinsic microcrystalline silicon layer is 5-10 nm.

[0019] Compared with the prior art, the present invention has the following beneficial effects: This invention first involves sequentially cleaning, polishing, removing the surface oxide layer, and performing double-sided high-temperature gettering on an N-type monocrystalline silicon wafer to obtain a clean N-type monocrystalline silicon wafer. Then, the front side of the clean N-type monocrystalline silicon wafer undergoes a first process to remove the phosphosilicate glass layer, followed by single-sided texturing to obtain a single-textured silicon wafer. Next, the back side of the single-textured silicon wafer undergoes a second process to remove the phosphosilicate glass layer, followed by double-sided texturing to obtain a double-textured silicon wafer. This method, by first performing single-sided texturing on the front side and then double-sided texturing, results in a double-textured silicon wafer with a front reflectance of 9-11% and a back reflectance of 15-19%, while maintaining a certain texturized structure on the back side. The specific textured surface structure obtained by this method is more conducive to the adhesion of other films (such as conductive thin film layers, microcrystalline silicon thin film layers, etc.) on the back of the silicon wafer when used to prepare heterojunction solar cells, effectively improving the coating efficiency. In addition, in the metallization process (i.e. electrode printing process), the microtextured surface structure on the back is more conducive to the adhesion of metal paste, ensuring the reliability of the solidified grid lines (improved tensile strength). The double-textured silicon wafer obtained by the above process can maintain the bifaciality effect of conventional heterojunction cells, so that the solar cell can take advantage of the good long-wavelength response of back polishing, and also ensure that the bifaciality is on par with conventional heterojunction, thereby significantly improving the photoelectric conversion efficiency of the prepared solar cell. Attached Figure Description

[0020] The above and other objects, features, and advantages of the invention will be apparent from the following description of preferred embodiments illustrating the gist of the invention and its use, and the accompanying drawings, in which: Figure 1 The structure of a heterojunction solar cell prepared in an embodiment of the present invention is shown, wherein 1 is the front electrode, 2 is the front conductive thin film layer, 3 is the front microcrystalline silicon thin film layer, 4 is the front textured layer of an N-type monocrystalline silicon wafer, 5 is the N-type monocrystalline silicon wafer, 6 is the back textured layer of an N-type monocrystalline silicon wafer, 7 is the back microcrystalline silicon thin film layer, 8 is the back conductive thin film layer, and 9 is the back electrode. Detailed Implementation

[0021] The present invention will be described below through specific embodiments. Those skilled in the art will understand that the specific embodiments described below are for illustrative purposes only and do not limit the scope of the invention in any way. Furthermore, in the following embodiments, unless otherwise specified, the reagents and equipment used are commercially available. If specific processing conditions and methods are not explicitly described in the following embodiments, conditions and methods known in the art can be used for processing.

[0022] This invention provides a method for texturing both sides of a silicon wafer, comprising the following steps: (1) The N-type monocrystalline silicon wafer is sequentially cleaned, polished, has its surface oxide layer removed, and undergoes double-sided high-temperature gettering to obtain a clean N-type monocrystalline silicon wafer. (2) The clean N-type single-crystal silicon wafer is subjected to a first removal of the phosphosilicate glass layer on its front side, and then a single-sided texturing process is performed on the front side to obtain a single-textured silicon wafer. (3) The back side of the single-textured silicon wafer is subjected to a second removal of the phosphosilicate glass layer, and then double-textured to obtain a double-textured silicon wafer.

[0023] This invention first performs a series of purification processes on an N-type monocrystalline silicon wafer to obtain a clean N-type monocrystalline silicon wafer. Then, the front phosphosilicate glass layer is removed, and a single-sided texturing process is performed on the front side. Next, the back phosphosilicate glass layer is removed, and a double-sided texturing process is performed. This double-sided texturing further optimizes the textured surface on the front side and creates a micro-light pyramid on the back side, resulting in a textured surface with low reflectivity on the front side and a textured surface with high reflectivity on the back side. The double-textured silicon wafer prepared by this process has specific front and back textured structures, which is beneficial for improving the adhesion of the film layer on the back side of the silicon wafer during solar cell fabrication, effectively improving coating efficiency. Furthermore, in the metallization process, the micro-textured structure on the back side is more conducive to the adhesion of the metal paste, ensuring the reliability of the cured grid lines (improved tensile strength). The double-textured silicon wafer obtained by the above process can maintain the bifaciality effect of conventional heterojunction cells, significantly improving the photoelectric conversion efficiency of the prepared solar cells.

[0024] The present invention first performs cleaning, polishing, surface oxide layer removal and double-sided high-temperature gettering treatment on N-type monocrystalline silicon wafers in sequence to obtain clean N-type monocrystalline silicon wafers.

[0025] In some embodiments of the present invention, the cleaning involves immersing the N-type monocrystalline silicon wafer in an aqueous solution containing HF, HCl, and O3, followed by rinsing in water to obtain a cleaned N-type monocrystalline silicon wafer. The concentration of HF is 4-8 wt%, specifically 4 wt%, 5 wt%, 6 wt%, 7 wt%, 8 wt%, etc.; the concentration of HCl is 0.5-2 wt%, specifically 0.5 wt%, 1.0 wt%, 1.5 wt%, 2.0 wt%, etc.; and the concentration of O3 is 20-40 ppm, specifically 20 ppm, 25 ppm, 30 ppm, 35 ppm, 40 ppm, etc. In this invention, the cleaning removes impurities and organic matter from the surface of the N-type monocrystalline silicon wafer. The present invention does not specifically limit the specific conditions (such as temperature and time) for the cleaning; in some embodiments of the present invention, the cleaning is performed at room temperature, and the cleaning time is 120-180 s, specifically 120 s, 130 s, 140 s, 150 s, 160 s, 170 s, and 180 s, etc.

[0026] In some embodiments of the present invention, the polishing process involves polishing the cleaned N-type monocrystalline silicon wafer in a polishing solution, followed by rinsing in water to obtain a polished N-type monocrystalline silicon wafer. The polishing solution is a strong alkaline aqueous solution, specifically an aqueous solution of KOH and / or NaOH, wherein the concentration of KOH and / or NaOH is 3-5 wt%, specifically 3 wt%, 3.5 wt%, 4 wt%, 4.5 wt%, and 5 wt%. The polishing temperature is 65-80℃, specifically 65℃, 68℃, 70℃, 72℃, 75℃, 78℃, and 80℃. The polishing time is 120-180 s, specifically 120 s, 130 s, 140 s, 150 s, 160 s, 170 s, and 180 s. In this invention, the polishing process removes the mechanically damaged layer formed during the cutting of the N-type monocrystalline silicon wafer, thereby reducing defects in the N-type monocrystalline silicon wafer.

[0027] In some embodiments of the present invention, the removal of the surface oxide layer involves immersing the polished N-type monocrystalline silicon wafer in a mixed aqueous solution of HF and HCl, rinsing it in water, and then performing a first drying to obtain an N-type monocrystalline silicon wafer with the surface oxide layer removed; wherein the concentration of HF is 5-10 wt%, specifically 5 wt%, 5.5 wt%, 6 wt%, 6.5 wt%, 7 wt%, 7.5 wt%, 8 wt%, 8.5 wt%, 9 wt%, 9.5 wt%, and 10 wt%; and the concentration of HCl is 0.5-1 wt%, specifically 0.5 wt% and 0.55 wt%. The concentrations are 0.6wt%, 0.65wt%, 0.7wt%, 0.75wt%, 0.8wt%, 0.85wt%, 0.9wt%, 0.95wt%, and 1wt%, etc.; the first drying is carried out in a protective atmosphere, which refers to a reactive inert gas atmosphere, such as a nitrogen atmosphere or an inert gas atmosphere, etc. The temperature of the first drying is 75-90℃, specifically 75℃, 80℃, 85℃, and 90℃, etc.; the first drying time is 5-10min, specifically 5min, 6min, 7min, 8min, 9min, and 10min, etc. In this invention, the surface oxide layer removal process removes the silicon oxide layer introduced into the silicon wafer surface by the aforementioned polishing process and neutralizes any alkaline substances that may remain from the polishing process; and the first drying is carried out in a protective atmosphere, avoiding the introduction of air into the silicon wafer surface, thus preparing for the subsequent double-sided high-temperature gettering process.

[0028] In some embodiments of the present invention, the double-sided high-temperature gettering process is a high-temperature tube gettering process, and the gettering medium used is phosphorus oxychloride. The present invention does not specifically limit the method of achieving the double-sided high-temperature gettering process; any method capable of achieving double-sided gettering of the silicon wafer is acceptable. In an embodiment of the present invention, the double-sided high-temperature gettering process is achieved by loading an N-type single-crystal silicon wafer onto a quartz boat using a single-wafer insertion method, and then placing it into a high-temperature tube device for high-temperature gettering. In the present invention, during the double-sided high-temperature gettering process, metal ions inside the silicon wafer can be removed, optimizing the silicon wafer resistivity and improving the minority carrier lifetime. Simultaneously, the double-sided high-temperature gettering process can form phosphosilicate glass layers on both the front and back sides of the silicon wafer, providing conditions for subsequent texturing of different reflectivities on the front and back sides of the silicon wafer through single-sided and double-sided texturing. The present invention does not specifically limit the specific conditions of the double-sided high-temperature gettering process; conventional conditions are acceptable.

[0029] After obtaining a clean N-type monocrystalline silicon wafer, the present invention performs a first removal of the phosphosilicate glass layer on the front side of the clean N-type monocrystalline silicon wafer, and performs a single-sided texturing process on the front side to obtain a single-textured silicon wafer.

[0030] In some embodiments of the present invention, the first process of removing the phosphosilicate glass layer involves spraying a water film onto the back side of the clean N-type monocrystalline silicon wafer, then using a first etching solution in a chain cleaning machine to remove the phosphosilicate glass layer on the front side, followed by sequential water washing and drying. The first etching solution is a mixed aqueous solution of HF and HCl, wherein the concentration of HF is 5-10 wt%, specifically 5 wt%, 6 wt%, 7 wt%, 8 wt%, 9 wt%, and 10 wt%, etc.; and the concentration of HCl is 0.5-1 wt%, specifically 0.5 wt%, 0.6 wt%, 0.7 wt%, 0.8 wt%, 0.9 wt%, and 1 wt%, etc. In this invention, by spraying a water film onto the back side of the N-type monocrystalline silicon wafer, the simultaneous removal of the phosphosilicate glass layer on the back side can be avoided, thereby ensuring that the subsequent single-sided texturing process only forms a textured surface on the front side. In this invention, there are no particular limitations on the specific conditions (such as temperature and time) for cleaning with the first etching solution; in some embodiments of this invention, cleaning with the first etching solution is performed at room temperature, wherein the cleaning time is 60-300s, specifically 60s, 80s, 100s, 110s, 130s, 150s, 170s, 180s, 200s, 220s, 250s, 280s and 300s, etc.

[0031] In some embodiments of the present invention, before the single-sided texturing, the N-type single-crystal silicon wafer after the first removal of the phosphosilicate glass layer is cleaned in a mixed solution of KOH and hydrogen peroxide, wherein the concentration of KOH is 0.4-0.8 wt%, specifically 0.4 wt%, 0.5 wt%, 0.6 wt%, 0.7 wt%, and 0.8 wt%; the concentration of hydrogen peroxide is 1-2 wt%, specifically 1 wt%, 1.2 wt%, 1.4 wt%, 1.5 wt%, 1.8 wt%, and 2 wt%; the cleaning temperature is 60-70°C, specifically 60°C, 61°C, 62°C, 64°C, 65°C, 67°C, 68°C, and 70°C; and the cleaning time is 100-250 s, specifically 100 s, 120 s, 140 s, 150 s, 160 s, 180 s, 200 s, 220 s, 240 s, and 250 s. In this invention, cleaning with a mixed solution of KOH and hydrogen peroxide before texturing can remove organic matter and metallic impurities adhering to the surface of the silicon wafer. After completing the single-sided removal of the phosphosilicate glass layer, the silicon wafer will pass through conveyor belts and robotic arms during subsequent processes. In this scenario, the silicon wafer is inevitably at risk of contamination. Cleaning with the mixed solution of KOH and hydrogen peroxide can ensure that the silicon wafer is relatively clean before texturing.

[0032] In some embodiments of the present invention, after the N-type single-crystal silicon wafer undergoes the first process of removing the phosphosilicate glass layer, it is cleaned in a mixed solution of KOH and hydrogen peroxide, and then rinsed with water. In the present invention, the rinsing time with water is not specifically limited.

[0033] In some embodiments of the present invention, the texturing solution used for single-sided texturing is a mixed aqueous solution of KOH and texturing additives, wherein the concentration of KOH in the texturing solution is 0.05-0.5 wt%, specifically 0.05 wt%, 0.1 wt%, 0.2 wt%, 0.3 wt%, 0.4 wt%, and 0.5 wt%, etc.; the temperature for single-sided texturing is 78-88℃, specifically 78℃, 80℃, 82℃, 84℃, 85℃, etc. The temperatures are 6℃ and 88℃, etc.; the single-sided texturing time is 450-600s, specifically 450s, 480s, 500s, 520s, 540s, 550s, 580s, and 600s, etc.; the reflectivity of the front surface obtained by single-sided texturing is 11-11.5%, specifically 11%, 11.1%, 11.2%, 11.3%, 11.4%, and 11.5%, etc.; the texturing size of the front surface obtained by single-sided texturing is 1-3μm. This invention does not specifically limit the type of texturing additive; commercially available conventional texturing additives that can obtain the desired texturing surface are acceptable. In this embodiment, the texturing additive is Shichuang TS-53V01 texturing additive. This invention does not specifically limit the concentration of the texturing additive in the texturing solution used for single-sided texturing; it can be adjusted adaptively according to the specific texturing additive added. In this embodiment of the invention, the texturing additive is Shichuang TS-53V01 texturing additive, and the concentration of the texturing additive in the texturing solution used for single-sided texturing is 0.05-0.5wt%, specifically 0.05wt%, 0.08wt%, 0.1wt%, 0.2wt%, 0.3wt%, 0.4wt%, and 0.5wt%, etc.

[0034] In some embodiments of the present invention, after the single-sided flocking process is completed, a water washing process is also included to avoid cross-contamination or interaction of chemicals that may affect the performance.

[0035] After obtaining a single-textured silicon wafer, the present invention performs a second removal process on the back side of the single-textured silicon wafer to remove the phosphosilicate glass layer, and then performs double-sided texturing to obtain a double-textured silicon wafer.

[0036] In some embodiments of the present invention, the second process for removing the phosphosilicate glass layer involves placing the textured silicon wafer in a second etching solution to remove the phosphosilicate glass layer on the back side, followed by rinsing with water. The second etching solution is a mixed aqueous solution of HF and HCl, where the concentration of HF is 2-5 wt%, specifically 2 wt%, 3 wt%, 4 wt%, 5 wt%, etc.; and the concentration of HCl is 0.2-0.5 wt%, specifically 0.2 wt%, 0.3 wt%, 0.4 wt%, 0.5 wt%, etc. The present invention does not specifically limit the specific conditions (such as temperature and time) for immersion in the second etching solution. In some embodiments of the present invention, the cleaning is performed at room temperature, and the cleaning time is 120-180 s, specifically 120 s, 130 s, 140 s, 150 s, 160 s, 170 s, and 180 s, etc.

[0037] In some embodiments of the present invention, the texturing solution used for double-sided texturing is a mixed aqueous solution of KOH and texturing additives, wherein the concentration of KOH in the texturing solution is 0.05-0.2wt%, specifically 0.05wt%, 0.1wt%, 0.15wt%, 0.2wt%, etc.; the temperature for double-sided texturing is 78-88℃, specifically 78℃, 80℃, 82℃, 85℃, 88℃, etc.; the time for double-sided texturing is 120-240s, specifically 120s, 150s, 170s, 190s, 210s, 240s, etc.; and the front reflectivity of the double-textured silicon wafer is 9-11% (specifically 9%, 9.5%, 9.8%, 10%). The reflectivity of the front side is 10.5% and 11%, etc. The base size of the pyramid structure in the front side is 1.5-2.5μm (specifically 1.5μm, 2.0μm, 2.3μm, 2.5μm, etc.), and the height is 1.1-1.6μm (specifically 1.3μm, 1.4μm, 1.6μm, etc.). The reflectivity of the back side is 15-19% (specifically 15%, 16%, 16.5%, 18%, 19%, etc.), and the base size of the pyramid structure in the back side is 0.5-1.0μm (specifically 0.7μm, 0.9μm, 1.0μm, etc.), and the height is 0.4-1.0μm (specifically 0.4μm, 0.5μm, 0.6μm, etc.). In this invention, during the double-sided flocking process, the front side flocking can be further optimized, the pyramid structure can be further increased, and at the same time, a tiny pyramid structure is formed on the back side, resulting in a small flocking surface. This invention does not impose specific limitations on the concentration of the texturing additive in the texturing solution used for double-sided texturing, and the concentration can be adjusted adaptively according to the specific texturing additive added. In the embodiments of this invention, the texturing additive is Shichuang TS-53V01 texturing additive, and the concentration of the texturing additive in the texturing solution used for double-sided texturing is 0.05-0.2wt%, specifically 0.05wt%, 0.1wt%, 0.15wt%, 0.2wt%, etc.

[0038] In continuous production, when the liquid used (such as cleaning liquid, polishing liquid, etc.) is outside the scope defined by this invention or cannot achieve the corresponding effect, it is necessary to supplement the solute in it. This invention does not have a special limitation on the specific method of supplementation, such as replacing the liquid used as a whole or increasing the amount of solute.

[0039] In another aspect, the present invention also provides a heterojunction solar cell, such as Figure 1As shown, the structure includes, from top to bottom, a front electrode 1, a front conductive thin film layer 2, a front microcrystalline silicon thin film layer 3, an N-type monocrystalline silicon wafer 5, a back microcrystalline silicon thin film layer 7, a back conductive thin film layer 8, and a back electrode 9. The N-type monocrystalline silicon wafer 5 is a double-textured silicon wafer obtained by the preparation method according to any one of claims 1-8. The front side of the double-textured silicon wafer is in contact with the front microcrystalline silicon thin film layer, and the back side of the double-textured silicon wafer is in contact with the back microcrystalline silicon thin film layer. Figure 1 As shown, the side of the N-type monocrystalline silicon wafer that contacts the front microcrystalline silicon thin film layer 3 is the front textured layer 4 of the N-type monocrystalline silicon wafer, and the side that contacts the back microcrystalline silicon thin film layer 7 is the back textured layer 6 of the N-type monocrystalline silicon wafer.

[0040] In some embodiments of the present invention, the front conductive thin film layer and the back conductive thin film layer are each independently a transparent conductive oxide layer, and the thickness of the front conductive thin film layer and the back conductive thin film layer are each independently 65-85 nm, specifically 65 nm, 68 nm, 70 nm, 72 nm, 75 nm, 78 nm, 80 nm, 82 nm, and 85 nm, etc. The present invention does not specifically limit the type of the transparent conductive oxide layer; those skilled in the art can choose according to their needs, such as indium tin oxide or zinc aluminum oxide; in the embodiments of the present invention, the transparent conductive oxide layer is indium tin oxide. In the present invention, the transparent conductive oxide layer serves to transmit light, increase conductivity, and reduce light reflection. The present invention uses a relatively thin transparent conductive oxide layer, which maintains good photoelectric conversion performance while also reducing material costs.

[0041] In some embodiments of the present invention, the front microcrystalline silicon thin film layer 3 comprises, from top to bottom, an N-type microcrystalline silicon layer (not shown) and a first intrinsic microcrystalline silicon layer (not shown); the thickness of the N-type microcrystalline silicon layer is 20-25 nm, specifically 20 nm, 21 nm, 22 nm, 23 nm, 24 nm, and 25 nm, etc.; the thickness of the first intrinsic microcrystalline silicon layer is 5-10 nm, specifically 5 nm, 6 nm, 7 nm, 8 nm, 9 nm, and 10 nm, etc.

[0042] In some embodiments of the present invention, the back microcrystalline silicon thin film layer 7 comprises, from top to bottom, a second intrinsic microcrystalline silicon layer (not shown) and a P-type microcrystalline silicon layer (not shown). The thickness of the P-type microcrystalline silicon layer is 20-30 nm, specifically 20 nm, 22 nm, 25 nm, 26 nm, 27 nm, 28 nm, 29 nm, and 30 nm, etc.; the thickness of the second intrinsic microcrystalline silicon layer is 5-10 nm, specifically 5 nm, 6 nm, 7 nm, 8 nm, 9 nm, and 10 nm, etc.

[0043] In this invention, the intrinsic microcrystalline silicon layer serves as a buffer layer between N-type monocrystalline silicon and N / P-type microcrystalline silicon. By passivating interface defects with hydrogen atoms, it reduces carrier surface recombination and can significantly improve minority carrier lifetime and open-circuit voltage.

[0044] The present invention also provides a method for fabricating the heterojunction solar cell described in the above technical solution, comprising the following steps: Plasma-enhanced chemical vapor deposition (PECVD) was used to deposit microcrystalline silicon thin films on the front and back sides of a double-textured silicon wafer, respectively. A front conductive thin film layer and a back conductive thin film layer were deposited on the front microcrystalline silicon thin film layer and the back microcrystalline silicon thin film layer, respectively, using physical vapor deposition. A front electrode and a back electrode are fabricated on the front conductive thin film layer and the back conductive thin film layer.

[0045] The present invention does not impose any special limitations on the specific process parameters in the above-mentioned method for preparing heterojunction solar cells. Conventional process parameters can be used to obtain the aforementioned thickness of each film.

[0046] The technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings and embodiments. The embodiments of this application are only examples, and all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0047] Example 1 (1) Using Zhonghuan G12HN type monocrystalline silicon wafer as N type monocrystalline silicon wafer, the N type monocrystalline silicon wafer was immersed and washed in an aqueous solution of HF, HCl and O3 (where the concentration of HF is 5wt%, the concentration of HCl is 1wt%, and the concentration of O3 is 35ppm) for 120s, and then rinsed in water to obtain the cleaned N type monocrystalline silicon wafer.

[0048] (2) The cleaned N-type single crystal silicon wafer is placed in a 3.5wt% KOH aqueous solution at 70℃ and polished for 150s. Then it is rinsed in water to obtain the polished N-type single crystal silicon wafer.

[0049] (3) The polished N-type single crystal silicon wafer is immersed in a mixed aqueous solution of HF and HCl (HF concentration is 8wt% and HCl concentration is 0.8wt%), then rinsed in water, and then dried at 80℃ for 7min in a nitrogen atmosphere to obtain an N-type single crystal silicon wafer with the surface oxide layer removed.

[0050] (4) The N-type single crystal silicon wafer with the surface oxide layer removed is loaded into a quartz boat in a single-wafer insertion manner and placed in a tube-type high-temperature getter furnace. Phosphorus oxychloride is used as the getter medium and the high-temperature getter treatment is carried out at 900°C or above for 120 minutes to obtain a clean N-type single crystal silicon wafer.

[0051] (5) Spray a water film on one side of the clean N-type single crystal silicon wafer as the back side and the other side as the front side. Then, it is transported to a chain cleaning machine and cleaned in a mixed aqueous solution of HF and HCl at room temperature for 200s, wherein the concentration of HF is 10wt% and the concentration of HCl is 1wt%. Then, it is washed with water and dried at 60°C to obtain the N-type single crystal silicon after the first removal of the phosphosilicate glass layer.

[0052] (6) The N-type monocrystalline silicon after the first removal of the phosphorus silicate glass layer is placed in a mixed solution of KOH and hydrogen peroxide (where the concentration of KOH is 0.4wt% and the concentration of hydrogen peroxide is 2wt%) and washed at 65°C for 240s, then washed with water for 120s, and then placed in a texturing solution (a mixed aqueous solution of KOH and Shichuang TS-53V01 texturing additive, where the concentration of KOH is 0.3wt% and the concentration of texturing additive is 0.1wt%) and immersed at 81°C for 480s for texturing, and then washed with water for 120s to obtain a single-textured silicon wafer with a pyramid structure distributed on its front side.

[0053] (7) The single crystal silicon wafer after the front texturing treatment is placed in a mixed aqueous solution of HF and HCl and washed at room temperature for 150s, wherein the concentration of HF is 5wt% and the concentration of HCl is 0.5wt%, and then washed with water to obtain the N-type single crystal silicon after the second removal of the phosphorus silicon glass layer.

[0054] (8) The N-type single crystal silicon after the second removal of the phosphorus silicate glass layer was placed in a texturing solution (a mixed aqueous solution of KOH and Shichuang TS-53V01 texturing additive, with a KOH concentration of 0.05wt% and a texturing additive concentration of 0.05wt%), and immersed at 81°C for 240s for texturing, and then washed with water for 120s to obtain a double-textured silicon wafer with pyramid structures distributed on both the front and back sides. The base size of the pyramid structure on the front side is 2μm, the texture height is 1.3μm, and the reflectivity is 10.2%; while the base size of the pyramid structure on the back side is 0.7μm, the texture height is 0.4μm, and the reflectivity is 18%.

[0055] (9) Plasma-enhanced chemical vapor deposition is used to simultaneously deposit on the front and back sides of the double-textured silicon wafer to form a 6 nm thick first intrinsic microcrystalline silicon layer (i) on the front side of the double-textured silicon wafer. a A second intrinsic microcrystalline silicon layer (i) with a thickness of 6 nm is formed on the back side of the double-textured silicon wafer. bLayer); then in the first intrinsic microcrystalline silicon layer (i a A 23 nm thick N-type microcrystalline silicon layer is formed on the first intrinsic microcrystalline silicon layer, and a second intrinsic microcrystalline silicon layer (i) is formed on the second intrinsic microcrystalline silicon layer. b A 24 nm thick P-type microcrystalline silicon layer is formed on the N-type microcrystalline silicon layer; and a 78 nm thick indium tin oxide (ITO) conductive oxide layer is deposited on the surface of the N-type microcrystalline silicon layer by physical vapor deposition, and a 70 nm thick indium tin oxide (ITO) conductive oxide layer is deposited on the surface of the P-type microcrystalline silicon layer. Silver front and back electrodes are prepared by screen printing.

[0056] Example 2 A double-textured silicon wafer was prepared according to the method in Example 1, and a heterojunction solar cell was fabricated. The difference in the preparation of the double-textured silicon wafer lies in the formulation and control conditions of the texturing solution used in the double-sided texturing process. Specifically, a mixed aqueous solution of KOH and Shichuang TS-53V01 texturing additive was used, with a KOH concentration of 0.1 wt% and a texturing additive concentration of 0.1 wt%. The wafer was immersed at 81°C for 120 seconds for texturing, and then washed with water for 120 seconds to obtain a double-textured silicon wafer with pyramidal structures distributed on both the front and back sides.

[0057] The base of the pyramid structure on the front side of the double-textured silicon wafer is 2.3 μm in size, the texture height is 1.4 μm, and the reflectivity is 9.8%; while the pyramid structure on the back side is 0.9 μm in size, the texture height is 0.5 μm, and the reflectivity is 17%.

[0058] Example 3 Double-textured silicon wafers were prepared according to the method in Example 1, and heterojunction solar cells were fabricated. The difference in preparing double-textured silicon wafers lies in the different formulation and control conditions of the texturing solution used for single-sided texturing. A mixed aqueous solution of KOH and Shichuang TS-53V01 texturing additive was used, with a KOH concentration of 0.2wt% and a texturing additive concentration of 0.08wt%. The mixture was immersed at 81°C for 600s for texturing, and then washed with water for 120s to obtain a single-textured silicon wafer with a pyramid structure distributed on its front side.

[0059] The base of the pyramid structure on the front side of the double-textured silicon wafer is 2.5μm in size, the texture height is 1.6μm, and the reflectivity is 10.1%; while the pyramid structure on the back side is 1μm in size, the texture height is 0.6μm, and the reflectivity is 18%.

[0060] Comparative Example 1 Double-textured silicon wafers were prepared according to the method in Example 1, and heterojunction solar cells were fabricated. The difference in preparing the double-textured silicon wafers lies in the high-temperature gettering step, where two N-type monocrystalline silicon wafers with their surface oxide layers removed were stacked and loaded into a quartz boat (i.e., loaded into the quartz boat in a double-wafer insertion manner). This involves performing a single-sided high-temperature gettering treatment on the N-type monocrystalline silicon wafers with their surface oxide layers removed, and the side subjected to gettering treatment is used as the front side. The wafers are then transported to a chain cleaning machine and cleaned for 200 seconds at room temperature in a mixed aqueous solution of HF and HCl, where the concentration of HF is 10 wt% and the concentration of HCl is 1 wt%. Afterwards, the wafers are washed with water and subjected to 6... The silicon was dried at 0℃ to obtain N-type monocrystalline silicon after the removal of the phosphosilicate glass layer. Then, the N-type monocrystalline silicon after the removal of the phosphosilicate glass layer was placed in a mixed solution of KOH and hydrogen peroxide (where the concentration of KOH was 0.4wt% and the concentration of hydrogen peroxide was 2wt%) and washed at 65℃ for 240s, then washed with water for 120s, and then placed in a texturing solution (a mixed aqueous solution of KOH and Shichuang TS-53V01 texturing additive, where the concentration of KOH was 0.3wt% and the concentration of texturing additive was 0.1wt%) and immersed at 81℃ for 480s for texturing, and then washed with water for 120s to obtain a double-textured silicon wafer.

[0061] With this manufacturing method, the reflectivity of the front and back sides is basically the same after texturing, ranging from 9.5% to 10.5%. The back side has low reflectivity, resulting in poor long-wave absorption.

[0062] Comparative Example 2 A double-textured silicon wafer was fabricated according to the method in Example 1, and a heterojunction solar cell was prepared. The difference was that the back side of the silicon wafer after double-texturing was polished to remove the pyramid shape on the back side after texturing, thereby improving the reflectivity of the back side, enhancing the passivation effect of the back side, and strengthening the absorption of long-wavelength light. However, the heterojunction solar cell prepared by the method of first texturing both sides and then polishing the back side has no texturing on the back side, resulting in a 20-25% reduction in IDE bifaciality. Furthermore, the silicon wafer obtained by this method is not conducive to the contact resistance of the low-temperature paste during the metallization process of the heterojunction cell, and the stability of the paste cannot be guaranteed, posing a significant product risk.

[0063] Before and after processing the N-type monocrystalline silicon wafers, the silicon wafers in the above examples and comparative examples were weighed, the weight loss was calculated, and the reflectivity of the back and front sides of the obtained double-textured silicon wafers was measured. The photoelectric conversion efficiency of the solar cells obtained in Examples 1-3 and Comparative Examples 1-3 was tested using the test standard GB / T6495.4, and the results are shown in Table 1.

[0064] Table 1. Performance test results of silicon wafers obtained in Examples 1-3 and Comparative Examples 1-3

[0065] The double-textured silicon wafer produced by this invention has a uniform textured back surface, resulting in lower contact resistivity and better passivation after the deposition of a microcrystalline silicon thin film. After the deposition of a conductive thin film, it exhibits a higher minority carrier lifetime, thereby further improving the photoelectric conversion efficiency of the heterojunction solar cell fabricated from it. The comparison of the above conversion efficiency results shows that the heterojunction solar cell provided by this invention exhibits superior conversion efficiency compared to existing heterojunction cells. It combines the advantages of back-side polishing by improving absorption of long wavelengths to enhance photoelectric conversion efficiency, while also compensating for the shortcomings of its process (bifaciality loss), further proving the aforementioned theory.

[0066] Although preferred embodiments of the invention have been shown and described, it is conceivable that those skilled in the art can devise various modifications to the invention within the spirit and scope of the appended claims.

Claims

1. A method for texturing both sides of a silicon wafer, comprising the following steps: (1) The N-type monocrystalline silicon wafer is sequentially cleaned, polished, has its surface oxide layer removed, and undergoes double-sided high-temperature gettering to obtain a clean N-type monocrystalline silicon wafer. (2) The clean N-type single-crystal silicon wafer is subjected to a first removal of the phosphosilicate glass layer on its front side, and then a single-sided texturing process is performed on the front side to obtain a single-textured silicon wafer. (3) The back side of the single-textured silicon wafer is subjected to a second removal of the phosphosilicate glass layer, and then double-textured to obtain a double-textured silicon wafer.

2. The double-sided flocking method according to claim 1, characterized in that, The cleaning process involves immersing the N-type monocrystalline silicon wafer in an aqueous solution containing HF, HCl, and O3, followed by rinsing in water to obtain a cleaned N-type monocrystalline silicon wafer. The concentrations of HF, HCl, and O3 are 4-8 wt%, 0.5-2 wt%, and 20-40 ppm, respectively. The polishing process involves polishing the cleaned N-type monocrystalline silicon wafer in a polishing solution, followed by rinsing in water to obtain the polished N-type monocrystalline silicon wafer. The polishing solution is a strong alkaline aqueous solution, specifically an aqueous solution of KOH and / or NaOH, with a concentration of 3-5 wt%. The polishing temperature is 65-80℃, and the polishing time is 120-180 seconds. The surface oxide layer removal process involves immersing the polished N-type monocrystalline silicon wafer in a mixed aqueous solution of HF and HCl, rinsing it in water, and then performing a first drying to obtain an N-type monocrystalline silicon wafer with the surface oxide layer removed. The concentration of HF is 5-10 wt%, the concentration of HCl is 0.5-1 wt%, and the first drying is carried out in a protective atmosphere.

3. The double-sided flocking method according to claim 1, characterized in that, The double-sided high-temperature gettering process is a high-temperature tubular gettering process, and the gettering medium used is phosphorus oxychloride.

4. The method for double-sided texturing of silicon wafers according to claim 1, characterized in that, The first process for removing the phosphosilicate glass layer involves spraying a water film onto the back of the clean N-type single crystal silicon wafer, then using a first etching solution in a chain cleaning machine to remove the phosphosilicate glass layer on the front side, followed by water washing and drying. The first etching solution is a mixed aqueous solution of HF and HCl, wherein the concentration of HF is 5-10 wt% and the concentration of HCl is 0.5-1 wt%.

5. The method for texturing a silicon wafer on both sides according to claim 1, characterized in that, Before the single-sided texturing, the N-type single crystal silicon wafer after the first removal of the phosphosilicate glass layer is cleaned in a mixed solution of KOH and hydrogen peroxide, wherein the concentration of KOH is 0.4-0.8wt% and the concentration of hydrogen peroxide is 1-2wt%, the cleaning temperature is 60-70℃ and the cleaning time is 100-250s.

6. The method for double-sided texturing of silicon wafers according to claim 1, characterized in that, The texturing solution used in the single-sided texturing is a mixed aqueous solution of KOH and texturing additives, and the concentration of KOH in the texturing solution is 0.05-0.5wt%; the temperature of the single-sided texturing is 78-88℃, and the time of the single-sided texturing is 450-600s; the reflectivity of the front side obtained by the single-sided texturing is 11-11.5%.

7. The method for texturing a silicon wafer on both sides according to claim 1, characterized in that, The second process for removing the phosphosilicate glass layer involves placing the single-textured silicon wafer in a second etching solution to remove the phosphosilicate glass layer on the back side, followed by rinsing with water. The second etching solution is a mixed aqueous solution of HF and HCl, with the concentration of HF being 2-5 wt% and the concentration of HCl being 0.2-0.5 wt%.

8. The method for texturing a silicon wafer on both sides according to claim 1, characterized in that, The texturing solution used for double-sided texturing is a mixed aqueous solution of KOH and texturing additives, and the concentration of KOH in the texturing solution is 0.05-0.2wt%; the temperature of double-sided texturing is 78-88℃, and the time of double-sided texturing is 120-240s; the front reflectance of the double-textured silicon wafer is 9-11%, and the back reflectance is 15-19%.

9. A heterojunction solar cell, characterized in that, The device comprises, from top to bottom, a front electrode, a front conductive thin film layer, a front microcrystalline silicon thin film layer, an N-type monocrystalline silicon wafer, a back microcrystalline silicon thin film layer, a back conductive thin film layer, and a back electrode, wherein the N-type monocrystalline silicon wafer is a double-textured silicon wafer obtained by the preparation method of any one of claims 1-8, wherein the front side of the double-textured silicon wafer is in contact with the front microcrystalline silicon thin film layer, and the back side of the double-textured silicon wafer is in contact with the back microcrystalline silicon thin film layer.

10. The heterojunction solar cell according to claim 9, characterized in that, The front conductive film layer and the back conductive film layer are each independently a transparent conductive oxide layer, and the thickness of the front conductive film layer and the back conductive film layer is each independently 65-85nm; The front-side microcrystalline silicon thin film layer comprises, from top to bottom, an N-type microcrystalline silicon layer and a first intrinsic microcrystalline silicon layer; the thickness of the N-type microcrystalline silicon layer is 20-25 nm, and the thickness of the first intrinsic microcrystalline silicon layer is 5-10 nm. The back microcrystalline silicon thin film layer comprises, from top to bottom, a second intrinsic microcrystalline silicon layer and a P-type microcrystalline silicon layer. The thickness of the P-type microcrystalline silicon layer is 20-30 nm, and the thickness of the second intrinsic microcrystalline silicon layer is 5-10 nm.

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