Micro-nano processing method for double-sided metasurface structure of silicon wafer

Abstract

The invention discloses a micro-nano processing method for a double-sided metasurface structure of a silicon wafer, which is characterized in that in the double-sided processing process of the silicon wafer, the micro-nano structure is protected from being damaged and the cleanliness of the surface is ensured by using uniform-thickness protective glue, blue film pasting and the like, and coarse alignment of the double-sided structure is realized by using corner side lines and direction positioning marks; concentrated sulfuric acid and hydrogen peroxide solution H2O2 which are mixed according to the proportion of about 3: 1 are used for cleaning chemical residues in the machining process, ammonium fluoride corrosive liquid with the hydrofluoric acid content of 6% is used for removing intermediate products, and therefore a good double-face super-surface structure is obtained. According to the method, the double-sided metasurface micro-nano structure is processed on the single silicon wafer, the integration level of a metasurface device is improved, the metasurface structure is protected by adopting a uniform-thickness glue protection mode, the method is matched with a previous micro-nano processing technology, new process equipment and material intervention are not needed, the protection glue is easy to clean and strip, and the production efficiency is improved. And the damage to the metasurface structure is small.

Description

Technical Field

[0001] This invention pertains to micro / nano structure fabrication methods, specifically relating to a micro / nano fabrication method for a double-sided metasurface structure on a silicon wafer. Background Technology

[0002] Metasurfaces, following metamaterials, represent a revolutionary technology for the free manipulation of electromagnetic waves on a two-dimensional plane. They stem from the need to overcome the bulky and limited functionality of traditional optical devices, and the difficulties and high losses associated with the three-dimensional fabrication of metamaterials. By carefully designing the electromagnetic responses (resonance, geometric phase, etc.) of subwavelength units and constructing spatial gradient phase distributions, metasurfaces can achieve powerful wavefront manipulation capabilities with ultrathin planar structures, and are rapidly developing thanks to advanced micro / nano fabrication and computational design methods. Their background technologies integrate optics, electromagnetics, materials science, semiconductor processing, and computational science, laying the foundation for next-generation compact, efficient, and multifunctional optoelectronic and photonic devices.

[0003] Bifacial metasurfaces have strong research and application demands due to their unique advantages. On a single substrate integrated on a monolithic scale, the front and back sides of a bifacial metasurface can be designed independently to achieve completely different or complementary optical functions. The front and back sides of a bifacial metasurface can also be designed to work synergistically, producing effects that are difficult to achieve with single-sided or stacked structures, such as asymmetric transmission / absorption and compact optical systems with multiple functions. Compared to stacking and bonding two independent metasurface chips together, monolithic bifacial designs eliminate interlayer interface reflection losses, avoid the losses of multi-layer stacking, avoid stacking alignment problems, and simplify packaging. For size-constrained applications (such as mobile phone camera modules, AR / VR glasses, and on-chip photonics), fully utilizing both sides of the substrate is a key strategy for maximizing the use of valuable space.

[0004] However, processing different metasurface structures on both sides of the same substrate (such as a silicon wafer or quartz wafer) is significantly more challenging than single-sided processing. Challenges include substrate flipping and handling, double-sided alignment / overlay accuracy, back-side alignment marking and inspection, and process compatibility. Overcoming double-sided processing technology is one of the key steps in moving metasurfaces from the laboratory to wider applications. Summary of the Invention

[0005] To address the difficulty of fabricating micro / nano metasurface structures on both sides of the same substrate in the prior art, this invention aims to propose a method for fabricating micro / nano metasurface structures on silicon wafers on both sides. During the double-sided fabrication of the silicon wafer, a uniform-thickness protective adhesive and a blue film are used to protect the micro / nano structure from damage and maintain surface cleanliness. Edge lines and orientation markings are used to achieve coarse alignment of the double-sided structure. A mixture of concentrated sulfuric acid and hydrogen peroxide (H₂O₂) in approximately a 3:1 ratio ("piranha solution") is used to clean chemical residues from the fabrication process. An ammonium fluoride etching solution with 6% hydrofluoric acid content is used to remove intermediate products, thereby obtaining a high-quality double-sided metasurface structure.

[0006] The technical solution adopted in this invention is as follows:

[0007] This invention discloses a micro / nano fabrication method for double-sided metasurface structures on silicon wafers. The metasurface structure 1 is fabricated using various micro / nano fabrication methods, with the specific fabrication steps as follows:

[0008] 1) Silicon wafer cleaving: Cleaving rectangular silicon wafers of the required size onto a substrate;

[0009] 2) Surface cleaning: Clamp the silicon wafer, clean both sides of the silicon wafer with acetone and isopropanol, and then blow dry;

[0010] 3) Apply photoresist evenly to the front side: Apply photoresist evenly to the front side of the silicon wafer and then dry it;

[0011] 4) Front UV exposure: Using UV exposure, the appropriate positioning and orientation between the silicon wafer and the mask are set to expose, develop, and harden the photoresist;

[0012] 5) Front etching: The front side of the silicon wafer is etched using an inductively coupled plasma (ICP) etching machine, and the back side is cleaned;

[0013] 6) Residue removal: First, soak the silicon wafer in a solution of concentrated sulfuric acid and hydrogen peroxide (H2O2 30%) mixed in proportion, and then soak it in ammonium fluoride etching solution to clean the residual photoresist and impurities on the back side, and then blow it dry.

[0014] 7) Backside Cleanliness Maintenance: Attach the blue film to the back of the silicon wafer to keep it clean;

[0015] 8) Apply a thick layer of photoresist as a protective agent on the side with the metasurface structure, and dry it to leave short scratch marks.

[0016] 9) Apply photoresist evenly on the back side: First, peel off the blue film on the back side, and then evenly apply photoresist on the back side.

[0017] 10) Back-side alignment UV exposure: Coarsely align the mask with the relative position of the silicon wafer with metasurface pattern on the front side (i.e., the relative position of the double-sided pattern), expose and develop the photoresist on the back side, and harden it.

[0018] 11) Backside etching: Backside etching is performed using an inductively coupled plasma (ICP) etching machine;

[0019] 12) Residue removal: First, soak the silicon wafer in a solution of concentrated sulfuric acid and hydrogen peroxide (H2O2 30%) mixed in proportion, and then soak it in ammonium fluoride etching solution to clean the residual photoresist and impurities on the back side, and then blow it dry.

[0020] As a further improvement, the mask in 4) and 10) of the present invention has a processing pattern on the mask with an outline of a rectangle smaller than the area of ​​the silicon wafer, and a directional positioning mark pattern in the upper left corner. After UV exposure on the front side in 4), the directional positioning mark pattern will appear on the photoresist surface, and after etching on the front side in 5), it will appear on the silicon wafer surface.

[0021] As a further improvement, the setting of the appropriate positioning and orientation between the silicon wafer and the mask in 4) of the present invention is specifically as follows: the relative orientation of the silicon wafer and the mask is set by making their edges parallel, the origin of the relative two-dimensional plane is set by aligning the upper left corner, and the mask is moved a certain distance towards the center so that the processing pattern on the mask is completely located within the silicon wafer area.

[0022] As a further improvement, in the exposure of the front UV exposure in 4) and the back-aligned UV exposure in 10) of the present invention, a 365nm i-line filter is added in front of the mercury lamp during exposure.

[0023] As a further improvement, the soaking in the first mixing of concentrated sulfuric acid and hydrogen peroxide solution (H2O2 30%) in 6) and 12) of the present invention is specifically as follows: the mixing ratio is about 3:1, and the soaking time is about 15 minutes.

[0024] As a further improvement, in steps 6) and 12) of the present invention, the ammonium fluoride etching solution is used for further immersion, wherein the content of hydrofluoric acid in the ammonium fluoride etching solution is 6%, and the immersion time is approximately 5 minutes.

[0025] As a further improvement, the blue film used for backside cleanliness maintenance in 7) of the present invention needs to have an area slightly larger than the area of ​​the silicon wafer, and it needs to be kept taut when pasted.

[0026] As a further improvement, the thickness of the thick photoresist in 8) of the present invention exceeds 1 micrometer.

[0027] As a further improvement, in the protective adhesive layer on the front side described in 8) of the present invention, short scratch marks are left. Before the adhesive layering, the position of the orientation positioning mark pattern on the silicon wafer is recorded. After the adhesive layering, short scratches are left on the corners of the protective adhesive orientation positioning mark pattern.

[0028] As a further improvement, the coarse alignment in 10) of the present invention is specifically as follows: based on the position of the short scratch on the protective adhesive surface, the surface is turned downwards, with the short scratch located at the upper right corner, so that one side of the processing pattern rectangle on the mask is parallel to one side of the silicon wafer. Then, the upper right corner is aligned, and the mask is moved to the center by the required distance through calculation to achieve coarse alignment of the double-sided pattern.

[0029] The beneficial effects of this invention are:

[0030] 1) This invention enables the fabrication of double-sided metasurface micro / nano structures on a single silicon wafer, which helps to improve the integration of metasurface devices.

[0031] 2) This invention uses a uniform thickness adhesive to protect the metasurface structure, which is compatible with the preceding micro-nano processing technology. No new process equipment or materials are required. Furthermore, the protective adhesive is easy to clean and peel off, and it has little destructive effect on the metasurface structure.

[0032] 3) This invention uses a uniform thickness adhesive to protect the metasurface structure, which can protect micro- and nano-structures with a height of more than 2 micrometers.

[0033] 4) The present invention uses a blue film to keep the unstructured surface clean during intermediate processing steps. This method is low in cost and easy to operate.

[0034] 5) This invention utilizes the alignment method of edge lines and directional positioning marks to achieve coarse alignment ultraviolet exposure of double-sided structures, which is simple and economical.

[0035] 6) This invention utilizes a 365nm i-line filter placed before the ultraviolet exposure mercury lamp to filter out stray light of other wavelengths, matching the single photosensitive peak of the photoresist and providing a pure light source for high-precision pattern transfer.

[0036] 7) This invention uses "piranha solution" to remove residual substances from intermediate steps, such as residual photoresist, silicone oil, protective adhesive, etc., and uses ammonium fluoride etching solution to remove the thin layer of silicon oxide formed on the silicon surface by oxidation by "piranha solution".

[0037] The proposed method for fabricating double-sided metasurface structures on silicon wafers enables the direct fabrication of double-sided metasurface arrays on a single silicon wafer. This method significantly improves the integration density of metasurface devices, avoids optical losses caused by multi-layer stacking, achieves simplified alignment, effectively simplifies the packaging process, and provides a new path for the application of metasurface devices in size-constrained scenarios. Attached Figure Description

[0038] Figure 1 This is a cross-sectional view of a single-piece double-sided metasurface structure processed using the method of this invention;

[0039] Figure 2 These are electron microscope cross-sectional images and magnified views of an example of a double-sided metasurface structure on a single silicon wafer;

[0040] Figure 3 This is a flowchart of the process for fabricating double-sided metasurface structures on silicon wafers;

[0041] In the figure: 1-metasurface structure 1, 2-metasurface structure 2, 3-silicon (Si) layer. Detailed Implementation

[0042] The present invention will be further described below with reference to the accompanying drawings and examples.

[0043] like Figure 1 This diagram illustrates a double-sided metasurface structure fabricated on a silicon wafer using the processing method proposed in this invention. It includes a silicon layer 33, and metasurface structures 11 and 22 on both sides.

[0044] The technical solution of the present invention will be further described below with reference to the accompanying drawings and specific embodiments.

[0045] The processing steps are as follows Figure 3 As shown, the steps are as follows: silicon wafer cleavage, surface cleaning, front-side photoresist homogenization, front-side UV exposure, front-side etching, residue removal, back-side cleaning and maintenance, front-side protective photoresist homogenization, back-side photoresist homogenization, back-side alignment with UV lithography, back-side etching, and residue removal.

[0046] The specific embodiments of the present invention and their implementation are as follows:

[0047] This example uses a 500µm thick commercial 4-inch double-sided polished single-crystal silicon wafer as the substrate to fabricate a double-sided moth-eye anti-reflection array. The fabrication process flowchart is shown below. Figure 3 As shown, all processing steps are carried out in a cleanroom.

[0048] Silicon wafer cleaving: Use a diamond pen to make short scratches along the vertical edge of the silicon wafer surface, then use cleaving pliers to apply shearing force to cleave the silicon wafer, centering the cleaving pliers on the scratches. Repeat the above steps until a rectangular silicon wafer of approximately 3*3cm is obtained.

[0049] Surface Cleaning: Use PTFE tweezers to grasp the corners of the silicon wafer, ensuring the gripping point is at its lowest horizontal position, with the other three corners higher than the gripping point, and the diagonally opposite corner being the highest. During cleaning, aim the nozzle of a curved-nose bottle at the highest corner and spray liquid down from there. This cleans the entire surface while avoiding transferring particles from the tweezers onto the silicon wafer. First, clean the silicon wafer surface with acetone using the method described above. Acetone dissolves non-polar organic matter such as grease. Before the acetone completely evaporates, immediately remove any remaining acetone and polar contaminants with isopropanol using the cleaning method described earlier. Isopropanol simultaneously achieves traceless dehydration and drying through the "Marangoni effect," bringing the silicon wafer surface to a cleanliness level that meets the requirements for metasurface processing. Flip your wrist and repeat the above steps to clean the back of the silicon wafer. Then place the silicon wafer on lint-free paper and use an air gun, perpendicular to the center of the wafer, to dry the surface. Flip the silicon wafer and repeat the above steps.

[0050] Front-side photoresist homogenization: AZ5214 photoresist was used. After removing the photoresist from the refrigerator, it was placed in the yellow light chamber of the cleanroom at room temperature for half an hour. The spin coater speed was set in stages: 1000 rpm for 3 seconds in the first stage, and 3500 rpm for 35 seconds in the second stage. The silicon wafer was vacuum-adsorbed onto the spin coater tray. A disposable pipette was taken, and the adsorbed silicon wafer and the inner wall of the pipette were cleaned with an air nozzle. The pipette was squeezed before being inserted into the bottle to draw up the photoresist, avoiding the introduction of air. AZ5214 photoresist covering approximately 2 / 3 of the silicon wafer surface was dropped and spin-coated. This will create a photoresist layer of approximately 1.6µm thick on the front side of the silicon wafer. Then, it was pre-baked at a set temperature of 95°C on a hot plate for 6 minutes to reduce the residual photoresist solvent to <3%, preventing solvent scattering of ultraviolet light during exposure.

[0051] Front-side UV exposure: A DUV lithography machine with a 365nm filter was used. A chromium mask was employed as the photomask, with a 2cm square pattern and orientation markers in the upper left corner. A 365nm i-line filter was placed before the mercury UV lamp, and the exposure time was set to 30 seconds at an energy density of 7mJ / cm². First, the chromium mask was positioned, using a CNC stage to align one side of the square mask with one side of the silicon wafer. The upper left corner of the wafer was then positioned as the origin, and the upper left corner of the mask was aligned with it. The mask was then moved 0.5cm to the right and downwards to the desired exposure position. The moth-eye anti-reflection metasurface pattern was then exposed. After exposure, the edge of the silicon wafer was immediately immersed in a beaker containing AZ300 developer for 30 seconds with slight shaking to develop the exposed AZ5214 photoresist. After being removed from the developer, the surface is immediately rinsed with ultrapure water for 10 seconds, then laid flat on lint-free paper and dried with an air gun. The film is then hardened at a set temperature of 95°C on a hot plate for 6 minutes to obtain a photoresist mask pattern for the moth-eye antireflective metasurface with directional positioning marks.

[0052] Front-side etching: Pattern transfer was performed using an inductively coupled plasma (ICP) etching machine. After cleaning the chamber, the Bosh process was used. The etching process parameters were set, and the silicon wafer was fixed to the etching tray with silicone oil. The silicon wafer covered with a photoresist mask was etched, transferring the moth-eye antireflective metasurface pattern with orientation markers from the photoresist layer onto silicon layer 3, resulting in a 2µm high micro / nano cylindrical array. After removing the silicon wafer, the edges were held with tweezers, avoiding contact with the pattern. Most of the residual silicone oil on the back side was wiped away with a lint-free cloth dampened with alcohol.

[0053] Residue Removal: Mix concentrated sulfuric acid and hydrogen peroxide solution (H2O2 30%) in a PTFE beaker at a ratio of 3:1 to obtain the "piranha solution". Place the silicon wafer perpendicular to the ground in a PTFE basket and immerse it in the "piranha solution" for 15 minutes to remove residual photoresist and residual silicone oil on the back side. After removing the basket from the beaker, rinse the basket and silicon wafer with ultrapure water for 20 seconds. Then immerse the basket in an ammonium fluoride etching solution with a 6% hydrofluoric acid content for 5 minutes to remove the thin layer of silicon oxide formed on the surface due to oxidation. After removing the basket from the beaker, rinse the basket and silicon wafer with ultrapure water for 20 seconds. Use tweezers to pick up the edge of the silicon wafer and rinse both sides of the silicon wafer with ultrapure water. Clean the silicon wafer with acetone and isopropanol in sequence using the cleaning method in "Cleaning Silicon Wafers". Then place it with the structural side facing up on lint-free paper and dry it with an air gun.

[0054] Maintaining a clean back side: Take a blue film slightly larger than the area of ​​the silicon wafer, stretch the blue film, and stick the unstructured back side of the silicon wafer onto it to prevent surface contamination during the coating process.

[0055] Front-side photoresist application: Before applying the photoresist, record the location of the orientation markers on the silicon wafer. On one side of the structure, AZ5214 photoresist is also used, and the application process is the same as for the "front-side photoresist application." An additional 1.6µm layer of photoresist is applied to the front side of the silicon wafer, and the hot plate temperature is adjusted to 95°C. The photoresist is then dried for 6 minutes. Short scratches are made at the corners near the orientation markers using a diamond pen. AZ5214 photoresist is used here as the photoresist due to its excellent thermal stability, low stress, precise removal capability, and good surface roughness after removal.

[0056] Backside photoresist uniform coating: Peel off the blue film on the back side and apply photoresist uniformly on the back side using the same process as "frontside photoresist uniform coating".

[0057] Back-side UV exposure alignment: Using the same process as "front-side UV exposure," but during positioning, based on the location of the short scratch on the front side, place the silicon wafer face down with the short scratch located at the upper right corner on the exposure tray. Position the chromium mask by using a CNC stage to align one side of the mask square with one side of the silicon wafer. Then, using the upper right corner of the silicon wafer as the origin, align the upper right corner of the mask square with it. Move the mask 0.5cm to the left and down to the exposure position. At this point, the front pattern area and the back pattern area to be exposed are basically overlapped. Because both sides of the pattern are anti-reflection structures, this alignment method is convenient and meets the requirements for low-precision alignment. Repeat the same process as "front-side UV exposure" for exposure, development, and hardening to obtain a moth-eye anti-reflection metasurface photoresist mask on the back side.

[0058] Backside etching: Using the same process as "frontside etching", the moth-eye anti-reflective metasurface pattern on the backside is transferred from the photoresist layer to silicon layer 3.

[0059] Residue Removal: Using the same process as the first "residue removal," remove residual photoresist on the back side and protective adhesive and residual silicone oil on the front side to obtain a double-sided moth-eye anti-reflective metasurface structure. While drying with an air nozzle, hold one corner with tweezers and place the opposite corner against lint-free paper. Finally, place it in a 1-inch recessed wafer case to avoid contact with the structures on both sides.

[0060] from Figure 2 Based on the processing results, the double-sided moth-eye antireflective metasurface of silicon wafers processed according to the present invention can still ensure the integrity of the double-sided structure when the micro-nano pillar structure is high (1.6µm). (The gourd-shaped sidewalls are a unique feature formed by the Bosh process during etching.) It has the potential for practical application.

[0061] The above embodiments are used to explain and illustrate the present invention, but not to limit the present invention. Any modifications and changes made to the present invention within the spirit and scope of the claims shall fall within the protection scope of the present invention.

Claims

1. A method for fabricating micro / nano structures on double-sided metasurfaces of silicon wafers, characterized in that, Metasurface structures 1 (1) and 2 (2) were prepared using various micro / nano fabrication methods. The specific preparation steps are as follows: 1) Silicon wafer cleaving: Cleaving rectangular silicon wafers of the required size onto a substrate; 2) Surface cleaning: Clamp the silicon wafer, clean both sides of the silicon wafer with acetone and isopropanol, and then blow dry; 3) Apply photoresist evenly to the front side: Apply photoresist evenly to the front side of the silicon wafer and then dry it; 4) Front UV exposure: Using UV exposure, the appropriate positioning and orientation between the silicon wafer and the mask are set to expose, develop, and harden the photoresist; 5) Front etching: The front side of the silicon wafer is etched using an inductively coupled plasma (ICP) etching machine, and the back side is cleaned; 6) Residue removal: First, soak the silicon wafer in a solution of concentrated sulfuric acid and hydrogen peroxide (H2O2 30%) mixed in proportion, and then soak it in ammonium fluoride etching solution to clean the residual photoresist and impurities on the back side, and then blow it dry. 7) Backside Cleanliness Maintenance: Attach the blue film to the back of the silicon wafer to keep it clean; 8) Apply a thick layer of photoresist as a protective agent on the side with the metasurface structure, and dry it to leave short scratch marks. 9) Apply photoresist evenly on the back side: First, peel off the blue film on the back side, and then evenly apply photoresist on the back side. 10) Back-side alignment UV exposure: Coarsely align the mask with the relative position of the silicon wafer with metasurface pattern on the front side (i.e., the relative position of the double-sided pattern), expose and develop the photoresist on the back side, and harden it. 11) Backside etching: Backside etching is performed using an inductively coupled plasma (ICP) etching machine; 12) Residue removal: First, soak the silicon wafer in a solution of concentrated sulfuric acid and hydrogen peroxide (H2O2 30%) mixed in proportion, and then soak it in ammonium fluoride etching solution to clean the residual photoresist and impurities on the back side, and then blow it dry.

2. The method for micro / nano fabrication of double-sided metasurface structures on silicon wafers according to claim 1, characterized in that, The mask in 4) and 10) has a processing pattern on it that is a rectangle with an outline smaller than the area of ​​the silicon wafer. It has a directional positioning mark pattern in the upper left corner. After UV exposure on the front side in 4), the directional positioning mark pattern will appear on the photoresist surface. After etching on the front side in 5), it will appear on the silicon wafer surface.

3. The method for micro / nano fabrication of double-sided metasurface structures on silicon wafers according to claim 2, characterized in that, The specific steps for setting the appropriate positioning and orientation between the silicon wafer and the mask in step 4) are as follows: the relative orientation of the silicon wafer and the mask is set by making their edges parallel, the origin of the relative two-dimensional plane is set by aligning the upper left corner, and the mask is moved a certain distance towards the center so that the processing pattern on the mask is completely located within the silicon wafer area.

4. The method for micro / nano fabrication of double-sided metasurface structures on silicon wafers according to claim 1, 2, or 3, characterized in that, In the exposures described in 4) for frontal ultraviolet exposure and 10) for back-side ultraviolet exposure, a 365nm i-line filter was added in front of the mercury lamp during the exposure.

5. The method for micro / nano fabrication of double-sided metasurface structures on silicon wafers according to claim 4, characterized in that, The soaking process described in 6) and 12) involves mixing concentrated sulfuric acid and hydrogen peroxide solution (H2O2 30%) in a specific ratio of approximately 3:1 and soaking for approximately 15 minutes.

6. The method for micro / nano fabrication of double-sided metasurface structures on silicon wafers according to claim 5, characterized in that, In steps 6) and 12), the water is soaked again in ammonium fluoride etching solution, the content of hydrofluoric acid in the ammonium fluoride etching solution is 6%, and the soaking time is about 5 minutes.

7. The method for fabricating micro / nano structures of double-sided metasurface structures on silicon wafers according to claim 1, 2, 3, 5, or 6, characterized in that, The blue film used for backside cleanliness maintenance in step 7) needs to have an area slightly larger than the silicon wafer area, and it needs to be kept taut when pasted.

8. The method for micro / nano fabrication of double-sided metasurface structures on silicon wafers according to claim 7, characterized in that, The thickness of the photoresist in 8) exceeds 1 micrometer.

9. The method for micro / nano fabrication of double-sided metasurface structures on silicon wafers according to claim 8, characterized in that, In step 8), short scratch marks are left in the protective adhesive on the front side. Before applying the adhesive, the position of the orientation positioning mark pattern on the silicon wafer is recorded. After applying the adhesive, short scratches are left at the corners of the protective adhesive orientation positioning mark pattern.

10. The method for fabricating micro / nano structures of double-sided metasurface structures on silicon wafers according to any one of claims 1, 2, 3, 5, 6, 8, or 9, characterized in that, The coarse alignment in 10) specifically involves: based on the position of the short scratch on the protective adhesive surface, turning the surface downwards with the short scratch located at the upper right corner, so that one side of the processing pattern rectangle on the mask is parallel to one side of the silicon wafer, then aligning it by the upper right corner, and then calculating and moving the mask towards the center by the required distance to achieve coarse alignment of the double-sided pattern.

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