Circuit board assembly and manufacturing method thereof

Abstract

The invention provides a circuit board assembly and a manufacturing method thereof. According to the circuit board assembly and the manufacturing method thereof, the first electronic device is installed in the groove of the substrate, the conductor and the conductive paste are arranged on the side wall of the groove, and the first connecting part and the second connecting part are arranged on the first electronic device and the second electronic device respectively; through the connection among the conductor, the conductive paste, the first connecting part and the second connecting part, the interconnection among the first electronic device, the second electronic device and the substrate can be realized, so that a circuit for connecting the electronic devices on the substrate can be omitted, the size of the substrate can be reduced, the internal wiring of the space can be reduced, and the cost can be saved; and the signal transmission speed and performance can be improved, the reliability and stability of connection between the substrate and the electronic device can be enhanced, and the space interference problem of the substrate is reduced.

Description

Technical Field

[0001] This application relates to the field of circuit board technology, and in particular to a circuit board assembly and its manufacturing method. Background Technology

[0002] With the development of electronic technology, circuit boards are also evolving towards being thinner and smaller. However, existing circuit boards still have drawbacks when connected to electronic devices, such as large size, susceptibility to signal transmission, and complex internal wiring that is prone to short circuits. Summary of the Invention

[0003] In view of this, this application proposes a circuit board assembly and a method for manufacturing the same, in order to solve at least one of the above problems.

[0004] A method for manufacturing a circuit board assembly includes the following steps: providing a substrate, the substrate comprising multiple dielectric layers and multiple circuit layers, wherein a dielectric layer is disposed between two adjacent circuit layers, and an inner circuit layer includes pads; the substrate has a first slot and a second slot, the first slot and the second slot penetrating the dielectric layer and the circuit layer, the first slot and the second slot being filled with a conductor, the conductor connecting the pads; removing the structure between the conductors to form a third slot on the substrate, the pads being exposed from the third slot; disposing a solder resist layer between the pads, then disposing an adhesive layer on the solder resist layer, and then disposing an adhesive layer on the solder pads. Solder balls are placed on the pad; a first electronic device is installed in the third slot, the first electronic device having a first connecting portion covering the surface of the first electronic device facing the conductor and the surface of the first electronic device away from the pad; conductive paste is applied between the conductor and the first connecting portion, the conductive paste also covering the surface of the first connecting portion away from the pad; a second electronic device is installed on the conductive paste, the second electronic device having a second connecting portion covering at least the surface of the second electronic device facing the conductive paste; an injection molding layer is provided, the injection molding layer covering the second electronic device and the first electronic device.

[0005] In one embodiment, prior to the step of "applying conductive paste between the conductor and the first connection portion", the manufacturing method further includes: applying potting compound in the third groove, the potting compound comprising a first portion and a second portion, the first portion being located between the conductor and the first connection portion and on the solder pad, the second portion being covered by the first connection portion and in contact with the solder resist layer and the adhesive layer on the solder resist layer.

[0006] In one embodiment, the step of "applying conductive paste between the conductor and the first connection portion" further includes: removing the first portion to form a blind hole, and applying the conductive paste within the blind hole.

[0007] In one embodiment, the method for manufacturing the substrate includes the following steps: fabricating a copper-clad laminate to form a first circuit board, the first circuit board including a dielectric layer and circuit layers formed on opposite surfaces of the dielectric layer; laminating a plurality of second circuit boards on at least one side of the first circuit board, the second circuit boards including a dielectric layer and circuit layers formed on the surface of the dielectric layer, the circuit layers of the outermost second circuit board including pads; laminating a plurality of third circuit boards and a copper-clad laminate on the surface of the outermost second circuit layer opposite to the first circuit board; forming a first slot and a second slot on the third circuit boards and the copper-clad laminate, the first slot and the second slot exposing the pads; filling the first slot and the second slot with a conductor, and fabricating the copper-clad laminate to form a fourth circuit board.

[0008] In one embodiment, prior to the step of "pressing a plurality of third circuit boards and copper-clad laminates onto the surface of the outermost second circuit board away from the first circuit board", the method for manufacturing the substrate further includes: pressing a release film onto the surface of the outermost second circuit board, the release film covering the circuit layer of the outermost second circuit board; removing a portion of the release film, the remaining release film covering the pads and the dielectric layer exposed from the pads.

[0009] A circuit board assembly includes a substrate, a first electronic device, a second electronic device, and an injection molding layer. The substrate includes multiple dielectric layers and multiple circuit layers, with a dielectric layer between adjacent circuit layers. Each inner circuit layer includes solder pads. The substrate has a recess that penetrates a portion of the dielectric and circuit layers and exposes the solder pads. A conductor is provided on the sidewall of the recess, and the conductor connects to a portion of the solder pads. A solder resist layer is provided between the solder pads, and an adhesive layer is provided on the solder resist layer. Solder balls are provided on the solder pads.

[0010] The first electronic device is mounted within the groove and electrically connected to the pad via the solder ball. The first electronic device has a first connection portion covering the surface of the first electronic device facing the conductor and the surface of the first electronic device facing away from the pad. Conductive paste is applied between the conductor and the first connection portion, and the conductive paste also covers the surface of the first connection portion facing away from the pad.

[0011] The second electronic device is mounted on the surface of the conductive paste facing away from the first electronic device. The second electronic device has a second connecting portion that at least covers the surface of the second electronic device facing the conductive paste. The injection molding layer covers both the second electronic device and the first electronic device.

[0012] In one embodiment, the groove is further provided with potting compound, which is located between the conductive paste and the solder resist layer and is covered by the first connecting portion.

[0013] In one embodiment, the conductor comprises copper, the first connection portion comprises copper, and the second connection portion comprises copper.

[0014] In one embodiment, the injection-molded layer comprises epoxy resin.

[0015] In one embodiment, the first electronic device includes a chip, and the second electronic device includes a chip.

[0016] The circuit board assembly and its manufacturing method disclosed in this application, by mounting a first electronic device in a groove in a substrate, and providing a conductor and conductive paste on the sidewall of the groove, and providing a first connection part and a second connection part on the first electronic device and the second electronic device respectively, interconnection between the first electronic device, the second electronic device, and the substrate can be achieved through the connection between the conductor, the conductive paste, the first connection part, and the second connection part. Therefore, the wiring on the substrate used to connect the electronic device can be omitted, thereby reducing the size of the substrate (circuit board), reducing internal wiring, saving costs, improving signal transmission speed and performance, enhancing the reliability and stability of the connection between the substrate and the electronic device, and reducing spatial interference problems of the substrate. Attached Figure Description

[0017] Figures 1A to 1F This is a cross-sectional view of the substrate fabrication provided in one embodiment of this application.

[0018] Figure 2 In order to be in Figure 1F The cross-sectional view shown shows a third slot formed on the substrate.

[0019] Figure 3 In order to be in Figure 2 The diagram shows a cross-sectional view of a substrate with a solder resist layer, an adhesive layer, and solder balls.

[0020] Figure 4 In order to be in Figure 3 A cross-sectional view of the structure shown, in which the first electronic device is installed within the third slot.

[0021] Figure 5 In order to be in Figure 4 A cross-sectional view of the structure shown, in which potting compound is placed in the third slot.

[0022] Figure 6 To be Figure 5 A cross-sectional view showing the removal of the potting compound portion of the structure to form blind vias.

[0023] Figure 7 In order to be in Figure 6 The diagram shows a cross-sectional view of a structure with conductive paste applied.

[0024] Figure 8 In order to be in Figure 7 The structure shown is a cross-sectional view during the setting of the second electron.

[0025] Figure 9 In order to be in Figure 8 A cross-sectional view of a circuit board assembly with an injection-molded layer on the structure shown in one embodiment.

[0026] Explanation of main component symbols

[0027] Circuit board assembly 100

[0028] Substrate 10

[0029] First circuit board 11

[0030] Dielectric layers 12, 16, 181, 191

[0031] Line layers 13, 17, 182, 192

[0032] Conductive hole 14

[0033] Second circuit board 15

[0034] Third circuit board 18

[0035] Fourth circuit board 19

[0036] Copper Clad Laminate 19a

[0037] Copper foil layer 192a

[0038] Pad 171

[0039] Release film 20

[0040] First slotting 201

[0041] Second slot 202

[0042] Third slot 203

[0043] Groove 204

[0044] Conductor 30

[0045] Solder resist layer 40

[0046] Adhesive layer 50

[0047] Tin ball 60

[0048] First Electronic Device 70

[0049] First connecting part 71

[0050] First Division 711

[0051] Second Division 712

[0052] Pin 72

[0053] Encapsulant 73

[0054] Part 1 731

[0055] Part Two 732

[0056] Blind Hole 733

[0057] Conductive paste 80

[0058] Second electronic device 90

[0059] Second connecting part 91

[0060] Injection layer 92

[0061] The following detailed description, in conjunction with the accompanying drawings, further illustrates the embodiments of this application. Detailed Implementation

[0062] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which the embodiments of this application pertain. The terminology used herein is for the purpose of describing particular implementations only and is not intended to limit the embodiments of this application. Where specific conditions are not specified in the embodiments, conventional conditions or conditions recommended by the manufacturer shall apply. Reagents or instruments whose manufacturers are not specified are all conventional products that can be purchased commercially.

[0063] It should be noted that all directional indicators (such as up, down, left, right, front, back, etc.) in the embodiments of this application are only used to explain the relative positional relationship and movement of each component in a certain specific posture (as shown in the figure). If the specific posture changes, the directional indicator will also change accordingly.

[0064] It will be understood that when a layer is referred to as "on" another layer, it can be directly on that other layer or there may be an intermediate layer in between. Conversely, when a layer is referred to as "directly on" another layer, there is no intermediate layer. When a component is referred to as "attached to," "mounted to," "set on," or "connected to" another component, it can be directly on that other component or there may be an intervening component. The term "and / or" as used herein includes all and any combination of one or more of the associated listed items.

[0065] Embodiments of this application are described herein with reference to cross-sectional views, which are schematic diagrams of idealized embodiments (and intermediate configurations) of this application. Therefore, variations in the shapes illustrated due to manufacturing processes and / or tolerances are foreseeable. Consequently, embodiments of this application should not be construed as limited to the specific shapes of the areas illustrated herein, but should include, for example, deviations in shape due to manufacturing processes. The areas shown in the figures are merely illustrative, and their shapes are not intended to represent the actual shapes of the illustrated devices, nor are they intended to limit the scope of this application.

[0066] The following detailed description of some embodiments of this application is provided in conjunction with the accompanying drawings. Unless otherwise specified, the following embodiments and features can be combined with each other.

[0067] Please see Figures 1A to 9 The first aspect of this application provides a method for manufacturing a circuit board assembly 100, which includes the following steps.

[0068] Step S10, please refer to Figures 1A to 1F A substrate 10 is provided. The substrate 10 can be manufactured through steps S11 to S17.

[0069] like Figure 1A As shown, in step S11, a copper-clad laminate (not shown) is fabricated to form a first circuit board 11. The copper-clad laminate may include a dielectric layer 12 and a copper foil layer (not shown) located on the surface of the dielectric layer 12. In this embodiment, the copper foil layer is located on opposite surfaces of the dielectric layer 12. The copper foil layer can be fabricated to form a circuit layer 13 using processes such as image transfer and etching. Figure 1A As shown, the first circuit board 11 includes a dielectric layer 12 and circuit layers 13 formed on opposite surfaces of the dielectric layer 12. The two circuit layers 13 can be electrically connected through conductive holes 14.

[0070] In some embodiments, the dielectric layer 12 may be made of, but is not limited to, polyimide (PI), polyethylene terephthalate (PET), polyethylene naphthalate dimethyl acid glycol ester (PEN), polydimethylsiloxane (PDMS), liquid crystal polymer (LCP), modified polyimide (MPI), etc.

[0071] like Figure 1B As shown, in step S12, a plurality of second circuit boards 15 are laminated onto at least one side of the first circuit board 11. In this embodiment, two second circuit boards 15 are laminated onto both the upper and lower sides of the first circuit board 11. In other embodiments, the number of second circuit boards 15 can be adjusted, or a plurality of second circuit boards 15 can be laminated only on the upper or lower side of the first circuit board 11. Each second circuit board 15 includes a dielectric layer 16 and a circuit layer 17 formed on one surface of the dielectric layer 16, with one dielectric layer 16 located between the circuit layer 17 and the circuit layer 13. Adjacent circuit layers (e.g., circuit layer 17 and circuit layer 13, circuit layer 17 and circuit layer 17) can be electrically connected through conductive vias 14. The circuit layer 17 of the outermost second circuit board 15 includes pads 171, and the number of pads 171 can be multiple.

[0072] like Figure 1C As shown, in step S13, a release film 20 is pressed onto the outermost surface of the second circuit board 15, away from the first circuit board 11. The release film 20 covers the outermost circuit layer 17 and the dielectric layer 16 exposed from the circuit layer 17. Figure 1C As shown, the release film 20 is pressed onto the surface of the outermost second circuit board 15 on the upper side of the first circuit board 11, while the release film 20 may not be pressed onto the surface of the outermost second circuit board 15 on the lower side.

[0073] like Figure 1D As shown, in step S14, a portion of the release film 20 is removed, leaving the remaining release film 20 covering the pad 171 and the dielectric layer 16 exposed from the pad 171. In the subsequent capping (grooving) step, the release film 20 protects the pad 171 from impact, and after the capping step is completed, the release film 20 can be easily peeled off.

[0074] like Figure 1EAs shown, in step S15, a plurality of third circuit boards 18 and copper-clad laminates 19a are laminated on the outermost circuit layer 17 facing away from the first circuit board 11. Each third circuit board 18 includes a dielectric layer 181 and a circuit layer 182 located on one surface of the dielectric layer 181. Adjacent circuit layers 182 are electrically conductive, and a dielectric layer 181 is located between the circuit layers 182 and the circuit layer 17 (release film 20). The copper-clad laminate 19a is located on the side of the third circuit board 18 facing away from the second circuit board 15, and includes a dielectric layer 191 and a copper foil layer 192a located on one surface of the dielectric layer 191. The copper foil layer 192a is located on the outermost side.

[0075] In some embodiments, such as Figure 1E As shown, the surface of the outermost second circuit layer 17 on the lower side can also be laminated with several third circuit boards 18. In other embodiments, the lower side may not be laminated with third circuit boards 18.

[0076] like Figure 1F As shown in S16, a first slot 201 and a second slot 202 can be formed on the third circuit board 18 and the copper-clad laminate 19a by means of laser (but not limited to laser). The first slot 201 and the second slot 202 are along the extension direction of the third circuit board 18 (that is, the extension direction of the copper-clad laminate 19a). Figure 1F The pads are spaced in the horizontal direction (which can be either the length or width of the third circuit board 18) and expose part of the surface of the outer pads 121 (the middle pads 121 are still covered).

[0077] like Figure 1F As shown, in step S17, conductors 30 are filled into the first slot 201 and the second slot 202, and copper-clad laminate 19a is fabricated to form a fourth circuit board 19, thus obtaining substrate 10.

[0078] Conductor 30 can be filled in the first slot 201 and the second slot 202 by means of electroplating, but not limited to electroplating, and conductor 30 is connected to the outer pad 121. It is understood that during electroplating, a layer of conductor 30 is also plated on the surface of copper foil layer 192a away from dielectric layer 191. Conductor 30 can be, but is not limited to, copper. Copper foil layer 192a and the conductor 30 on its surface can be fabricated to form circuit layer 192 by processes such as image transfer and etching, thereby fabricating copper-clad laminate 19a to form fourth circuit board 19. In the outermost fourth circuit board 19, the dielectric layer 191 is close to the surface of the outermost circuit layer 192 and can be flush with the surface of conductor 30 away from pad 171.

[0079] like Figure 1FAs shown, the substrate 10 includes multiple dielectric layers (12, 16, 181, 191) and multiple circuit layers (13, 17, 182, 192). A dielectric layer is disposed between two adjacent circuit layers, and the inner circuit layer 17 includes pads 171. The substrate 10 has a first slot 201 and a second slot 202, which penetrate a portion of the dielectric layer (181, 191) and a portion of the circuit layer (182, 192). The first slot 201 and the second slot 202 are filled with a conductor 30, which connects to the outermost pad 171. A release film 20 is also disposed on the surface of the pad 171 facing away from the dielectric layer 16, covering the pad 171 not covered by the conductor 30 and the dielectric layer 16 exposed in the pad 171.

[0080] In some embodiments, the dielectric layers (16, 181, 191) may be, but are not limited to, PI, PET, PEN, PDMS, LCP, MPI, etc. The materials of the dielectric layers (12, 16, 181, 191) may be the same or different, and this application does not impose any restrictions.

[0081] For step S20, please refer to... Figure 2 The structure between the conductors 30 can be removed by means of laser, but not limited to laser, thereby forming a third slot 203 on the substrate 10. Understandably, after laser treatment, the release film 20 can be peeled off, and the pads 171 (pads 171 not covered by the conductors 30) are exposed from the third slot 203.

[0082] For step S30, please refer to... Figure 3 A solder resist layer 40 is provided between the solder pads 171, an adhesive layer 50 is provided on the solder resist layer 40, and solder balls 60 are provided on the solder pads 171.

[0083] The solder mask 40 covers the dielectric layer 16 exposed from the pads 171 and fills the gaps between the pads 171. The surface of the solder mask 40 facing away from the dielectric layer 16 may be higher than the surface of the pads 171 facing away from the dielectric layer. The solder mask 40 may also be disposed on the surface of the outermost circuit layer 192. This is followed by the subsequent mounting of the first electronic device 70 (see...). Figure 4 In the step of connecting it to the substrate 10, the solder resist layer 40 can block the molten solder balls from flowing to the circuit contact to prevent short circuit.

[0084] The adhesive layer 50 can fill the gap between the solder resist layer 40 and the first electronic device 70, so that the first electronic device 70 and the solder resist layer 40 are tightly bonded together, preventing the encapsulation material from being poured in the subsequent potting step (see...). Figure 5 The adhesive layer 50 can be formed from conventional or unconventional insulating adhesives in the art, and this application does not impose any limitations on it.

[0085] Solder balls 60 can be placed on the surface of pad 171 away from dielectric layer 16 by means of, but not limited to, screen printing, and their diameter can be 80 micrometers or more.

[0086] It is understandable that the solder resist layer 40 can be set first, then the solder balls 60, and finally the adhesive layer 50; or the solder resist layer 40 can be set first, then the adhesive layer 50, and finally the solder balls 60; or the solder balls 60 can be set first, then the solder resist layer 40, and finally the adhesive layer 50.

[0087] For step S40, please refer to... Figure 4 A first electronic device 70 is installed in the third slot 203. The first electronic device 70 may be, but is not limited to, a chip. The first electronic device 70 is provided with a first connecting portion 71. In this embodiment, two first connecting portions 71 may be symmetrically arranged on the first electronic device 70. The first connecting portions 71 may be, but are not limited to, copper. The first connecting portion 71 may include a first portion 711 and a second portion 712 that are connected. The first portion 711 and the second portion 712 may be approximately perpendicular, and the cross-section of the first connecting portion 71 may be "L"-shaped. The first portion 711 covers the surface of the first electronic device 70 facing the conductor 30 (i.e.,...). Figure 4 The second portion 712 covers the side surface of the first electronic device 70 away from the pad 171 (i.e., the side surface of the first electronic device 70). Figure 4 (Top surface of the first electronic device 70).

[0088] In some embodiments, such as Figure 4 As shown, the first electronic device 70 includes pins 72. Solder balls 60 are melted using a reflow soldering process. The molten solder balls 60 connect the pins 72 to the pads 171, thereby achieving electrical connection between the first electronic device 70 and the substrate 10. It is understood that after solidification, the molten solder balls 60 may no longer be spherical; their upper and lower surfaces may become planar.

[0089] For step S50, please refer to... Figure 5 A potting compound 73 is provided in the third slot 203 to fill the gap between the conductor 30 and the first electronic device 70. The potting compound 73 includes a first portion 731 and a second portion 732. The first portion 731 is located between the conductor 30 and the first portion 711 of the first connection 71, and is located on the pad 171. Along the thickness direction of the substrate 10, the second portion 732 is covered by the first portion 711 of the first connection 71, and the second portion 732 is in contact with the solder resist layer 40 and the adhesive layer 50 thereon.

[0090] The potting compound 73 fills the gap between the first electronic device 70 and the third slot 203, which can improve the stability of the first electronic device 70. In addition, the potting compound 73 has excellent electrical insulation properties, which can effectively prevent short circuits and leakage between circuits and ensure the safe use of the first electronic device 70.

[0091] In some embodiments, the potting compound 73 may be made of, but is not limited to, epoxy resin.

[0092] For step S60, please refer to... Figure 6 Remove the first part 731 to form a blind hole 733.

[0093] For step S70, please refer to... Figure 7 Conductive paste 80 is applied inside the blind via 733. In addition to filling the blind via 733 (that is, located between the conductor 30 and the first connection portion 71), the conductive paste 80 also covers the surface of the first portion 711 of the first connection portion 71 that faces away from the pad 171.

[0094] For step S80, please refer to... Figure 8 A second electronic device 90 is mounted on the conductive paste 80. The second electronic device 90 has a second connecting portion 91, which at least covers the surface of the second electronic device 90 facing the conductive paste 80 (i.e., the surface facing the first electronic device 70). In this embodiment, the second connecting portion 91 also covers the side surface of the second electronic device 90. The second connecting portion 91 may be, but is not limited to, copper.

[0095] Electrical connection between the second electronic device 90 and the first electronic device 70 is achieved by connecting the second connecting part 91 to the conductive paste 80, and the conductive paste 80 to the first connecting part 71. The second connecting part 91 is connected to the conductor 30 via the conductive paste 80, and then to the pad 171, thereby achieving electrical connection between the second electronic device 90 and the substrate 10. The first electronic device 70 is connected to the conductive paste 80 via the first connecting part 71, and then to the conductor 30 and the pad 171, thereby achieving electrical connection between the first electronic device 70 and the substrate 10. Alternatively, electrical connection between the first electronic device 70 and the substrate 10 can also be achieved through the connection between the solder ball 60 and the pad 171.

[0096] For step S90, please refer to... Figure 9 A molding layer 92 is formed to obtain a circuit board assembly 100. The molding layer 92 covers the second electronic device 90 and the first electronic device 70. The material of the molding layer 92 may be, but is not limited to, epoxy resin, nylon (PA), liquid crystal polymer (LCP), polypropylene (PP), etc.

[0097] Please continue reading. Figure 9The second aspect of this application provides a circuit board assembly 100 manufactured by the above method, which includes a substrate 10, a first electronic device 70, a second electronic device 90, and an injection molding layer 92.

[0098] The substrate 10 includes multiple dielectric layers (12, 16, 181, 191) and multiple circuit layers (13, 17, 182, 192). A dielectric layer is disposed between two adjacent circuit layers, and the inner circuit layer 17 includes pads 171. The substrate 10 has a groove 204 (that is, a groove formed by the connection of the first groove 201, the second groove 202, and the third groove 203). The groove 204 penetrates a portion of the dielectric layer (181, 191) and a portion of the circuit layer (182, 192), exposing the pads 171. A conductor 30 is provided on the sidewall of the groove 204, and the conductor 30 connects to the outermost pads 171. The conductor 30 may be, but is not limited to, copper. A solder resist layer 40 is provided between the solder pads 171, an adhesive layer 50 is provided on the solder resist layer 40 (the surface facing away from the dielectric layer 16), and solder balls 60 are provided on the solder pads 171 (the surface facing away from the dielectric layer 16).

[0099] A first electronic device 70 is mounted within a recess 204 and electrically connected to a pad 171 via solder balls 60. The first electronic device 70 has a first connection portion 71, which covers the surface of the first electronic device 70 facing the conductor 30 and the surface of the first electronic device 70 facing away from the pad 171. Conductive paste 80 is provided between the conductor 30 and the first connection portion 71, and the conductive paste 80 also covers the surface of the first connection portion 71 facing away from the pad 171. The first electronic device 70 may be, but is not limited to, a chip, and the first connection portion 71 may be, but is not limited to, copper.

[0100] A second electronic device 90 is mounted on the surface of the conductive paste 80 facing away from the first electronic device 70. The second electronic device 90 has a second connection portion 91, which at least covers the surface of the second electronic device 90 facing the conductive paste 80. The second electronic device 90 may be, but is not limited to, a chip, and the second connection portion 91 may be, but is not limited to, copper.

[0101] The injection molding layer 92 covers the second electronic device 90 and the first electronic device 70. The injection molding layer 90 may be, but is not limited to, epoxy resin, PA, LCP, PP, etc.

[0102] In some embodiments, such as Figure 9 As shown, a potting compound 73 (732) is also provided in the groove 204. The potting compound 73 (732) is located between the conductive paste 80 and the solder resist layer 40 and is covered by the first connecting part 71.

[0103] The circuit board assembly 100 and its manufacturing method provided in this application embodiment, by installing a first electronic device 70 in a groove 204 of a substrate 10, and providing a conductor 30 and conductive paste 80 on the sidewall of the groove 204, and providing a first connecting portion 71 and a second connecting portion 91 on the first electronic device 70 and the second electronic device 90 respectively, can achieve interconnection between the first electronic device 70, the second electronic device 90 and the substrate 10 through the connection between the conductor 30, the conductive paste 80, the first connecting portion 71 and the second connecting portion 91. Therefore, the lines on the substrate 10 used to connect the electronic devices can be omitted, thereby reducing the size of the substrate 10 (circuit board), reducing internal wiring, saving costs, improving signal transmission speed and performance, enhancing the reliability and stability of the connection between the substrate 10 and the electronic devices, and reducing spatial interference problems of the substrate 10.

[0104] The above description describes some specific embodiments of this application, but in actual applications, the application should not be limited to these embodiments. For those skilled in the art, other modifications and alterations made based on the technical concept of this application should fall within the protection scope of this application.

Claims

1. A method for manufacturing a circuit board assembly, characterized in that, Includes the following steps: A substrate is provided, the substrate comprising multiple dielectric layers and multiple circuit layers, a dielectric layer being disposed between two adjacent circuit layers, and an inner circuit layer including pads; the substrate has a first slot and a second slot, the first slot and the second slot penetrating the dielectric layer and the circuit layer, the first slot and the second slot being filled with a conductor, and the conductor connecting the pads of the portion. The structure between the conductors is removed to form a third slot on the substrate, from which the pads are exposed; A solder resist layer is provided between the solder pads, an adhesive layer is provided on the solder resist layer, and solder balls are provided on the solder pads; A first electronic device is installed in the third slot. The first electronic device is provided with a first connection portion, which covers the surface of the first electronic device facing the conductor and the surface of the first electronic device away from the pad. A conductive paste is disposed between the conductor and the first connection portion, and the conductive paste also covers the surface of the first connection portion facing away from the pad. A second electronic device is mounted on the conductive paste. The second electronic device has a second connection portion, which at least covers the surface of the second electronic device facing the conductive paste. An injection molding layer is provided, which covers the second electronic device and the first electronic device.

2. The manufacturing method as described in claim 1, characterized in that, Before the step of "applying conductive paste between the conductor and the first connection portion", the manufacturing method further includes: applying potting compound in the third groove, the potting compound comprising a first part and a second part, the first part being located between the conductor and the first connection portion and on the solder pad, the second part being covered by the first connection portion and in contact with the solder resist layer and the adhesive layer on the solder resist layer.

3. The manufacturing method as described in claim 2, characterized in that, The step of "applying conductive paste between the conductor and the first connecting portion" further includes: removing the first portion to form a blind hole, and applying the conductive paste within the blind hole.

4. The manufacturing method as described in claim 1, characterized in that, The method for manufacturing the substrate includes the following steps: A copper-clad laminate is used to form a first circuit board, the first circuit board including a dielectric layer and circuit layers formed on two opposite surfaces of the dielectric layer; A plurality of second circuit boards are laminated on at least one side of the first circuit board. The second circuit boards include a dielectric layer and a circuit layer formed on the surface of the dielectric layer. The circuit layer of the outermost second circuit board includes pads. Several third circuit boards and copper-clad boards are laminated onto the outermost second circuit layer on the surface opposite to the first circuit board. A first slot and a second slot are formed on the third circuit board and the copper-clad board, and the first slot and the second slot expose the pads; Conductors are filled into the first and second slots, and the copper-clad laminate is fabricated to form a fourth circuit board.

5. The manufacturing method as described in claim 4, characterized in that, Before the step of "pressing a plurality of third circuit boards and copper-clad laminates onto the surface of the outermost second circuit board facing away from the first circuit board", the method for manufacturing the substrate further includes: A release film is pressed onto the surface of the outermost second circuit board, and the release film covers the circuit layer of the outermost second circuit board; Remove a portion of the release film, leaving the remaining release film covering the pads and the dielectric layer exposed from the pads.

6. A circuit board assembly, characterized in that, include: A substrate includes multiple dielectric layers and multiple circuit layers, with a dielectric layer between two adjacent circuit layers, and an inner circuit layer including pads; the substrate has a groove that penetrates a portion of the dielectric layer and circuit layer and exposes the pads, and a conductor is provided on the sidewall of the groove, the conductor connecting to a portion of the pads; a solder resist layer is provided between the pads, an adhesive layer is provided on the solder resist layer, and solder balls are provided on the pads; A first electronic device is installed in the groove and electrically connected to the pad via the solder ball. The first electronic device has a first connection portion, which covers the surface of the first electronic device facing the conductor and the surface of the first electronic device away from the pad. Conductive paste is provided between the conductor and the first connection portion, and the conductive paste also covers the surface of the first connection portion away from the pad. A second electronic device is mounted on the surface of the conductive paste away from the first electronic device. The second electronic device has a second connection portion, which at least covers the surface of the second electronic device facing the conductive paste. and An injection molding layer covers the second electronic device and the first electronic device.

7. The circuit board assembly as claimed in claim 6, characterized in that, The groove is also provided with potting compound, which is located between the conductive paste and the solder resist layer and is covered by the first connecting part.

8. The circuit board assembly as claimed in claim 6, characterized in that, The conductor includes copper, the first connection portion includes copper, and the second connection portion includes copper.

9. The circuit board assembly as claimed in claim 6, characterized in that, The injection-molded layer comprises epoxy resin.

10. The circuit board assembly as claimed in claim 6, characterized in that, The first electronic device includes a chip, and the second electronic device includes a chip.

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