Interconnection body, packaging module and preparation method thereof

Abstract

The invention relates to the technical field of electronic equipment, in particular to an interconnection body, a packaging module and a preparation method thereof. The first interconnection structure in the interconnection body is located on the first side end face of the interconnection body, the second interconnection structure is located on the second side end face of the interconnection body, when the interconnection body is used for preparing a packaging module of a stacked structure, it is ensured that the interconnection body is mounted through an existing SMT device, the mounting precision and the welding spot reliability are improved, and the production efficiency is improved. According to the packaging module, the problems of pin deviation and falling in a backflow process are solved, the reliability of a product is improved, the service life of the product is prolonged, and when a chip is packaged in the interconnection body, the packaging requirements of other chips or devices of the packaging module are reduced, so that the functional density of the whole packaging module is improved.

Description

Technical Field

[0001] This invention relates to the field of electronic device technology, and in particular to an interconnect, a packaging module, and a method for manufacturing the same. Background Technology

[0002] With the continuous development of integrated electronics technology, packaging modules are now widely used in high-performance computing fields such as servers, AI, and GPUs. Existing packaging modules achieve a doubling of functional density per unit volume through vertical stacking and effectively reduce transmission latency by shortening the length of signal interconnects.

[0003] Existing packaging modules typically consist of a first substrate structure and a second substrate structure, such as Figure 1 As shown, the first substrate structure 1 and the second substrate structure 2 are interconnected through components such as pin headers 3 and copper pillars 4. Pin headers 3 and copper pillars 4 can perform simple conduction functions between the first substrate structure 1 and the second substrate structure 2, but the integration density is low and cannot meet the higher requirements of high-performance computing for functional density and performance. In addition, the surface mount technology (SMT) of pin headers 3 and copper pillars 4 is difficult to mount. The rigid connection of pin headers 3 and copper pillars 4 results in low solder joint reliability and is prone to problems such as cold solder joints and false solder joints. Summary of the Invention

[0004] To address the aforementioned technical problems, this invention provides an interconnect, a packaging module, and a method for preparing the same.

[0005] This application provides an interconnect, comprising: The structure comprises a first interconnect structure, a second interconnect structure, metal leads, a molding compound, and an interconnect substrate structure. The molding compound is located on the first surface of the interconnect substrate structure and encapsulates the metal leads. The first interconnect structure is located on the first side end face of the molding compound, and the second interconnect structure is located on the second side end face of the molding compound. The first side end face and the second side end face of the molding compound are disposed opposite to each other. The interconnect substrate structure is electrically connected to the first interconnect structure and the second interconnect structure through the metal leads. The first interconnect structure and the second interconnect structure are electrically connected through the interconnect substrate structure and the metal leads.

[0006] Optionally, the end face of the metal lead exposed on the first side end face of the molding compound serves as the first interconnect structure, and the end face of the metal lead exposed on the second side end face of the molding compound serves as the second interconnect structure.

[0007] Optionally, the first interconnect structure includes a plurality of first interconnect substructures, and the second interconnect structure includes a plurality of second interconnect substructures; each of the first interconnect substructures is electrically connected to the interconnect substrate structure via a metal lead, and each of the second interconnect substructures is electrically connected to the interconnect substrate structure via a metal lead.

[0008] Optionally, the number of the first interconnect substructures and the number of the second interconnect substructures may be the same or different.

[0009] Optionally, each of the first interconnect substructures further includes a first interconnect pad located on the end face of the metal lead exposed on the first side end face of the molding compound, and each of the second interconnect substructures further includes a second interconnect pad located on the surface of the first interconnect structure and on the end face of the metal lead exposed on the second side end face of the molding compound.

[0010] Optionally, the interconnect substrate structure includes an interconnect substrate, the first surface of which includes a plurality of interconnect substrate pads, each of the first interconnect substructures being electrically connected to the corresponding interconnect substrate pad via a metal lead, and each of the second interconnect substructures being electrically connected to the corresponding interconnect substrate pad via a metal lead.

[0011] Optionally, the interconnect substrate structure includes an interconnect chip and an interconnect substrate, the interconnect chip is located on a first surface of the interconnect substrate, the molding compound is located on the first surface of the interconnect substrate and the molding compound encapsulates the interconnect chip, and the first surface of the interconnect chip and the first surface of the interconnect substrate serve as the first surface of the interconnect substrate structure.

[0012] Optionally, the interconnect chip is electrically connected to the first interconnect structure and the second interconnect structure via metal leads.

[0013] Optionally, the interconnect substrate is electrically connected to the first interconnect structure and the second interconnect structure via the metal leads.

[0014] Optionally, the interconnect chip is electrically connected to the interconnect substrate via metal leads.

[0015] Optionally, the interconnect chip is electrically connected to the interconnect substrate via metal leads, and the interconnect substrate is electrically connected to the first interconnect structure and the second interconnect structure via the metal leads, respectively.

[0016] Optionally, the interconnect substrate includes one of a PCB substrate, a ceramic substrate, and a copper-clad laminate.

[0017] Optionally, the interconnect chip includes several interconnect sub-chips; When the interconnect chip is an interconnect sub-chip, the interconnect sub-chip is electrically connected to the first interconnect structure, the second interconnect structure, and the interconnect substrate via metal leads; When the interconnect chip consists of multiple interconnect sub-chips, the multiple interconnect sub-chips are simultaneously electrically connected to the first interconnect structure and the second interconnect structure via metal leads; or the multiple interconnect sub-chips are electrically connected to the first interconnect structure or the second interconnect structure via metal leads and the multiple interconnect sub-chips are electrically connected to each other via metal leads.

[0018] Optionally, when multiple interconnect sub-chips are simultaneously electrically connected to the first interconnect structure and the second interconnect structure via metal leads, the multiple interconnect sub-chips are either independent of each other or electrically connected via metal leads.

[0019] Optionally, the interconnect substrate structure further includes several other elements located on a first surface of the interconnect substrate, the encapsulation covering the other elements, and the other elements being electrically connected to the interconnect substrate.

[0020] Optionally, the interconnect further includes a third interconnect structure located on one or two side surfaces of the molding compound, with the two side surfaces facing each other and perpendicular to the first and second end faces of the molding compound. The interconnect substrate structure is electrically connected to the third interconnect structure via metal leads.

[0021] Optionally, the end face of the metal lead exposed on the side surface of the molding compound serves as the third interconnect structure. The third interconnect structure includes several third interconnect substructures, and each third interconnect substructure is electrically connected to the corresponding interconnect substrate pad through a metal lead.

[0022] Optionally, each of the third interconnect substructures further includes a third interconnect pad located at the end face of each of the metal leads exposed on the side surface of the molding compound.

[0023] Optionally, the interconnect further includes a fourth interconnect structure and a fifth interconnect structure. The fourth interconnect structure is located on a first side end face of the interconnect substrate, and the fifth interconnect structure is located on a second side end face of the interconnect substrate. The first side end face and the second side end face of the interconnect substrate are disposed opposite to each other, and the fourth interconnect structure and the fifth interconnect structure are respectively connected to the circuit inside the interconnect substrate.

[0024] The present invention also provides a method for preparing an interconnect, comprising: An interconnect substrate structure body is provided, wherein a first surface of the interconnect substrate structure body includes a plurality of interconnect regions; The interconnect regions that are adjacent in the first direction are electrically connected by metal leads; A molding compound layer is formed, the molding compound layer covering the first surface of the metal leads and the interconnect substrate structure body; A plurality of discrete interconnects are formed by cutting. Each interconnect includes an interconnect substrate structure and a molding compound located on a first surface of the interconnect substrate structure. The interconnect substrate structure body serves as the interconnect substrate structure of the interconnect, and the molding compound layer serves as the molding compound of the interconnect. The molding compound encapsulates the metal leads. The molding compound includes a first side end face and a second side end face disposed opposite to each other. The first side end face and the second side end face of the molding compound are perpendicular to the first direction. The metal leads are cut off, and the end faces of the metal leads are exposed on the first side end face and the second side end face of the molding compound. The end faces of the metal leads exposed on the first side end face of the molding compound serve as a first interconnect structure, and the end faces of the metal leads exposed on the second side end face of the molding compound serve as a second interconnect structure. The interconnect substrate structure is electrically connected to the first interconnect structure and the second interconnect structure respectively through the metal leads. The first interconnect structure and the second interconnect structure are electrically connected through the interconnect substrate structure and the metal leads.

[0025] Optionally, the first interconnect structure includes a plurality of first interconnect substructures, and the second interconnect structure includes a plurality of second interconnect substructures; each of the first interconnect substructures is electrically connected to the interconnect substrate structure via a metal lead, and each of the second interconnect substructures is electrically connected to the interconnect substrate structure via a metal lead.

[0026] Optionally, the method for fabricating the interconnect further includes forming a first interconnect pad on the end face of each of the metal leads exposed on the first side end face of the molding compound, wherein the end face of the metal lead and the first interconnect pad on the end face of the metal lead constitute a first interconnect substructure; and forming a second interconnect pad on the end face of each of the metal leads exposed on the second side end face of the molding compound, wherein the end face of the metal lead and the second interconnect pad on the end face of the metal lead constitute a second interconnect substructure.

[0027] Optionally, the fabrication process of the first interconnect pad and the second interconnect pad includes one of 3D printing and sputtering followed by grinding.

[0028] Optionally, the interconnect substrate structure includes an interconnect substrate, with a plurality of interconnect substrate pads formed on a first surface of the interconnect substrate. Each first interconnect substructure is electrically connected to the corresponding interconnect substrate pad via a metal lead, and each second interconnect substructure is electrically connected to the corresponding interconnect substrate pad via a metal lead.

[0029] Optionally, the interconnect substrate structure includes an interconnect chip and an interconnect substrate. The interconnect chip is disposed on a first surface of the interconnect substrate, and the first surface of the interconnect chip is away from the first surface of the interconnect substrate. The first surface of the interconnect chip and the first surface of the interconnect substrate serve as the first surface of the interconnect substrate structure. The specific fabrication steps of the interconnect include: An interconnect substrate structure body is provided, the interconnect substrate structure body includes a plurality of interconnect chips and an interconnect substrate body, the first surface of the interconnect substrate structure body includes a plurality of interconnect regions, and the interconnect chips are disposed in the interconnect regions; The interconnect chip is electrically connected to the interconnect chip in the interconnect region adjacent in the first direction via metal leads; A molding compound layer is formed, the molding compound layer covering the first surface of the interconnect chip, the metal leads and the interconnect substrate structure; The interconnect is cut to form a plurality of discrete interconnects, each interconnect including an interconnect substrate structure and a molding compound located on a first surface of the interconnect substrate structure. The molding compound layer serves as the molding compound of the interconnect, and the molding compound encapsulates the interconnect chip and the metal leads. The molding compound covers the first surface of the interconnect substrate, and the interconnect chip is electrically connected to the first interconnect structure and the second interconnect structure through the interconnect chip and the metal leads, respectively.

[0030] Optionally, the method for fabricating the interconnect further includes: The interconnect substrate bodies in the first direction adjacent interconnect regions are electrically connected by metal leads; The interconnect is cut to form a plurality of discrete interconnects, and the interconnect substrate is electrically connected to the first interconnect structure and the second interconnect structure respectively through the metal leads.

[0031] Optionally, the method for fabricating the interconnect further includes: The interconnect chip is electrically connected to the interconnect substrate body in the same interconnect region via metal leads; The interconnect chip is cut to form several discrete interconnects, and the interconnect chip is electrically connected to the interconnect substrate through metal leads.

[0032] Optionally, the interconnect chip includes several interconnect sub-chips; When the interconnect chip consists of multiple interconnect sub-chips, the multiple interconnect sub-chips are simultaneously electrically connected to the first interconnect structure and the second interconnect structure via metal leads. The specific fabrication steps include: Multiple interconnect sub-chips are disposed in the interconnect region on the first surface of the interconnect substrate structure; The interconnect sub-chip is electrically connected to the interconnect sub-chip in the interconnect region adjacent in the first direction via metal leads; A molding compound layer is formed, the molding compound layer covering the interconnect sub-chip, the metal leads and the first surface of the interconnect substrate; The interconnect is cut to form a plurality of discrete interconnects, each interconnect including a plurality of interconnect sub-chips. The metal leads are cut off. The end face of the metal leads exposed on the first side end face of the molding compound serves as a first interconnect structure. The end face of the metal leads exposed on the second side end face of the molding compound serves as a second interconnect structure. The plurality of interconnect sub-chips are simultaneously electrically connected to the first interconnect structure and the second interconnect structure. The plurality of interconnect sub-chips serve as interconnect chips of the interconnect substrate structure.

[0033] Optionally, while electrically connecting adjacent interconnect sub-chips in the first direction through metal leads, corresponding interconnect sub-chips are also electrically connected to each other through metal leads, so that multiple interconnect sub-chips in the obtained interconnect chip are electrically connected to each other through metal leads.

[0034] Optionally, the interconnect chip includes a plurality of interconnect sub-chips. When the interconnect chip comprises multiple interconnect sub-chips, the multiple interconnect sub-chips are electrically connected to the first interconnect structure or the second interconnect structure via metal leads, and the multiple interconnect sub-chips are electrically connected to each other via metal leads. Specific fabrication steps include: Multiple interconnect sub-chips are disposed in the interconnect region on the first surface of the interconnect substrate structure; The interconnect sub-chip is electrically connected to the interconnect sub-chip in the interconnect region adjacent in the first direction via metal leads, and multiple interconnect sub-chips are electrically connected to each other via metal leads. A molding compound layer is formed, the molding compound layer covering the interconnect sub-chip, the metal leads and the first surface of the interconnect substrate; The interconnect is cut to form a plurality of discrete interconnects, each interconnect including a plurality of interconnect sub-chips electrically connected to each other. The end face of the metal lead exposed on the first side end face of the molded body serves as a first interconnect structure, and the end face of the metal lead exposed on the second side end face of the molded body serves as a second interconnect structure. The interconnect sub-chips are electrically connected to the first interconnect structure or the second interconnect structure. The plurality of interconnect sub-chips serve as interconnect chips of the interconnect substrate structure, and the metal lead is cut off.

[0035] Optionally, the interconnect substrate structure further includes several other components, and the specific fabrication steps include: Provides multiple other components; Multiple other components are disposed on the first surface of the interconnect substrate structure, and each interconnect region is provided with a number of other components. The other components are electrically connected to the interconnect substrate structure through metal leads. A molding compound layer is formed, which covers the other components; The interconnect is cut to form a plurality of discrete interconnects, wherein the encapsulation encapsulates the other components and the metal leads.

[0036] Optionally, a third interconnect structure may also be included, wherein the steps for forming the third interconnect structure include: The interconnect regions adjacent in the second direction are electrically connected by metal leads, wherein the second direction is perpendicular to the first direction; The molding compound is cut to form a plurality of discrete interconnects, wherein the molding compound further includes two oppositely disposed molding compound side surfaces, the molding compound side surfaces being perpendicular to the first side end face and the second side end face of the molding compound, the metal leads for second-direction electrical connection being cut off and the end faces of the metal leads being exposed on one or both side surfaces of the molding compound, the end faces of the metal leads exposed on one or both side surfaces of the molding compound serving as the third interconnect structure, and the interconnect substrate structure being electrically connected to the third interconnect structure via the metal leads.

[0037] Optionally, the third interconnect structure includes several third interconnect substructures, each of which is electrically connected to the corresponding interconnect substrate structure region via a metal lead.

[0038] Optionally, the positions of the first interconnect substructure, the second interconnect substructure located on the first side end face of the molding compound, the second side end face of the molding compound, and the position of the third interconnect substructure located on the side surface of the molding compound are determined by the positions of the corresponding metal leads.

[0039] The present invention also provides a packaging module, comprising: One of the above-mentioned interconnects; A first substrate structure, wherein a first surface of the first substrate structure includes a first connection area for the packaging module; The second substrate structure has a first surface including a second connection area for a packaging module. The first connection area for the packaging module of the first substrate structure and the second connection area for the packaging module of the second substrate structure are disposed opposite to each other. The interconnect is disposed between the first substrate structure and the second substrate structure. The first interconnect structure on the first side end face of the molding compound is connected to and electrically connected to the first connection area for the packaging module of the first substrate structure. The second interconnect structure on the second side end face of the molding compound is connected to and electrically connected to the second connection area for the packaging module of the second substrate structure. The first substrate structure and the second substrate structure are electrically connected through the interconnect.

[0040] Optionally, the first substrate structure includes a first substrate and a plurality of first electronic components, wherein the first electronic components are electrically connected to the first substrate; The second substrate structure includes a second substrate and a plurality of second electronic components, the second electronic components being electrically connected to the second substrate.

[0041] Optionally, the first electronic component is located on one or both surfaces of the first substrate; The second electronic component is located on one or both surfaces of the second substrate.

[0042] In summary, the advantages and beneficial effects of the present invention are as follows: This invention provides an interconnect, a packaging module, and a method for manufacturing the same. The interconnect includes a first interconnect structure located on a first side end face and a second interconnect structure located on a second side end face. The first and second interconnect structures in the interconnect ensure that the interconnect can be mounted using existing SMT equipment, improving mounting accuracy and solder joint reliability, solving the problems of pin misalignment and detachment during reflow processes, and improving product reliability and lifespan.

[0043] In the packaging module fabricated using the aforementioned interconnect, the interconnect enables electrical connection between the first substrate structure and the second substrate structure within the packaging module. The first and second interconnect structures ensure that the interconnect is electrically connected to the first and second substrate structures using existing surface mount technology, improving mounting accuracy and solder joint reliability. This allows the packaging module to guarantee electrical connection between the first and second substrate structures while increasing product integration density. It replaces pin headers or copper pillars, which only have simple conductive functions, and avoids soldering defects such as cold solder joints and false solder joints. It also prevents pin offset and detachment during reflow soldering, improving mounting accuracy and solder joint reliability. Therefore, the interconnect effectively solves the problems of low integration, difficult mounting, and low solder joint reliability faced by copper pillars and pin headers in existing packaging modules. Attached Figure Description

[0044] Figure 1 A schematic diagram of a planar structure for pin headers to achieve electrical connections between circuit boards; Figure 2 A three-dimensional structural diagram of an interconnect provided in an embodiment of the present invention; Figure 3 This is a cross-sectional schematic diagram of an interconnect provided in an embodiment of the present invention; Figure 4 This is a three-dimensional structural diagram of an interconnect provided in another embodiment of the present invention; Figure 5 A cross-sectional schematic diagram of an interconnect body provided in another embodiment of the present invention; Figure 6 A cross-sectional schematic diagram of an interconnect body provided in another embodiment of the present invention; Figure 7 A cross-sectional schematic diagram of an interconnect body provided in another embodiment of the present invention; Figure 8 A cross-sectional schematic diagram of an interconnect body provided in another embodiment of the present invention; Figure 9 A top view schematic diagram of multiple interconnect chips of an interconnect body provided for another embodiment of the present invention; Figure 10 This is a three-dimensional structural diagram of an interconnect provided in another embodiment of the present invention; Figure 11 A cross-sectional schematic diagram of an interconnect body provided in another embodiment of the present invention; Figure 12 This is a three-dimensional structural diagram of an interconnect provided in another embodiment of the present invention; Figure 13 This is a flowchart illustrating a method for fabricating an interconnect according to an embodiment of the present invention; Figures 14-17 A schematic diagram illustrating a method for fabricating an interconnect according to an embodiment of the present invention; Figures 18-21 A schematic diagram illustrating a method for fabricating an interconnect according to another embodiment of the present invention; Figure 22 This is a three-dimensional structural diagram of a packaging module provided in an embodiment of the present invention; Figure 23 This is a flowchart illustrating a method for preparing a packaging module according to an embodiment of the present invention. Detailed Implementation

[0045] A copper pillar is a cylindrical metal component with excellent electrical conductivity. In electronic devices, copper pillars are commonly used to connect different components or different levels of circuit boards, serving both conductive and support functions. A pin header is a common electronic component connector, typically composed of multiple pins, used to achieve electrical connections between circuit boards, such as... Figure 1 As shown. However, surface mount technology using copper pillars and pin headers presents challenges. For example, the pin pitch of the pin headers may be small, potentially leading to inaccurate alignment during mounting and component misalignment. Copper pillars and pin headers are typically heavier and harder than typical surface mount components, easily causing pressure on the substrate during mounting, which may result in substrate deformation or component damage. The soldering area of ​​copper pillars and pin headers is small, and the solder joints need to withstand significant mechanical stress. During SMT mounting, precise control of soldering temperature and time is crucial; otherwise, soldering defects such as cold solder joints and false solder joints can easily occur, leading to low solder joint reliability. During reflow processes, the leads of copper pillars and pin headers are prone to misalignment and detachment, affecting mounting quality and reliability. Therefore, this invention provides an interconnect, a package module, and its fabrication method, effectively solving the problems of integration, mounting difficulties, and reflow processes in existing technologies.

[0046] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0047] It should be understood that terms such as “first” and “second” used herein to describe various elements, components, regions, layers, and / or sections should not be limited by these terms. These terms may be used only to distinguish one element, component, region, layer, or section from another. For example, the use of terms such as “first” and “second” herein does not imply order or sequence unless the context clearly indicates otherwise. For ease of description, spatially relative terms such as “upper” and “lower” may be used herein to describe the relationship of one element or feature to other elements or features as shown in the accompanying drawings. It should be understood that spatially relative terms are intended to include not only the orientations shown in the accompanying drawings but also different orientations of the device in use or operation.

[0048] In this application, unless otherwise expressly specified and limited, the terms "connected" and "connected" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral part; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal communication of two components or the interaction between two components, unless otherwise expressly limited. Those skilled in the art can understand the specific meaning of the above terms in this application based on the specific circumstances.

[0049] In the description of this specification, the references to terms such as "one embodiment," "some embodiments," "example," "specific example," or "some examples," etc., indicate that a specific feature, structure, material, or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of the present invention. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples. Furthermore, without contradiction, those skilled in the art can combine and integrate the different embodiments or examples described in this specification, as well as the features of different embodiments or examples. It should be noted that the terms "comprising" and "having," and their variations, used in this application are intended to cover non-exclusive inclusion.

[0050] This invention provides an interconnect, such as Figures 2-3 As shown, it includes: The system comprises a first interconnect structure 20, a second interconnect structure 30, a metal lead 40, a molding compound 50, and an interconnect substrate structure 10. The molding compound 50 is located on the first surface of the interconnect substrate structure 10 and encapsulates the metal lead 40. The first interconnect structure 20 is located on the first side end face of the molding compound, and the second interconnect structure 30 is located on the second side end face of the molding compound. The first side end face and the second side end face of the molding compound are disposed opposite to each other. The interconnect substrate structure 10 is electrically connected to the first interconnect structure 20 and the second interconnect structure 30 through the metal lead 40. The first interconnect structure 20 and the second interconnect structure 30 are electrically connected through the interconnect substrate structure 10 and the metal lead 40.

[0051] Specifically, in this embodiment of the invention, the first interconnect structure 20 and the second interconnect structure 30 are electrically connected through the interconnect substrate structure 10 and the metal lead 40. When the interconnect 100 is used to prepare a stacked packaging module, the first substrate structure and the second substrate structure in the packaging module are electrically connected through the first interconnect structure 20, the second interconnect structure 30, the interconnect substrate structure 10, and the metal lead 40.

[0052] In this embodiment of the invention, the interconnect substrate structure 10 is electrically connected to the first interconnect structure 20 and the second interconnect structure 30 respectively via metal leads 40.

[0053] In this embodiment of the invention, the metal lead 40 is an aluminum wire, gold wire, silver wire, copper wire, or other suitable metal lead.

[0054] In this embodiment of the invention, the diameter of the metal lead 40 is 15 micrometers to 50 micrometers.

[0055] In this embodiment of the invention, the molding compound 50 covers the first surface of the interconnect substrate structure 10, and the molding compound 50 encapsulates the metal lead 40. The molding compound 50 secures the metal lead 40, ensuring the structural stability of the interconnect 100.

[0056] The use of the molding compound 50 to make the interconnect 100 a single structure is beneficial for the interconnect 100 to maintain good mechanical properties during subsequent installation and use.

[0057] In this embodiment of the invention, the material of the molding compound 50 may be epoxy resin, polyimide resin, benzocyclobutene resin, polybenzoxazole resin, or other suitable molding materials.

[0058] In this embodiment of the invention, the encapsulated body 50 is formed by a molding process.

[0059] In other embodiments, the molding process can be injection molding or transfer molding.

[0060] In this embodiment of the invention, the encapsulation body 50 includes a first side end face and a second side end face of the encapsulation body disposed opposite to each other, the first interconnection structure 20 is located on the first side end face of the encapsulation body, and the second interconnection structure 30 is located on the second side end face of the encapsulation body; the encapsulation body 50 also includes two side surfaces of the encapsulation body disposed opposite to each other, the side surfaces of the encapsulation body being perpendicular to the first side end face and the second side end face of the encapsulation body.

[0061] In this embodiment of the invention, the end face of the metal lead 40 exposed on the first side end face of the molding compound serves as the first interconnect structure 20, and the end face of the metal lead 40 exposed on the second side end face of the molding compound serves as the second interconnect structure 30.

[0062] In this embodiment of the invention, when the interconnect 100 is used to prepare a stacked packaging module, the first substrate structure and the second substrate structure of the packaging module transmit signals through the first interconnect structure 20 and the second interconnect structure 30 of the interconnect 100. The first interconnect structure 20 and the second interconnect structure 30 ensure that the interconnect 100 can be mounted using existing SMT equipment, which improves the mounting accuracy and solder joint reliability, solves the problem of pin offset and detachment in the reflow process, and improves the reliability and service life of the product.

[0063] In this embodiment of the invention, the first interconnect structure 20 includes a plurality of first interconnect substructures 21, and the second interconnect structure 30 includes a plurality of second interconnect substructures 31; each of the first interconnect substructures 21 is electrically connected to the interconnect substrate structure 10 through a metal lead, and each of the second interconnect substructures 31 is electrically connected to the interconnect substrate structure 10 through a metal lead.

[0064] In this embodiment of the invention, the direction, length, and curvature of the metal lead 40 can be set for the first interconnect substructure 21 and the second interconnect substructure 31 respectively, so that the positions of the first interconnect substructure 21 and the second interconnect substructure 31 on the first side end face of the molding compound and the second side end face of the molding compound are determined by the positions of the corresponding metal leads.

[0065] In this embodiment of the invention, the first interconnect substructure 21 and the second interconnect substructure 31 are distributed in multiple layers on the first side end face and the second side end face of the molding compound, and in a direction perpendicular to the first surface of the interconnect substrate structure 10. Due to the different curvatures of the metal leads 40, the height of the metal leads from the first surface of the interconnect substrate structure is different, thereby realizing that the first interconnect substructure and the second interconnect substructure are distributed in multiple layers on the first side end face and the second side end face of the molding compound.

[0066] In this embodiment of the invention, the number of the first interconnect substructure 21 and the number of the second interconnect substructure 31 are the same.

[0067] In other embodiments, the number of the first interconnect substructure and the number of the second interconnect substructure are not the same, and the number of the first interconnect substructure and the number of the second interconnect substructure are set as needed.

[0068] In another embodiment of the invention, such as Figures 4-5 As shown, each of the first interconnect substructures 21 further includes a first interconnect pad 22, which is located on the end face of each of the metal leads exposed on the first side end face of the molding compound; each of the second interconnect substructures further includes a second interconnect pad 32, which is located on the end face of each of the metal leads exposed on the second side end face of the molding compound.

[0069] By setting the first interconnect pad 22 and the second interconnect pad 32, the accuracy and solder joint reliability of the interconnect 100 when it is mounted by SMT equipment are further ensured, the reliable electrical connection of the interconnect 100 is realized, the soldering defects such as cold solder joints and short circuits are further reduced, and the versatility of the interconnect 100 is improved.

[0070] In another embodiment of the present invention, the process for forming the first interconnect pad 22 and the second interconnect pad 32 is one of 3D printing or sputtering followed by grinding.

[0071] In other embodiments, the formation of the first interconnect pad and the second interconnect pad includes forming an RDL pad structure on the surface of the first interconnect substructure and the surface of the second interconnect substructure by exposure and development.

[0072] In another embodiment of the present invention, the interconnect substrate structure includes an interconnect substrate, the first surface of the interconnect substrate includes a plurality of interconnect substrate pads, each of the first interconnect substructures is electrically connected to the corresponding interconnect substrate pad through a metal lead, and each of the second interconnect substructures is electrically connected to the corresponding interconnect substrate pad through a metal lead.

[0073] In another embodiment of the invention, such as Figure 6 As shown, the interconnect substrate structure 10 includes an interconnect chip 101 and an interconnect substrate 102. The interconnect chip 101 is located on the first surface of the interconnect substrate 102. The molding compound 50 is located on the first surface of the interconnect substrate 102 and encapsulates the interconnect chip 101. The first surface of the interconnect chip 101 and the first surface of the interconnect substrate 102 serve as the first surface of the interconnect substrate structure 10. The interconnect chip 101 is electrically connected to the first interconnect structure 20 and the second interconnect structure 30 respectively through metal leads.

[0074] In another embodiment of the present invention, the interconnect substrate includes one of a PCB substrate, a ceramic substrate, and a copper-clad laminate.

[0075] The interconnect substrate structure 10 encapsulates an interconnect chip 101, which can perform multiple functions such as signal processing and power management. When an interconnect 100 with the interconnect chip 101 encapsulated is used to prepare a packaged module, the packaging requirements of the packaged module for other chips or devices are reduced, thereby improving the functional density of the entire packaged module. Directly encapsulating the interconnect chip 101 in the interconnect substrate structure 10 allows for further reduction in the overall size of the prepared packaged module, improving the space utilization of the packaged module.

[0076] In another embodiment of the invention, such as Figure 7 As shown, the interconnect chip 101 is electrically connected to a portion of the first interconnect structure 20 and the second interconnect structure 30 via metal leads, and the interconnect substrate 102 is electrically connected to a portion of the first interconnect structure 20 and the second interconnect structure 30 via the metal leads.

[0077] In other embodiments, the interconnect chip in the interconnect substrate structure is electrically connected to the interconnect substrate via metal leads.

[0078] In other embodiments, the interconnect substrate structure is electrically connected to the first interconnect structure and the second interconnect structure only through the interconnect chip, and the interconnect substrate is not electrically connected to the first interconnect structure and the second interconnect structure.

[0079] In another embodiment of the invention, such as Figure 8 As shown, the interconnect chip 101 is electrically connected to the interconnect substrate 102 via metal leads 40, and the interconnect substrate 102 is electrically connected to the first interconnect structure 20 and the second interconnect structure 30 via the metal leads respectively.

[0080] In other embodiments, the first surface of the interconnect chip includes a plurality of interconnect chip pads, and the interconnect chip pads are electrically connected to the corresponding first interconnect structure, second interconnect structure, and interconnect substrate via a metal lead. The first surface of the interconnect substrate has interconnect substrate pads, and the interconnect substrate pads are electrically connected to the corresponding first interconnect substructure, second interconnect substructure, and interconnect chip via a metal lead.

[0081] In another embodiment of the present invention, the interconnect chip includes a plurality of interconnect sub-chips.

[0082] In another embodiment of the invention, such as Figure 9 As shown, the plurality of interconnect sub-chips 11 are electrically connected to the first interconnect structure or the second interconnect structure via metal leads, and the plurality of interconnect sub-chips 11 are electrically connected to each other via metal leads.

[0083] In other embodiments, when the interconnect chip is an interconnect sub-chip, the interconnect sub-chip is electrically connected to the first interconnect structure, the second interconnect structure, and the interconnect substrate via metal leads.

[0084] In other embodiments, when the interconnect chip is a plurality of interconnect sub-chips, the plurality of interconnect sub-chips are simultaneously electrically connected to the first interconnect structure and the second interconnect structure via metal leads.

[0085] In other embodiments, when multiple interconnect sub-chips are simultaneously electrically connected to the first interconnect structure and the second interconnect structure via metal leads, the multiple interconnect sub-chips are either independent of each other or electrically connected via metal leads.

[0086] In this embodiment of the invention, the interconnect chip includes a bridge chip.

[0087] In other embodiments, the interconnect chip may further include logic chips and memory chips. In some embodiments, the logic chip may include gate arrays, cell substrate arrays, embedded arrays, application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), complex programmable logic devices (CPLDs), central processing units (CPUs), microprocessor units (MPUs), microcontroller units (MCUs), logic integrated circuits (ICs), application processors (APs), display driver ICs (DDIs), radio frequency (RF) chips, power supply chips, or complementary metal-oxide-semiconductor (CMOS) image sensors. In some embodiments, the memory chip may include volatile memory chips (such as dynamic random access memory (DRAM) or static RAM (SRAM)) or non-volatile memory chips (such as flash memory (Flash), phase-change RAM (PRAM), magnetoresistive RAM (MRAM), ferroelectric RAM (FeRAM), or resistive RAM (ReRAM)). In one specific embodiment, the memory chip may include high-bandwidth memory (HBM) containing DRAM chips.

[0088] In another embodiment of the invention, such as Figure 10 As shown, the interconnect 100 further includes a third interconnect structure 70, which is located on one or both sides of the molded body 50. The interconnect substrate structure and the third interconnect structure are electrically connected via metal leads.

[0089] The interconnect 100 uses the third interconnect structure 70 to connect other electronic devices, further improving the functional density of the interconnect.

[0090] In another embodiment of the present invention, the end face of the metal lead exposed on the side surface of the molding compound serves as the third interconnect structure. The third interconnect structure includes a plurality of third interconnect substructures, and each of the third interconnect substructures is electrically connected to the corresponding interconnect chip pad through a metal lead.

[0091] In other embodiments, each of the third interconnect substructures further includes a third interconnect pad located at the end face of each of the metal leads exposed on the side surface of the molding compound.

[0092] In this embodiment of the invention, the position of the third interconnect substructure on the side surface of the molding compound is determined by the position of the corresponding metal lead.

[0093] In other embodiments, the process for forming the third interconnect pad is either 3D printing or sputtering followed by grinding.

[0094] In other embodiments, the formation of the third interconnect pad includes forming an RDL pad structure on the surface of the third interconnect substructure by exposure and development.

[0095] In this embodiment of the invention, the interconnect substrate includes one of a PCB substrate, a ceramic substrate, and a copper-clad laminate.

[0096] In other embodiments, the interconnect substrate structure further includes several other elements located on a first surface of the interconnect substrate structure, encapsulated in the molding compound, and electrically connected to the interconnect substrate structure via metal leads or conductive bumps.

[0097] When the interconnect chip and other components are encapsulated within the same interconnect substrate structure, the integration density and area utilization of the interconnect are further improved.

[0098] In other embodiments, the other elements include active devices, passive devices, MEMS sensors, optoelectronic components, or other suitable devices.

[0099] In another embodiment of the invention, such as Figure 11 and Figure 12 As shown, the interconnect 100 further includes a fourth interconnect structure 102a and a fifth interconnect structure 102b. The fourth interconnect structure 102a is located on the first side end face of the interconnect substrate, and the fifth interconnect structure 102b is located on the second side end face of the interconnect substrate. The first side end face and the second side end face of the interconnect substrate are disposed opposite to each other. The fourth interconnect structure 102a and the fifth interconnect structure 102b are respectively connected to the circuit inside the interconnect substrate 102.

[0100] When the interconnect 100 is used to prepare a stacked packaging module, the first substrate structure and the second substrate structure in the packaging module can also be electrically connected through the fourth interconnect structure 102a, the fifth interconnect structure 102b and the interconnect substrate structure 10.

[0101] In this embodiment of the invention, the interconnect substrate structure 10 includes an interconnect chip 101 and an interconnect substrate 102. The interconnect chip 101 is electrically connected to a portion of the first interconnect structure 20 and the second interconnect structure 30 via metal leads.

[0102] In this embodiment of the invention, the interconnect substrate 102 is electrically connected to a portion of the first interconnect structure and the second interconnect structure via the metal leads, and the interconnect chip 101 is also electrically connected to the interconnect substrate 102 via metal leads. Therefore, the electrical connection between the interconnect chip 101 and a portion of the first interconnect structure 20 and the second interconnect structure 30 can also be achieved via metal leads and the interconnect substrate 102.

[0103] When the interconnect 100 is used to prepare a stacked packaging module, the first substrate structure and the second substrate structure in the packaging module can also be electrically connected through the first interconnect structure 20, the second interconnect structure 30, the fourth interconnect structure 102a, the fifth interconnect structure 102b, the metal leads, the interconnect chip 101 and the interconnect substrate structure 10.

[0104] The present invention also provides a method for preparing an interconnect, such as... Figure 13 As shown, it includes: Step S10: Provide an interconnect substrate structure body, wherein the first surface of the interconnect substrate structure body includes a plurality of interconnect regions; Step S20: Electrically connect the interconnect regions that are adjacent in the first direction using metal leads; Step S30: Form a molding compound layer, the molding compound layer covering the metal leads and the first surface of the interconnect substrate structure body; Step S40: Cutting to form a plurality of discrete interconnects, each interconnect including an interconnect substrate structure and a molding compound located on a first surface of the interconnect substrate structure. The interconnect substrate structure body serves as the interconnect substrate structure of the interconnect, and the molding compound layer serves as the molding compound of the interconnect. The molding compound encapsulates the metal leads. The molding compound includes a first side end face and a second side end face disposed opposite to each other, and the first side end face and the second side end face are perpendicular to the first direction. The metal leads are cut, and the end faces of the metal leads are exposed on the first side end face and the second side end face of the molding compound. The end faces of the metal leads exposed on the first side end face of the molding compound serve as a first interconnect structure, and the end faces of the metal leads exposed on the second side end face of the molding compound serve as a second interconnect structure. The interconnect substrate structure is electrically connected to the first interconnect structure and the second interconnect structure respectively through the metal leads. The first interconnect structure and the second interconnect structure are electrically connected through the interconnect substrate structure and the metal leads.

[0105] Specifically, such as Figures 14-17As shown, step S10 is performed to provide an interconnect substrate structure body 80, the first surface of which includes a plurality of interconnect regions 81.

[0106] Step S20 is performed to electrically connect the interconnect regions 81 that are adjacent in the first direction via metal leads 40.

[0107] In this embodiment of the invention, wire bonding technology is used to electrically connect the interconnect regions that are adjacent in the first direction through metal leads 40.

[0108] In this embodiment of the invention, the metal lead 40 is an aluminum wire, gold wire, silver wire, copper wire, or other suitable metal lead.

[0109] In this embodiment of the invention, the diameter of the metal lead 40 is 15 micrometers to 50 micrometers.

[0110] Step S30 is performed to form a molding compound layer 51, which covers the first surface of the metal lead 40 and the interconnect substrate structure body.

[0111] In this embodiment of the invention, the molding compound layer 51 is used to cover the surface of the interconnect substrate structure body 80. The molding compound layer 51 wraps the metal lead 40 and fixes the metal lead 40 by means of the compound layer 51, thereby ensuring the structural stability of the interconnect 100.

[0112] The use of the molding compound layer 51 makes the interconnect 100 a single structure, which helps the interconnect 100 maintain good mechanical properties during subsequent installation and use.

[0113] In this embodiment of the invention, the material of the molding compound layer 51 can be epoxy resin, polyimide resin, benzocyclobutene resin, polybenzoxazole resin, or other suitable molding compound.

[0114] In this embodiment of the invention, the molding material layer 51 is formed by a molding process.

[0115] In other embodiments, the molding process for forming the molding material layer 51 can be injection molding or transfer molding.

[0116] In step S40, a plurality of discrete interconnects 100 are formed by cutting. Each interconnect 100 includes an interconnect substrate structure 10 and a molding compound 50 located on a first surface of the interconnect substrate structure. The interconnect substrate structure body 80 serves as the interconnect substrate structure 10, and the molding compound layer 51 serves as the molding compound 50. The molding compound 50 encapsulates the metal lead 40. The molding compound 50 includes a first side end face and a second side end face disposed opposite to each other. The first side end face, the second side end face, and the first direction are perpendicular to each other. The metal lead is cut off, and the end face of the metal lead 40 is exposed on the first side end face and the second side end face of the molding compound. The end face of the metal lead exposed on the first side end face of the molding compound serves as the first interconnect structure 20, and the end face of the metal lead exposed on the second side end face of the molding compound serves as the second interconnect structure 30. The interconnect substrate structure 10 is electrically connected to the first interconnect structure 20 and the second interconnect structure 30 through the metal lead 40, and the first interconnect structure and the second interconnect structure are electrically connected through the interconnect substrate structure and the metal lead.

[0117] In an embodiment of the present invention, a plurality of discrete interconnects 100 are formed by cutting. Each interconnect 100 includes an interconnect substrate structure 10, a metal lead 40, and a molding compound 50. The molding compound 50 covers the interconnect substrate structure 10 and encapsulates the metal lead 40.

[0118] In this embodiment of the invention, the encapsulation body 50 further includes two encapsulation body side surfaces disposed opposite to each other. The encapsulation body side surfaces are perpendicular to the first side end face and the second side end face of the encapsulation body, and the encapsulation body side surfaces are perpendicular to the first surface and the second surface of the encapsulation body.

[0119] In this embodiment of the invention, the metal lead 40 is cut off, and the end face of the metal lead 40 is exposed to the first side end face and the second side end face of the encapsulation 50. The end face of the metal lead exposed on the first side end face of the encapsulation serves as a first interconnection structure 20, and the end face of the metal lead exposed on the second side end face of the encapsulation serves as a second interconnection structure 30.

[0120] When the interconnect 100 is used to prepare a stacked packaging module, the first substrate structure and the second substrate structure of the packaging module transmit signals through the first interconnect structure 20 and the second interconnect structure 30 of the interconnect 100. The first interconnect structure 20 and the second interconnect structure 30 ensure that the interconnect 100 can be mounted using existing SMT equipment, which improves the mounting accuracy and solder joint reliability, solves the problem of pin offset and detachment in the reflow process, and improves the reliability and service life of the product.

[0121] In this embodiment of the invention, the first interconnect structure 20 and the second interconnect structure 30 are electrically connected through the interconnect substrate structure 10 and the metal lead 40. When the interconnect 100 is used to prepare a stacked packaging module, the first substrate structure and the second substrate structure in the packaging module are electrically connected through the first interconnect structure 20, the second interconnect structure 30, the interconnect substrate structure 10, and the metal lead 40.

[0122] In embodiments of the present invention, such as Figures 2-3 As shown, the first interconnect structure 20 includes a plurality of first interconnect substructures 21, and the second interconnect structure 30 includes a plurality of second interconnect substructures 31; each first interconnect substructure 21 is electrically connected to the interconnect substrate structure 10 through a metal lead, and each second interconnect substructure 31 is electrically connected to the interconnect substrate structure 10 through a metal lead.

[0123] In this embodiment of the invention, the direction, length, and curvature of the metal lead 40 can be set for the first interconnect substructure 21 and the second interconnect substructure 31 respectively, so that the positions of the first interconnect substructure 21 and the second interconnect substructure 31 on the first side end face of the molding compound and the second side end face of the molding compound are determined by the positions of the corresponding metal leads.

[0124] In this embodiment of the invention, the first interconnect substructure 21 and the second interconnect substructure 31 are distributed in multiple layers on the first side end face and the second side end face of the molding compound, and in a direction perpendicular to the first surface of the interconnect substrate structure 10. Due to the different curvatures of the metal leads 40, the height of the metal leads from the first surface of the interconnect substrate structure is different, thereby realizing that the first interconnect substructure and the second interconnect substructure are distributed in multiple layers on the first side end face and the second side end face of the molding compound.

[0125] In this embodiment of the invention, the number of the first interconnect substructure 21 and the number of the second interconnect substructure 31 are the same.

[0126] In other embodiments, the number of the first interconnect substructure and the number of the second interconnect substructure are not the same, and the number of the first interconnect substructure and the number of the second interconnect substructure are set as needed.

[0127] In another embodiment of the invention, such as Figures 4-5 As shown, the interconnect 100 further includes a first interconnect pad 22 formed on the end face of each of the metal leads exposed on the first side end face of the molding compound, the end face of the metal lead and the first interconnect pad 22 of the metal lead end face as a first interconnect substructure 21; and a second interconnect pad 32 formed on the end face of each of the metal leads exposed on the second side end face of the molding compound, the end face of the metal lead and the second interconnect pad 32 of the metal lead end face as a second interconnect substructure.

[0128] By setting the first interconnect pad 22 and the second interconnect pad 32, the accuracy and solder joint reliability of the interconnect 100 when it is mounted by SMT equipment are further ensured, the reliable electrical connection of the interconnect 100 is realized, the soldering defects such as cold solder joints and short circuits are further reduced, and the versatility of the interconnect 100 is improved.

[0129] In another embodiment of the present invention, the process for forming the first interconnect pad 22 and the second interconnect pad 32 is one of 3D printing or sputtering followed by grinding.

[0130] Specifically, the required pad structure is formed on the surface of the first interconnect substructure and the surface of the second interconnect substructure using 3D printing technology; or a metal thin film is sputtered on the surface of the first interconnect substructure and the surface of the second interconnect substructure, and then the required pad structure is formed by milling.

[0131] In other embodiments, the formation of the first interconnect pad and the second interconnect pad includes forming an RDL pad structure on the surface of the first interconnect substructure and the surface of the second interconnect substructure by exposure and development.

[0132] In another embodiment of the present invention, the interconnect substrate structure includes an interconnect substrate, the first surface of the interconnect substrate includes a plurality of interconnect substrate pads, each of the first interconnect substructures is electrically connected to the corresponding interconnect substrate pad through a metal lead, and each of the second interconnect substructures is electrically connected to the corresponding interconnect substrate pad through a metal lead.

[0133] In another embodiment of the invention, such as Figure 6As shown, the interconnect substrate structure includes an interconnect chip 101 and an interconnect substrate 102. The interconnect chip 101 is disposed on a first surface of the interconnect substrate, and the first surface of the interconnect chip is away from the first surface of the interconnect substrate. The first surface of the interconnect chip and the first surface of the interconnect substrate serve as the first surface of the interconnect substrate structure. Figures 18-21 As shown, the specific preparation steps include: Step S11: Provide an interconnect substrate structure body, the interconnect substrate structure body including a plurality of interconnect chips 101 and an interconnect substrate body 90, the first surface of the interconnect substrate structure body 90 including a plurality of interconnect regions, and the interconnect chips 101 disposed in the interconnect regions; Step S21: Connect the interconnect chip to the interconnect chip in the interconnect region adjacent in the first direction via metal leads. Step S31: Form a molding compound layer, the molding compound layer covering the first surface of the interconnect chip, the metal leads and the interconnect substrate structure; Step S41: Cutting to form a plurality of discrete interconnects, each interconnect including an interconnect substrate structure and a molding compound located on a first surface of the interconnect substrate structure, wherein the molding compound layer serves as the molding compound of the interconnect, the molding compound encapsulates the interconnect chip and the metal leads, the molding compound covers the first surface of the interconnect substrate, and the interconnect chip is electrically connected to the first interconnect structure and the second interconnect structure respectively through the interconnect chip and the metal leads.

[0134] In this embodiment of the invention, the interconnect chip refers to the interconnect chip corresponding to each interconnect substrate structure; electrically connecting the interconnect chips adjacent in the first direction through metal leads means that the interconnect chips in each adjacent interconnect substrate structure in the first direction are electrically connected through metal leads 40.

[0135] The interconnect substrate structure 10 encapsulates interconnect chips, which can perform multiple functions such as signal processing and power management. When a packaged module is fabricated using an interconnect with encapsulated interconnect chips, the packaging requirements for other chips or devices are reduced, thereby increasing the functional density of the entire packaged module. Directly encapsulating the interconnect chips in the interconnect substrate structure 10 further reduces the overall size of the fabricated packaged module, improving its space utilization.

[0136] In another embodiment of the invention, such as Figure 7As shown, the interconnect chip 101 is electrically connected to the first interconnect structure and the second interconnect structure respectively via metal leads, and the interconnect substrate is electrically connected to the first interconnect structure and the second interconnect structure respectively via the metal leads.

[0137] In other embodiments, the interconnect chip in the interconnect substrate structure is electrically connected to the interconnect substrate via metal leads.

[0138] In other embodiments, the interconnect substrate structure is electrically connected to the first interconnect structure and the second interconnect structure only through the interconnect chip, and the interconnect substrate is not electrically connected to the first interconnect structure and the second interconnect structure.

[0139] In another embodiment of the invention, such as Figure 8 As shown, the interconnect chip 101 is electrically connected to the interconnect substrate 102 via metal leads, and the interconnect substrate 102 is electrically connected to the first interconnect structure 20 and the second interconnect structure 30 via the metal leads, respectively.

[0140] In another embodiment of the present invention, the interconnect chip includes a plurality of interconnect sub-chips.

[0141] In another embodiment of the invention, such as Figure 9 As shown, the plurality of interconnect sub-chips 11 are electrically connected to the first interconnect structure or the second interconnect structure via metal leads, and the plurality of interconnect sub-chips 11 are electrically connected to each other via metal leads.

[0142] In other embodiments, when the interconnect chip is an interconnect sub-chip, the interconnect sub-chip is electrically connected to the first interconnect structure, the second interconnect structure, and the interconnect substrate via metal leads.

[0143] In other embodiments, when the interconnect chip is a plurality of interconnect sub-chips, the plurality of interconnect sub-chips are simultaneously electrically connected to the first interconnect structure and the second interconnect structure via metal leads.

[0144] In other embodiments, when multiple interconnect sub-chips are simultaneously electrically connected to the first interconnect structure and the second interconnect structure via metal leads, the multiple interconnect sub-chips are either independent of each other or electrically connected via metal leads.

[0145] In this embodiment of the invention, the interconnect chip includes a bridging chip.

[0146] In other embodiments, the interconnect chip may further include logic chips and memory chips. In some embodiments, the logic chip may include gate arrays, cell substrate arrays, embedded arrays, application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), complex programmable logic devices (CPLDs), central processing units (CPUs), microprocessor units (MPUs), microcontroller units (MCUs), logic integrated circuits (ICs), application processors (APs), display driver ICs (DDIs), radio frequency (RF) chips, power supply chips, or complementary metal-oxide-semiconductor (CMOS) image sensors. In some embodiments, the memory chip may include volatile memory chips (such as dynamic random access memory (DRAM) or static RAM (SRAM)) or non-volatile memory chips (such as flash memory (Flash), phase-change RAM (PRAM), magnetoresistive RAM (MRAM), ferroelectric RAM (FeRAM), or resistive RAM (ReRAM)). In one specific embodiment, the memory chip may include high-bandwidth memory (HBM) containing DRAM chips.

[0147] In another embodiment of the invention, such as Figure 10 As shown, the interconnect 100 further includes a third interconnect structure 70, and the steps for forming the third interconnect structure 70 include: The interconnect regions adjacent in the second direction are electrically connected by metal leads, wherein the second direction is perpendicular to the first direction; The device is cut to form a plurality of discrete interconnects, wherein the molding compound includes two oppositely disposed molding compound side surfaces, the molding compound side surfaces being perpendicular to the first side end face and the second side end face of the molding compound, the metal leads for second-direction electrical connection being cut off and the end faces of the metal leads being exposed on one or both side surfaces of the molding compound, the end faces of the metal leads exposed on one or both side surfaces of the molding compound serving as the third interconnect structure, and the interconnect substrate structure being electrically connected to the third interconnect structure via the metal leads.

[0148] In another embodiment of the present invention, the interconnect 100 utilizes the third interconnect structure 70 to connect other electronic devices, further improving the integration of the interconnect.

[0149] In other embodiments, the third interconnect structure includes a plurality of third interconnect substructures, each of which is electrically connected to the corresponding interconnect substrate structure via a metal lead.

[0150] In other embodiments, a third interconnect pad is formed on the end face of each of the metal leads exposed on the side surface of the molding compound, and the end face of the metal lead and the third interconnect pad on the end face of the metal lead constitute a third interconnect substructure.

[0151] In this embodiment of the invention, the position of the third interconnect substructure on the side surface of the molding compound is determined by the position of the corresponding metal lead.

[0152] In another embodiment of the present invention, the process for forming the third interconnect pad is one of 3D printing or sputtering followed by grinding.

[0153] In other embodiments, the formation of the third interconnect pad includes forming an RDL pad structure on the surface of the third interconnect substructure by exposure and development.

[0154] In other embodiments, the interconnect substrate structure further includes other components, and the specific fabrication steps include: Provides multiple other components; Multiple other components are disposed on the first surface of the interconnect substrate structure, and each interconnect region is provided with a number of other components. The other components are electrically connected to the interconnect substrate structure through metal leads. A molding compound layer is formed, which covers the other components; The interconnect is cut to form a plurality of discrete interconnects, wherein the encapsulation encapsulates the other components and the metal leads.

[0155] In other embodiments, when the interconnect chip and other components are encapsulated within the same interconnect substrate structure, the integration density and area utilization of the interconnect are further improved.

[0156] In other embodiments, the other elements include active devices, passive devices, MEMS sensors, optoelectronic components, or other suitable devices.

[0157] The present invention also provides a packaging module, such as Figure 22 As shown, it includes: One of the above-mentioned interconnects 100; A first substrate structure 1, the first surface of the first substrate structure 1 includes a first connection area of ​​the packaging module; The second substrate structure 2 has a first surface including a second connection area for the packaging module. The first connection area for the packaging module of the first substrate structure 1 and the second connection area for the packaging module of the second substrate structure 2 are disposed opposite to each other. The interconnect 100 is located between the first substrate structure 1 and the second substrate structure 2. The first interconnect structure on the first side end face of the molding compound is connected to and electrically connected to the first connection area for the packaging module of the first substrate structure 1. The second interconnect structure on the second side end face of the molding compound is connected to and electrically connected to the second connection area for the packaging module of the second substrate structure 2. The first substrate structure 1 and the second substrate structure 2 are electrically connected through the interconnect 100.

[0158] Specifically, in this embodiment of the invention, in the packaging module prepared using the interconnect 100, the interconnect enables electrical connection between the first substrate structure 1 and the second substrate structure 2 within the packaging module. The first interconnect structure 1 and the second interconnect structure 2 ensure that the interconnect 100 is electrically connected to the first substrate structure 1 and the second substrate structure 2 using existing surface mount technology. This improves mounting accuracy and solder joint reliability, ensuring both electrical connection between the first substrate structure 1 and the second substrate structure 2 and increasing product integration density. It replaces pin headers or copper pillars that only have simple conductive functions, and avoids soldering defects such as cold solder joints and false solder joints. It also prevents pins from shifting or falling off during reflow soldering, improving mounting accuracy and solder joint reliability. Therefore, the interconnect 100 effectively solves the problems of low integration, difficult mounting, and low solder joint reliability faced by copper pillars and pin headers in existing packaging modules.

[0159] In this embodiment of the invention, the first substrate structure 1 includes a first substrate and a plurality of first electronic components 1001, wherein the first electronic components 11 are electrically connected to the first substrate; the second substrate structure 2 includes a second substrate and a plurality of second electronic components 21, wherein the second electronic components 2001 are electrically connected to the second substrate.

[0160] In this embodiment of the invention, the first electronic component 1001 is located on one or both surfaces of the first substrate 1; the second electronic component 2001 is located on one or both surfaces of the second substrate 2.

[0161] In this embodiment of the invention, the first electronic component 1001 includes an active device, a passive device, a MEMS sensor, an optoelectronic component, or other suitable device; the second electronic component 2001 includes an active device, a passive device, a MEMS sensor, an optoelectronic component, or other suitable device.

[0162] In this embodiment of the invention, the first substrate 1 is a PCB substrate, a ceramic substrate, a copper-clad laminate, or other suitable substrate; the second substrate 2 is a PCB substrate, a ceramic substrate, a copper-clad laminate, or other suitable substrate.

[0163] This invention also provides a method for preparing a packaging module, such as... Figure 23 As shown, it includes: Step S100: Provide an interconnect, a first substrate structure and a second substrate structure as described above, wherein the first surface of the first substrate structure includes a first connection area of ​​the packaging module and the first surface of the second substrate structure includes a second connection area of ​​the packaging module. Step S200: The second interconnect structure of the interconnect body is disposed in the second connection area of ​​the packaging module of the second substrate structure, and the second interconnect structure is connected and electrically connected to the second connection area of ​​the packaging module. Step S300: The first connection area of ​​the packaging module of the first substrate structure is disposed on the surface of the first interconnect structure of the interconnect body. The first interconnect structure is connected and electrically connected to the first connection area of ​​the packaging module. The first connection area of ​​the packaging module of the first substrate structure is disposed opposite to the second connection area of ​​the packaging module of the second substrate structure. The interconnect body is disposed between the first substrate structure and the second substrate structure. The first substrate structure and the second substrate structure are electrically connected through the interconnect body.

[0164] In this embodiment of the invention, in the packaging module prepared using the interconnect 100, the interconnect 100 enables electrical connection between the first substrate structure 1 and the second substrate structure 2 within the packaging module. The first and second interconnect structures ensure that the interconnect 100 is electrically connected to the first substrate structure 1 and the second substrate structure 2 using existing surface mount technology. This improves mounting accuracy and solder joint reliability, ensuring both electrical connection between the first substrate structure 1 and the second substrate structure 2 and increasing product integration density. It replaces pin headers or copper pillars that only have simple conductive functions, and avoids soldering defects such as cold solder joints and false solder joints. It also prevents pins from shifting or falling off during reflow soldering, improving mounting accuracy and solder joint reliability. Therefore, the interconnect effectively solves the problems of low integration, difficult mounting, and low solder joint reliability faced by copper pillars and pin headers in existing packaging modules.

[0165] Specifically, in the embodiments of the present invention, such as Figure 22As shown, the first substrate structure 1 includes a first substrate and a plurality of first electronic components 1001, the first electronic components 11 being electrically connected to the first substrate; the second substrate structure 2 includes a second substrate and a plurality of second electronic components 21, the second electronic components 2001 being electrically connected to the second substrate.

[0166] In this embodiment of the invention, the first electronic component 1001 is located on one or both surfaces of the first substrate 1; the second electronic component 2001 is located on one or both surfaces of the second substrate 2.

[0167] In this embodiment of the invention, the first electronic component 1001 includes an active device, a passive device, a MEMS sensor, an optoelectronic component, or other suitable device; the second electronic component 2001 includes an active device, a passive device, a MEMS sensor, an optoelectronic component, or other suitable device.

[0168] In this embodiment of the invention, the first interconnect structure is connected to and electrically connected to the first connection area of ​​the packaging module via a surface mount process; the second interconnect structure is connected to and electrically connected to the second connection area of ​​the packaging module via a surface mount process.

[0169] In this embodiment of the invention, the height between the first side end face and the second side end face of the molding compound in the interconnect 100 is set based on the distance between the first substrate structure and the second substrate structure.

[0170] Finally, it should be noted that any modification or equivalent substitution of some or all of the technical features based on the device structure and the technical solutions of the embodiments of the present invention, without departing from the corresponding technical solutions of the present invention, shall fall within the patent scope of the device structure and the embodiments of the present invention.

Claims

1. An interconnect, characterized in that, include: The structure comprises a first interconnect structure, a second interconnect structure, metal leads, a molding compound, and an interconnect substrate structure. The molding compound is located on the first surface of the interconnect substrate structure and encapsulates the metal leads. The first interconnect structure is located on the first side end face of the molding compound, and the second interconnect structure is located on the second side end face of the molding compound. The first side end face and the second side end face of the molding compound are disposed opposite to each other. The interconnect substrate structure is electrically connected to the first interconnect structure and the second interconnect structure through the metal leads. The first interconnect structure and the second interconnect structure are electrically connected through the interconnect substrate structure and the metal leads.

2. An interconnect as described in claim 1, characterized in that, The end face of the metal lead exposed on the first side end face of the molding compound serves as the first interconnect structure, and the end face of the metal lead exposed on the second side end face of the molding compound serves as the second interconnect structure.

3. An interconnect as described in claim 1, characterized in that, The first interconnect structure includes a plurality of first interconnect substructures, and the second interconnect structure includes a plurality of second interconnect substructures; each first interconnect substructure is electrically connected to the interconnect substrate structure via a metal lead, and each second interconnect substructure is electrically connected to the interconnect substrate structure via a metal lead.

4. An interconnect as described in claim 3, characterized in that, The number of the first interconnect substructures and the number of the second interconnect substructures may be the same or different.

5. An interconnect as described in claim 3, characterized in that, Each of the first interconnect substructures further includes a first interconnect pad located on the end face of the metal lead exposed on the first side end face of the molding compound. Each of the second interconnect substructures further includes a second interconnect pad located on the surface of the first interconnect structure and on the end face of the metal lead exposed on the second side end face of the molding compound.

6. An interconnect as described in claim 3, characterized in that, The interconnect substrate structure includes an interconnect substrate, and the first surface of the interconnect substrate includes a plurality of interconnect substrate pads. Each first interconnect substructure is electrically connected to the corresponding interconnect substrate pad through a metal lead, and each second interconnect substructure is electrically connected to the corresponding interconnect substrate pad through a metal lead.

7. An interconnect as described in claim 3, characterized in that, The interconnect substrate structure includes an interconnect chip and an interconnect substrate. The interconnect chip is located on a first surface of the interconnect substrate, and the encapsulator is located on the first surface of the interconnect substrate and encapsulates the interconnect chip. The first surface of the interconnect chip and the first surface of the interconnect substrate serve as the first surface of the interconnect substrate structure.

8. An interconnect as described in claim 7, characterized in that, The interconnect chip is electrically connected to the first interconnect structure and the second interconnect structure via metal leads.

9. An interconnect as described in claim 7 or 8, characterized in that, The interconnect substrate is electrically connected to the first interconnect structure and the second interconnect structure respectively via the metal leads.

10. An interconnect as described in claim 9, characterized in that, The interconnect chip is electrically connected to the interconnect substrate via metal leads.

11. An interconnect as claimed in claim 7, characterized in that, The interconnect chip is electrically connected to the interconnect substrate via metal leads, and the interconnect substrate is electrically connected to the first interconnect structure and the second interconnect structure via the metal leads, respectively.

12. An interconnect as described in claim 6 or 7, characterized in that, The interconnect substrate includes one of a PCB substrate, a ceramic substrate, and a copper-clad laminate.

13. An interconnect as described in claim 7, characterized in that, The interconnect chip includes several interconnect sub-chips; When the interconnect chip is an interconnect sub-chip, the interconnect sub-chip is electrically connected to the first interconnect structure, the second interconnect structure, and the interconnect substrate via metal leads; When the interconnect chip consists of multiple interconnect sub-chips, the multiple interconnect sub-chips are simultaneously electrically connected to the first interconnect structure and the second interconnect structure via metal leads; or the multiple interconnect sub-chips are electrically connected to the first interconnect structure or the second interconnect structure via metal leads and the multiple interconnect sub-chips are electrically connected to each other via metal leads.

14. An interconnect as described in claim 13, characterized in that, When multiple interconnect sub-chips are simultaneously electrically connected to the first interconnect structure and the second interconnect structure via metal leads, the multiple interconnect sub-chips are either independent of each other or electrically connected via metal leads.

15. An interconnect as described in claim 7, characterized in that, The interconnect substrate structure also includes several other components located on the first surface of the interconnect substrate. The other components are encapsulated by the molding compound and are electrically connected to the interconnect substrate.

16. An interconnect as claimed in claim 1, characterized in that, It also includes a third interconnect structure, which is located on one or two side surfaces of the molding compound. The two side surfaces of the molding compound are arranged opposite to each other. The side surfaces of the molding compound are perpendicular to the first and second side surfaces of the molding compound. The interconnect substrate structure and the third interconnect structure are electrically connected by metal leads.

17. An interconnect as claimed in claim 16, characterized in that, The end face of the metal lead exposed on the side surface of the molding compound serves as the third interconnect structure. The third interconnect structure includes several third interconnect substructures, and each third interconnect substructure is electrically connected to the corresponding interconnect substrate pad through a metal lead.

18. An interconnect as claimed in claim 16, characterized in that, Each of the third interconnect substructures further includes a third interconnect pad located at the end face of each of the metal leads exposed on the side surface of the molding compound.

19. An interconnect as described in claim 6 or 7, characterized in that, The interconnect further includes a fourth interconnect structure and a fifth interconnect structure. The fourth interconnect structure is located on the first side end face of the interconnect substrate, and the fifth interconnect structure is located on the second side end face of the interconnect substrate. The first side end face and the second side end face of the interconnect substrate are disposed opposite to each other. The fourth interconnect structure and the fifth interconnect structure are respectively connected to the circuit inside the interconnect substrate.

20. A method for preparing an interconnect, characterized in that, include: An interconnect substrate structure body is provided, wherein a first surface of the interconnect substrate structure body includes a plurality of interconnect regions; The interconnect regions that are adjacent in the first direction are electrically connected by metal leads; A molding compound layer is formed, the molding compound layer covering the first surface of the metal leads and the interconnect substrate structure body; A plurality of discrete interconnects are formed by cutting. Each interconnect includes an interconnect substrate structure and a molding compound located on a first surface of the interconnect substrate structure. The interconnect substrate structure body serves as the interconnect substrate structure of the interconnect, and the molding compound layer serves as the molding compound of the interconnect. The molding compound encapsulates the metal leads. The molding compound includes a first side end face and a second side end face disposed opposite to each other. The first side end face and the second side end face of the molding compound are perpendicular to the first direction. The metal leads are cut off, and the end faces of the metal leads are exposed on the first side end face and the second side end face of the molding compound. The end faces of the metal leads exposed on the first side end face of the molding compound serve as a first interconnect structure, and the end faces of the metal leads exposed on the second side end face of the molding compound serve as a second interconnect structure. The interconnect substrate structure is electrically connected to the first interconnect structure and the second interconnect structure respectively through the metal leads. The first interconnect structure and the second interconnect structure are electrically connected through the interconnect substrate structure and the metal leads.

21. The method for preparing an interconnect as described in claim 20, characterized in that, The first interconnect structure includes a plurality of first interconnect substructures, and the second interconnect structure includes a plurality of second interconnect substructures; each first interconnect substructure is electrically connected to the interconnect substrate structure via a metal lead, and each second interconnect substructure is electrically connected to the interconnect substrate structure via a metal lead.

22. The method for preparing an interconnect as described in claim 21, characterized in that, The method also includes forming a first interconnect pad on the end face of each of the metal leads exposed on the first side end face of the molding compound, wherein the end face of the metal lead and the first interconnect pad on the end face of the metal lead constitute a first interconnect substructure; and forming a second interconnect pad on the end face of each of the metal leads exposed on the second side end face of the molding compound, wherein the end face of the metal lead and the second interconnect pad on the end face of the metal lead constitute a second interconnect substructure.

23. The method for preparing an interconnect as described in claim 22, characterized in that, The fabrication process of the first interconnect pad and the second interconnect pad includes one of 3D printing and sputtering followed by grinding.

24. The method for preparing an interconnect as described in claim 20, characterized in that, The interconnect substrate structure includes an interconnect substrate, on which a plurality of interconnect substrate pads are formed. Each first interconnect substructure is electrically connected to the corresponding interconnect substrate pad through a metal lead, and each second interconnect substructure is electrically connected to the corresponding interconnect substrate pad through a metal lead.

25. The method for preparing an interconnect as described in claim 20, characterized in that, The interconnect substrate structure includes an interconnect chip and an interconnect substrate. The interconnect chip is disposed on a first surface of the interconnect substrate, and the first surface of the interconnect chip is away from the first surface of the interconnect substrate. The first surface of the interconnect chip and the first surface of the interconnect substrate serve as the first surface of the interconnect substrate structure. The specific fabrication steps of the interconnect include: An interconnect substrate structure body is provided, the interconnect substrate structure body includes a plurality of interconnect chips and an interconnect substrate body, the first surface of the interconnect substrate structure body includes a plurality of interconnect regions, and the interconnect chips are disposed in the interconnect regions; The interconnect chip is electrically connected to the interconnect chip in the interconnect region adjacent in the first direction via metal leads; A molding compound layer is formed, the molding compound layer covering the first surface of the interconnect chip, the metal leads and the interconnect substrate structure; The interconnect is cut to form a plurality of discrete interconnects, each interconnect including an interconnect substrate structure and a molding compound located on a first surface of the interconnect substrate structure. The molding compound layer serves as the molding compound of the interconnect, and the molding compound encapsulates the interconnect chip and the metal leads. The molding compound covers the first surface of the interconnect substrate, and the interconnect chip is electrically connected to the first interconnect structure and the second interconnect structure through the interconnect chip and the metal leads, respectively.

26. The method for preparing an interconnect as described in claim 25, characterized in that, Also includes: The interconnect substrate bodies in the first direction adjacent interconnect regions are electrically connected by metal leads; The interconnect is cut to form a plurality of discrete interconnects, and the interconnect substrate is electrically connected to the first interconnect structure and the second interconnect structure respectively through the metal leads.

27. A method for preparing an interconnect as described in claim 25 or 26, characterized in that, It also includes the interconnect chip being electrically connected to the interconnect substrate body in the same interconnect region via metal leads; The interconnect chip is cut to form several discrete interconnects, and the interconnect chip is electrically connected to the interconnect substrate through metal leads.

28. The method for preparing an interconnect as described in claim 20, characterized in that, The interconnect chip includes several interconnect sub-chips; When the interconnect chip consists of multiple interconnect sub-chips, the multiple interconnect sub-chips are simultaneously electrically connected to the first interconnect structure and the second interconnect structure via metal leads. The specific fabrication steps include: Multiple interconnect sub-chips are disposed in the interconnect region on the first surface of the interconnect substrate structure; The interconnect sub-chip is electrically connected to the interconnect sub-chip in the interconnect region adjacent in the first direction via metal leads; A molding compound layer is formed, the molding compound layer covering the interconnect sub-chip, the metal leads and the first surface of the interconnect substrate; The interconnect is cut to form a plurality of discrete interconnects, each interconnect including a plurality of interconnect sub-chips. The metal leads are cut off. The end face of the metal leads exposed on the first side end face of the molding compound serves as a first interconnect structure. The end face of the metal leads exposed on the second side end face of the molding compound serves as a second interconnect structure. The plurality of interconnect sub-chips are simultaneously electrically connected to the first interconnect structure and the second interconnect structure. The plurality of interconnect sub-chips serve as interconnect chips of the interconnect substrate structure.

29. The method for preparing an interconnect as described in claim 28, characterized in that, While electrically connecting adjacent interconnect sub-chips in the first direction through metal leads, corresponding interconnect sub-chips are also electrically connected to each other through metal leads, so that multiple interconnect sub-chips in the obtained interconnect chip are electrically connected to each other through metal leads.

30. The method for preparing an interconnect as described in claim 20, characterized in that, The interconnect chip includes a plurality of interconnect sub-chips. When the interconnect chip consists of multiple interconnect sub-chips, the multiple interconnect sub-chips are electrically connected to the first interconnect structure or the second interconnect structure via metal leads, and the multiple interconnect sub-chips are electrically connected to each other via metal leads. The specific fabrication steps include: Multiple interconnect sub-chips are disposed in the interconnect region on the first surface of the interconnect substrate structure; The interconnect sub-chip is electrically connected to the interconnect sub-chip in the interconnect region adjacent in the first direction via metal leads, and multiple interconnect sub-chips are electrically connected to each other via metal leads. A molding compound layer is formed, the molding compound layer covering the interconnect sub-chip, the metal leads and the first surface of the interconnect substrate; The interconnect is cut to form a plurality of discrete interconnects, each interconnect including a plurality of interconnect sub-chips electrically connected to each other. The end face of the metal lead exposed on the first side end face of the molded body serves as a first interconnect structure, and the end face of the metal lead exposed on the second side end face of the molded body serves as a second interconnect structure. The interconnect sub-chips are electrically connected to the first interconnect structure or the second interconnect structure. The plurality of interconnect sub-chips serve as interconnect chips of the interconnect substrate structure, and the metal lead is cut off.

31. The method for preparing an interconnect as described in claim 20, characterized in that, The interconnect substrate structure also includes several other components, and the specific fabrication steps include: Provides multiple other components; Multiple other components are disposed on the first surface of the interconnect substrate structure, and each interconnect region is provided with a number of other components. The other components are electrically connected to the interconnect substrate structure through metal leads. A molding compound layer is formed, which covers the other components; The interconnect is cut to form a plurality of discrete interconnects, wherein the encapsulation encapsulates the other components and the metal leads.

32. The method for preparing an interconnect as described in claim 20, characterized in that, It also includes a third interconnect structure, the steps of forming the third interconnect structure including: The interconnect regions adjacent in the second direction are electrically connected by metal leads, wherein the second direction is perpendicular to the first direction; The molding compound is cut to form a plurality of discrete interconnects, wherein the molding compound further includes two oppositely disposed molding compound side surfaces, the molding compound side surfaces being perpendicular to the first side end face and the second side end face of the molding compound, the metal leads for second-direction electrical connection being cut off and the end faces of the metal leads being exposed on one or both side surfaces of the molding compound, the end faces of the metal leads exposed on one or both side surfaces of the molding compound serving as the third interconnect structure, and the interconnect substrate structure being electrically connected to the third interconnect structure via the metal leads.

33. The method for preparing an interconnect as described in claim 32, characterized in that, The third interconnect structure includes several third interconnect substructures, and each third interconnect substructure is electrically connected to the corresponding interconnect substrate structure region through a metal lead.

34. A method for preparing an interconnect as described in claim 21 or 33, characterized in that, The positions of the first interconnect substructure, the second interconnect substructure located on the first side end face of the molding compound, the second side end face of the molding compound, and the position of the third interconnect substructure located on the side surface of the molding compound are determined by the positions of the corresponding metal leads.

35. A packaging module, characterized in that, include: An interconnect as described in claim 1; A first substrate structure, wherein a first surface of the first substrate structure includes a first connection area for the packaging module; The second substrate structure has a first surface including a second connection area for a packaging module. The first connection area for the packaging module of the first substrate structure and the second connection area for the packaging module of the second substrate structure are disposed opposite to each other. The interconnect is disposed between the first substrate structure and the second substrate structure. The first interconnect structure on the first side end face of the molding compound is connected to and electrically connected to the first connection area for the packaging module of the first substrate structure. The second interconnect structure on the second side end face of the molding compound is connected to and electrically connected to the second connection area for the packaging module of the second substrate structure. The first substrate structure and the second substrate structure are electrically connected through the interconnect.

36. A packaging module as described in claim 35, characterized in that, The first substrate structure includes a first substrate and a plurality of first electronic components, wherein the first electronic components are electrically connected to the first substrate; The second substrate structure includes a second substrate and a plurality of second electronic components, the second electronic components being electrically connected to the second substrate.

37. A packaging module as described in claim 36, characterized in that, The first electronic component is located on one or both surfaces of the first substrate; The second electronic component is located on one or both surfaces of the second substrate.

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