Multi-channel CANFD bus monitoring alarm system and method based on ZYNQ platform

Abstract

The invention provides a multipath CANFD bus monitoring alarm system and method based on a ZYNQ platform, the system part comprises a multipath CANFD physical interface, a CANFD transmit-receive module IP core, a CANFD monitoring module IP core, an alarm interrupt processing module, a data conversion module and a monitoring rule configuration module, and the system is realized based on a Xilinx ZYNQ SOC. The FPGA logic part realizes a plurality of pairs of user-defined IP cores and a CANFD abnormal data processing function, and the ARM processor is responsible for system initialization and conversion from CANFD data to Ethernet data. Through parallel processing of hardware, a data exception monitoring function is stripped from ARM application software, a CPU is liberated from heavy real-time monitoring tasks, microsecond-level ultra-low alarm delay is achieved, the requirement for high real-time performance is met, meanwhile, the CPU can process more complex upper-layer applications, the reliability and flexibility of the system are improved, and the system reliability and reliability are improved. And remote network transmission of data is supported.

Description

A multi-channel CANFD bus monitoring and alarm system and method based on the ZYNQ platform Technical Field

[0001] This invention relates to the fields of automotive electronics and industrial control technology, specifically to a multi-channel CANFD bus monitoring and alarm system and method based on the ZYNQ platform. Background Technology

[0002] CANFD bus is an extended CAN bus protocol that supports higher data rates (up to 5 Mbps) and larger data frames (up to 64 bytes). It is widely used in automotive, industrial automation, and aerospace industries and has become a core communication protocol. Therefore, ensuring the reliability and real-time performance of its communication is crucial.

[0003] Currently, CANFD bus monitoring typically relies on software implementation running on the CPU, i.e., the monitoring program runs on the main processor. This approach has the following drawbacks: 1. High latency: Software processing involves data reception, operating system scheduling, and program judgment, resulting in a long delay from an anomaly occurrence to alarm generation, making it difficult to meet the demands of high real-time scenarios. 2. Resource consumption and contention: Under high load conditions on multiple buses, CPU processing of monitoring tasks consumes significant computing resources, and resource contention may lead to data loss or delayed responses, impacting overall system performance. 3. Poor flexibility: Traditional solutions struggle to quickly adapt to different anomaly detection rules and have limited scalability, lacking flexibility. Summary of the Invention

[0004] To address the shortcomings of existing technologies, the present invention aims to provide a multi-channel CANFD bus monitoring and alarm system and method based on the ZYNQ platform, thereby solving the problems mentioned in the background. The present invention, through hardware-based parallel processing, decouples the data anomaly monitoring function from the ARM application software, freeing the CPU from heavy real-time monitoring tasks, achieving low latency, high reliability, and ultra-low alarm functionality. While meeting high real-time requirements, it enables the CPU to handle more complex upper-layer applications, improving the system's reliability and flexibility, and supporting remote network data transmission.

[0005] To achieve the above objectives, the present invention is implemented through the following technical solution: a multi-channel CANFD bus monitoring and alarm system based on the ZYNQ platform. The alarm system includes a hardware platform, which is implemented based on the Xilinx ZYNQ series SoC. The hardware platform integrates an ARM processor (PS) and FPGA programmable logic (PL). The alarm system also includes a multi-channel CANFD physical interface, a CANFD transceiver module IP core, a CANFD monitoring module IP core, an alarm interrupt handling module, a data conversion module, and a monitoring rule configuration module.

[0006] Furthermore, the multi-channel CANFD physical interface is used to connect to the CANFD bus network of external devices. The ZYNQ series SOC is the control and processing core of the entire system, used to realize functions such as CANFD communication, data monitoring and processing, and network communication.

[0007] Furthermore, the CANFD transceiver module IP core is implemented based on ZYNQ SOC FPGA resources. Each CANFD bus corresponds to one CANFD monitoring module IP core, which is used to execute the standard CANFD protocol and complete the normal data transmission and reception functions.

[0008] Furthermore, the CANFD monitoring module IP core is implemented based on ZYNQ SOC FPGA resources. Each CANFD bus corresponds to one CANFD monitoring module IP core, and the CANFD monitoring module IP core and the transceiver IP core work in parallel.

[0009] The CANFD monitoring module monitors all data on the corresponding physical bus during IP verification and makes anomaly judgments based on predicted hardware rules. Once an anomaly is detected, the alarm interrupt module performs relevant processing directly through a hardware interrupt signal.

[0010] Furthermore, the alarm interruption processing module completes the corresponding abnormal data processing based on the abnormal data notification from the IP core of each CANFD monitoring module.

[0011] Furthermore, the data conversion module is implemented based on the ZYNQ SOC ARM terminal resources and real-time operating system. The data conversion module is used to complete the acquisition, packaging and conversion of multiple CAN data into Ethernet UDP data, and then upload it to the host computer via Ethernet.

[0012] Furthermore, the monitoring rule configuration module is implemented based on ZYNQ SOC ARM terminal resources and real-time operating system, and is used for monitoring configuration of each CANFD monitoring module IP core.

[0013] An alarm method using the above-mentioned alarm system includes the following steps:

[0014] S1. System Initialization: After the ARM processor starts up, the parameters of each IP core are configured;

[0015] S2. Normal data transmission: The CANFD transceiver IP core handles routine data transmission and reception, enabling normal system communication.

[0016] S3. Anomaly Monitoring and Alarm Handling: Monitors IP cores and parallel monitors bus data;

[0017] S4. Remote Data Transmission: CANFD data is transmitted to Ethernet in real time via a conversion module, supporting data analysis and visualization by host computer software.

[0018] Furthermore, in step S3, when data that conforms to the monitoring rules is detected, an alarm is triggered within microseconds. Based on the alarm information, external I / O control is used to shut down the relevant devices and trigger the external alarm device.

[0019] The beneficial effects of this invention are:

[0020] 1. This multi-channel CANFD bus monitoring and alarm system based on the ZYNQ platform uses hardware-based parallel processing to separate the data anomaly monitoring function from the ARM application software, freeing the CPU from heavy real-time monitoring tasks. This enables low-latency, high-reliability, ultra-low alarm functions, meeting high real-time requirements while allowing the CPU to handle more complex upper-layer applications, improving system reliability and flexibility, and supporting remote network data transmission.

[0021] 2. Once an anomaly is detected, the multi-channel CANFD bus monitoring and alarm system based on the ZYNQ platform can directly perform relevant processing in the alarm interrupt module through hardware interrupt signals without the need for application program and operating system intervention. It achieves low-latency alarm function while ensuring the normal operation of the original CANFD communication.

[0022] 3. This invention is implemented based on ZYNQ SOC ARM terminal resources and real-time operating system, and is used for monitoring configuration of the IP core of each CANFD monitoring module, thereby improving the flexibility of monitoring. Attached Figure Description

[0023] Figure 1 is a block diagram of a multi-channel CANFD bus monitoring and alarm system based on the ZYNQ platform according to the present invention.

[0024] Figure 2 is a detailed schematic diagram of a single-channel CANFD bus processing unit of a multi-channel CANFD bus monitoring and alarm system based on the ZYNQ platform according to the present invention. Detailed Implementation

[0025] To make the technical means, creative features, objectives and effects of this invention easier to understand, the invention will be further described below in conjunction with specific embodiments.

[0026] Please refer to Figures 1 and 2. The present invention provides the following technical solution: a multi-channel CANFD bus monitoring and alarm system based on the ZYNQ platform. This system, through hardware-based parallel processing, separates the data anomaly monitoring function from the ARM application software, freeing the CPU from heavy real-time monitoring tasks, and realizes a low-latency, high-reliability, ultra-low alarm function. While meeting high real-time requirements, it enables the CPU to handle more complex upper-layer applications, improves the system's reliability and flexibility, and supports remote network transmission of data.

[0027] Specifically, the bus monitoring and alarm system provided by this invention includes the following parts:

[0028] 1. System hardware platform establishment

[0029] The system is implemented based on a Xilinx ZYNQ SoC, where the ARM processor runs the domestic SylixOS real-time operating system, responsible for system initialization, IP core configuration, data conversion module, and normal operation of the monitoring rule configuration module; the FPGA logic section is used to implement the functions of the custom IP core and alarm interrupt handling module. Multiple CANFD buses connect to external devices via CANFD transceivers, and the Ethernet interface uses a gigabit Ethernet PHY chip.

[0030] 2. CANFD transceiver core IP implementation

[0031] Implemented based on the standard CANFD protocol, this IP core supports data frame transmission and reception, including bit timing, CRC checksum, and error handling. It communicates with the ARM processor via the AXI bus, allowing software configuration of communication parameters (such as baud rate and ID filtering).

[0032] 3. CANFD monitoring IP core implementation

[0033] The implementation of the CANFD monitoring IP core includes the following modules:

[0034] • Data capture module: Captures data frames on the CANFD bus in real time.

[0035] • Rule storage module: Stores preset exception rules (such as error frame detection, specific ID data range check), and the rules can be dynamically updated through the monitoring rule configuration module in the ARM processor.

[0036] • Rule matching module: Performs hardware comparison between captured data and rules, supporting parallel processing of multiple rules.

[0037] • Alarm triggering module: Once an anomaly is detected, a hardware interrupt or signal is immediately generated. Specific anomaly handling measures are implemented in the alarm interrupt handling module.

[0038] 4. Alarm Interruption Handling Module

[0039] This module mainly performs corresponding abnormal data processing functions based on the alarms of abnormal data from the IP core of each CANFD monitoring module. In this invention, the alarm processing method is to shut down the relevant devices and trigger the external alarm devices based on the alarm information via external IO control.

[0040] 5. Data conversion module implementation

[0041] This module, based on ZYNQ SOC ARM resources and the domestically developed Winghui real-time operating system, encapsulates received CANFD data frames into UDP / IP Ethernet frames and sends them to an Ethernet switch or host computer via ZYNQ's Ethernet MAC. The conversion process includes data parsing, frame reassembly, and protocol conversion, ensuring efficient data transmission.

[0042] 6. Monitoring rule configuration module

[0043] This module is based on ZYNQ SOC ARM resources and the domestic Winghui real-time operating system. It is mainly used for monitoring and configuring the IP core of each CANFD monitoring module, thereby improving the flexibility of bus monitoring.

[0044] This embodiment also provides an alarm monitoring method based on the above-mentioned bus monitoring and alarm system. The specific workflow of this method is as follows:

[0045] 1. System initialization: After the ARM processor starts, configure the parameters of each IP core (such as CANFD baud rate and monitoring rules).

[0046] 2. Normal data transmission: The CANFD transceiver IP core handles routine data transmission and reception, ensuring normal system communication.

[0047] 3. Anomaly Monitoring and Alarm Handling: The monitoring IP core monitors bus data in parallel. For example, when data matching the monitoring rules is detected, an alarm is triggered within microseconds. Based on the alarm information, external I / O control is used to shut down relevant devices and trigger external alarm devices. Testing shows that the IP interrupt response delay in this invention does not exceed 1µs, the interrupt detection module (detection clock 100MHz) has a delay of 20ns, and the GPIO output delay is 10ns.

[0048] 4. Remote data transmission: CANFD data is transmitted to Ethernet in real time via the conversion module, supporting data analysis and visualization by host computer software.

[0049] Based on the above method, once an anomaly is detected, the relevant processing can be performed directly in the alarm interrupt module through a hardware interrupt signal, without the need for application program and operating system intervention. This achieves low-latency alarm function while ensuring the normal operation of the original CANFD communication.

[0050] This embodiment has shown and described the basic principles, main features, and advantages of the present invention. It will be apparent to those skilled in the art that the present invention is not limited to the details of the above exemplary embodiments, and that the present invention can be implemented in other specific forms without departing from the spirit or basic features of the present invention.

[0051] Furthermore, it should be understood that although this specification describes embodiments, not every embodiment contains only one independent technical solution. This narrative style is merely for clarity. Those skilled in the art should consider the specification as a whole, and the technical solutions in each embodiment can also be appropriately combined to form other embodiments that can be understood by those skilled in the art.

Claims

1. A multi-channel CANFD bus monitoring and alarm system based on the ZYNQ platform, characterized in that: The alarm system includes a hardware platform based on the Xilinx ZYNQ series SoC, which integrates an ARM processor (PS) and FPGA programmable logic (PL). The alarm system also includes multiple CANFD physical interfaces, CANFD transceiver module IP cores, CANFD monitoring module IP cores, alarm interrupt handling modules, data conversion modules, and monitoring rule configuration modules.

2. The multi-channel CANFD bus monitoring and alarm system based on the ZYNQ platform according to claim 1, characterized in that: The multi-channel CANFD physical interface is used to connect to the CANFD bus network of external devices. The ZYNQ series SOC is the control and processing core of the entire system, used to realize CANFD communication, data monitoring and processing, and network communication functions.

3. A multi-channel CANFD bus monitoring and alarm system based on the ZYNQ platform according to claim 2, characterized in that: The CANFD transceiver module IP core is implemented based on ZYNQ SOC FPGA resources. Each CANFD bus corresponds to a CANFD monitoring module IP core, which is used to execute the standard CANFD protocol and complete the normal data transmission and reception functions.

4. The multi-channel CANFD bus monitoring and alarm system based on the ZYNQ platform according to claim 1, characterized in that: The CANFD monitoring module IP core is implemented based on ZYNQ SOC FPGA resources. Each CANFD bus corresponds to one CANFD monitoring module IP core, and the CANFD monitoring module IP core works in parallel with the transceiver IP core. The CANFD monitoring module IP core monitors all data on the corresponding physical bus in real time and performs anomaly judgment according to the predicted hardware rules. Once an anomaly is detected, the relevant processing is performed directly in the alarm interrupt module through a hardware interrupt signal.

5. A multi-channel CANFD bus monitoring and alarm system based on the ZYNQ platform according to claim 4, characterized in that: The alarm interruption processing module completes the corresponding abnormal data processing based on the abnormal data notification from the IP core of each CANFD monitoring module.

6. A multi-channel CANFD bus monitoring and alarm system based on the ZYNQ platform according to claim 1, characterized in that: The data conversion module is implemented based on ZYNQ SOC ARM terminal resources and real-time operating system. The data conversion module is used to complete the acquisition, packaging and conversion of multiple CAN data into Ethernet UDP data, and then upload it to the host computer via Ethernet.

7. A multi-channel CANFD bus monitoring and alarm system based on the ZYNQ platform according to claim 1, characterized in that: The monitoring rule configuration module is implemented based on ZYNQ SOC ARM terminal resources and real-time operating system. The monitoring rule configuration module is used for monitoring configuration of each CANFD monitoring module IP core.

8. An alarm method using the alarm system as described in claim 1, characterized in that, Includes the following steps: S1. System Initialization: After the ARM processor starts, the parameters of each IP core are configured; S2. Normal Data Transmission: The CANFD transceiver IP core handles normal data transmission and reception, enabling normal system communication; S3. Anomaly Monitoring and Alarm Handling: The monitoring IP core monitors the bus data in parallel; S4. Remote Data Transmission: CANFD data is transmitted to the Ethernet in real time via the conversion module, supporting data analysis and visualization by the host computer software.

9. The alarm method according to claim 8, characterized in that: In step S3, when data that matches the monitoring rules is detected, an alarm is triggered within microseconds. Based on the alarm information, external I / O control is used to shut down the relevant devices and trigger the external alarm device.

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