Decoding method, device, equipment, medium and product

Abstract

Disclosed are a decoding method, apparatus, device, medium and product, the method comprising: in response to a decoding request for target data, dividing the target data into at least one sub-block according to a preset length, the target data comprising system sequence soft information, verification sequence soft information and prior information; performing multi-channel parallel computing on the target data according to a pre-stored state transition table, and respectively determining current branch metric information of each sub-block, current forward state metric information of the target data and current backward state metric information of the target data; determining a posterior probability log-likelihood ratio and extrinsic information of each sub-block according to the current branch metric information, the current forward state metric information and the current backward state metric information; and determining a decoding result for target data according to each posterior probability log-likelihood ratio. According to the technical characteristics, the decoding complexity is reduced, the calculation time delay is reduced, and the decoding efficiency is improved.

Description

Technical Field

[0001] This invention relates to the field of data processing technology, and in particular to a decoding method, apparatus, device, medium, and product. Background Technology

[0002] In the field of wireless communication, double binary Turbo codes are widely used in scenarios with high requirements for data transmission reliability due to their high coding gain characteristics. Their decoding performance directly affects the overall transmission efficiency and stability of the communication system.

[0003] Currently, most dual-binary Turbo decoding algorithms employ the classic Bayesian convolutional code decoding algorithm (Bahl-Cocke-Jelinek-Raviv Algorithm, BCJR) based on iterative swapping of the outer shoe. This algorithm is complex, has high latency, and consumes a lot of storage space, making it unsuitable for practical system deployment. Summary of the Invention

[0004] This invention provides a decoding method, apparatus, device, medium, and product that reduces decoding complexity, decreases computational latency, and improves decoding efficiency.

[0005] In a first aspect, embodiments of this disclosure provide a decoding method, including:

[0006] In response to a decoding request for target data, the target data is divided into at least one sub-block according to a preset length, the target data including system sequence soft information, check sequence soft information and prior information;

[0007] The target data is computed in multiple parallel paths according to the pre-stored state transition table, and the current branch metric information, the current forward state metric information, and the current backward state metric information of the target data are determined for each sub-block.

[0008] Based on the current branch metric, the current forward state metric, and the current backward state metric, determine the posterior probability log-likelihood ratio and extrinsic information for each sub-block;

[0009] The decoding result for the target data is determined based on the log-likelihood ratio of each posterior probability.

[0010] Secondly, embodiments of this disclosure provide a decoding apparatus, comprising:

[0011] The target data partitioning module is used to divide the target data into at least one sub-block according to a preset length in response to a decoding request for the target data. The target data includes system sequence soft information, check sequence soft information and prior information.

[0012] The multi-path parallel computing module is used to perform multi-path parallel computing on the target data according to the pre-stored state transition table, and to determine the current branch metric information, the current forward state metric information and the current backward state metric information of the target data for each sub-block.

[0013] The metric information calculation module is used to determine the posterior probability log-likelihood ratio and extrinsic information of each sub-block based on the current branch metric information, the current forward state metric information and the current backward state metric information.

[0014] The target data decoding module is used to determine the decoding result for the target data based on the log-likelihood ratio of each posterior probability.

[0015] Thirdly, embodiments of this disclosure provide an electronic device, including:

[0016] At least one processor; and

[0017] A memory that is communicatively connected to at least one processor; wherein,

[0018] The memory stores a computer program that can be executed by at least one processor, such that the at least one processor is able to execute a decoding method provided in the first aspect embodiment described above.

[0019] Fourthly, embodiments of this disclosure provide a computer-readable storage medium storing computer instructions that, when executed by a processor, implement a decoding method provided in the first aspect of the embodiments described above.

[0020] Fifthly, this disclosure provides a computer program product, which includes a computer program that, when executed by a processor, implements a decoding method provided in the first aspect of the embodiments described above.

[0021] The technical solution of this invention, in response to a decoding request for target data, divides the target data into at least one sub-block of a preset length. The target data includes system sequence soft information, check sequence soft information, and prior information. Multi-path parallel computation is performed on the target data according to a pre-stored state transition table to determine the current branch metric, the current forward state metric, and the current backward state metric of each sub-block. Based on the current branch metric, the current forward state metric, and the current backward state metric, the posterior probability log-likelihood ratio and extrinsic information of each sub-block are determined. The decoding result for the target data is determined based on each of the posterior probability log-likelihood ratios. These technical features, through sub-block partitioning and multi-path parallel computation, reduce complexity, decrease latency, solve the problem of high storage consumption, do not limit the upper limit of the number of parallel paths, break through the 8-path parallel bottleneck of existing FPGA solutions, and improve decoding efficiency to adapt to higher speed requirements.

[0022] It should be understood that the description in this section is not intended to identify key or essential features of the embodiments of the present invention, nor is it intended to limit the scope of the invention. Other features of the invention will become readily apparent from the following description. Attached Figure Description

[0023] To more clearly illustrate the technical solutions in the embodiments of the present invention, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0024] Figure 1 This is a flowchart of a decoding method provided in Embodiment 1 of the present invention;

[0025] Figure 2 This is a flowchart of a decoding method provided in Embodiment 2 of the present invention;

[0026] Figure 3 This is a flowchart of another decoding method provided in Embodiment 2 of the present invention;

[0027] Figure 4 This is a schematic diagram illustrating the processing of current forward state measurement information provided in Embodiment 2 of the present invention;

[0028] Figure 5 This is a schematic diagram illustrating the processing of current backward state measurement information provided in Embodiment 2 of the present invention;

[0029] Figure 6 This is a schematic diagram of a decoder provided in Embodiment 2 of the present invention;

[0030] Figure 7 This is a schematic diagram of a decoder neutron decoder provided in Embodiment 2 of the present invention;

[0031] Figure 8 This is a schematic diagram of the structure of a decoding device provided in Embodiment 3 of the present invention;

[0032] Figure 9 This is a schematic diagram of the structure of an electronic device provided in Embodiment 4 of the present invention. Detailed Implementation

[0033] To enable those skilled in the art to better understand the present invention, the technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings of the embodiments of the present invention. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort should fall within the scope of protection of the present invention.

[0034] It should be noted that the terms "first," "second," etc., in the specification, claims, and accompanying drawings of this invention are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate so that the embodiments of the invention described herein can be implemented in orders other than those illustrated or described herein. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover a non-exclusive inclusion; for example, a process, method, system, product, or apparatus that comprises a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or apparatus.

[0035] Currently, the typical decoding implementation scheme is a parallel implementation scheme based on Field Programmable Gate Array (FPGA). This scheme adopts an 8-way non-overlapping sliding window parallel block and pipeline structure, using Xilinx XC7K410T as the hardware platform and Verilog, an ultra-high-speed integrated circuit hardware description language. When the data block length is 520 bytes and after 4 iterations, the data rate reaches 200 Mbit / s. However, the above-mentioned existing scheme still has obvious technical defects: the classic BCJR decoding algorithm based on external information iterative exchange has high complexity, large latency, and large storage space consumption, which is not conducive to practical applications; the FPGA parallel scheme is also limited by system requirements and resource consumption, and can only realize a maximum of 8-way parallel decoding, and the decoding efficiency is difficult to meet the requirements of higher speed scenarios.

[0036] Example 1

[0037] Figure 1 This is a flowchart of a decoding method provided in Embodiment 1 of the present invention. This embodiment is applicable to the case of dual binary Turbo decoding of target data. The method can be executed by a decoding device, which can be implemented in hardware and / or software. The decoding device is integrated into a decoder, which contains two sub-decoders. In this embodiment of the present invention, the two sub-decoders in the decoder are executed cyclically.

[0038] like Figure 1 As shown, the method includes:

[0039] S101. In response to a decoding request for target data, the target data is divided into at least one sub-block according to a preset length. The target data includes system sequence soft information, check sequence soft information, and prior information.

[0040] In this embodiment, the target data can be understood as the dual-binary Turbo code encoded data to be decoded, including system sequence soft information, parity sequence soft information, and prior information. The system sequence soft information is the original information carrier that needs to be retained during the decoding process; the parity sequence soft information is redundant information used to verify the correctness of transmission; and the prior information is the preliminary estimate of the symbol value probability input in the initial stage of decoding. Turbo code is a parallel concatenated convolutional code (PCCC), a high-performance channel coding technique based on iterative enhancement logic. The preset length CBSize can be understood as a pre-defined sub-block partitioning standard, such as 599 bits. A sub-block can be understood as an independent data unit formed by splitting the target data according to the preset length. Each sub-block contains the corresponding segment's system sequence soft information, parity sequence soft information, and prior information, and is the basic processing unit for parallel computing.

[0041] Specifically, upon receiving a decoding request for target data, the system sequence soft information, check sequence soft information, and prior information contained in the target data are extracted. The complete target data is then divided into at least one sub-block of a preset length (599 bits). (The number of sub-blocks can be flexibly adjusted according to the total data volume and the preset length, supporting single-block or multi-block parallel processing.) During the splitting process, the integrity of the information in each sub-block is ensured, and the correspondence between various types of information is not disrupted, laying the data foundation for subsequent multi-path parallel computation. If the total length of the target data is an integer multiple of the preset length... If the total length of the target data is not an integer multiple of the preset length, it is still divided into N complete sub-blocks according to the preset length. The remaining data that is less than the preset length forms a separate sub-block, ensuring that all data is divided into sub-blocks. It is understood that this embodiment does not limit the number of sub-blocks. However, based on the common data length, dividing the target data into 4 sub-blocks is sufficient to meet most application scenarios, and each sub-block can achieve 4-way parallel operation. Based on this, the present invention can achieve 16-way parallel operation.

[0042] S102. Perform multi-path parallel computation on the target data according to the pre-stored state transition table, and determine the current branch metric information, the current forward state metric information and the current backward state metric information of the target data for each sub-block.

[0043] In this embodiment, the state transition table can be understood as a pre-stored data table containing the original state transition table required for dual-binary Turbo code decoding and the derived alpha, beta, and gamma transformation state transition tables, recording the transition rules between different states and the corresponding metric calculation basis. Multi-path parallel computing can be understood as a method of simultaneously calculating different metric information of multiple sub-blocks or the same sub-block based on multiple independent computing units. In this embodiment, it can be based on 4 sub-blocks, with each sub-block performing 4-way parallel computing, achieving 16-way parallel operation. The current branch metric information can be understood as the information of the transition path weights of each symbol in the target data, calculated based on the gamma transformation state transition table. The data length of the current branch metric information for each sub-block is... The current forward state metric can be understood as the cumulative probability metric of the state from the beginning of the data to the current position. It is calculated based on the alpha transition state table. The data length of the current forward state metric of the target data is... The current backward state metric can be understood as the cumulative probability metric of the state from the end of the data set to the current position. It is calculated based on the beta transition state table. The data length of the current backward state metric for the target data is [data length missing]. .

[0044] Specifically, for the initial computation, prior information is initialized. A pre-stored state transition table is invoked, and multi-path parallel computation is performed for each sub-block. First, based on the system sequence soft information, check sequence soft information, and prior information of each sub-block, a gamma transformation state transition table derived from the original state transition table is matched, and the current branch metric information of each sub-block is calculated in parallel. Then, combining the current branch metric information of each sub-block with the current forward state metric information of the previous iteration (the forward state metric information in the first iteration is the initial preset value), the alpha transformation state transition table derived from the original state transition table is invoked to derive the current forward state metric information of the target data. Simultaneously, combining the current branch metric information of each sub-block with the backward state metric information of the previous iteration (the backward state metric information in the first iteration is the initial preset value), the beta transformation state transition table derived from the original state transition table is invoked to obtain the current backward state metric information of the target data. The calculation process of these three types of metrics can be performed synchronously without any serial waiting steps.

[0045] S103. Based on the current branch metric information, the current forward state metric information, and the current backward state metric information, determine the posterior probability log-likelihood ratio and extrinsic information for each sub-block.

[0046] In this embodiment, the posterior log-likelihood ratio (LLR) represents the logarithmic form of the probability ratio of each symbol taking different values ​​(0, 1, 2, 3), and is the core basis for determining the true value of a symbol. The data length of the posterior log-likelihood ratio for each sub-block is [data length missing]. Extrinsic information can be understood as the pure external incremental information obtained by removing system sequence soft information, check sequence soft information, and prior information from the posterior probability log-likelihood ratio. It is the core content of data interaction between the two sub-decoders in iterative decoding. The data length of the extrinsic information for each sub-block is [data length missing]. .

[0047] Specifically, after obtaining the current branch metric, current forward state metric, and current backward state metric, the current forward state metric α, current branch metric γ, and current backward state metric β are substituted into the LLR calculation formula. Through the cumulative operation of α, γ, and β, combined with the probability rules of the double binary Turbo code symbol values ​​(0, 1, 2, 3), the LLR value of each sub-block is obtained, LLR(k) k=0,1,2,3 (data length: The extrinsic information calculation formula is called to subtract the system sequence soft information, check sequence soft information, and prior information from the target data from the LLR value to obtain the extrinsic information of each sub-block. Within each sub-block, the intermediate results for the four cases k=0, 1, 2, and 3 are calculated in parallel. However, according to the rules, the results for k=0, 1, and 2 can all be subtracted from the result for k=3 to obtain a valid value. Therefore, only the results for k=0, 1, and 2 are output in the end, resulting in the extrinsic information le(k)k=0,1,2 (data length: ).

[0048] S104. Determine the decoding result for the target data based on the log-likelihood ratio of each posterior probability.

[0049] In this embodiment, the decoding result can be understood as the information that is consistent with the original transmitted data and is finally output through the decoding process. It is reliable data obtained after decoding and correcting transmission errors of the target data.

[0050] Specifically, first, it is determined whether the current decoding iteration count has reached the preset iteration count threshold. If not, the external information is interleaved or deinterleaved according to the requirements of the sub-decoder, and used as prior information for the next iteration. Step S102 is then re-executed until the preset iteration count threshold is reached. If the threshold has been reached, the LLRs of all sub-blocks are deinterleaved in the original data order to integrate a complete LLR sequence covering the entire target data. Then, a hard decision is made on each integrated LLR value, comparing the four LLR values ​​corresponding to each symbol (corresponding to symbol values ​​0, 1, 2, and 3 respectively). The symbol corresponding to the LLR with the largest value is selected as the final decision result. Finally, the decision results of all symbols are combined to form the decoding result of the target data, restoring the original information sent initially.

[0051] This invention provides a decoding method comprising, in response to a decoding request for target data, dividing the target data into at least one sub-block of a preset length, wherein the target data includes system sequence soft information, check sequence soft information, and prior information; performing multi-path parallel computation on the target data according to a pre-stored state transition table, determining the current branch metric information, the current forward state metric information, and the current backward state metric information of each sub-block; determining the posterior probability log-likelihood ratio and extrinsic information of each sub-block based on the current branch metric information, the current forward state metric information, and the current backward state metric information; and determining the decoding result for the target data based on each posterior probability log-likelihood ratio. This technical solution, through sub-block partitioning and multi-path parallel computation, reduces complexity, reduces latency, and solves the problem of high storage consumption. By setting four sub-blocks, each with four parallel operations, 16-way parallel computation can be achieved, breaking through the 8-way parallel bottleneck of existing FPGA solutions, and improving decoding efficiency to adapt to higher speed requirements.

[0052] As a first optional embodiment of this method, the method further includes:

[0053] After obtaining the posterior probability log-likelihood ratio of each sub-block, release the storage space corresponding to the current branch metric, the current forward state metric, and the current backward state metric.

[0054] In this embodiment, the posterior probability log-likelihood ratio (LLR) of each sub-block is sufficient to support the subsequent calculation process of this iteration. At this point, the current branch metric, current forward state metric, and current backward state metric used to calculate the LLR in this iteration have become redundant information. To reduce the waste of storage resources, after obtaining the posterior probability log-likelihood ratio of each sub-block, the storage space of the corresponding current branch metric, current forward state metric, and current backward state metric is released.

[0055] Example 2

[0056] Figure 2 This is a flowchart of a decoding method provided in Embodiment 2 of the present invention. This embodiment is a further optimization of any of the above embodiments and is applicable to the case of dual binary Turbo decoding of target data. The method can be executed by a decoding device, which can be implemented in hardware and / or software.

[0057] like Figure 2 As shown, the method includes:

[0058] S201. In response to a decoding request for target data, the target data is divided into at least one sub-block according to a preset length.

[0059] S202. Based on the system sequence soft information, check sequence soft information and prior information corresponding to each sub-block, call the first transition state transition table of the pre-stored original state transition table to obtain the current branch metric information of each sub-block.

[0060] In this embodiment, the original state transition table can be understood as a pre-stored basic table of state transitions for the dual binary Turbo code in the decoding system. It records the transition rules and corresponding parameters of the dual binary symbols (values ​​0, 1, 2, 3) between different states and serves as the benchmark for decoding metric calculation. The original state transition table is shown in the table below:

[0061]

[0062] .

[0063] The first transition table can be understood as a gamma transition table derived from the original transition table. It integrates prior information coefficients, system sequence soft information coefficients, and check sequence soft information coefficients, which correspond to the mapping relationships between prior information, system sequence soft information, and check sequence soft information and branch metrics, respectively. When called, the three types of information can be directly input to calculate the branch metric without additional derivation of the transition logic, thus improving computational efficiency. In this embodiment, the current branch metric information... In a given observation (Usually the output of the demodulator) Under the condition of transitioning from k-1 quantities to k quantities, the probability of state m to m', where k represents the corresponding number of bits, ranging from the maximum code length; m represents the current state, and m' represents the previous state. The first transition state table is shown below:

[0064] .

[0065] Specifically, for each sub-block after partitioning, branch metric calculation is performed. The corresponding system sequence soft information, check sequence soft information, and prior information are extracted from the sub-block, ensuring that the bit order of these three types of information perfectly matches the bit order of the sub-block data. The multi-processing units in each sub-block synchronously call the first transition table of the pre-stored original state transition table, inputting the three types of information of the sub-block according to the table index rules. By looking up the table and calculating the branch metric values ​​of different symbol transition paths within the sub-block, the branch metric values ​​of all symbols within the sub-block are integrated to form the complete current branch metric information for that sub-block. The calculation process of all sub-blocks is completed synchronously, achieving multi-path parallelism. The formula for calculating the current branch metric information is: In the formula, As prior information, x and y correspond to the system sequence soft information and the check sequence soft information, respectively; u k is the current symbol, with values ​​of 0, 1, 2, and 3; Lc is the calculation coefficient of the branch metric, which is a fixed value, and the specific value can be determined based on the actual situation; k represents the time; s and p are the serial numbers (1-16) of the gamma column in the first transition state table above, representing different states, which are used to calculate the branch metric corresponding to the soft information coefficient and the prior information coefficient.

[0066] S203. Based on the current branch measurement information and the historical forward state measurement information, call the second transition state transition table of the pre-stored original state transition table to obtain the current forward state measurement information of the target data.

[0067] In this embodiment, the current forward state metric information is represented in the logarithm field as follows: This is the cumulative probability metric from the start of the data to time k, with the encoded state being s. The historical forward state metric information can be understood as the forward state metric information generated in the previous decoding iteration, with a preset initial value used as the forward state input during the first iteration. The second transition state table can be understood as an alpha transition state table derived from the original state transition table, integrating the correspondence between the forward state input alphaIn (historical forward state metric information), the branch metric input gammaIn (current branch metric information), and the forward state output alphaOut (current forward state metric information). The second transition state table is shown in the table below:

[0068]

[0069] Specifically, Figure 4 This is a schematic diagram illustrating the processing of current forward state measurement information according to Embodiment 2 of the present invention, as shown below. Figure 4 As shown, the historical forward state metric information of the previous time step (k-1) is read, the second transition state table is called, and the corresponding alphaIn column is located according to the currently processed symbol. At the same time, the current branch metric information corresponding to that column is obtained. For each current state s, there are two previous states, which are respectively and The probability of going from S1 to S is The probability of going from S2 to S is , Based on e1 and e2, the corresponding forward state output can be evaluated. Repeat the above table lookup and calculation operations for time k of all sub-blocks to obtain the current forward state metric information covering the entire sequence of target data.

[0070] S204. Based on the current branch measurement information and the historical backward state measurement information, call the third transition state transition table of the pre-stored original state transition table to obtain the current backward state measurement information of the target data.

[0071] In this embodiment, the current backward state metric information is represented in the logarithm field as follows: This is the cumulative probability metric from the end of the data to time k-1, with the encoded state being m. The historical backward state metric information is the backward state metric information generated in the previous decoding iteration, and is the preset initial value used as the backward state input during the first iteration. The third transition state table is a beta transition table derived from the original state transition table, integrating the correspondence between the backward state input betaIn (historical backward state metric information), the branch metric input gammaIn (current branch metric information), and the backward state output betaOut (current backward state metric information). The third transition state table is shown in the table below:

[0072]

[0073] Specifically, Figure 5 This is a schematic diagram illustrating the processing of current backward state measurement information provided in Embodiment 2 of the present invention, as shown below. Figure 5 As shown, the historical backward state metric information of the next time step (k+1) is read, the third transition state table is called, and the corresponding betaIn column is located according to the currently processed symbol. At the same time, the current branch metric information corresponding to this column is obtained. For each current state s, there are two corresponding next states, which are respectively and The probability of going from S1 to S is The probability of going from S1 to S is , Based on e1 and e2, the corresponding backward state output can be evaluated. It is understandable that the backward state output can also be achieved through... The calculation is obtained. The above table lookup and calculation operations are repeated for time k of all sub-blocks in reverse data order to obtain the current backward state metric information covering the entire target data sequence.

[0074] S205. Based on the current branch metric information, the current forward state metric information, and the current backward state metric information, determine the posterior probability log-likelihood ratio of each sub-block.

[0075] In this embodiment, the dual-binary Turbo decoding employs a symbol-based decision method. For each decoded bit pair (one symbol), the maximum posterior probability log-likelihood ratio (LLR) of that symbol is used to determine the decoding result, employing the Max-log-MAP formula. The LLR was calculated. ), in a given set of observations The logarithm of the ratio of the probabilities of the Nth bit being 1, 2, 3, or 0. Since the encoded state is only related to the previous state and the current transition probability, it is a Markov process and can therefore be written as: In the formula, S is the state variable, and m is the specific state. The LLR can be expressed as the ratio of the probability of transitioning from state m' to state m from the Nth bit of the observation to the end of the data to the probability of transitioning from state m' to state m from the Nth bit of the observation to the beginning of the data. Let... ,in Given that the sequence has been observed up to the (k-2)th quantity, the probability that the state of the finite machine at the (k-1)th quantity is m' is also known as the forward state metric (forward probability). Given that the sequence extends from the end to the (k+1)th quantity, the probability that the state of the encoded finite machine is m for the (k+1)th quantity is observed. This is also known as the backward state metric (backward probability). For observation Given a condition, the probability of transitioning from state m to state m' of k quantities is called the branch metric. Then, the posterior probability log-likelihood ratio... It can be by To represent: S' represents the current state machine, s represents the next state machine, which is the state variable described in the above formula; k represents the corresponding number of bits, ranging from the maximum code length; u k The symbol represents the current symbol, with values ​​of 0, 1, 2, and 3; Z represents the corresponding correspondence likelihood probability index, with values ​​of 1, 2, and 3; alpha is the forward probability, beta is the backward probability, and gamma is the branch metric.

[0076] That is, for each sub-block, LLR parallel computation is initiated, and the current branch metric information, the current forward state metric information, and the current backward state metric information of the sub-block are read to ensure that the position order and state dimension of the three types of information are completely aligned. Then, the three types of information are substituted into the LLR calculation formula, and the LLR value of symbol s is calculated one by one according to the value of the double binary symbol (0, 1, 2, 3). This process is repeated to obtain the LLR values ​​corresponding to the four values ​​of all symbols in the sub-block. After integration, the complete LLR of the sub-block is formed.

[0077] S206. Determine the extrinsic information of each sub-block based on the system sequence soft information, check sequence soft information, and prior information in the target data, as well as the posterior probability log-likelihood ratio.

[0078] Specifically, for each sub-block, according to Remove system sequence soft information, check sequence soft information, and prior information from the posterior probability log-likelihood ratio. Then, the external information of state Uk is obtained. .

[0079] S207. Determine whether the current decoding iteration count has reached the preset iteration count threshold.

[0080] In this embodiment, the current decoding iteration count can be understood as the number of complete decoding loops that have been completed since the decoding process started. Each decoding loop is considered complete when both sub-decoders execute a decoding process once. A single decoding process includes the calculation of the current branch metric, the current forward state metric, the current backward state metric, and the generation of the posterior probability log-likelihood ratio and extrinsic information. This is a real-time parameter used to determine whether the iteration has terminated, and it is automatically incremented by 1 after each loop. The preset iteration count threshold can be understood as a pre-defined iteration termination criterion, determined based on the decoding performance requirements of the dual-binary Turbo code and hardware resource limitations.

[0081] Specifically, after outputting external information, the current decoding iteration count is first read, and the pre-stored preset iteration count threshold is retrieved. The two are compared. If the current decoding iteration count is greater than or equal to the preset iteration count threshold, it means that the current decoding accuracy meets the requirements and no further iteration is needed; otherwise, it means that further iteration is still needed to correct the error.

[0082] S208. If the preset iteration number threshold is reached, the posterior probability log-likelihood ratio of each sub-block is deinterleaved and hard-decision processed to obtain the decoding result of the target data.

[0083] In this embodiment, deinterleaving is the operation of restoring the LLR of each sub-block according to the original data bit order. It corresponds to the inverse operation of interleaving during the iteration process. Since the previous parallel computation and iteration may have scrambled the LLR order, deinterleaving ensures that the LLR bit order is consistent with the original bit order of the target data, laying the foundation for correct hard decision. Hard decision is the operation of determining the final value of the symbol based on the LLR value. Since the larger the LLR value, the higher the probability of the corresponding symbol value, the symbol value with the largest LLR value is usually selected as the final result.

[0084] Specifically, when the number of iterations reaches a threshold, decoding result generation is initiated. The LLRs of all sub-blocks are deinterleaved, and the LLRs of each sub-block are rearranged according to the bit order of the original target data to form a continuous LLR sequence covering the entire target data sequence. This ensures that the LLR bit order completely matches the bit order of the original transmitted data. Then, hard decision is performed on the continuous LLR sequence, processing each symbol bit in order. The four LLR values ​​(corresponding to values ​​0, 1, 2, and 3) of each symbol are compared, and the symbol corresponding to the largest LLR value is selected as the final value of that bit. After all symbols have completed hard decision, the results are integrated according to bit order to form a complete target data decoding result.

[0085] S209. If the preset iteration number threshold is not reached, the external information is interleaved or deinterleaved according to the input requirements of the sub-decoder and used as the prior information of another sub-decoder in the decoder. The other sub-decoder returns to re-execute the multi-path parallel calculation of the target data according to the pre-stored state transition table until the current decoding iteration number reaches the preset iteration number threshold.

[0086] In this embodiment, the interleaving or deinterleaving process involves scrambling (interleaving) or restoring (deinterleaving) the bit order of external information according to the input requirements of the sub-decoders. In this embodiment, the process is performed iteratively by two sub-decoders within the decoder. Figure 6 This is a schematic diagram of a decoder provided in Embodiment 2 of the present invention. Figure 7 This is a schematic diagram of a decoder neutron decoder provided in Embodiment 2 of the present invention, as shown below. Figure 6 and 7 As shown, the decoder internally consists of two soft-input soft-output (SISO) sub-decoders, interleaving, deinterleaving, and hard decision modules. The two sub-decoders are designated SISO sub-decoder 1 and SISO sub-decoder 2. Based on state transitions and the relationship between inputs and outputs, the sub-decoders calculate the extrinsic information and posterior probability information for each bit using the received system information and verification information, and select the maximum posterior probability used for hard decision as the decoding estimate. The inputs to each sub-decoder are prior information La, system sequence soft information Ys, and verification sequence soft information Yp. These are called soft information because they do not affect the hard decision before demodulation and are directly input into the decoder. The inputs are all positive and negative decimals instead of 0 or 1 bits. The outputs are the posterior probability log-likelihood ratio L and the extrinsic information Le.

[0087] Specifically, such as Figure 6 and Figure 7 As shown, the decoding process for target data based on the decoder begins with the SISO1 sub-decoder processing the system sequence soft information Ys, the first check sequence soft information Y1p, and the corresponding prior information La1. The SISO1 sub-decoder then decodes the extrinsic information Le12 and the posterior probability log-likelihood ratio L1(uk). Ys is interleaved to obtain Ys', which serves as the system sequence soft information input to the SISO2 sub-decoder. The extrinsic information Le12 is interleaved to obtain La2, which serves as the prior information input to the SISO2 sub-decoder. Simultaneously, the second check sequence soft information Y2p is input to the SISO2 sub-decoder. The extrinsic information Le21 calculated by the SISO2 sub-decoder, after deinterleaving, becomes the prior information La1 input to the SISO1 sub-decoder (the dimension of the prior information is...). Simultaneously, the SIS02 decoder outputs the posterior probability log-likelihood ratio L2(uk). This process is repeated iteratively from step S201 to S209. After the current decoding iteration count reaches a preset iteration threshold, the L2(uk) calculated by the SISO2 sub-decoder is deinterleaved and then sent to the hard decision function to determine the final decoded sequence. The two decoders work in turn. It is understandable that during the first iteration, the SISO2 sub-decoder does not output valid prior information. Therefore, the prior information La1 of the decoder input to SISO1 is set to zero at this time.

[0088] The present invention provides a decoding method comprising, in response to a decoding request for target data, dividing the target data into at least one sub-block of a preset length; based on the system sequence soft information, check sequence soft information, and prior information corresponding to each sub-block, calling a first transition state transition table of a pre-stored original state transition table to obtain the current branch metric information of each sub-block; based on each current branch metric information and historical forward state metric information, calling a second transition state transition table of the pre-stored original state transition table to obtain the current forward state metric information of the target data; based on each current branch metric information and historical backward state metric information, calling a third transition state transition table of the pre-stored original state transition table to obtain the current backward state metric information of the target data; and based on the current branch metric information and the current forward state metric information... Based on the information and current backward state metric information, determine the posterior probability log-likelihood ratio of each sub-block; determine the extrinsic information of each sub-block based on the system sequence soft information, parity sequence soft information, prior information, and posterior probability log-likelihood ratio in the target data; determine whether the current decoding iteration count has reached the preset iteration count threshold; if the preset iteration count threshold has been reached, de-interleave and hard-decision processing are performed on the posterior probability log-likelihood ratio of each sub-block to obtain the decoding result of the target data; if the preset iteration count threshold has not been reached, the extrinsic information is interleaved or de-interleaved according to the input requirements of the sub-decoder and used as the prior information of another sub-decoder within the decoder. The other sub-decoder then returns to re-execute the multi-path parallel computation of the target data according to the pre-stored state transition table until the current decoding iteration count reaches the preset iteration count threshold. The aforementioned technical solution, through its sub-block partitioning and multi-path parallel computing architecture, achieves efficient splitting and parallel processing of target data. Furthermore, by leveraging the lookup-based computation of the state transition table, it significantly reduces the computational complexity of branching and forward / backward state metrics, thereby improving decoding efficiency. Simultaneously, the iterative logic centered on LLR, combined with the interleaving / deinterleaving of external information, allows the two SISO sub-decoders to alternately optimize prior information, gradually improving the reliability of the posterior probability. This balances decoding accuracy and resource consumption under the constraint of a preset iteration threshold. Finally, deinterleaving and hard-decision processing ensure that the output sequence maintains the same bit order and accuracy as the original data. The entire process is compatible with the encoding characteristics of dual-binary Turbo codes and, through modular design (sub-block partitioning, metric computation, and iterative control), balances lightweight hardware implementation with high decoding performance reliability, effectively solving the problems of long decoding times and high resource consumption inherent in traditional serial decoding.

[0089] Example 3

[0090] Figure 8 This is a schematic diagram of a decoding device provided in Embodiment 3 of the present invention. Figure 8 As shown, the device includes:

[0091] The target data partitioning module 31 is used to divide the target data into at least one sub-block according to a preset length in response to a decoding request for the target data. The target data includes system sequence soft information, check sequence soft information and prior information.

[0092] The multi-path parallel computing module 32 is used to perform multi-path parallel computing on the target data according to the pre-stored state transition table, and to determine the current branch metric information, the current forward state metric information and the current backward state metric information of each sub-block respectively.

[0093] The metric information calculation module 33 is used to determine the posterior probability log-likelihood ratio and extrinsic information of each sub-block based on the current branch metric information, the current forward state metric information and the current backward state metric information.

[0094] The target data decoding module 34 is used to determine the decoding result for the target data based on the log-likelihood ratio of each posterior probability.

[0095] The decoding device used in this technical solution reduces decoding complexity, computational latency, and improves decoding efficiency.

[0096] Optionally, the multi-path parallel computing module 32 is specifically used for:

[0097] Based on the system sequence soft information, check sequence soft information and prior information corresponding to each sub-block, the first transition state transition table of the pre-stored original state transition table is called to obtain the current branch metric information of each sub-block;

[0098] Based on the current branch measurement information and historical forward state measurement information, the second transition state transition table of the pre-stored original state transition table is called to obtain the current forward state measurement information of the target data;

[0099] Based on the current branch metric information and historical backward state metric information, the third transition state transition table of the pre-stored original state transition table is called to obtain the current backward state metric information of the target data.

[0100] Optionally, the measurement information calculation module 33 is specifically used for:

[0101] Based on the current branch metric, the current forward state metric, and the current backward state metric, determine the posterior probability log-likelihood ratio of each sub-block;

[0102] Based on the system sequence soft information, check sequence soft information, and prior information in the target data, as well as the posterior probability log-likelihood ratio, the extrinsic information of each sub-block is determined.

[0103] Optionally, the target data decoding module 34 is specifically used for:

[0104] Determine whether the current decoding iteration count has reached the preset iteration count threshold;

[0105] If the preset iteration number threshold is reached, the posterior probability log-likelihood ratio of each sub-block is deinterleaved and hard-decision processed to obtain the decoding result of the target data;

[0106] If the preset iteration threshold is not reached, the external information is interleaved or deinterleaved according to the input requirements of the sub-decoder and used as prior information for another sub-decoder in the decoder. The other sub-decoder then returns to re-execute the multi-path parallel computation of the target data according to the pre-stored state transition table until the current decoding iteration count reaches the preset iteration threshold.

[0107] Optionally, the device further includes a storage space release module for:

[0108] After obtaining the posterior probability log-likelihood ratio of each sub-block, release the storage space corresponding to the current branch metric, the current forward state metric, and the current backward state metric.

[0109] Optionally, the data length of the current branch metric information of the sub-block is sixteen times the preset length, the data length of the current forward state metric information of the target data is sixteen times the preset length minus one, the data length of the current backward state metric information of the target data is sixteen times the preset length minus one, the data length of the posterior probability log-likelihood ratio of the sub-block is four times the preset length minus one, and the data length of the extrinsic information of the sub-block is three times the preset length minus one.

[0110] The decoding apparatus provided in the embodiments of the present invention can execute the decoding method provided in any embodiment of the present invention, and has the corresponding functional modules and beneficial effects of executing the method.

[0111] Example 4

[0112] Figure 9 This is a schematic diagram of the structure of an electronic device provided in Embodiment 4 of the present invention. Figure 9The diagram illustrates a schematic representation of an electronic device 10 that can be used to implement embodiments of the present invention. The electronic device is intended to represent various forms of digital computers, such as laptop computers, desktop computers, workstations, personal digital assistants, servers, blade servers, mainframe computers, and other suitable computers. The electronic device can also represent various forms of mobile devices, such as personal digital processors, cellular phones, smartphones, wearable devices (e.g., helmets, glasses, watches, etc.), and other similar computing devices. The components shown herein, their connections and relationships, and their functions are merely illustrative and are not intended to limit the implementation of the invention described and / or claimed herein.

[0113] like Figure 9 As shown, the electronic device 10 includes at least one processor 11 and a memory, such as a read-only memory (ROM) 12 or a random access memory (RAM) 13, communicatively connected to the at least one processor 11. The memory stores computer programs executable by the at least one processor. The processor 11 can perform various appropriate actions and processes based on the computer program stored in the ROM 12 or loaded from storage unit 18 into the RAM 13. The RAM 13 can also store various programs and data required for the operation of the electronic device 10. The processor 11, ROM 12, and RAM 13 are interconnected via a bus 14. An input / output (I / O) interface 15 is also connected to the bus 14.

[0114] Multiple components in electronic device 10 are connected to I / O interface 15, including: input unit 16, such as keyboard, mouse, etc.; output unit 17, such as various types of displays, speakers, etc.; storage unit 18, such as disk, optical disk, etc.; and communication unit 19, such as network card, modem, wireless transceiver, etc. Communication unit 19 allows electronic device 10 to exchange information / data with other devices through computer networks such as the Internet and / or various telecommunications networks.

[0115] Processor 11 can be a variety of general-purpose and / or special-purpose processing components with processing and computing capabilities. Some examples of processor 11 include, but are not limited to, a central processing unit (CPU), a graphics processing unit (GPU), various special-purpose artificial intelligence (AI) computing chips, various processors running machine learning model algorithms, a digital signal processor (DSP), and any suitable processor, controller, microcontroller, etc. Processor 11 performs the various methods and processes described above, such as decoding methods.

[0116] In some embodiments, the decoding method may be implemented as a computer program tangibly contained in a computer-readable storage medium, such as storage unit 18. In some embodiments, part or all of the computer program may be loaded and / or installed on electronic device 10 via ROM 12 and / or communication unit 19. When the computer program is loaded into RAM 13 and executed by processor 11, one or more steps of the decoding method described above may be performed. Alternatively, in other embodiments, processor 11 may be configured to execute the decoding method by any other suitable means (e.g., by means of firmware).

[0117] Various embodiments of the systems and techniques described above herein can be implemented in digital electronic circuit systems, integrated circuit systems, field-programmable gate arrays (FPGAs), application-specific integrated circuits (ASICs), application-specific standard products (ASSPs), systems-on-a-chip (SoCs), payload-programmable logic devices (CPLDs), computer hardware, firmware, software, and / or combinations thereof. These various embodiments may include implementations in one or more computer programs that can be executed and / or interpreted on a programmable system including at least one programmable processor, which may be a dedicated or general-purpose programmable processor, capable of receiving data and instructions from a storage system, at least one input device, and at least one output device, and transmitting data and instructions to the storage system, the at least one input device, and the at least one output device.

[0118] Computer programs used to implement the methods of the present invention may be written in any combination of one or more programming languages. These computer programs may be provided to a processor of a general-purpose computer, a special-purpose computer, or other programmable data processing device, such that when executed by the processor, the computer programs cause the functions / operations specified in the flowcharts and / or block diagrams to be performed. The computer programs may be executed entirely on a machine, partially on a machine, or as a standalone software package, partially on a machine and partially on a remote machine, or entirely on a remote machine or server.

[0119] In the context of this invention, a computer-readable storage medium can be a tangible medium that may contain or store a computer program for use by or in conjunction with an instruction execution system, apparatus, or device. A computer-readable storage medium may include, but is not limited to, electronic, magnetic, optical, electromagnetic, infrared, or semiconductor systems, apparatus, or devices, or any suitable combination thereof. Alternatively, a computer-readable storage medium may be a machine-readable signal medium. More specific examples of machine-readable storage media include electrical connections based on one or more wires, portable computer disks, hard disks, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), optical fibers, portable compact disk read-only memory (CD-ROM), optical storage devices, magnetic storage devices, or any suitable combination thereof.

[0120] To provide interaction with a user, the systems and techniques described herein can be implemented on an electronic device having: a display device (e.g., a CRT (cathode ray tube) or LCD (liquid crystal display) monitor) for displaying information to the user; and a keyboard and pointing device (e.g., a mouse or trackball) through which the user provides input to the electronic device. Other types of devices can also be used to provide interaction with the user; for example, feedback provided to the user can be any form of sensory feedback (e.g., visual feedback, auditory feedback, or tactile feedback); and input from the user can be received in any form (including sound input, voice input, or tactile input).

[0121] The systems and technologies described herein can be implemented in computing systems that include backend components (e.g., as data servers), or middleware components (e.g., application servers), or frontend components (e.g., user computers with graphical user interfaces or web browsers through which users can interact with implementations of the systems and technologies described herein), or any combination of such backend, middleware, or frontend components. The components of the system can be interconnected via digital data communication of any form or medium (e.g., communication networks). Examples of communication networks include local area networks (LANs), wide area networks (WANs), blockchain networks, and the Internet.

[0122] A computing system can include clients and servers. Clients and servers are generally located far apart and typically interact through communication networks. The client-server relationship is created by computer programs running on the respective computers and having a client-server relationship with each other. The server can be a cloud server, also known as a cloud computing server or cloud host, which is a hosting product within the cloud computing service system to address the shortcomings of traditional physical hosts and VPS services, such as high management difficulty and weak business scalability.

[0123] This invention also provides a computer program product, including a computer program that, when executed by a processor, can implement the decoding method provided in any embodiment of this application.

[0124] In the implementation of the computer program product, computer program code for performing the operations of this application can be written in one or more programming languages ​​or a combination thereof. Programming languages ​​include object-oriented programming languages ​​such as Java, Smalltalk, and C++, as well as conventional procedural programming languages ​​such as C or similar languages. The program code can be executed entirely on the user's computer, partially on the user's computer, as a standalone software package, partially on the user's computer and partially on a remote computer, or entirely on a remote computer or server. In cases involving remote computers, the remote computer can be connected to the user's computer via any type of network—including a local area network (LAN) or a wide area network (WAN)—or can be connected to an external computer (e.g., via the Internet using an Internet service provider).

[0125] It should be understood that the various forms of processes shown above can be used, with steps reordered, added, or deleted. For example, the steps described in this invention can be executed in parallel, sequentially, or in different orders, as long as the desired result of the technical solution of this invention can be achieved, and this is not limited herein.

[0126] The specific embodiments described above do not constitute a limitation on the scope of protection of this invention. Those skilled in the art should understand that various modifications, combinations, sub-combinations, and substitutions can be made according to design requirements and other factors. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of this invention should be included within the scope of protection of this invention.

Claims

1. A decoding method, characterized in that, include: In response to a decoding request for target data, the target data is divided into at least one sub-block according to a preset length, the target data including system sequence soft information, check sequence soft information and prior information; The target data is computed in multiple parallel paths according to the pre-stored state transition table, and the current branch metric information, the current forward state metric information, and the current backward state metric information of the target data are determined for each sub-block. Based on the current branch metric, the current forward state metric, and the current backward state metric, determine the posterior probability log-likelihood ratio and extrinsic information for each sub-block; The decoding result for the target data is determined based on the log-likelihood ratio of each posterior probability.

2. The method according to claim 1, characterized in that, The target data is computed in multiple parallel paths according to a pre-stored state transition table, and the current branch metric information, the current forward state metric information, and the current backward state metric information of the target data are determined for each sub-block, including: Based on the system sequence soft information, check sequence soft information and prior information corresponding to each sub-block, the first transition state transition table of the pre-stored original state transition table is called to obtain the current branch metric information of each sub-block; Based on the current branch measurement information and historical forward state measurement information, the second transition state transition table of the pre-stored original state transition table is called to obtain the current forward state measurement information of the target data; Based on the current branch metric information and historical backward state metric information, the third transition state transition table of the pre-stored original state transition table is called to obtain the current backward state metric information of the target data.

3. The method according to claim 1, characterized in that, Based on the current branch metric, the current forward state metric, and the current backward state metric, determine the posterior probability log-likelihood ratio and extrinsic information for each sub-block, including: Based on the current branch metric, the current forward state metric, and the current backward state metric, determine the posterior probability log-likelihood ratio of each sub-block; Based on the system sequence soft information, check sequence soft information, and prior information in the target data, as well as the posterior probability log-likelihood ratio, the extrinsic information of each sub-block is determined.

4. The method according to claim 1, characterized in that, The decoding result for the target data is determined based on the log-likelihood ratio of each posterior probability, including: Determine whether the current decoding iteration count has reached the preset iteration count threshold; If the preset iteration number threshold is reached, the posterior probability log-likelihood ratio of each sub-block is deinterleaved and hard-decision processed to obtain the decoding result of the target data; If the preset iteration threshold is not reached, the external information is interleaved or deinterleaved according to the input requirements of the sub-decoder and used as prior information for another sub-decoder in the decoder. The other sub-decoder then returns to re-execute the multi-path parallel computation of the target data according to the pre-stored state transition table until the current decoding iteration count reaches the preset iteration threshold.

5. The method according to claim 1, characterized in that, Also includes: After obtaining the posterior probability log-likelihood ratio of each sub-block, release the storage space corresponding to the current branch metric, the current forward state metric, and the current backward state metric.

6. The method according to claim 1, characterized in that, The data length of the current branch metric information of the sub-block is sixteen times the preset length; the data length of the current forward state metric information of the target data is sixteen times the preset length minus one; the data length of the current backward state metric information of the target data is sixteen times the preset length minus one; the data length of the posterior probability log-likelihood ratio of the sub-block is four times the preset length minus one; and the data length of the extrinsic information of the sub-block is three times the preset length minus one.

7. A decoding device, characterized in that, include: The target data partitioning module is used to divide the target data into at least one sub-block according to a preset length in response to a decoding request for the target data. The target data includes system sequence soft information, check sequence soft information and prior information. The multi-path parallel computing module is used to perform multi-path parallel computing on the target data according to the pre-stored state transition table, and to determine the current branch metric information, the current forward state metric information and the current backward state metric information of the target data for each sub-block. The metric information calculation module is used to determine the posterior probability log-likelihood ratio and extrinsic information of each sub-block based on the current branch metric information, the current forward state metric information and the current backward state metric information. The target data decoding module is used to determine the decoding result for the target data based on the log-likelihood ratio of each posterior probability.

8. An electronic device, characterized in that, include: At least one processor; as well as A memory communicatively connected to the at least one processor; wherein, The memory stores a computer program that can be executed by the at least one processor, the computer program being executed by the at least one processor to enable the at least one processor to perform a decoding method according to any one of claims 1-6.

9. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores computer instructions that cause a processor to execute a decoding method according to any one of claims 1-6.

10. A computer program product, characterized in that, The computer program product includes a computer program that, when executed by a processor, implements a decoding method according to any one of claims 1-6.

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