Printed circuit board structure and preparation method thereof
By setting isolation slots in the reference layer of the printed circuit board, the problem of crosstalk between traces on the printed circuit board is solved, providing a crosstalk suppression solution that is simple in structure and easy to manufacture, and is suitable for high-density wiring scenarios.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- LCFC HEFEI ELECTRONICS TECH
- Filing Date
- 2026-02-02
- Publication Date
- 2026-05-05
AI Technical Summary
Existing technologies are unable to effectively reduce crosstalk between traces on printed circuit boards, especially when chip placement and connector pin positions are limited, traditional methods are difficult to change trace distances or add isolation ground structures.
An isolation trench is formed in the reference layer of the printed circuit board. The center of the isolation trench coincides with the center of the spacing between the microstrip lines, forming an orthogonal isolation trench structure, which blocks the return current coupling path and reduces electromagnetic interference.
It effectively suppresses crosstalk in high-density wiring scenarios, is highly flexible, is not affected by chip placement or connector pin positions, and has a simple structure that is easy to manufacture.
Smart Images
Figure CN121985471A_ABST
Abstract
Description
Technical Field
[0001] This disclosure relates to the field of circuit board technology, and in particular to a printed circuit board structure and its fabrication method. Background Technology
[0002] With the continuous development of integrated circuits, data transmission rates are becoming increasingly higher, making it increasingly important to reduce low-level crosstalk between lines. Current methods for reducing crosstalk between printed circuit board traces mainly include: increasing the distance between the victim and attacker lines, adding isolation GND lines, changing microstrip lines to striplines, and reducing coupling length. However, in practice, these methods are often limited by factors such as chip placement and connector pin positions, making it difficult to change the distance between traces, switch layers, or add isolation ground structures. Summary of the Invention
[0003] This disclosure provides a printed circuit board structure and a method for manufacturing the same, in order to at least solve the above-mentioned technical problems existing in the prior art.
[0004] According to a first aspect of this disclosure, a printed circuit board structure is provided, the structure comprising:
[0005] A dielectric layer, and a first microstrip line and a second microstrip line disposed above the dielectric layer; A reference layer is located below the dielectric layer; an isolation groove extending along a first direction is formed in the reference layer, the isolation groove is located between the first microstrip line and the second microstrip line, and along a second direction, the center of the isolation groove coincides with the center of the distance between the first microstrip line and the second microstrip line, wherein the first direction is perpendicular to the second direction.
[0006] In one embodiment, the width of the isolation groove along the second direction is smaller than the spacing between the first microstrip line and the second microstrip line.
[0007] In one possible implementation, the width of the first microstrip line along the second direction is equal to the width of the second microstrip line along the second direction; The ratio of the spacing between the first microstrip line and the second microstrip line to the width of the first microstrip line along the first direction is proportional to the width of the isolation groove along the second direction.
[0008] In one embodiment, if the spacing between the first microstrip line and the second microstrip line is greater than or equal to twice the width of the first microstrip line along the second direction, then the width of the isolation groove along the second direction is 4 to 5 mils. If the spacing between the first microstrip line and the second microstrip line is less than twice the width of the first microstrip line along the second direction, then the width of the isolation groove along the second direction is 2 to 3 mils.
[0009] In one possible implementation, the distance between the isolation groove and the first microstrip line along the second direction is a first distance, and the distance between the isolation groove and the second microstrip line along the second direction is a second distance; wherein the first distance and the second distance are greater than or equal to 0.8 times the width of the first microstrip line along the second direction.
[0010] In one possible implementation, the depth of the isolation groove is greater than or equal to the thickness of the reference layer; When the depth of the isolation groove is greater than the thickness of the reference layer, the isolation groove extends into the dielectric layer along the depth direction, which is perpendicular to the first direction and the second direction.
[0011] In one embodiment, the length of the isolation groove along the first direction is greater than or equal to the lengths of the first microstrip line and the second microstrip line along the first direction.
[0012] According to a second aspect of this disclosure, a method for fabricating a printed circuit board structure is provided, the method comprising: A reference layer is formed, and an isolation groove extending in a first direction is formed within the reference layer; A dielectric layer is formed on the reference layer; A first microstrip line and a second microstrip line are formed on the dielectric layer; wherein, the isolation groove is located between the first microstrip line and the second microstrip line and along a second direction, the center of the isolation groove coincides with the center of the spacing between the first microstrip line and the second microstrip line, and the first direction is perpendicular to the second direction.
[0013] In one embodiment, the width of the isolation groove along the second direction is smaller than the spacing between the first microstrip line and the second microstrip line.
[0014] In one possible implementation, the width of the first microstrip line along the second direction is equal to the width of the second microstrip line along the second direction; The ratio of the spacing between the first microstrip line and the second microstrip line to the width of the first microstrip line along the first direction is proportional to the width of the isolation groove along the second direction.
[0015] The printed circuit board structure and fabrication method disclosed herein block the return current coupling path in the reference layer and reduce electromagnetic interference between the two microstrip lines by forming an isolation trench between two microstrip lines, with the center of the isolation trench coinciding with the center of the spacing between the two microstrip lines. This disclosure provides a simple and easy-to-fabricate crosstalk suppression scheme, suitable for high-density wiring scenarios, unaffected by chip placement, connector pin positions, etc., offering high flexibility.
[0016] It should be understood that the description in this section is not intended to identify key or essential features of the embodiments of this disclosure, nor is it intended to limit the scope of this disclosure. Other features of this disclosure will become readily apparent from the following description. Attached Figure Description
[0017] The above and other objects, features, and advantages of this disclosure will become readily apparent from the following detailed description of exemplary embodiments, taken in conjunction with the accompanying drawings. Several embodiments of this disclosure are illustrated in the drawings by way of example and not limitation, in which: In the accompanying drawings, the same or corresponding reference numerals indicate the same or corresponding parts.
[0018] Figure 1 A cross-sectional view of a printed circuit board structure provided in an embodiment of this disclosure; Figure 2 This is a top view of a printed circuit board structure provided in an embodiment of the present disclosure; Figure 3 A cross-sectional view of a printed circuit board structure provided in another embodiment of this disclosure; Figure 4 This is a schematic diagram of the structure of the first microstrip line and the second microstrip line in an embodiment of this disclosure; Figure 5 A comparison diagram of near-end crosstalk curves between the printed circuit board structure provided in the embodiments of this disclosure and the printed circuit board structure in related technologies; Figure 6 A comparison diagram of the far-end crosstalk curves of the printed circuit board structure provided in the embodiments of this disclosure and the printed circuit board structure in related technologies; Figure 7 A flowchart is provided for a method of fabricating a printed circuit board structure according to an embodiment of this disclosure. Detailed Implementation
[0019] To make the objectives, features, and advantages of this disclosure more apparent and understandable, the technical solutions in the embodiments of this disclosure will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this disclosure, and not all of them. All other embodiments obtained by those skilled in the art based on the embodiments of this disclosure without creative effort are within the scope of protection of this disclosure.
[0020] This disclosure provides a printed circuit board structure. Figure 1 This is a cross-sectional view of a printed circuit board structure provided in an embodiment of this disclosure. Figure 2 This is a top view of the printed circuit board structure provided in an embodiment of this disclosure. It should be explained that... Figure 2 For ease of understanding the structure, the dielectric layer is not shown. Figure 1 and Figure 2 As shown, the structure includes: Dielectric layer 20, and a first microstrip line 31 and a second microstrip line 32 disposed above dielectric layer 20; Reference layer 10 is located below dielectric layer 20; an isolation groove 11 extending along a first direction is formed in reference layer 10. The isolation groove 11 is located between the first microstrip line 31 and the second microstrip line 32, and along the second direction, the center of the isolation groove 11 coincides with the center of the distance between the first microstrip line 31 and the second microstrip line 32, wherein the first direction is perpendicular to the second direction.
[0021] In one embodiment, the dielectric layer 20 is located between the reference layer 10 and the first microstrip line 31 and the second microstrip line 32, which can prevent the first microstrip line 31 and the second microstrip line 32 from directly contacting the reference layer 10 and causing a short circuit.
[0022] The material of the dielectric layer 21 may include at least one of epoxy resin, polytetrafluoroethylene, or polyimide.
[0023] The first microstrip line 31 and the second microstrip line 32 are located on the dielectric layer 20, and the first microstrip line 31 and the second microstrip line 32 extend along the first direction.
[0024] In some embodiments, the first microstrip line 31 and the second microstrip line 32 are parallel to each other.
[0025] In other embodiments, the first microstrip line 31 and the second microstrip line 32 may not be parallel to each other.
[0026] In such Figure 2In the illustrated embodiment, crosstalk is most severe when the first microstrip line 31 and the second microstrip line 32 extend in a straight line and are parallel to each other. Therefore, the solution provided in this disclosure is based on this. However, the solution in this disclosure can also be used to solve the crosstalk problem when the microstrip lines are arranged in other ways.
[0027] The reference layer 10 is located below the dielectric layer 20. An isolation groove 11 extending along a first direction is formed in the reference layer 10. The isolation groove 11 is located between the first microstrip line 31 and the second microstrip line 32. Along the second direction, the center of the isolation groove 11 coincides with the center of the distance between the first microstrip line 31 and the second microstrip line 32. The first direction is perpendicular to the second direction.
[0028] Reference layer 10 can be a GND copper layer.
[0029] Specifically, such as Figure 2 As shown, along the second direction, the center of the isolation groove 11 coincides with the center of the distance between the first microstrip line 31 and the second microstrip line 32. That is, the distance from the center of the isolation groove 11 to the microstrip lines on both sides is half of the distance between the first microstrip line 31 and the second microstrip line 32. For example, if the distance between the first microstrip line 31 and the second microstrip line 32 is L, then the distance from the center of the isolation groove 11 to the first microstrip line 31 is L / 2, and the distance to the second microstrip line 32 is also L / 2.
[0030] By placing the isolation slot in the middle of the two microstrip lines, the electric and magnetic field coupling paths between the two microstrip lines can be symmetrically cut off, avoiding unilateral coupling residues and ensuring that the isolation effect on both microstrip lines is consistent. This prevents the situation where the reduction of crosstalk on one side is not significant, and allows crosstalk at both the near and far ends to be weakened uniformly.
[0031] In one embodiment, the width of the isolation groove 11 along the second direction is less than the spacing between the first microstrip line 31 and the second microstrip line 32.
[0032] like Figure 2 As shown, the width of the isolation slot 11 is W1, and the spacing between the two microstrip lines is L. The width W1 of the isolation slot 11 is smaller than the spacing L between the two microstrip lines. Because the signal transmission of the microstrip lines depends on the underlying reference layer to form the return path, when the width of the isolation slot is smaller than the spacing between the two microstrip lines, most of the area of the reference ground below the two microstrip lines can be preserved, avoiding the breakage of the return path caused by excessive segmentation of the reference ground, which would affect the integrity of the signal return path.
[0033] In one embodiment, the width of the first microstrip line 31 along the second direction is equal to the width of the second microstrip line 32 along the second direction; The ratio of the spacing between the first microstrip line 31 and the second microstrip line 32 to the width of the first microstrip line 31 along the first direction is proportional to the width of the isolation groove 11 along the second direction.
[0034] Specifically, since the width of the first microstrip line 31 and the width of the second microstrip line 32 are equal, the ratio of the spacing between the two microstrip lines to the width of the first microstrip line 31 is equal to the ratio of the spacing between the two microstrip lines to the width of the second microstrip line 32. Here, the ratio of the spacing between the two microstrip lines to the width of the first microstrip line 31 is directly proportional to the width of the isolation groove 11, which is equivalent to the ratio of the spacing between the two microstrip lines to the width of the second microstrip line 32 being directly proportional to the width of the isolation groove 11.
[0035] The ratio of the spacing between the two microstrip lines to the width of the first microstrip line 31 is directly proportional to the width of the isolation slot 11. That is, the larger the ratio of the spacing between the two microstrip lines to the width of the first microstrip line 31, the wider the isolation slot 11. In this way, differentiated designs can be provided for different wiring densities, improving applicability. Narrower slot widths can be used in dense wiring to reduce the impact on the return path.
[0036] In one embodiment, if the spacing between the first microstrip line 31 and the second microstrip line 32 is greater than or equal to twice the width of the first microstrip line 31 along the second direction, then the width of the isolation groove 11 along the second direction is 4 to 5 mils. If the spacing between the first microstrip line 31 and the second microstrip line 32 is less than twice the width of the first microstrip line 31 along the second direction, then the width of the isolation groove 11 along the second direction is 2~3 mils.
[0037] Specifically, as described above, the width of the first microstrip line 31 is equal to the width of the second microstrip line 32. Therefore, the spacing between the two microstrip lines is greater than or equal to twice the width of the first microstrip line 31, and is equal to twice the width of the second microstrip line 32.
[0038] Table 1 below shows the matching table between the spacing between the two microstrip lines and the width of the isolation slot when the width of the first microstrip line 31 and the second microstrip line 32 is 5 mil.
[0039] Table 1: Matching Table between Spacing of Two Microstrip Lines and Width of Isolation Groove
[0040] As shown in Table 1 above, when the width of the first microstrip line 31 and the second microstrip line 32 is 5 mil, if the spacing between the two microstrip lines is 6 mil and 8 mil, then the spacing between the two microstrip lines is less than twice the width of the first microstrip line 31 or the second microstrip line 32. Therefore, the width of the isolation groove 11 is 2~3 mil. If the spacing between the two microstrip lines is 10 mil, 15 mil and 20 mil, then the spacing between the two microstrip lines is greater than or equal to twice the width of the first microstrip line 31 or the second microstrip line 32. Therefore, the width of the isolation groove 11 is 4~5 mil.
[0041] In this disclosure, when the spacing between two microstrip lines is greater than or equal to twice the width of the first microstrip line 31 or the second microstrip line 32, the width of the isolation slot will be increased to enhance the isolation effect; when the spacing between two microstrip lines is less than twice the width of the first microstrip line 31 or the second microstrip line 32, the width of the isolation slot will be shortened to ensure signal return integrity.
[0042] In one embodiment, the distance between the isolation groove and the first microstrip line along the second direction is a first distance, and the distance between the isolation groove and the second microstrip line along the second direction is a second distance; wherein the first distance and the second distance are greater than or equal to 0.8 times the width of the first microstrip line along the second direction.
[0043] like Figure 2 As shown, the first spacing is L1, the second spacing is L2, the width of the first microstrip line along the second direction is W2, and L1 and L2 are greater than or equal to 0.8. W2.
[0044] In this disclosure, a certain distance is maintained between the edge of the microstrip line and the edge of the isolation slot to avoid electromagnetic interference caused by the slot antenna effect introduced by the slotting; and to maintain the continuity of the reference layer and the integrity of the signal return flow.
[0045] In one embodiment, the depth of the isolation groove 11 is greater than or equal to the thickness of the reference layer 10; When the depth of the isolation groove 11 is greater than the thickness of the reference layer 10, the isolation groove 11 extends into the dielectric layer 20 along the depth direction, which is perpendicular to the first and second directions.
[0046] In some embodiments, such as Figure 1 As shown, the depth of the isolation groove 11 is equal to the thickness of the reference layer 10.
[0047] In other embodiments, such as Figure 3 As shown, the depth of the isolation trench 11 is greater than the thickness of the reference layer 10. In this case, the isolation trench 11 extends into the dielectric layer 20.
[0048] The depth of the isolation trench 11 is greater than or equal to the thickness of the reference layer 10, which ensures that the isolation trench 11 completely cuts off the coupling path in the reference layer 10 and improves the isolation effect.
[0049] In one embodiment, the length of the isolation groove 11 along the first direction is greater than or equal to the lengths of the first microstrip line 31 and the second microstrip line 32 along the first direction.
[0050] The length of the isolation slot 11 is greater than or equal to the length of the first microstrip line 31 and the second microstrip line 32, so it can cover the entire coupling area, avoid the introduction of local coupling due to the isolation slot being shorter than the trace, and improve the overall crosstalk suppression effect.
[0051] In one embodiment, no signal lines, such as clock signal lines or other high-speed signal lines, are disposed above the isolation slot 11, thereby ensuring the signal integrity of other signals.
[0052] To ensure the integrity of the power plane's return current, it is also prohibited for the power plane to cross the isolation slot. The power plane provides power supply and current loop for chips or components in the circuit.
[0053] Figure 4 This is a schematic diagram of the structure of the first microstrip line and the second microstrip line in an embodiment of this disclosure. Figure 5 A comparison diagram of near-end crosstalk curves between the printed circuit board structure provided in the embodiments of this disclosure and printed circuit board structures in related technologies. Figure 6 This is a comparison diagram of the far-end crosstalk curves of the printed circuit board structure provided in this embodiment and the printed circuit board structure in the related art, wherein the printed circuit board structure in the related art does not have an isolation slot.
[0054] like Figure 4 As shown, the two microstrip lines each have four ports: port 1 and port 3 on the first microstrip line 31, and port 2 and port 4 on the second microstrip line 32. Crosstalk is evaluated based on the four ports on the two microstrip lines.
[0055] Current crosstalk assessments use the S-parameters (scattering parameters) of microwave network systems. Figure 4 Taking a four-port system as an example, the S-parameters of a four-port system can be calculated based on relevant numerical calculation algorithms, such as the finite element method, boundary element method, and finite difference method. This disclosure uses a high-frequency structure simulator (HFSS) based on the finite element algorithm to obtain the S-parameters. The S-parameters are a 4... The matrix data is 4, where S31 and S13 represent the transmission performance between port 1 and port 3, and the larger the value, the better; S21 and S12 measure the near-end crosstalk between port 1 and port 2, and the smaller the value, the better; S14 and S41 measure the far-end crosstalk between port 1 and port 4, and the smaller the value, the better; S42 and S24 measure the transmission performance between port 4 and port 2, and the larger the value, the better.
[0056] like Figure 5 and Figure 6 As shown, the horizontal axis represents frequency in GHz, and the vertical axis uses a logarithmic scale in dB to measure the degree of crosstalk. In this coordinate system, the smaller the crosstalk, the smaller the corresponding value. Therefore, the crosstalk curve for the printed circuit board structure in this disclosure is located below the crosstalk curve for the printed circuit board structure in related technologies.
[0057] Specifically, such as Figure 5 and Figure 6 As shown, the blue curve represents the crosstalk curve corresponding to the printed circuit board structure in the related art, and the green curve represents the crosstalk curve corresponding to the printed circuit board structure in this disclosure. The green curve is located below the blue curve, so the printed circuit board structure in this disclosure can significantly reduce crosstalk.
[0058] This disclosure also provides a method for fabricating a printed circuit board structure. Figure 7 A flowchart of a method for fabricating a printed circuit board structure is provided for embodiments of this disclosure, such as... Figure 7 As shown, the method includes: Step 701: Form a reference layer and create an isolation groove extending in the first direction within the reference layer; Step 702: Form a dielectric layer on the reference layer; Step 703: Form a first microstrip line and a second microstrip line on the dielectric layer; wherein, an isolation trench is located between the first microstrip line and the second microstrip line and along the second direction, the center of the isolation trench coincides with the center of the spacing between the first microstrip line and the second microstrip line, and the first direction is perpendicular to the second direction.
[0059] The method for preparing the printed circuit board structure provided in this disclosure will be described in detail below with reference to specific embodiments.
[0060] First, such as Figure 1 As shown, step 701 is performed to form a reference layer 10, and an isolation groove 11 extending along the first direction is formed in the reference layer 10.
[0061] Reference layer 10 can be a GND copper layer.
[0062] An isolation groove 11 extending in the first direction is formed within the reference layer 10. This can be achieved by hollowing out the reference layer 10 and removing part of the reference layer 10 to form the isolation groove 11.
[0063] Next, step 702 is performed to form a dielectric layer 20 on the reference layer 10.
[0064] The dielectric layer 20 is located between the reference layer 10 and the first microstrip line 31 and the second microstrip line 32, which can prevent the first microstrip line 31 and the second microstrip line 32 from directly contacting the reference layer 10 and causing a short circuit.
[0065] The material of the dielectric layer 21 may include at least one of epoxy resin, polytetrafluoroethylene, or polyimide.
[0066] Next, step 703 is performed to form a first microstrip line 31 and a second microstrip line 32 on the dielectric layer 20. The first microstrip line 31 and the second microstrip line 32 extend along a first direction. The isolation groove 11 is located between the first microstrip line 31 and the second microstrip line 32 and along a second direction. The center of the isolation groove 11 coincides with the center of the distance between the first microstrip line 31 and the second microstrip line 32. The first direction is perpendicular to the second direction.
[0067] In some embodiments, the first microstrip line 31 and the second microstrip line 32 are parallel to each other.
[0068] In other embodiments, the first microstrip line 31 and the second microstrip line 32 may not be parallel to each other.
[0069] like Figure 2 As shown, along the second direction, the center of the isolation groove 11 coincides with the center of the distance between the first microstrip line 31 and the second microstrip line 32. That is, the distance from the center of the isolation groove 11 to the microstrip lines on both sides is half of the distance between the first microstrip line 31 and the second microstrip line 32. For example, if the distance between the first microstrip line 31 and the second microstrip line 32 is L, then the distance from the center of the isolation groove 11 to the first microstrip line 31 is L / 2, and the distance to the second microstrip line 32 is also L / 2.
[0070] By placing the isolation slot in the middle of the two microstrip lines, the electric and magnetic field coupling paths between the two microstrip lines can be symmetrically cut off, avoiding unilateral coupling residues and ensuring that the isolation effect on both microstrip lines is consistent. This prevents the situation where the reduction of crosstalk on one side is not significant, and allows crosstalk at both the near and far ends to be weakened uniformly.
[0071] In one embodiment, the width of the isolation groove 11 along the second direction is less than the spacing between the first microstrip line 31 and the second microstrip line 32.
[0072] like Figure 2As shown, the width of the isolation slot 11 is W1, and the spacing between the two microstrip lines is L. The width W1 of the isolation slot 11 is smaller than the spacing L between the two microstrip lines. Because the signal transmission of the microstrip lines depends on the underlying reference layer to form the return path, when the width of the isolation slot is smaller than the spacing between the two microstrip lines, most of the area of the reference ground below the two microstrip lines can be preserved, avoiding the breakage of the return path caused by excessive segmentation of the reference ground, which would affect the integrity of the signal return path.
[0073] In one embodiment, the width of the first microstrip line 31 along the second direction is equal to the width of the second microstrip line 32 along the second direction; The ratio of the spacing between the first microstrip line 31 and the second microstrip line 32 to the width of the first microstrip line 31 along the first direction is proportional to the width of the isolation groove 11 along the second direction.
[0074] Specifically, since the width of the first microstrip line 31 and the width of the second microstrip line 32 are equal, the ratio of the spacing between the two microstrip lines to the width of the first microstrip line 31 is equal to the ratio of the spacing between the two microstrip lines to the width of the second microstrip line 32. Here, the ratio of the spacing between the two microstrip lines to the width of the first microstrip line 31 is directly proportional to the width of the isolation groove 11, which is equivalent to the ratio of the spacing between the two microstrip lines to the width of the second microstrip line 32 being directly proportional to the width of the isolation groove 11.
[0075] The ratio of the spacing between the two microstrip lines to the width of the first microstrip line 31 is directly proportional to the width of the isolation slot 11. That is, the larger the ratio of the spacing between the two microstrip lines to the width of the first microstrip line 31, the wider the isolation slot 11. In this way, differentiated designs can be provided for different wiring densities, improving applicability. Narrower slot widths can be used in dense wiring to reduce the impact on the return path.
[0076] In one embodiment, if the spacing between the first microstrip line 31 and the second microstrip line 32 is greater than or equal to twice the width of the first microstrip line 31 along the second direction, then the width of the isolation groove 11 along the second direction is 4 to 5 mils. If the spacing between the first microstrip line 31 and the second microstrip line 32 is less than twice the width of the first microstrip line 31 along the second direction, then the width of the isolation groove 11 along the second direction is 2~3 mils.
[0077] Specifically, as described above, the width of the first microstrip line 31 is equal to the width of the second microstrip line 32. Therefore, the spacing between the two microstrip lines is greater than or equal to twice the width of the first microstrip line 31, and is equal to twice the width of the second microstrip line 32.
[0078] In this disclosure, when the spacing between two microstrip lines is greater than or equal to twice the width of the first microstrip line 31 or the second microstrip line 32, the width of the isolation slot will be increased to enhance the isolation effect; when the spacing between two microstrip lines is less than twice the width of the first microstrip line 31 or the second microstrip line 32, the width of the isolation slot will be shortened to ensure signal return integrity.
[0079] In one embodiment, the distance between the isolation groove and the first microstrip line along the second direction is a first distance, and the distance between the isolation groove and the second microstrip line along the second direction is a second distance; wherein the first distance and the second distance are greater than or equal to 0.8 times the width of the first microstrip line along the second direction.
[0080] like Figure 2 As shown, the first spacing is L1, the second spacing is L2, the width of the first microstrip line along the second direction is W2, and L1 and L2 are greater than or equal to 0.8. W2.
[0081] In this disclosure, a certain distance is maintained between the edge of the microstrip line and the edge of the isolation slot to avoid electromagnetic interference caused by the slot antenna effect introduced by the slotting; and to maintain the continuity of the reference layer and the integrity of the signal return flow.
[0082] In one embodiment, the depth of the isolation groove 11 is greater than or equal to the thickness of the reference layer 10; When the depth of the isolation groove 11 is greater than the thickness of the reference layer 10, the isolation groove 11 extends into the dielectric layer 20 along the depth direction, which is perpendicular to the first and second directions.
[0083] In some embodiments, such as Figure 1 As shown, the depth of the isolation groove 11 is equal to the thickness of the reference layer 10.
[0084] In other embodiments, such as Figure 3 As shown, the depth of the isolation trench 11 is greater than the thickness of the reference layer 10. In this case, the isolation trench 11 extends into the dielectric layer 20.
[0085] The depth of the isolation trench 11 is greater than or equal to the thickness of the reference layer 10, which ensures that the isolation trench 11 completely cuts off the coupling path in the reference layer 10 and improves the isolation effect.
[0086] In one embodiment, the length of the isolation groove 11 along the first direction is greater than or equal to the lengths of the first microstrip line 31 and the second microstrip line 32 along the first direction.
[0087] The length of the isolation slot 11 is greater than or equal to the length of the first microstrip line 31 and the second microstrip line 32, so it can cover the entire coupling area, avoid the introduction of local coupling due to the isolation slot being shorter than the trace, and improve the overall crosstalk suppression effect.
[0088] In one embodiment, no signal lines, such as clock signal lines or other high-speed signal lines, are disposed above the isolation slot 11, thereby ensuring the signal integrity of other signals.
[0089] To ensure the integrity of the power plane's return current, it is also prohibited for the power plane to cross the isolation slot. The power plane provides power supply and current loop for chips or components in the circuit.
[0090] The specific details of each part of the above method have been described in detail in the device implementation section. For any undisclosed details, please refer to the device implementation section, and therefore will not be repeated here.
[0091] It should be understood that the various forms of processes shown above can be used to rearrange, add, or delete steps. For example, the steps described in this disclosure can be executed in parallel, sequentially, or in different orders, as long as the desired result of the technical solution of this disclosure can be achieved, and this is not limited herein.
[0092] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one of that feature. In the description of this disclosure, "a plurality of" means two or more, unless otherwise explicitly specified.
[0093] The above description is merely a specific embodiment of this disclosure, but the scope of protection of this disclosure is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this disclosure should be included within the scope of protection of this disclosure. Therefore, the scope of protection of this disclosure should be determined by the scope of the claims.
Claims
1. A printed circuit board structure, characterized in that, The structure includes: A dielectric layer, and a first microstrip line and a second microstrip line disposed above the dielectric layer; A reference layer is located below the dielectric layer; an isolation groove extending along a first direction is formed in the reference layer, the isolation groove is located between the first microstrip line and the second microstrip line, and along a second direction, the center of the isolation groove coincides with the center of the distance between the first microstrip line and the second microstrip line, wherein the first direction is perpendicular to the second direction.
2. The printed circuit board structure according to claim 1, characterized in that, The width of the isolation groove along the second direction is less than the spacing between the first microstrip line and the second microstrip line.
3. The printed circuit board structure according to claim 1, characterized in that, The width of the first microstrip line along the second direction is equal to the width of the second microstrip line along the second direction; The ratio of the spacing between the first microstrip line and the second microstrip line to the width of the first microstrip line along the first direction is proportional to the width of the isolation groove along the second direction.
4. The printed circuit board structure according to claim 3, characterized in that, If the spacing between the first microstrip line and the second microstrip line is greater than or equal to twice the width of the first microstrip line along the second direction, then the width of the isolation groove along the second direction is 4 to 5 mils. If the spacing between the first microstrip line and the second microstrip line is less than twice the width of the first microstrip line along the second direction, then the width of the isolation groove along the second direction is 2 to 3 mils.
5. The printed circuit board structure according to claim 3, characterized in that, The distance between the isolation groove and the first microstrip line along the second direction is the first distance, and the distance between the isolation groove and the second microstrip line along the second direction is the second distance; wherein, the first distance and the second distance are greater than or equal to 0.8 times the width of the first microstrip line along the second direction.
6. The printed circuit board structure according to claim 1, characterized in that, The depth of the isolation groove is greater than or equal to the thickness of the reference layer; When the depth of the isolation groove is greater than the thickness of the reference layer, the isolation groove extends into the dielectric layer along the depth direction, which is perpendicular to the first direction and the second direction.
7. The printed circuit board structure according to claim 1, characterized in that, The length of the isolation groove along the first direction is greater than or equal to the lengths of the first microstrip line and the second microstrip line along the first direction.
8. A method for fabricating a printed circuit board structure, characterized in that, The method includes: A reference layer is formed, and an isolation groove extending in a first direction is formed within the reference layer; A dielectric layer is formed on the reference layer; A first microstrip line and a second microstrip line are formed on the dielectric layer; wherein, the isolation groove is located between the first microstrip line and the second microstrip line and along a second direction, the center of the isolation groove coincides with the center of the spacing between the first microstrip line and the second microstrip line, and the first direction is perpendicular to the second direction.
9. The method for preparing a printed circuit board structure according to claim 8, characterized in that, The width of the isolation groove along the second direction is less than the spacing between the first microstrip line and the second microstrip line.
10. The method for fabricating a printed circuit board structure according to claim 8, characterized in that, The width of the first microstrip line along the second direction is equal to the width of the second microstrip line along the second direction; The ratio of the spacing between the first microstrip line and the second microstrip line to the width of the first microstrip line along the first direction is proportional to the width of the isolation groove along the second direction.