Ga2O3 diode adopting inclined field plate and NiO heterojunction and preparation method of Ga2O3 diode
By employing a composite structure of a sloping plate and a NiO heterojunction in the Ga2O3 diode, the problems of electric field peak and leakage current in the Ga2O3 diode are solved, achieving electric field homogenization and performance optimization, and improving reverse withstand voltage and conduction current.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- XIDIAN UNIV
- Filing Date
- 2026-01-29
- Publication Date
- 2026-05-05
AI Technical Summary
In the existing technology, Ga2O3 diodes lack a stable and reliable p-type doping process, which makes it impossible to form a high-quality PN junction structure. Furthermore, the existing design cannot effectively suppress the electric field peak at the edge of the anode ohmic contact electrode and the surface interface leakage current.
By employing a composite structure of a sloping field plate and a NiO heterojunction, a composite dielectric layer with an inclined angle and a sloping field plate are formed on a Ga2O3 substrate. The p-type oxide layer and the n-type Ga2O3 epitaxial layer are combined to form the depletion region of the pn junction, thereby dispersing the electric field at the edge of the anode ohmic contact electrode and achieving dual homogenization of the electric field.
The reverse breakdown voltage and forward conduction current of Ga2O3 diodes were improved, the peak electric field was reduced, and the leakage current was suppressed, while maintaining low reverse leakage current and on-resistance, thus optimizing the performance trade-off.
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Figure CN121985545A_ABST
Abstract
Description
Technical Field
[0001] This invention belongs to the field of semiconductor technology, specifically relating to a Ga2O3 diode employing a sloping field plate and a NiO heterojunction, and its fabrication method. Background Technology
[0002] Gallium oxide (Ga2O3), as an ultra-wide bandgap semiconductor material, possesses a higher bandgap, critical breakdown field strength, and Baliga quality factor compared to wide bandgap materials (such as silicon carbide and gallium nitride), thus exhibiting high power conversion efficiency and current handling capability. However, gallium oxide itself has a key limitation: the lack of a stable and reliable p-type doping process. This not only prevents Ga2O3 from forming high-quality PN junction structures but also makes it impossible to directly apply some mature edge termination technologies in gallium oxide devices, resulting in a particularly prominent electric field peak problem at the edge of the anode ohmic contact electrode.
[0003] To address the problem of p-type gallium oxide deficiency, existing technologies use other p-type semiconductor materials to replace p-type Ga2O3 to form heterojunctions (HJ), or introduce a dielectric layer (such as Al2O3) as a field plate at the edge of the anode ohmic contact electrode to disperse the edge electric field.
[0004] However, existing designs that use only a single p-type heterojunction or a single dielectric field plate have certain limitations in optimization: the "pull-down" effect of the surface electric field under a single heterojunction is concentrated in the heterojunction region, and the electric field peak at the electrode edge is still relatively high, which is prone to local breakdown; while a single dielectric field plate can alleviate the edge electric field, it cannot suppress the interface leakage current on the Ga2O3 surface. Summary of the Invention
[0005] To address the aforementioned problems in the prior art, this invention provides a Ga2O3 diode employing a sloping field plate and a NiO heterojunction, and its fabrication method. The technical problem to be solved by this invention is achieved through the following technical solution: In a first aspect, the present invention provides a Ga2O3 diode employing a sloping field plate and a NiO heterojunction, comprising: n-type Ga2O3 substrate; An n-type Ga2O3 epitaxial layer located on the surface of the n-type Ga2O3 substrate; A composite dielectric layer is located on the surface of the n-type Ga2O3 epitaxial layer away from the n-type Ga2O3 substrate. The composite dielectric layer includes a p-type oxide layer and a sloping plate. In a direction perpendicular to the plane of the n-type Ga2O3 substrate, the orthographic projection of the sloping plate surrounds the orthographic projection of the p-type oxide layer. The cross-section of the p-type oxide layer is an inverted trapezoid, and the sidewall at the junction of the sloping plate and the p-type oxide layer has an inclination angle. A cathode ohmic contact electrode located on the surface of the n-type Ga2O3 substrate away from the n-type Ga2O3 epitaxial layer; The anode ohmic contact electrode is located on the surface of the p-type oxide layer and part of the inclined field plate on the side away from the n-type Ga2O3 epitaxial layer.
[0006] In one embodiment of the present invention, the tilt angle is the angle between the sidewall at the interface between the inclined plate and the p-type oxide layer and the horizontal direction, and the range of the tilt angle is: .
[0007] In one embodiment of the present invention, the material of the inclined plate is a high-K medium, which includes: SiO2, HfO2, Al2O3 or ZrO2.
[0008] In one embodiment of the present invention, the material of the p-type oxide layer includes: p-type NiO, p-type Cu2O or p-type Co3O4.
[0009] In one embodiment of the present invention, the crystal orientation of the n-type Ga2O3 substrate is (001), and the Sn doping concentration is [missing information]. .
[0010] In a second aspect, the present invention also provides a method for preparing a Ga2O3 diode using a sloping field plate and a NiO heterojunction, for preparing the Ga2O3 diode described in the first aspect; The method includes: Provide an n-type Ga2O3 substrate; An n-type Ga2O3 epitaxial layer is grown on the surface of the n-type Ga2O3 substrate; A cathode ohmic contact electrode is fabricated on the surface of the n-type Ga2O3 substrate on the side away from the n-type Ga2O3 epitaxial layer. A high-K dielectric is deposited on the surface of the n-type Ga2O3 epitaxial layer away from the n-type Ga2O3 substrate. A portion of the high-K dielectric is selectively etched away to form trenches, and the remaining high-K dielectric forms a sloping field plate with inclined sidewalls. p-type oxide is deposited in the trench to form a p-type oxide layer with an inverted trapezoidal cross-section; An anode ohmic contact electrode is fabricated to obtain the completed Ga2O3 diode. In a direction perpendicular to the plane of the n-type Ga2O3 substrate, the orthogonal projection of the anode ohmic contact electrode covers the orthogonal projection of the p-type oxide layer and part of the orthogonal projection of the inclined plate.
[0011] In one embodiment of the present invention, a high-k dielectric is deposited on the surface of the n-type Ga2O3 epitaxial layer away from the n-type Ga2O3 substrate, and a portion of the high-k dielectric is selectively etched to form a trench, with the remaining high-k dielectric forming a sloping field plate with inclined sidewalls. The steps include: A high-k dielectric with a thickness of 150 nm was deposited on the surface of the n-type Ga2O3 epitaxial layer on the side away from the n-type Ga2O3 substrate using plasma-enhanced chemical vapor deposition (PECVD). Based on the preset tilt angle of the inclined plate, an etching window is defined on the high-K medium using photolithography, and the medium is exposed and developed to form a pattern. Using a CF4 / O2 mixed gas as the etching gas, a portion of the high-K dielectric is removed by dry etching to form a trench exposing a portion of the surface of the n-type Ga2O3 epitaxial layer. The remaining high-K dielectric after etching constitutes the inclined field plate. The trench has inclined sidewalls, and the high-K dielectric includes SiO2, HfO2, Al2O3, or ZrO2.
[0012] In one embodiment of the present invention, the step of depositing p-type oxide in the trench to form a p-type oxide layer with an inverted trapezoidal cross-section includes: A p-type oxide layer is deposited in the trench using radio frequency magnetron sputtering technology, wherein the radio frequency power is 150 W and the target material is NiO ceramic with a purity of 99.99%.
[0013] In one embodiment of the present invention, the step of fabricating a cathode ohmic contact electrode on the surface of the n-type Ga2O3 substrate away from the n-type Ga2O3 epitaxial layer includes: Ti / Au was deposited on the surface of the n-type Ga2O3 substrate away from the n-type Ga2O3 epitaxial layer using an electron beam evaporation process, and then rapidly thermally annealed at 500 °C for 1 minute in an N2 environment to form a cathode ohmic contact electrode.
[0014] Compared with the prior art, the beneficial effects of the present invention are as follows: This invention provides a Ga2O3 diode employing a sloping field plate and a NiO heterojunction, and its fabrication method. Through the synergistic effect of the P-type oxide layer and the sloping field plate in the composite dielectric layer, the surface leakage current is suppressed by utilizing the depletion region of the pn junction formed by the P-type oxide layer and the n-type Ga2O3 epitaxial layer. Simultaneously, the sloping field plate disperses the edge electric field of the anode ohmic contact electrode, achieving dual homogenization of the bulk and surface electric fields. This results in a breakdown voltage closer to the theoretical value, improving the diode's reverse withstand voltage and forward conduction current. Furthermore, in the design process of this application, the P-type oxide layer balances the heterojunction barrier and on-resistance, while the sloping field plate balances electric field dispersion and switching characteristics. This maintains low reverse leakage current while avoiding a significant increase in on-resistance / switching losses, achieving a better performance trade-off between leakage current, conduction, and switching.
[0015] The present invention will be further described in detail below with reference to the accompanying drawings and embodiments. Attached Figure Description
[0016] Figure 1 This is a cross-sectional view of a Ga2O3 diode employing a sloping field plate and a NiO heterojunction provided in an embodiment of the present invention; Figure 2 This is a flowchart of a method for fabricating a Ga2O3 diode using a sloping field plate and a NiO heterojunction, provided in an embodiment of the present invention. Figures 3-8 This is a schematic diagram of the process for fabricating a Ga2O3 diode using a sloping field plate and a NiO heterojunction, provided in an embodiment of the present invention. Detailed Implementation
[0017] The present invention will be further described in detail below with reference to specific embodiments, but the implementation of the present invention is not limited thereto.
[0018] Figure 1 This is a cross-sectional view of a Ga2O3 diode employing a sloping field plate and a NiO heterojunction, provided in an embodiment of the present invention. Figure 1 As shown, an embodiment of the present invention provides a Ga2O3 diode employing a sloping field plate and a NiO heterojunction, comprising: n-type Ga2O3 substrate 1; n-type Ga2O3 epitaxial layer 2 located on the surface of n-type Ga2O3 substrate 1; A composite dielectric layer 3 is located on the surface of the n-type Ga2O3 epitaxial layer 2 away from the n-type Ga2O3 substrate 1. The composite dielectric layer 3 includes a p-type oxide layer 31 and a sloping plate 32. In the direction perpendicular to the plane of the n-type Ga2O3 substrate 1, the orthographic projection of the sloping plate 32 surrounds the orthographic projection of the p-type oxide layer 31. The cross-section of the p-type oxide layer 31 is an inverted trapezoid, and the sidewall at the junction of the sloping plate 32 and the p-type oxide layer 31 has an inclined angle. A cathode ohmic contact electrode 4 is located on the surface of the n-type Ga2O3 substrate 1 on the side away from the n-type Ga2O3 epitaxial layer 2; The anode ohmic contact electrode 5 is located on the surface of the p-type oxide layer 31 and part of the inclined field plate 32 on the side away from the n-type Ga2O3 epitaxial layer 2.
[0019] Specifically, the Ga2O3 diode employing the inclined field plate 32 and NiO heterojunction comprises, from bottom to top: a cathode, an n-type Ga2O3 substrate 1, an n-type Ga2O3 epitaxial layer 2, a composite dielectric layer 3, and an anode. The crystal orientation of the n-type Ga2O3 substrate 1 is (001), and the Sn doping concentration is... The composite dielectric layer 3 includes a p-type oxide layer 31 and a sloped field plate 32 surrounding the p-type oxide layer 31. The material of the sloped field plate 32 includes SiO2, HfO2, Al2O3, or ZrO2. The material of the p-type oxide layer 31 includes p-type NiO, p-type Cu2O, or p-type Co3O4. Figure 1 From the cross-sectional view shown, the cross-section of the P-type oxide layer 31 is an inverted trapezoid, meaning that the side closer to the anode ohmic contact electrode 5 (top) is wider, while the side in contact with the n-type Ga2O3 epitaxial layer 2 (bottom) is narrower. The sidewall at the junction of the inclined plate 32 and the P-type oxide layer 31 is not perpendicular to the plane of the n-type Ga2O3 substrate 1, but forms an inclined angle. Optionally, tilt angle It is defined as the angle between the sidewall at the junction of the inclined plate 32 and the P-type oxide layer 31 and the horizontal direction.
[0020] It should be understood that if the tilt angle Less than The electric field dispersion effect is limited if the tilt angle is [not specified]. Greater than In such cases, p-type oxides like NiO tend to create voids, increasing interface defects. Therefore, the tilt angle... The range is To obtain optimal electric field uniformity, preferably, the tilt angle... At this point, the peak value of the edge electric field can be reduced by 45%.
[0021] In this embodiment, a p-type oxide, such as NiO, contacts the n-type Ga2O3 epitaxial layer 2 to form a pn heterojunction. Under reverse bias, the depletion region of the pn heterojunction extends into the lightly doped Ga2O3 epitaxial layer 2, thereby reducing the electric field strength within the Ga2O3 epitaxial layer 2 and preventing premature avalanche breakdown. Simultaneously, the presence of the depletion region effectively blocks the leakage current path along the surface of the n-type Ga2O3 epitaxial layer 2, effectively suppressing surface leakage current. Furthermore, the inclined field plate 32 disperses the electric field lines at the edge of the anode ohmic contact electrode 5, preventing the electric field from concentrating highly at sharp edges, thus guiding the breakdown point from the fragile surface to the more robust bulk.
[0022] As can be seen, through the synergistic effect of the P-type oxide layer 31 and the inclined field plate 32 in the composite dielectric layer 3, the surface leakage current is suppressed by utilizing the depletion region of the pn junction formed by the P-type oxide layer 31 and the n-type Ga2O3 epitaxial layer 2, and the edge electric field of the anode ohmic contact electrode 5 is dispersed by the inclined field plate 32. This achieves dual homogenization of the bulk electric field and the surface electric field, making the breakdown voltage closer to the theoretical value and improving the reverse withstand voltage and forward conduction current of the diode. In addition, in the design process of this application, the P-type oxide layer 31 takes into account both the heterojunction barrier and the on-resistance, while the inclined field plate 32 takes into account both the electric field dispersion and the switching characteristics. This maintains a low reverse leakage current and avoids a significant increase in on-resistance / switching loss, achieving a better performance trade-off between leakage current, conduction, and switching.
[0023] Figure 2 This is a flowchart illustrating the fabrication method of a Ga2O3 diode employing a sloping field plate and a NiO heterojunction, as provided in an embodiment of the present invention. Figures 3-8 This is a schematic diagram illustrating the process of fabricating a Ga2O3 diode using a sloping field plate and a NiO heterojunction, as provided in an embodiment of the present invention. Figures 1-8 As shown, this embodiment of the invention provides a method for fabricating a Ga2O3 diode using a sloping field plate 32 and a NiO heterojunction, for fabricating the aforementioned Ga2O3 diode; The method includes: S1, Provide an n-type Ga2O3 substrate 1.
[0024] like Figure 3 As shown, this embodiment uses a Ga2O3 substrate 1 with a (001) crystal orientation and a Sn doping concentration (ND) of [value missing]. (Heavily doped)
[0025] S2. An n-type Ga2O3 epitaxial layer 2 is grown on the surface of an n-type Ga2O3 substrate 1.
[0026] Specifically, such as Figure 4As shown, an n-type Ga2O3 epitaxial layer 2 with a thickness of 5 μm was grown on the surface of an n-type Ga2O3 substrate 1 using HVPE (Hydride Vapor Phase Epitaxy) process, with a Sn doping concentration (ND) of [value missing]. (Lightly doped), and after ultrasonic cleaning with acetone, isopropanol and deionized water, the tablets were further soaked in piranha solution and then dried with a nitrogen gun.
[0027] S3. A cathode ohmic contact electrode 4 is fabricated on the surface of the n-type Ga2O3 substrate 1 on the side away from the n-type Ga2O3 epitaxial layer 2.
[0028] See Figure 5 In step S3, Ti / Au with a thickness of 20 / 80 nm is deposited on the surface of the n-type Ga2O3 substrate 1 away from the n-type Ga2O3 epitaxial layer 2 by electron beam evaporation, and then rapidly annealed at 500 °C for 1 minute in an N2 environment to form the cathode ohmic contact electrode 4.
[0029] Specifically, a double layer of adhesive is applied to the wafer. The first layer of adhesive is baked at 90-120°C for 90 seconds, and the second layer of adhesive is baked at 150-180°C for 5 minutes. The cathode area is defined by exposure using a photolithography machine for 2-3 seconds, and then developed in a developer for 45-55 seconds. Electron beam evaporation is used to complete the deposition of the cathode ohmic contact metal Ti / Au at a deposition rate of 1-2 amps per second and a deposition current of 50-200 mA. The metal is then removed by heating with propanol at 60-80°C for 10 minutes, followed by ultrasonic cleaning with isopropanol and deionized water. After removal, the metal is annealed at 470°C in a nitrogen atmosphere for 1-2 minutes.
[0030] S4. A high-K dielectric is deposited on the surface of the n-type Ga2O3 epitaxial layer 2 away from the n-type Ga2O3 substrate 1. A portion of the high-K dielectric is removed by selective etching to form a trench. The remaining high-K dielectric forms a sloping field plate 32 with inclined sidewalls.
[0031] For example, such as Figures 6-7 As shown, step S4 includes: S41. Using plasma-enhanced chemical vapor deposition (PECVD) technology, a high-K dielectric with a thickness of 150 nm is deposited on the surface of the n-type Ga2O3 epitaxial layer 2 on the side away from the n-type Ga2O3 substrate 1.
[0032] Taking SiO2 as an example, a mixed gas of SiH4, N2O, and N2 is introduced into the PECVD reaction chamber at a flow rate ratio of SiH4:N2O:N2 = 4 sccm:710 sccm:180 sccm. The deposition temperature is set to 350℃, the reaction chamber pressure to 2000 mtorr, and the RF power to 20 W. A 150 nm thick SiO2 layer is deposited. If the thickness of the high-K dielectric is less than 100 nm, the electric field dispersion effect of the field plate is insufficient, and the breakdown voltage (BV) increase is less than 20%. If the thickness of the high-K dielectric is greater than 200 nm, the parasitic capacitance of the device increases, and the switching loss increases by more than 30%. Therefore, 150 nm is the optimal balance value that takes into account both electric field dispersion and switching loss. After the high-K dielectric deposition is completed, it is allowed to cool naturally to room temperature.
[0033] S42. Based on the preset tilt angle of the inclined plate 32, an etching window is defined on the high-K medium using photolithography, and the medium is exposed and developed to form a pattern.
[0034] S43. Using a CF4 / O2 mixed gas as the etching gas, a portion of the high-K dielectric layer is removed by dry etching to form a trench exposing part of the surface of the n-type Ga2O3 epitaxial layer 2. The remaining high-K dielectric layer after etching constitutes the inclined field plate 32. The trench has inclined sidewalls, and the high-K dielectric includes SiO2, HfO2, Al2O3, or ZrO2.
[0035] Specifically, a 1.5 μm thick positive photoresist is spin-coated onto the surface of a high-K dielectric and cured using a hot plate at 100°C for 90 seconds. The area to be etched is defined using a mask, and exposed for 2.5 seconds using a UV lithography machine (wavelength 365 nm). The sample is then immersed in 2.38% TMAH developer for 50 seconds, rinsed with deionized water to remove unexposed photoresist, and blown out with a nitrogen gun. Next, an inductively coupled plasma (ICP) etching machine is used to etch to a depth of 150 nm, completely penetrating the underlying high-K dielectric to expose the surface of the underlying n-type Ga2O3 epitaxial layer 2, thus obtaining trenches.
[0036] S5. Deposit p-type oxides in the trench to form a p-type oxide layer 31 with an inverted trapezoidal cross section.
[0037] like Figure 8 As shown, in this embodiment, a P-type oxide layer 31 is deposited in the trench using radio frequency magnetron sputtering technology, wherein the radio frequency power is 150 W, and the target material can be selected to be NiO ceramic with a purity of 99.99%.
[0038] Specifically, a positive photoresist is spin-coated onto the surface of the n-type Ga2O3 epitaxial layer 2. The area to be filled with NiO is defined using a mask, followed by exposure and development. Next, using a p-type NiO target as the target material, a p-type oxide layer 31 is deposited in the trench using a magnetron sputtering system. Mg can be doped into the p-type NiO target to stabilize the p-type conductivity of NiO. The doping concentration is [not specified in the original text]. This allows for the formation of an ideal heterojunction depletion region with n-Ga2O3, effectively suppressing leakage current; conversely, if the doping concentration is lower than... If the depletion region width is insufficient, the leakage current suppression effect will be poor; if the doping is higher than that, the leakage current suppression effect will be poor. This will increase the on-resistance.
[0039] Furthermore, the chamber is evacuated to... Torr was introduced, and a mixed gas of O2 (4.5 sccm) and Ar (25.5 sccm) (O2 content 15%) was introduced; the deposition temperature was set to 400℃, the gas pressure to 1.0 mTorr, and the sputtering power to 150 W, and a 50 nm thick NiO was deposited to completely fill the trapezoidal trench; after deposition, in-situ annealing at 400℃ for 30 s was carried out to improve the crystallinity of NiO.
[0040] S6. Fabricate the anode ohmic contact electrode 5 to obtain the completed Ga2O3 diode; in the direction perpendicular to the plane of the n-type Ga2O3 substrate 1, the orthogonal projection of the anode ohmic contact electrode 5 covers the orthogonal projection of the p-type oxide layer 31 and part of the orthogonal projection of the inclined plate 32.
[0041] As can be seen from the above embodiments, the beneficial effects of the present invention are as follows: This invention provides a Ga2O3 diode employing a sloping field plate and a NiO heterojunction, and its fabrication method. Through the synergistic effect of the P-type oxide layer and the sloping field plate in the composite dielectric layer, the surface leakage current is suppressed by utilizing the depletion region of the pn junction formed by the P-type oxide layer and the n-type Ga2O3 epitaxial layer. Simultaneously, the sloping field plate disperses the edge electric field of the anode ohmic contact electrode, achieving dual homogenization of the bulk and surface electric fields. This results in a breakdown voltage closer to the theoretical value, improving the diode's reverse withstand voltage and forward conduction current. Furthermore, in the design process of this application, the P-type oxide layer balances the heterojunction barrier and on-resistance, while the sloping field plate balances electric field dispersion and switching characteristics. This maintains low reverse leakage current while avoiding a significant increase in on-resistance / switching losses, achieving a better performance trade-off between leakage current, conduction, and switching.
[0042] In the description of this invention, the terms "one embodiment," "some embodiments," "example," "specific example," or "some examples," etc., refer to a specific feature, structure, material, or characteristic described in connection with that embodiment or example, which is included in at least one embodiment or example of the invention. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples. In addition, those skilled in the art can combine and integrate the different embodiments or examples described in this specification.
[0043] The above description, in conjunction with specific preferred embodiments, provides a further detailed explanation of the present invention. It should not be construed that the specific implementation of the present invention is limited to these descriptions. For those skilled in the art, various simple deductions or substitutions can be made without departing from the concept of the present invention, and all such modifications and substitutions should be considered within the scope of protection of the present invention.
Claims
1. A Ga2O3 diode employing a sloping field plate and a NiO heterojunction, characterized in that, include: n-type Ga2O3 substrate; An n-type Ga2O3 epitaxial layer located on the surface of the n-type Ga2O3 substrate; A composite dielectric layer is located on the surface of the n-type Ga2O3 epitaxial layer away from the n-type Ga2O3 substrate. The composite dielectric layer includes a p-type oxide layer and a sloping plate. In a direction perpendicular to the plane of the n-type Ga2O3 substrate, the orthographic projection of the sloping plate surrounds the orthographic projection of the p-type oxide layer. The cross-section of the p-type oxide layer is an inverted trapezoid, and the sidewall at the junction of the sloping plate and the p-type oxide layer has an inclination angle. A cathode ohmic contact electrode located on the surface of the n-type Ga2O3 substrate away from the n-type Ga2O3 epitaxial layer; The anode ohmic contact electrode is located on the surface of the p-type oxide layer and part of the inclined field plate on the side away from the n-type Ga2O3 epitaxial layer.
2. The Ga2O3 diode employing a sloping field plate and a NiO heterojunction according to claim 1, characterized in that, The tilt angle is the angle between the sidewall at the interface between the inclined plate and the p-type oxide layer and the horizontal direction, and the range of the tilt angle is... .
3. The Ga2O3 diode employing a sloping field plate and a NiO heterojunction according to claim 1, characterized in that, The inclined plate is made of a high-K medium, which includes SiO2, HfO2, Al2O3 or ZrO2.
4. The Ga2O3 diode employing a sloping field plate and a NiO heterojunction according to claim 1, characterized in that, The materials of the p-type oxide layer include: p-type NiO, p-type Cu2O, or p-type Co3O4.
5. The Ga2O3 diode employing a sloping field plate and a NiO heterojunction according to claim 1, characterized in that, The n-type Ga2O3 substrate has a crystal orientation of (001) and a Sn doping concentration of [missing value]. .
6. A method for fabricating a Ga2O3 diode employing a sloping field plate and a NiO heterojunction, characterized in that, Used to prepare the Ga2O3 diode as described in any one of claims 1 to 5; The method includes: Provide an n-type Ga2O3 substrate; An n-type Ga2O3 epitaxial layer is grown on the surface of the n-type Ga2O3 substrate; A cathode ohmic contact electrode is fabricated on the surface of the n-type Ga2O3 substrate on the side away from the n-type Ga2O3 epitaxial layer. A high-K dielectric is deposited on the surface of the n-type Ga2O3 epitaxial layer away from the n-type Ga2O3 substrate. A portion of the high-K dielectric is selectively etched away to form trenches, and the remaining high-K dielectric forms a sloping field plate with inclined sidewalls. p-type oxide is deposited in the trench to form a p-type oxide layer with an inverted trapezoidal cross-section; An anode ohmic contact electrode is fabricated to obtain the completed Ga2O3 diode. In a direction perpendicular to the plane of the n-type Ga2O3 substrate, the orthogonal projection of the anode ohmic contact electrode covers the orthogonal projection of the p-type oxide layer and part of the orthogonal projection of the inclined plate.
7. The method for fabricating a Ga2O3 diode using a sloping field plate and a NiO heterojunction according to claim 6, characterized in that, The steps of depositing a high-K dielectric on the surface of the n-type Ga2O3 epitaxial layer away from the n-type Ga2O3 substrate, selectively etching away a portion of the high-K dielectric to form trenches, and then forming a sloping field plate with inclined sidewalls by the remaining high-K dielectric include: A high-k dielectric with a thickness of 150 nm was deposited on the surface of the n-type Ga2O3 epitaxial layer on the side away from the n-type Ga2O3 substrate using plasma-enhanced chemical vapor deposition (PECVD). Based on the preset tilt angle of the inclined plate, an etching window is defined on the high-K medium using photolithography, and the medium is exposed and developed to form a pattern. Using a CF4 / O2 mixed gas as the etching gas, a portion of the high-K dielectric is removed by dry etching to form a trench exposing a portion of the surface of the n-type Ga2O3 epitaxial layer. The remaining high-K dielectric after etching constitutes the inclined field plate. The trench has inclined sidewalls, and the high-K dielectric includes SiO2, HfO2, Al2O3, or ZrO2.
8. The method for fabricating a Ga2O3 diode using a sloping field plate and a NiO heterojunction according to claim 7, characterized in that, The step of depositing p-type oxide within the trench to form a p-type oxide layer with an inverted trapezoidal cross-section includes: A p-type oxide layer is deposited in the trench using radio frequency magnetron sputtering technology, wherein the radio frequency power is 150 W and the target material is NiO ceramic with a purity of 99.99%.
9. The method for fabricating a Ga2O3 diode using a sloping field plate and a NiO heterojunction according to claim 1, characterized in that, The step of fabricating a cathode ohmic contact electrode on the surface of the n-type Ga2O3 substrate away from the n-type Ga2O3 epitaxial layer includes: Ti / Au was deposited on the surface of the n-type Ga2O3 substrate away from the n-type Ga2O3 epitaxial layer using an electron beam evaporation process, and then rapidly thermally annealed at 500 °C for 1 minute in an N2 environment to form a cathode ohmic contact electrode.