Semiconductor termination structure and method of forming the same

Abstract

A semiconductor terminal structure and its formation method are disclosed. The method includes: forming a hard mask layer on the surface of an epitaxial layer, comprising a first hard mask layer and a second hard mask layer located on the surface of the first hard mask layer, wherein the hard mask layer has a plurality of first openings, the width of the plurality of first openings gradually decreasing along a first direction, or gradually decreasing and then remaining constant; forming a plurality of first doped regions in the epitaxial layer using the hard mask layer as a mask and employing a first doping process; etching the first hard mask layer using an isotropic etching process using the second hard mask layer as a mask, thereby exposing one end of the top surface of the main junction region; and forming a second doped region in the epitaxial layer using a second doping process using the first hard mask layer as a mask, wherein the second doped region and the first doped region have a partially overlapping region, and the doping concentration of the overlapping region is less than or equal to the doping concentration of the main junction region. This structure can effectively reduce the terminal's occupied area, improve the process window, and improve the terminal's breakdown voltage.

Description

Technical Field

[0001] This invention relates to the field of semiconductor manufacturing technology, and in particular to a semiconductor terminal structure and its formation method. Background Technology

[0002] For power devices, the design and manufacturing method of the device termination directly determine the voltage that the device can withstand. For devices without termination design, the breakdown voltage is often very low. The main reason is that the PN junction morphology at the end of the doped region of the device is usually a cylindrical junction or a spherical junction. The breakdown voltage of such PN junctions is much lower than that of parallel planar junctions, which seriously limits their practical applications.

[0003] To overcome the above problems, the industry often forms a terminal structure around the PN junction (main junction). The introduced junction terminal structure can disperse the electric field that was originally concentrated at the edge of the main junction, thereby reducing the electric field strength at the edge of the main junction and obtaining a higher breakdown voltage.

[0004] However, the performance of existing power device termination structures still needs further improvement. Summary of the Invention

[0005] The technical problem solved by this invention is to provide a semiconductor terminal structure and a method for forming the same, so as to improve the performance of the formed semiconductor terminal structure.

[0006] To solve the above-mentioned technical problems, the present invention provides a method for forming a semiconductor terminal structure, comprising: providing a substrate and an epitaxial layer, wherein the epitaxial layer is located on the surface of the substrate and the epitaxial layer includes a first region; forming a main junction region within the epitaxial layer; forming a hard mask layer on the surface of the epitaxial layer, the hard mask layer including a first hard mask layer and a second hard mask layer located on the surface of the first hard mask layer, wherein the first hard mask layer and the second hard mask layer are made of different materials, and the hard mask layer has a plurality of first openings located on the first region, the plurality of first openings exposing the surface of the epitaxial layer, and the width of the plurality of first openings gradually decreasing along a first direction, or first gradually decreasing and then remaining constant. The first direction is parallel to the surface of the epitaxial layer and away from the main junction region. Using the hard mask layer as a mask, the epitaxial layer is ion implanted using a first doping process to form a plurality of first doped regions within the epitaxial layer. After forming the plurality of first doped regions, the first hard mask layer is etched using an isotropic etching process using a second hard mask layer as a mask, exposing one end of the top surface of the main junction region. Using the first hard mask layer as a mask, the epitaxial layer is ion implanted using a second doping process to form a second doped region within the epitaxial layer. The second doped region and the first doped region have a partial overlap region, and the doping concentration of the overlap region is less than or equal to the doping concentration of the main junction region.

[0007] Optionally, after the isotropic etching process, the first hard mask layer on the first region is completely etched; the second doped regions are continuously distributed, and in the first direction, the doping range of the second doped regions is greater than the doping range of a plurality of the first doped regions.

[0008] Optionally, the width of the hard mask layer between adjacent first openings gradually increases in the first direction, or gradually increases and then remains constant.

[0009] Optionally, after the isotropic etching process, a portion of the first hard mask layer on the first region is still retained.

[0010] Optionally, the second doped region includes a plurality of mutually independent second sub-doped regions, the plurality of second sub-doped regions being arranged along the first direction, one second sub-doped region corresponding to one first doped region, and in the first direction, the doping range of the second sub-doped region is larger than the doping range of its corresponding first doped region.

[0011] Optionally, after the isotropic etching process, on the first region, the portion of the first hard mask layer near the main junction region is completely etched, while another portion of the first hard mask layer away from the main junction region is partially retained; the second doped region includes a first portion and a second portion arranged along the first direction, the first portion being in contact with or partially overlapping the main junction region; the first portion is continuously distributed, and in the first direction, the doping range of the first portion is larger than the doping range of its corresponding plurality of first doped regions; the second portion includes a plurality of mutually discrete second sub-doped regions, one second sub-doped region corresponding to one first doped region, and in the first direction, the doping range of the second sub-doped region is larger than the doping range of its corresponding first doped region.

[0012] Optionally, the epitaxial layer further includes a second region, which is arranged relative to the first region along the first direction; the hard mask layer also has a plurality of second openings located on the second region, which expose the surface of the epitaxial layer and are arranged along the first direction.

[0013] Optionally, the width of some of the second openings may gradually decrease in the first direction, or decrease gradually and then remain constant.

[0014] Optionally, the width of the hard mask layer between adjacent second openings gradually increases in the first direction, or gradually increases and then remains constant.

[0015] Optionally, after the isotropic etching process, the first hard mask layer on the first region is completely etched, while a portion of the first hard mask layer on the second region remains; the second doped region includes a first part and a second part, the first part being located within the first region and the second part being located within the second region, the first part being in contact with or partially overlapping the main junction region; the first part is continuously distributed, and in the first direction, the doping range of the first part is larger than the doping range of several first doped regions within the first region; the second part includes several mutually discrete second sub-doped regions, one second sub-doped region corresponding to one first doped region, and in the first direction, the doping range of the second sub-doped region is larger than the doping range of its corresponding first doped region.

[0016] Optionally, the method for forming the hard mask layer includes: forming a first hard mask material layer on the surface of the epitaxial layer; forming a second hard mask material layer on the surface of the first hard mask material layer; forming a first photoresist layer on the surface of the second hard mask material layer, wherein the first photoresist layer has a plurality of initial first openings, and the plurality of initial first openings are distributed in a gradually decreasing direction, or gradually decreasing and then remaining unchanged; using the first photoresist layer as a mask, etching the second hard mask material layer to form the second hard mask layer; using the second hard mask layer as a mask, etching the first hard mask material layer to form the first hard mask layer.

[0017] Optionally, after the isotropic etching process and before the second doping process, the method further includes: removing the second hard mask layer.

[0018] Optionally, the isotropic etching process includes one or a combination of dry etching and wet etching processes.

[0019] Optionally, the epitaxial layer has a main region, and the main junction region, the first doped region, and the second doped region are all formed in the main region; the main region has a first conductivity type, and the main junction region, the first doped region, and the second doped region all have a second conductivity type, wherein the first conductivity type and the second conductivity type are different.

[0020] Accordingly, the technical solution of the present invention also provides a semiconductor terminal structure, comprising: a substrate and an epitaxial layer, the epitaxial layer being located on the surface of the substrate, the epitaxial layer including a first region; a main junction region located within the epitaxial layer; a plurality of first doped regions located within the epitaxial layer, the width of the plurality of first doped regions within the first region gradually decreasing along a first direction, or gradually decreasing and then remaining constant, the first direction being parallel to the surface of the epitaxial layer and away from the main junction region; and a second doped region located within the epitaxial layer, the second doped region being in contact with or partially overlapping the main junction region, the second doped region and the plurality of first doped regions having a partially overlapping region, the doping concentration of the overlapping region being less than or equal to the doping concentration of the main junction region.

[0021] Optionally, the second doped regions are continuously distributed, and in the first direction, the doping range of the second doped region is larger than the doping range of a plurality of the first doped regions.

[0022] Optionally, the second doped region includes a plurality of mutually independent second sub-doped regions, which are arranged along the first direction. One second sub-doped region corresponds to one first doped region, and in the first direction, the doping range of the second sub-doped region is larger than the doping range of its corresponding first doped region. In the first direction, the doping range of the second sub-doped region is symmetrically distributed relative to the doping range of its corresponding first doped region.

[0023] Optionally, the second doped region includes a first portion and a second portion arranged along the first direction, the first portion being in contact with or partially overlapping the main junction region; the first portion being continuously distributed, and in the first direction, the doping range of the first portion being larger than the doping range of its corresponding plurality of first doped regions; the second portion including a plurality of mutually discrete second sub-doped regions, one second sub-doped region corresponding to one first doped region, and in the first direction, the doping range of the second sub-doped region being larger than the doping range of its corresponding first doped region.

[0024] Optionally, in the first direction, the doping range of the second sub-doped region is symmetrically distributed relative to the doping range of its corresponding first doped region.

[0025] Optionally, the epitaxial layer further includes a second region, which is arranged relative to the first region along the first direction; the width of a plurality of the first doped regions in the second region gradually decreases along the first direction, or decreases gradually and then remains unchanged.

[0026] Compared with the prior art, the technical solution of the embodiments of the present invention has the following beneficial effects: In the semiconductor terminal structure formation method provided by the present invention, the doping concentration can be varied around the main junction region by using a plurality of first doped regions and second doped regions, which effectively shares the electric field peak, thereby improving the device breakdown voltage and terminal efficiency, effectively reducing the terminal area occupied, and lowering the manufacturing cost. Moreover, without increasing the mask cost, the doping design of the plurality of first doped regions is not limited by the doping design of the main junction region, which helps to improve the process window and increase design flexibility. In addition, the doping positions of the first doped regions and the second doped regions depend on the morphology of the first hard mask layer before and after the isotropic etching process, and the doping position of the second doped region is related to the doping position of the first doped region, avoiding the pattern offset problem caused by multiple photolithography, which helps to control the accuracy of the doping position and further improves the stability of device performance.

[0027] In the semiconductor terminal structure provided by the present invention, a plurality of first doped regions within the epitaxial layer are distributed in a gradually decreasing or initially decreasing manner followed by remaining constant along a first direction. A second doped region within the epitaxial layer is in contact with or partially overlaps the main junction region. The second doped region and the first doped region have a partially overlapping region, where the doping concentration is less than or equal to the doping concentration of the main junction region. This allows for changes in doping concentration around the main junction region, effectively sharing the electric field peak, which is beneficial for improving device breakdown voltage and terminal efficiency, effectively reducing the terminal's footprint, and lowering manufacturing costs. Furthermore, the second doped region and the first doped region can be formed without increasing mask costs. The doping design of the plurality of first doped regions is not limited by the doping design of the main junction region, which is beneficial for improving the process window and increasing design flexibility. Attached Figure Description

[0028] Figure 1 This is a cross-sectional schematic diagram of a terminal structure; Figure 2 yes Figure 1 Electric field distribution diagram of the terminal structure; Figure 3 This is a cross-sectional schematic diagram of another type of terminal structure; Figure 4 yes Figure 3 Electric field distribution diagram of the terminal structure; Figures 5 to 13 This is a schematic diagram of the steps in a method for forming a semiconductor terminal structure according to an embodiment of the present invention; Figures 14 to 18 This is a schematic diagram of the steps in a method for forming a semiconductor terminal structure according to another embodiment of the present invention; Figures 19 to 21This is a schematic diagram of the steps in a method for forming a semiconductor terminal structure according to another embodiment of the present invention; Figures 22 to 26 This is a schematic diagram of the steps in the method for forming a semiconductor terminal structure according to another embodiment of the present invention. Detailed Implementation

[0029] It should be noted that the terms "surface" and "on" in this specification are used to describe the relative spatial position and are not limited to whether there is direct contact.

[0030] As described in the background section, the performance of existing power device termination structures needs further improvement. A junction termination structure will now be described and analyzed.

[0031] Figure 1 This is a cross-sectional schematic diagram of a terminal structure.

[0032] Please refer to Figure 1 The junction termination structure includes: an N+ doped substrate 100; an N- doped epitaxial layer 101 located on the surface of the substrate 100; a P+ doped main junction region 102 located within the epitaxial layer 101; and a P- doped JTE region 103 located within the epitaxial layer 101.

[0033] Figure 2 for Figure 1 The diagram shows the electric field distribution of the junction termination structure, where point A indicates the electric field at the edge of the main junction region 102, and point B indicates the electric field at the edge of the JTE region 103. This structure is formed using Junction Termination Extension (JTE) technology. When the length of the JTE region 103 is close to or exceeds the depletion layer width of a parallel-plane junction breakdown, a breakdown voltage close to that of a parallel-plane junction can be achieved. However, the design of the JTE region 103 requires precise control of the doping concentration within the termination to achieve a higher breakdown voltage. The doping concentration at which the JTE region 103 can achieve the maximum breakdown voltage is the doping concentration at which the JTE region 103 is just completely depleted before breakdown occurs. If the doping concentration is too high (see reference...), further information may be needed. Figure 2 (The black distribution line in the middle) If the JTE region 103 cannot be completely depleted, breakdown will occur prematurely at the edge of the JTE region 103. If the doping concentration is too low (please refer to...), Figure 2 (As shown by the red distribution line in the middle), although the JTE region 103 is depleted and has not broken down, it cannot share more voltage, and the main electric field is still borne by the main junction region 102. Breakdown occurs prematurely at the edge of the main junction region 102. In actual manufacturing, the JTE region 103 is easily affected by changes in doping dosage, making it difficult to achieve the optimal and stable breakdown voltage.

[0034] Figure 3This is a cross-sectional schematic diagram of another type of terminal structure.

[0035] Please refer to Figure 3 The junction termination structure includes: an N+ doped substrate 200; an N- doped epitaxial layer 201 located on the surface of the substrate 200; a P+ doped main junction region 202 located within the epitaxial layer 201; a P- doped JTE region 203 located within the epitaxial layer 201; and a plurality of P+ doped auxiliary regions 204 located within the JTE region 203.

[0036] Figure 4 for Figure 3 The diagram shows the electric field distribution of the junction terminal structure. Point A shows the electric field at the edge of the main junction region 202, and point B shows the electric field at the edge of the JTE region 203. The red distribution line is used to indicate the JTE region 203 with a lower doping concentration, and the black distribution line is used to indicate the JTE region 203 with a higher doping concentration.

[0037] The above structure is formed using Ring Assisted JTE (RA-JTE) technology. Due to the presence of the auxiliary region 204, the electric field concentration at the edge of the main junction region 202 is effectively alleviated, allowing the structure to withstand a higher voltage even in the low-doped JTE region 203 (please refer to...). Figure 4 (Red distribution line) effectively improves breakdown voltage.

[0038] However, in order to save on mask costs during the formation of the above structure, the auxiliary region 204 is formed together with the main junction region 202, making the formation of the auxiliary region 204 dependent on the formation process of the main junction region 202. The doping design of the main junction region 202 is usually heavily doped and cannot be changed arbitrarily, thereby limiting the formation of the auxiliary region 204 and reducing the process window.

[0039] To address the aforementioned problems, the present invention provides a semiconductor terminal structure and its formation method. A hard mask layer is formed on the surface of an epitaxial layer. This hard mask layer includes a first hard mask layer and a second hard mask layer. The hard mask layer has a plurality of first openings. A plurality of first doped regions are formed using the hard mask layer as a mask. The arrangement of the first openings causes the first doped regions to gradually decrease in size along a first direction, or to initially decrease and then remain constant. The first hard mask layer is then etched using an isotropic etching process. Finally, using the first hard mask layer as a mask, a low-doped second doped region is formed within the epitaxial layer. Thus, by using the plurality of first doped regions and the second doped regions, a high doping concentration can be achieved around the main junction region. The change in temperature effectively distributes the peak electric field, which helps improve the device's breakdown voltage and termination efficiency, effectively reduces the terminal area, and lowers manufacturing costs. Moreover, without increasing mask costs, the doping design of several first doped regions is not limited by the doping design of the main junction region, which helps to improve the process window and increase design flexibility. In addition, the doping positions of the first and second doped regions depend on the morphology of the first hard mask layer before and after the isotropic etching process. The doping position of the second doped region is related to the doping position of the first doped region, avoiding the pattern offset problem caused by multiple photolithography, which helps to control the accuracy of the doping position and further improves the stability of device performance.

[0040] To make the above-mentioned objectives, features and beneficial effects of the present invention more apparent and understandable, specific embodiments of the present invention will be described in detail below with reference to the accompanying drawings.

[0041] Figures 5 to 13 This is a schematic diagram of the steps in a method for forming a semiconductor terminal structure according to an embodiment of the present invention.

[0042] Please refer to Figure 5 A substrate 30a and an epitaxial layer 30b are provided, the epitaxial layer 30b being located on the surface of the substrate 30a, the epitaxial layer 30b having a first region (not shown in the figure).

[0043] The first region is used to define the positions of several first openings within the hard mask layer.

[0044] In another embodiment, the epitaxial layer further has a second region for defining the locations of a plurality of second openings within the hard mask layer.

[0045] In this embodiment, the epitaxial layer 30b is made of silicon carbide. Due to its superior material properties such as wide bandgap, high critical breakdown electric field, and high electron mobility, silicon carbide power devices have attracted much attention and are widely used in inverters, high-voltage switches, and motor drivers.

[0046] In other embodiments, the material of the epitaxial layer includes silicon, silicon-germanium, gallium oxide, a multi-element semiconductor material composed of group III-V elements, silicon-on-insulator (SOI), or germanium-on-insulator (GOI). The multi-element semiconductor material composed of group III-V elements includes GaN, InP, GaAs, GaP, InAs, InSb, InGaAs, or InGaAsP. Gallium oxide and gallium nitride (GaN) are wide-bandgap semiconductor materials with properties such as high critical breakdown electric field and high electron mobility.

[0047] It should be noted that the epitaxial layer 30b has a main region (not shown in the figure), and the subsequent main junction region, the first doped region and the second doped region are all formed within the main region.

[0048] The main region has a first conductivity type. In this embodiment, the first conductivity type is N-type.

[0049] In another embodiment, the first conductivity type may be P-type.

[0050] This article uses a MOSFET device as an example for illustration. The substrate 30a is N+ doped and the epitaxial layer 30b is N- doped.

[0051] Please refer to Figure 6 A main junction region 301 is formed within the epitaxial layer 30b.

[0052] In this embodiment, the method for forming the main junction region 301 includes: forming a third mask layer (not shown in the figure) on the surface of the epitaxial layer 30b, the third mask layer exposing a portion of the surface of the epitaxial layer 30b; using the third mask layer as a mask, implanting third doped ions into the epitaxial layer 30b to form the main junction region 301.

[0053] In this embodiment, after the main junction region 301 is formed, the third mask layer is also removed.

[0054] The material of the third mask layer includes one or more combinations of silicon oxide, silicon nitride, polycrystalline silicon, silicon oxycarbonate, silicon oxynitride, aluminum oxide, aluminum nitride, silicon oxynitride, and silicon oxynitride.

[0055] In this embodiment, the material of the third mask layer is silicon oxide.

[0056] In another embodiment, the material of the third mask layer can be photoresist.

[0057] In this embodiment, the method for forming the third mask layer includes: forming a third mask material layer (not shown in the figure) on the surface of the epitaxial layer 30b; forming a second photoresist material layer (not shown in the figure) on the surface of the third mask material layer; patterning the second photoresist material layer to form a second photoresist layer (not shown in the figure); and etching the third mask material layer using the second photoresist layer as a mask to form the third mask layer.

[0058] The main junction region 301 has a second conductivity type, which is different from the first conductivity type. A PN junction is formed between the main junction region 301 and the main region.

[0059] In this embodiment, the main junction region 301 is P-type.

[0060] In another embodiment, the main junction region can be N-type.

[0061] Subsequently, a hard mask layer is formed on the surface of the epitaxial layer 30b. The hard mask layer includes a first hard mask layer and a second hard mask layer located on the surface of the first hard mask layer. The first hard mask layer and the second hard mask layer are made of different materials.

[0062] In this embodiment, please refer to the method for forming the hard mask layer. Figures 7 to 9 .

[0063] Please refer to Figure 7 A first hard mask material layer 302 is formed on the surface of the epitaxial layer 30b; a second hard mask material layer 303 is formed on the surface of the first hard mask material layer 302; a first photoresist layer 304 is formed on the surface of the second hard mask material layer 303. The first photoresist layer 304 has a plurality of initial first openings 305. The width of the plurality of initial first openings 305 gradually decreases along a first direction X, or gradually decreases and then remains unchanged. The first direction X is parallel to the surface of the epitaxial layer 30b and is away from the main junction region 301.

[0064] It should be noted that the width mentioned in this article refers to the dimension along the first direction X.

[0065] The first hard mask material layer 302 is used to form the first hard mask layer, and the second hard mask material layer 303 is used to form the second hard mask layer.

[0066] The material of the first hard mask material layer 302 includes one or more combinations of silicon oxide, silicon nitride, polycrystalline silicon, silicon oxycarbonate, silicon oxynitride, aluminum oxide, aluminum nitride, silicon carbide, and silicon oxycarbonate.

[0067] The material of the second hard mask material layer 303 includes one or more combinations of silicon oxide, silicon nitride, polycrystalline silicon, silicon oxycarbonate, silicon oxynitride, aluminum oxide, aluminum nitride, silicon carbide, and silicon oxycarbonate.

[0068] For illustration purposes, the material of the first hard mask material layer 302 is silicon oxide, and the material of the second hard mask material layer 304 is polycrystalline silicon.

[0069] In this embodiment, several of the initial first openings 305 are distributed along the first direction X in a manner that first gradually decreases and then remains unchanged.

[0070] It should be noted that the position, width and distribution of the initial first openings 305 determine the position, width and distribution of subsequent first openings, and thus determine the position, doping range and distribution of the subsequently formed first doped regions. The position, width and distribution of the initial first openings 305 can be set according to the requirements of the first doped regions.

[0071] Please refer to Figure 8 Using the first photoresist layer 304 as a mask, the second hard mask material layer 303 is etched to form the second hard mask layer 306.

[0072] In this embodiment, after forming the second hard mask layer 306, the first photoresist layer 304 is also removed.

[0073] Please refer to Figure 9 The first hard mask material layer 302 is etched using the second hard mask layer 306 as a mask to form the first hard mask layer 307.

[0074] The hard mask layer has a plurality of first openings 308 located on the first region, the plurality of first openings 308 exposing the surface of the epitaxial layer 30b, and the width of the plurality of first openings 308 is distributed along the first direction X in a manner that first gradually decreases and then remains constant.

[0075] In another embodiment, the widths of a plurality of the first openings are distributed in a gradually decreasing manner along a first direction.

[0076] The width of the hard mask layer between adjacent first openings 308 gradually increases in the first direction X, or increases gradually and then remains constant.

[0077] In this embodiment, the width of the hard mask layer between adjacent first openings 308 is distributed in the first direction X, first gradually increasing and then remaining constant.

[0078] Please refer to Figure 10Using the hard mask layer as a mask, the epitaxial layer 30b is ion implanted using the first doping process to form a plurality of first doped regions 309 in the epitaxial layer 30b.

[0079] It should be noted that the width distribution pattern of the hard mask layer between adjacent first openings 308 determines the width distribution pattern of several first doped regions 309, that is, several first doped regions 309 also show a gradually decreasing distribution along the first direction X, or a distribution that first gradually decreases and then remains unchanged.

[0080] In this embodiment, several of the first doped regions 309 are also distributed along the first direction X, first gradually decreasing and then remaining unchanged.

[0081] The first doped region 309 has a second conductivity type.

[0082] In this embodiment, the dopant ions in the first doped region 309 are P-type dopant ions, and the P-type dopant ions include one or more of boron, aluminum, and gallium. For illustration, the P-type dopant ion is aluminum.

[0083] In another embodiment, the dopant ions in the first doped region are N-type dopant ions, which include one or more of nitrogen, phosphorus and arsenic.

[0084] Please refer to Figure 11 After forming several first doped regions 309, the first hard mask layer 307 is etched using an isotropic etching process with the second hard mask layer 306 as a mask, thus exposing one end of the top surface of the main junction region 301.

[0085] Specifically, in the aforementioned isotropic etching process, under the protection of the second hard mask layer 306, several first openings 308 allow the first hard mask layer 307 to be etched laterally. By controlling process parameters such as etching time and etching rate, adjacent first openings 308 (e.g., Figure 10 The first hard mask layer 307 between (as shown) is completely or partially etched.

[0086] In this embodiment, after the isotropic etching process, the first hard mask layer 307 on the first region is completely etched.

[0087] In another embodiment, after the isotropic etching process, a portion of the first hard mask layer on the first region is still retained.

[0088] The isotropic etching processes include one or a combination of dry etching and wet etching processes.

[0089] In this embodiment, the isotropic etching process is a wet etching process.

[0090] In another embodiment, the isotropic etching process can be a dry etching process, or a combination of wet etching and dry etching processes.

[0091] Please refer to Figure 12 Using the first hard mask layer 307 as a mask, the epitaxial layer 30b is ion implanted using a second doping process to form a second doped region 310 in the epitaxial layer 30b. The second doped region 310 and the first doped region 309 have a partial overlap region, and the doping concentration of the overlap region is less than or equal to the doping concentration of the main junction region 301.

[0092] Thus, by using several first doped regions 309 and second doped regions 310, the doping concentration can be varied around the main junction region 301, effectively sharing the electric field peak and improving the breakdown voltage. Furthermore, without increasing mask costs, the design of the several first doped regions 309 is not limited by the design of the main junction region 301, which helps to increase the process window and design flexibility. In addition, the doping positions of the first doped regions 309 and the second doped regions 310 depend on the morphology of the first hard mask layer 307 before and after the isotropic etching process. The doping positions of the second doped regions 310 are correlated with the doping positions of the first doped regions 309, avoiding the pattern shift problem caused by multiple photolithography steps, facilitating the control of doping position accuracy, and further improving the stability of device performance.

[0093] The second doped region 310 has a second conductivity type.

[0094] In this embodiment, the dopant ions in the second doped region 310 are P-type dopant ions, which include one or more of boron, aluminum, and gallium. For illustration, the P-type dopant ion is aluminum.

[0095] In this embodiment, since the first hard mask layer 307 on the first region is completely etched after the isotropic etching process (e.g., ...), Figure 11 As shown), the second doped region 310 is continuously distributed, and in the first direction X, the doping range of the second doped region 310 is greater than the doping range of a plurality of the first doped regions 309.

[0096] In this embodiment, the ion implantation direction in both the second doping process and the first doping process is perpendicular to the surface of the epitaxial layer 30b.

[0097] In other embodiments, the orientation of the ion implantation process may not be limited.

[0098] In another embodiment, the second doped region includes a first portion and a second portion arranged along the first direction; the first portion is in contact with or partially overlaps with the main junction region and is continuously distributed, and in the first direction, the doping range of the first portion is larger than the doping range of its corresponding plurality of first doped regions; the second portion includes a plurality of mutually discrete second sub-doped regions, one second sub-doped region corresponding to one first doped region, and in the first direction, the doping range of the second sub-doped region is larger than the doping range of its corresponding first doped region.

[0099] In another embodiment, the second doped region includes a plurality of mutually discrete second sub-doped regions, and the plurality of second sub-doped regions are arranged along the first direction, one second sub-doped region corresponds to one first doped region, and in the first direction, the doping range of the second sub-doped region is larger than the doping range of its corresponding first doped region.

[0100] In this embodiment, after the isotropic etching process and before the second doping process, the second hard mask layer 306 is also removed.

[0101] Please refer to Figure 13 After the second doped region 310 is formed, the first hard mask layer 307 is removed.

[0102] In this embodiment, a field oxide layer (not shown in the figure) is subsequently formed on the surface of the epitaxial layer 30b. The field oxide layer is located on a plurality of first doped regions 309 and second doped regions 310 and extends to a portion of the main junction region 301. The field oxide layer has an opening (not shown in the figure) that exposes another portion of the surface of the main junction region 301. A first electrode layer (not shown in the figure) is formed in the opening. A second electrode layer (not shown in the figure) is formed on the surface of the substrate 30a away from the epitaxial layer 30b.

[0103] Accordingly, one embodiment of the present invention also provides a semiconductor terminal structure formed using the above method. Please refer to [further details]. Figure 13The system includes: a substrate 30a and an epitaxial layer 30b, the epitaxial layer 30b being located on the surface of the substrate 30a, the epitaxial layer 30b including a first region (not shown in the figure); a main junction region 301 located within the epitaxial layer 30b; a plurality of first doped regions 309 located within the epitaxial layer 30b, the plurality of first doped regions 309 in the first region being distributed in a gradually decreasing direction X, or gradually decreasing and then remaining unchanged, the first direction X being a direction parallel to the surface of the epitaxial layer 30b and away from the main junction region 301; and a second doped region 310 located within the epitaxial layer 30b, the second doped region 310 being in contact with or partially overlapping the main junction region 301, the second doped region 310 and the plurality of first doped regions 309 having a partially overlapping region, the doping concentration of the overlapping region being less than or equal to the doping concentration of the main junction region 301.

[0104] Thus, through the second doped region 310 and the plurality of first doped regions 309, the doping concentration can be varied around the main junction region 301, effectively sharing the electric field peak, which is beneficial to improving the device breakdown voltage and termination efficiency, effectively reducing the terminal area occupied, and reducing manufacturing costs. Moreover, the second doped region 310 and the plurality of first doped regions 309 can be formed without increasing mask costs, and the doping design of the plurality of first doped regions 309 is not limited by the doping design of the main junction region 301, which is beneficial to improving the process window and increasing design flexibility.

[0105] In this embodiment, the second doped region 310 is continuously distributed, and in the first direction X, the doping range of the second doped region 310 is greater than the doping range of a plurality of the first doped regions 309.

[0106] In this embodiment, the distance between adjacent second doped regions 310 gradually increases along the first direction X, or increases gradually and then remains unchanged.

[0107] Figures 14 to 18 This is a schematic diagram of the steps in the method for forming a semiconductor terminal structure according to another embodiment of the present invention.

[0108] Please refer to Figure 14The system provides a substrate 40a and an epitaxial layer 40b, the epitaxial layer 40b being located on the surface of the substrate 40a and including a first region (not shown in the figure); a main junction region 401 is formed within the epitaxial layer 40b; a hard mask layer is formed on the surface of the epitaxial layer 40b, the hard mask layer including a first hard mask layer 402 and a second hard mask layer 403 located on the surface of the first hard mask layer 402, the first hard mask layer 402 and the second hard mask layer 403 being made of different materials, the hard mask layer having a plurality of first openings 404 located on the first region, the plurality of first openings 404 exposing the surface of the epitaxial layer 40b, the width of the plurality of first openings 404 being gradually decreasing along a first direction X, or being distributed by first gradually decreasing and then remaining constant, the first direction X being a direction parallel to the surface of the epitaxial layer 40b and away from the main junction region 401.

[0109] In this embodiment, the widths of several of the first openings 404 are distributed in a gradually decreasing manner along the first direction X.

[0110] In this embodiment, the width of the hard mask layer between adjacent first openings 404 gradually increases in the first direction X.

[0111] In another embodiment, the width of the hard mask layer between adjacent first openings is distributed in the first direction as first gradually increasing and then remaining constant.

[0112] Please refer to Figure 15 Using the hard mask layer as a mask, the epitaxial layer 40b is ion implanted using a first doping process to form a plurality of first doped regions 405 in the epitaxial layer 40b.

[0113] Please refer to Figure 16 After forming several first doped regions 405, the first hard mask layer 402 is etched using an isotropic etching process with the second hard mask layer 403 as a mask, and one end of the top surface of the main junction region 401 is exposed.

[0114] It should be noted that this embodiment differs from the previous embodiment (please refer to...). Figures 5 to 13 The main difference between (and related descriptions) is: In this embodiment, after each isotropic etching process, a portion of the first hard mask layer 402 on the first region is still retained.

[0115] Please refer to Figure 17Using the first hard mask layer 402 as a mask, the epitaxial layer 40b is ion implanted using a second doping process to form a second doped region 406 in the epitaxial layer 40b. The second doped region 406 and the first doped region 405 have a partial overlap region, and the doping concentration of the overlap region is less than or equal to the doping concentration of the main junction region 401.

[0116] In this embodiment, the second doped region 406 includes a plurality of mutually discrete second sub-doped regions 406i, the plurality of second sub-doped regions 406i are arranged along the first direction X, one second sub-doped region 406i corresponds to one first doped region 405, and in the first direction X, the doping range of the second sub-doped region 406i is larger than the doping range of its corresponding first doped region 405.

[0117] In this embodiment, the ion implantation direction in both the second doping process and the first doping process is perpendicular to the surface of the epitaxial layer 40b.

[0118] In other embodiments, the orientation of the ion implantation process may not be limited.

[0119] In this embodiment, based on the isotropic etching process, in the first direction X, the doping range of the second sub-doped region 406i is symmetrically distributed relative to the doping range of its corresponding first doped region 405.

[0120] Please refer to Figure 18 After the second doped region 406 is formed, the first hard mask layer 402 is removed.

[0121] Accordingly, one embodiment of the present invention also provides a semiconductor terminal structure formed using the above method. Please refer to [further details]. Figure 18 The system includes: a substrate 40a and an epitaxial layer 40b, the epitaxial layer 40b being located on the surface of the substrate 40a, the epitaxial layer 40b including a first region (not shown in the figure); a main junction region 401 located within the epitaxial layer 40b; a plurality of first doped regions 405 located within the epitaxial layer 40b, the plurality of first doped regions 405 in the first region being distributed in a gradually decreasing direction X, or gradually decreasing and then remaining unchanged, the first direction X being a direction parallel to the surface of the epitaxial layer 40b and away from the main junction region 401; and a second doped region 406 located within the epitaxial layer 40b, the second doped region 406 being in contact with or partially overlapping the main junction region 401, the second doped region 406 and the plurality of first doped regions 405 having a partially overlapping region, the doping concentration of the overlapping region being less than or equal to the doping concentration of the main junction region 401.

[0122] In this embodiment, the second doped region 406 includes a plurality of mutually discrete second sub-doped regions 406i, the plurality of second sub-doped regions 406i are arranged along the first direction X, one second sub-doped region 406i corresponds to one first doped region 405, and in the first direction X, the doping range of the second sub-doped region 406i is larger than the doping range of its corresponding first doped region 405.

[0123] In this embodiment, in the first direction X, the doping range of the second sub-doped region 406i is symmetrically distributed relative to the doping range of its corresponding first doped region 405.

[0124] Figures 19 to 21 This is a schematic diagram of the steps in the method for forming a semiconductor terminal structure according to another embodiment of the present invention.

[0125] In this embodiment, please Figure 15 Based on this, continue to refer to Figure 19 After forming several first doped regions 405, the first hard mask layer 402 is etched using an isotropic etching process with the second hard mask layer 403 as a mask, and one end of the top surface of the main junction region 401 is exposed.

[0126] This embodiment differs from the previous embodiment (please refer to...). Figures 14 to 18 The main difference between the two (and related descriptions) lies in the different degrees of etching in the isotropic etching processes.

[0127] In this embodiment, after the isotropic etching process, on the first region, the portion of the first hard mask layer 402 near the main junction region 401 is completely etched, while another portion of the first hard mask layer 402 away from the main junction region 401 is still partially retained.

[0128] Please refer to Figure 20 Using the first hard mask layer 402 as a mask, the epitaxial layer 40b is ion implanted using the second doping process to form a second doped region 506 in the epitaxial layer 40b.

[0129] In this embodiment, the second doped region 506 includes a first portion 506a and a second portion arranged along the first direction X; the first portion 506a is in contact with or partially overlaps with the main junction region 401, the first portion 506a is continuously distributed, and in the first direction X, the doping range of the first portion 506a is larger than the doping range of its corresponding plurality of first doped regions 405; the second portion includes a plurality of mutually discrete second sub-doped regions 506b, one second sub-doped region 506b corresponds to one first doped region 405, and in the first direction X, the doping range of the second sub-doped region 506b is larger than the doping range of its corresponding first doped region 405.

[0130] In this embodiment, the ion implantation direction in both the second doping process and the first doping process is perpendicular to the surface of the epitaxial layer 40b.

[0131] In other embodiments, the direction of ion implantation may not be limited.

[0132] In this embodiment, based on the isotropic etching process, in the first direction X, the doping range of the second sub-doped region 506b is symmetrically distributed relative to the doping range of its corresponding first doped region 405.

[0133] Please refer to Figure 21 After the second doped region 506 is formed, the first hard mask layer 402 is removed.

[0134] Accordingly, one embodiment of the present invention also provides a semiconductor terminal structure formed using the above method. Please refer to [further details]. Figure 21 The system includes: a substrate 40a and an epitaxial layer 40b, the epitaxial layer 40b being located on the surface of the substrate 40a, the epitaxial layer 40b including a first region (not shown in the figure); a main junction region 401 located within the epitaxial layer 40b; a plurality of first doped regions 405 located within the epitaxial layer 40b, the plurality of first doped regions 405 being distributed along a first direction X in a gradually decreasing or initially decreasing and then remaining unchanged, the first direction X being parallel to the surface of the substrate 40a and away from the main junction region 401; and a second doped region 506 located within the epitaxial layer 40b, the second doped region 506 being in contact with or partially overlapping the main junction region 401, the second doped region 506 and the main junction region 401 having a partially overlapping region, the doping concentration of the overlapping region being less than or equal to the doping concentration of the main junction region 401.

[0135] In this embodiment, the second doped region 506 includes a first portion 506a and a second portion arranged along the first direction X. The first portion 506a is in contact with or partially overlaps with the main junction region 401. The first portion 506a is continuously distributed, and in the first direction X, the doping range of the first portion 506a is larger than the doping range of its corresponding plurality of first doped regions 405. The second portion includes a plurality of mutually discrete second sub-doped regions 506b, one second sub-doped region 506b corresponds to one first doped region 405, and in the first direction X, the doping range of the second sub-doped region 506b is larger than the doping range of its corresponding first doped region 405.

[0136] In this embodiment, in the first direction X, the doping range of the second sub-doped region 506b is symmetrically distributed relative to the doping range of its corresponding first doped region 405.

[0137] Figures 22 to 26 This is a schematic diagram of the steps in the method for forming a semiconductor terminal structure according to another embodiment of the present invention.

[0138] Please refer to Figure 22 The system provides a substrate 60a and an epitaxial layer 60b, the epitaxial layer 60b being located on the surface of the substrate 60a. The epitaxial layer 60b includes adjacent first regions i and second regions ii, the second regions ii being arranged relative to the first regions i along the first direction X. A main junction region 601 is formed within the epitaxial layer 60b. A hard mask layer is formed on the surface of the epitaxial layer 60b, the hard mask layer including a first hard mask layer 602 and a second hard mask layer 603 located on the surface of the first hard mask layer 602. The first hard mask layer 602 and the second hard mask layer 603 are made of different materials. The epitaxial layer 60b has a plurality of first openings 604 and a plurality of second openings 605. The plurality of first openings 604 are located on the first region i, and the plurality of second openings 605 are located on the second region ii. Both the plurality of first openings 604 and the plurality of second openings 605 expose the surface of the epitaxial layer 60b. The width of the plurality of first openings 604 gradually decreases along a first direction X, or decreases gradually and then remains constant. The first direction X is parallel to the surface of the epitaxial layer 60b and is away from the main junction region 601. The plurality of second openings 605 are arranged along the first direction X.

[0139] In this embodiment, the widths of several second openings 605 are distributed in a gradually decreasing manner in the first direction X.

[0140] In this embodiment, the width of the hard mask layer between adjacent second openings 605 gradually increases in the first direction X.

[0141] Please refer to Figure 23 Using the hard mask layer as a mask, the epitaxial layer 60b is ion implanted using the first doping process to form a plurality of first doped regions 606 in the epitaxial layer 60b.

[0142] Please refer to Figure 24 After forming several first doped regions 606, the first hard mask layer 602 is etched using an isotropic etching process with the second hard mask layer 603 as a mask, thus exposing one end of the top surface of the main junction region 601.

[0143] In this embodiment, after the isotropic etching process, the first hard mask layer 602 on the first region i is completely etched, while a portion of the first hard mask layer 602 on the second region ii is still retained.

[0144] Please refer to Figure 25 Using the first hard mask layer 602 as a mask, the epitaxial layer 60b is ion implanted using the second doping process to form a second doped region 607 in the epitaxial layer 60b. The second doped region 607 and the first doped region 606 have a partial overlap region, and the doping concentration of the overlap region is less than or equal to the doping concentration of the main junction region 601.

[0145] In this embodiment, the second doped region 607 includes a first part 607a and a second part. The first part 607a is located in the first region i, and the second part is located in the second region ii. The first part 607a is in contact with or partially overlaps with the main junction region 601. The first part 607a is continuously distributed, and in the first direction X, the doping range of the first part 607a is larger than the doping range of a plurality of first doped regions 606 in the first region i. The second part includes a plurality of mutually discrete second sub-doped regions 607b. One second sub-doped region 607b corresponds to one first doped region 606, and in the first direction X, the doping range of the second sub-doped region 607b is larger than the doping range of its corresponding first doped region 606.

[0146] In this embodiment, the ion implantation direction in both the second doping process and the first doping process is perpendicular to the surface of the epitaxial layer 60b.

[0147] In other embodiments, the orientation of the ion implantation process may not be limited.

[0148] In this embodiment, in the first direction X, the doping range of the second sub-doped region 607b is symmetrically distributed relative to the doping range of its corresponding first doped region 606.

[0149] Please refer to Figure 26 After the second doped region 607 is formed, the first hard mask layer 602 is removed.

[0150] Accordingly, one embodiment of the present invention also provides a semiconductor terminal structure formed using the above method. Please refer to [further details]. Figure 26 .

[0151] This embodiment differs from the previous embodiment (please refer to...). Figure 21 The main difference (and related descriptions) lies in the width distribution pattern of several of the first doped regions 606.

[0152] In this embodiment, the widths of several first doped regions 606 within the first region i and the second region ii are distributed such that they gradually decrease along the first direction X, or gradually decrease and then remain unchanged.

[0153] In addition, the semiconductor terminal structure is described in the previous embodiment and will not be repeated here.

[0154] While the present invention has been disclosed above, it is not limited thereto. Any person skilled in the art can make various modifications and alterations without departing from the spirit and scope of the invention; therefore, the scope of protection of the present invention should be determined by the scope defined in the claims.

Claims

1. A method for forming a semiconductor terminal structure, characterized in that, include: A substrate and an epitaxial layer are provided, the epitaxial layer being located on the surface of the substrate, the epitaxial layer including a first region; A main junction region is formed within the epitaxial layer; A hard mask layer is formed on the surface of the epitaxial layer. The hard mask layer includes a first hard mask layer and a second hard mask layer located on the surface of the first hard mask layer. The first hard mask layer and the second hard mask layer are made of different materials. The hard mask layer has a plurality of first openings located on the first region. The plurality of first openings expose the surface of the epitaxial layer. The width of the plurality of first openings gradually decreases along a first direction, or gradually decreases and then remains constant. The first direction is parallel to the surface of the epitaxial layer and is away from the main junction region. Using the hard mask layer as a mask, the epitaxial layer is ion implanted using the first doping process to form a plurality of first doped regions in the epitaxial layer; After forming several first doped regions, the first hard mask layer is etched using an isotropic etching process with the second hard mask layer as a mask, exposing one end of the top surface of the main junction region. Using the first hard mask layer as a mask, the epitaxial layer is ion implanted using a second doping process to form a second doped region in the epitaxial layer. The second doped region and the first doped region have a partial overlap region, and the doping concentration of the overlap region is less than or equal to the doping concentration of the main junction region.

2. The method for forming a semiconductor terminal structure as described in claim 1, characterized in that, After the isotropic etching process, the first hard mask layer on the first region is completely etched; the second doped regions are continuously distributed, and in the first direction, the doping range of the second doped regions is greater than the doping range of a plurality of the first doped regions.

3. The method for forming a semiconductor terminal structure as described in claim 1, characterized in that, The width of the hard mask layer between adjacent first openings gradually increases in the first direction, or increases gradually and then remains constant.

4. The method for forming a semiconductor terminal structure as described in claim 3, characterized in that, After each of the isotropic etching processes, a portion of the first hard mask layer on the first region is still retained.

5. The method for forming a semiconductor terminal structure as described in claim 4, characterized in that, The second doped region includes a plurality of mutually independent second sub-doped regions, which are arranged along the first direction. Each second sub-doped region corresponds to one first doped region, and in the first direction, the doping range of the second sub-doped region is larger than the doping range of its corresponding first doped region.

6. The method for forming a semiconductor terminal structure as described in claim 4, characterized in that, After the isotropic etching process, in the first region, the portion of the first hard mask layer near the main junction region is completely etched, while another portion of the first hard mask layer away from the main junction region is still partially retained; the second doped region includes a first portion and a second portion arranged along the first direction, the first portion being in contact with or partially overlapping the main junction region; the first portion is continuously distributed, and in the first direction, the doping range of the first portion is larger than the doping range of its corresponding plurality of first doped regions; the second portion includes a plurality of mutually discrete second sub-doped regions, one second sub-doped region corresponding to one first doped region, and in the first direction, the doping range of the second sub-doped region is larger than the doping range of its corresponding first doped region.

7. The method for forming a semiconductor terminal structure as described in claim 1, characterized in that, The epitaxial layer further includes a second region, which is arranged relative to the first region along the first direction; the hard mask layer also has a plurality of second openings located on the second region, which expose the surface of the epitaxial layer and are arranged along the first direction.

8. The method for forming a semiconductor terminal structure as described in claim 7, characterized in that, The width of some of the second openings gradually decreases in the first direction, or decreases gradually and then remains constant.

9. The method for forming a semiconductor terminal structure as described in claim 7, characterized in that, The width of the hard mask layer between adjacent second openings gradually increases in the first direction, or increases gradually and then remains constant.

10. The method for forming a semiconductor terminal structure as described in claim 9, characterized in that, After the isotropic etching process, the first hard mask layer on the first region is completely etched, while a portion of the first hard mask layer on the second region remains. The second doped region includes a first part and a second part, the first part being located within the first region and the second part being located within the second region. The first part is in contact with or partially overlaps with the main junction region. The first part is continuously distributed, and in the first direction, the doping range of the first part is larger than the doping range of several first doped regions within the first region. The second part includes several mutually discrete second sub-doped regions, one second sub-doped region corresponding to one first doped region, and in the first direction, the doping range of the second sub-doped region is larger than the doping range of its corresponding first doped region.

11. The method for forming a semiconductor terminal structure as described in claim 1, characterized in that, The method for forming the hard mask layer includes: forming a first hard mask material layer on the surface of the epitaxial layer; forming a second hard mask material layer on the surface of the first hard mask material layer; forming a first photoresist layer on the surface of the second hard mask material layer, wherein the first photoresist layer has a plurality of initial first openings, and the plurality of initial first openings are distributed in a gradually decreasing direction, or gradually decreasing and then remaining unchanged; using the first photoresist layer as a mask, etching the second hard mask material layer to form the second hard mask layer; and using the second hard mask layer as a mask, etching the first hard mask material layer to form the first hard mask layer.

12. The method for forming a semiconductor terminal structure as described in claim 1, characterized in that, After the isotropic etching process and before the second doping process, the process further includes: removing the second hard mask layer.

13. The method for forming a semiconductor terminal structure as described in claim 1, characterized in that, The isotropic etching processes include one or a combination of dry etching and wet etching processes.

14. The method for forming a semiconductor terminal structure as described in claim 1, characterized in that, The epitaxial layer has a main region, and the main junction region, the first doped region, and the second doped region are all formed within the main region; the main region has a first conductivity type, and the main junction region, the first doped region, and the second doped region all have a second conductivity type, wherein the first conductivity type and the second conductivity type are different.

15. A semiconductor terminal structure, characterized in that, include: A substrate and an epitaxial layer, the epitaxial layer being located on the surface of the substrate, the epitaxial layer including a first region; The main junction region located within the epitaxial layer; A plurality of first doped regions are located within the epitaxial layer. The width of the plurality of first doped regions within the first region gradually decreases along a first direction, or decreases gradually and then remains constant. The first direction is parallel to the surface of the epitaxial layer and is away from the main junction region. The second doped region is located within the epitaxial layer. The second doped region is in contact with or partially overlaps with the main junction region. The second doped region and several first doped regions have a partially overlapping region. The doping concentration of the overlapping region is less than or equal to the doping concentration of the main junction region.

16. The semiconductor terminal structure as described in claim 15, characterized in that, The second doped region is continuously distributed, and in the first direction, the doping range of the second doped region is larger than the doping range of a plurality of the first doped regions.

17. The semiconductor terminal structure as described in claim 15, characterized in that, The second doped region includes a plurality of mutually independent second sub-doped regions, which are arranged along the first direction. Each second sub-doped region corresponds to one first doped region, and in the first direction, the doping range of the second sub-doped region is larger than the doping range of its corresponding first doped region. In the first direction, the doping range of the second sub-doped region is symmetrically distributed relative to the doping range of its corresponding first doped region.

18. The semiconductor terminal structure as described in claim 15, characterized in that, The second doped region includes a first portion and a second portion arranged along the first direction. The first portion is in contact with or partially overlaps with the main junction region. The first portion is continuously distributed, and in the first direction, the doping range of the first portion is larger than the doping range of its corresponding plurality of first doped regions. The second portion includes a plurality of mutually discrete second sub-doped regions. One second sub-doped region corresponds to one first doped region, and in the first direction, the doping range of the second sub-doped region is larger than the doping range of its corresponding first doped region.

19. The semiconductor terminal structure as described in claim 18, characterized in that, In the first direction, the doping range of the second sub-doped region is symmetrically distributed relative to the doping range of its corresponding first doped region.

20. The semiconductor terminal structure as described in claim 15, characterized in that, The epitaxial layer further includes a second region, which is arranged relative to the first region along the first direction; the width of a plurality of the first doped regions in the second region gradually decreases along the first direction, or decreases gradually and then remains unchanged.

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