Mask, overlay error measuring method and device and overlay equipment

Abstract

The invention relates to a mask, an overlay error measuring method and device and overlay equipment. The mask plate comprises a mask plate body; the plurality of overlay marks are arranged on the mask plate body, each overlay mark comprises a plurality of overlay sub-marks, and the plurality of overlay sub-marks comprise the overlay sub-marks of which the central points are positioned on the same straight line, the overlay sub-marks of which the central points are the same and the overlay sub-marks arranged in different directions. According to the mask, the overlay error measuring method and device and the overlay equipment, the diversity and complexity of overlay marks of the mask are improved, and then the precision of an overlay process based on the mask is improved.

Description

Technical Field

[0001] This disclosure relates to the field of semiconductor manufacturing technology, specifically to a photomask, a method, apparatus, and overlay equipment for measuring overlay error. Background Technology

[0002] In semiconductor manufacturing, an overlay process is involved, which utilizes photomasks. This process requires exposing multiple layers of photomask patterns on a wafer, and these patterns need to be precisely overlaid. Overlay marks are typically placed on the photomasks to improve the accuracy of the overlay process. Summary of the Invention

[0003] The purpose of this disclosure is to provide a photomask, a method, apparatus, and overlay equipment for measuring overlay error, which improves the diversity and complexity of overlay marks on the photomask, thereby improving the accuracy of the overlay process based on the photomask.

[0004] To achieve the above objectives, in a first aspect, this disclosure provides a photomask, comprising: a photomask body; and a plurality of overprint marks disposed on the photomask body, each of the overprint marks comprising a plurality of overprint sub-marks, the plurality of overprint marks including overprint sub-marks whose center points are located on the same straight line, overprint marks with the same center point, and overprint marks disposed in different directions.

[0005] Optionally, the distance between adjacent overprinted marks is less than or equal to a preset distance, and the distance between adjacent overprinted marks includes distances in different directions.

[0006] Optionally, the size of each of the overlay marks is determined based on the resolution of the wafer exposure machine and / or based on a size manufacturing threshold of the mask, the wafer exposure machine being used to perform wafer exposure operations based on the mask.

[0007] Optionally, the plurality of overlay marks includes overlay marks set in different directions, and the number of overlay marks set in different directions is an even number.

[0008] Optionally, the plurality of interlocking marks include: a first mark, a second mark, a third mark, and a fourth mark, wherein the center point of the first mark and the center point of the second mark are the same, the center points of the second mark, the third mark, and the fourth mark are located on the same straight line, and the third mark and the fourth mark are arranged in mutually perpendicular directions.

[0009] Optionally, the first mark is a square-shaped mark, the second mark is a cross-shaped mark, and the number of the first marks is greater than the number of the second marks.

[0010] Optionally, there may be multiple third marks, each of which has the same shape, is arranged parallel to the fourth mark in the same direction, and the distance between adjacent third marks in the same direction is the same, and the size difference between adjacent third marks is the same; and / or, there may be one fourth mark, which has the same shape as the third mark and a larger size than the third mark.

[0011] In a second aspect, this disclosure provides a method for measuring overlay error, comprising: forming a first pattern layer and a plurality of overlay marks corresponding to the first mask on a wafer using a first mask, wherein the first mask is the mask described in the first aspect; and measuring the overlay error based at least on the plurality of overlay marks corresponding to the first mask.

[0012] Optionally, the overlay error measurement method further includes: comparing a plurality of overlay marks on the second mask with a plurality of corresponding overlay marks on the first mask to obtain alignment reference information, wherein the alignment reference information is used to characterize the positional relationship between the plurality of overlay marks on the second mask and the plurality of corresponding overlay marks on the first mask, wherein the second mask is a mask as described in the first aspect; and forming a second pattern layer and a plurality of overlay marks corresponding to the second mask on the wafer according to the alignment reference information.

[0013] Thirdly, this disclosure provides an overlay error measurement device, comprising: a forming module configured to form a first pattern layer and a plurality of overlay marks corresponding to the first mask on a wafer through a first mask, wherein the first mask is the mask as described in the first aspect; and a measurement module configured to perform overlay error measurement based at least on the plurality of overlay marks corresponding to the first mask.

[0014] Fourthly, this disclosure provides an overlay device, comprising: a memory storing a computer program thereon; and a processor for executing the computer program in the memory to implement the overlay error measurement method described in the second aspect.

[0015] The above technical solution sets multiple overlay marks on the photomask. These multiple overlay marks include multiple overlay sub-marks. Among the multiple overlay marks, there are overlay marks whose center points are on the same straight line, overlay marks with the same center point, and overlay marks set in different directions. This makes each overlay mark include overlay marks with multiple features, improving the diversity and complexity of the overlay marks on the photomask. With higher diversity and complexity of overlay marks, the corresponding application effect is also better, thereby improving the accuracy of the overlay process based on the photomask.

[0016] Other features and advantages of this disclosure will be described in detail in the following detailed description section. Attached Figure Description

[0017] The accompanying drawings are provided to further illustrate the present disclosure and form part of the specification. They are used together with the following detailed description to explain the present disclosure, but do not constitute a limitation thereof. In the drawings: Figure 1 This is a schematic diagram of a photomask according to an exemplary embodiment.

[0018] Figure 2A This is a schematic diagram illustrating a first type of overlay mark distribution according to an exemplary embodiment.

[0019] Figure 2B This is a schematic diagram illustrating a second type of overlay mark distribution according to an exemplary embodiment.

[0020] Figure 3 This is a schematic diagram illustrating an overprinted mark according to an exemplary embodiment.

[0021] Figure 4 This is a flowchart illustrating an overlay error measurement method according to an exemplary embodiment.

[0022] Figure 5 This is a structural block diagram of an overlay error measuring device according to an exemplary embodiment.

[0023] Figure 6 This is a block diagram illustrating an overlay apparatus according to an exemplary embodiment. Detailed Implementation

[0024] The specific embodiments of this disclosure will be described in detail below with reference to the accompanying drawings. It should be understood that the specific embodiments described herein are for illustration and explanation only and are not intended to limit this disclosure.

[0025] In semiconductor manufacturing, an overlay process is involved, which requires the use of photomasks. This process involves exposing multiple layers of photomask patterns on a wafer, and these multiple photomask patterns need to be precisely overlaid.

[0026] Overlaying is a process within photolithography, and it requires multiple exposures to complete. Furthermore, to ensure the performance of the manufactured semiconductor product, the patterns after each exposure must be accurately overlapped.

[0027] For example, the overlay process may include: exposing all the patterns on the dielectric substrate (wafer) one by one, then replacing the dielectric substrate, until all the dielectric substrates have been exposed. After the dielectric substrates have been processed, the mask is replaced. Next, a second pattern is exposed on the dielectric substrate, and the exposure is repeated, requiring that the pattern exposed by the second mask and the pattern exposed by the first mask be accurately overlaid. This process can be called overlay.

[0028] During overlay etching, each layer of the pattern requires a mask for exposure, and each mask needs to establish the correct relative position with the previously exposed pattern before exposure. However, in reality, due to various systematic and random errors, the positions of the two layers of patterns may deviate from what the designer intended.

[0029] Therefore, to ensure overlay accuracy, overlay marks are usually placed on the photomask. These overlay marks can be used to measure overlay errors and for pattern alignment.

[0030] The measurement of overlay error includes overlay error measurement based on image recognition and overlay error measurement based on diffraction.

[0031] In semiconductor manufacturing, overlay machines use high-precision optical systems to capture photolithographic patterns and overlay marks on silicon wafers. By identifying these marks, the overlay machine can determine the position of the photolithographic pattern and measure its offset in two-dimensional space. Specifically, the overlay machine uses the principles of light reflection or diffraction to photograph the overlay marks between the current layer and the previous layer, and transmits the images to analysis software for calculation, thereby determining the overlay error.

[0032] In related technologies, relatively simple overlay markings are typically used on the photomask, such as a square-shaped mark. The application effect of such simple overlay markings is usually poor, making it difficult to guarantee the accuracy of the photomask-based overlay process, which may in turn affect the product quality and yield of semiconductor manufacturing.

[0033] In some embodiments, the overlay mark may also be referred to as: alignment mark or detection mark, etc.

[0034] Based on this, the present disclosure provides a technical solution by setting multiple overlay marks on a photomask. These multiple overlay marks include multiple overlay sub-marks. Among the multiple overlay marks, there are overlay marks whose center points are located on the same straight line, overlay marks with the same center point, and overlay marks set in different directions. This makes each overlay mark include overlay marks with multiple features, improving the diversity and complexity of the overlay marks on the photomask. With higher diversity and complexity of overlay marks, the corresponding application effect is also better, thereby improving the accuracy of the overlay process based on the photomask.

[0035] Figure 1 This is a schematic diagram of a mask 10 according to an exemplary embodiment, as shown below. Figure 1 As shown, the mask 10 includes a mask body 11 and a plurality of overprint marks 12 disposed on the mask body 11.

[0036] It is understandable that a mask pattern will also be configured on the mask version 11, which is the pattern to be formed on the wafer. Therefore, in Figure 1 The image also shows a mask pattern.

[0037] In some embodiments, the mask 10 can be divided into chip areas and dicing tracks, overlay marks 12 can be set in the dicing area, and mask patterns can be set in the dicing tracks.

[0038] The chip area can be understood as the main area of ​​the chip, and the graphics transferred to this area need to be preserved accordingly.

[0039] Regarding the dicing track, after the mask pattern is transferred, subsequent manufacturing processes will cut the dicing track accordingly. Therefore, the overlay mark 12 on the dicing track will not be reflected in the final chip product. Thus, placing the overlay mark 12 on the dicing track improves the precision of semiconductor manufacturing without affecting semiconductor manufacturing.

[0040] In some embodiments, a protection zone can be provided on the corresponding side of the dicing track, which can effectively separate the dicing track and the chip area so that they do not interfere with each other.

[0041] In some embodiments, a plurality of overlay marks 12 are disposed around the perimeter of the mask pattern. For example, the mask body 11 includes four corners, and corresponding overlay marks 12 are disposed at each of the four corners.

[0042] In some embodiments, a plurality of overlay marks 12 are provided in blank areas excluding the mask pattern. For example, in addition to providing overlay marks 12 at the four corners of the mask body 11, overlay marks 12 can also be provided in blank areas next to the mask pattern.

[0043] In some embodiments, a plurality of overprint marks 12 need to be evenly distributed on the mask version body 11.

[0044] In some embodiments, the multiple overprint marks 12 are identical in shape and size, but are positioned in different locations.

[0045] In some embodiments, each overprint mark 12 includes multiple overprint marks, which include overprint marks whose center points are on the same straight line, overprint marks with the same center point, and overprint marks set in different directions.

[0046] In this implementation, any one overprint mark 12 is composed of multiple overprint marks. The center points of some overprint marks may be located on the same straight line, the center points of some overprint marks may be the same, and some overprint marks may be set in different directions, so that the multiple overprint marks have diverse characteristics.

[0047] Regarding the center points being on the same straight line, for example: the center points being on the same horizontal line.

[0048] Furthermore, different overlay marks can be applied in different application scenarios to improve the applicability of overlay marks 12. For example, if it is necessary to align a graphic in a specific direction, the overlay marks set in the corresponding direction can be used for alignment. If it is necessary to measure the overlay error, the overlay error can be measured using overlay marks with the same center point or located on the same straight line.

[0049] It is understandable that multiple overlay marks 12 need to be evenly distributed on the mask 10. Therefore, the distribution of the multiple overlay marks 12 can be reasonably set.

[0050] As an optional implementation, the distance between each adjacent overprinted mark 12 is less than or equal to a preset distance, and the distance between each adjacent overprinted mark 12 includes distances in different directions.

[0051] In this implementation, overprint marks 12 may be provided in different directions, and the distance between adjacent overprint marks 12 in each direction may be less than or equal to a preset distance.

[0052] Regarding the various directions, this can refer to the vertical direction, horizontal direction, and tilt direction in the mask coordinate system.

[0053] Regarding the preset distance, it can be set according to the maximum measurement distance of the machine that measures the overlay mark 12 in the application scenario. The preset distance can be equal to the maximum measurement distance.

[0054] This implementation method ensures that the overprinting mark 12 can be effectively applied, thereby guaranteeing the application effect of the overprinting mark 12.

[0055] It is understandable that, in order to ensure the feasibility of overlay marking 12, overlay marking 12 needs to match the manufacturing scenario. For example, the pattern on mask 10 is generally designed first, and then mask 10 is manufactured according to the designed mask pattern. Therefore, the designed mask pattern needs to meet the manufacturing requirements of mask 10. As for overlay marking 12, it can be considered a mask pattern with marking and positioning functions.

[0056] Therefore, as an alternative implementation, the size of each overlay mark 12 is determined according to the resolution of the wafer exposure machine and / or according to the size manufacturing threshold of the mask 10, which is used to perform wafer exposure operations based on the mask 10.

[0057] In this implementation, the size of the overlay mark 12 is limited according to the corresponding constraints in the manufacturing process.

[0058] In some embodiments, the resolution of the wafer exposure machine can determine the exposure accuracy, and the exposure accuracy can determine the design size of the overlay mark 12, that is, it is necessary to ensure that the overlay mark 12 can be aligned with the exposure accuracy.

[0059] As an example, the size of overlay mark 12 needs to be smaller than the minimum resolution of the wafer lithography machine.

[0060] In some embodiments, the size manufacturing threshold of the mask 10 can be the minimum process size of the mask 10, i.e., the smallest mask 10 size that can be manufactured.

[0061] Therefore, the size of the overlay mark 12 needs to be larger than the manufacturing threshold to ensure the manufacturing stability of the mask 10.

[0062] By limiting the size of the overprint mark 12, the overprint mark 12 can meet the manufacturing requirements.

[0063] It is understandable that, in order to avoid the influence of the overlay mark 12 on the mask pattern and to achieve a uniform distribution of the overlay mark 12, the number of overlay marks 12 can be limited.

[0064] Therefore, as an optional implementation, the plurality of overlay marks 12 include overlay marks 12 disposed in different directions, and the number of overlay marks 12 disposed in different directions is an even number.

[0065] In this implementation, multiple overlay marks 12 can be provided in each direction, but the number of overlay marks 12 in each direction is an even number.

[0066] It is understandable that the number of overlay marks 12 in different directions can be the same or different, and no limitation is made here.

[0067] By using an even number of overlay marks 12 in each direction, not only can the overlay marks 12 be evenly distributed, but the overlay marks 12 can also be guaranteed to have symmetry.

[0068] It is understood that the above configuration of multiple overprinted marks 12 can be used in combination or individually, and no limitation is made here.

[0069] Figure 2A This is a schematic diagram illustrating the distribution of the first type of overlay mark 12 according to an exemplary embodiment, such as... Figure 2A As shown, the overlay marks 12 are evenly distributed at the four corners of the mask version body 11. The specific design of the overlay marks 12 is as follows: Figure 2A This is not reflected in the text.

[0070] Figure 2B This is a schematic diagram illustrating the distribution of the second type of overlay mark 12 according to an exemplary embodiment, such as... Figure 2B As shown, the overlay marks 12 are evenly distributed at the four corners and four edges of the mask version body 11. The specific design of the overlay marks 12 is as follows: Figure 2B This is not reflected in the text.

[0071] exist Figure 2A and Figure 2B In the process, the spacing between the overprinted marks 12 in the same direction is the same, and the overprinted marks 12 have a symmetrical distribution characteristic.

[0072] Understandable. Figure 2A and Figure 2B These are just two examples; other possible distribution methods may be used in different application scenarios, and no limitation is made in this disclosure.

[0073] In the foregoing embodiments, the distribution embodiments of the multiple overlay marks 12 are described accordingly. Next, the specific design of each overlay mark 12 will be described.

[0074] As an optional implementation, each set of engraved marks includes: a first mark, a second mark, a third mark, and a fourth mark; wherein the center point of the first mark and the center point of the second mark are the same, the center points of the second mark, the third mark, and the fourth mark are located on the same straight line, and the third mark and the fourth mark are set in mutually perpendicular directions.

[0075] In this embodiment, the overprinted mark 12 consists of four different marks. Among these four marks, the marks with the same center point are the first mark and the second mark, and the marks with their center points located on the same straight line are the second mark, the third mark, and the fourth mark. Furthermore, the third mark and the fourth mark are set in mutually perpendicular directions.

[0076] In some embodiments, the third mark may be set in the vertical direction, and the fourth mark may be set in the horizontal direction.

[0077] As an example, the first marker is a square-shaped marker, the second marker is a cross-shaped marker, and the number of the first markers is greater than the number of the second markers.

[0078] In some embodiments, the number of back-shaped markers can be two. These two back-shaped markers can be of different sizes. The larger back-shaped marker is located outside the smaller back-shaped marker, and the center points of the two back-shaped markers are the same.

[0079] In some embodiments, the number of cross-shaped marks can be one, and the size of this single cross-shaped mark can be smaller than the size of the smaller square-shaped mark. Furthermore, since the center points of the first and second marks are the same, the cross-shaped mark can be placed within the blank area of ​​the square-shaped mark.

[0080] As an optional implementation, there are multiple third marks, each third mark has the same shape, each third mark is arranged parallel to the fourth mark in the setting direction, each adjacent third mark is equidistant from the fourth mark in the setting direction, and each adjacent third mark has the same size difference.

[0081] As an example, each of the third markers is a grid-shaped marker, with equal spacing between them. Furthermore, these grid-shaped markers are distributed parallel to the orientation of the fourth marker.

[0082] As an example, the size difference could be the length difference of the grid-shaped markers in the vertical direction along the setting direction of the fourth marker, with the length difference being the same between these grid-shaped markers. For example, if the fourth marker is set horizontally, then in the vertical direction, the length difference between the grid-shaped markers is the same, achieving a uniform distribution of the third marker.

[0083] For the multiple overprinted marks 12, they are evenly distributed on the mask version body 11. For the third mark of each overprinted mark 12, they are also evenly distributed, so that the overprinted marks 12 are evenly distributed from the perspective of the whole or the individual.

[0084] As an optional implementation, the number of fourth marks is one, the shape of the fourth mark is the same as the shape of the third mark, and the size of the fourth mark is larger than the size of the third mark.

[0085] In this implementation, the fourth mark can also be a grid mark, the length of the fourth mark can be greater than the length of the third mark, and the width of the fourth mark can be equal to the width of the third mark.

[0086] In some embodiments, the center points of the second, third, and fourth markers can be considered to be located on the same straight line.

[0087] Figure 3 This is a schematic diagram illustrating an overlay mark 12 according to an exemplary embodiment, such as... Figure 3 As shown, the engraved mark 12 includes two square-shaped marks (i.e., the first mark), a cross-shaped mark (i.e., the second mark), ten grid-shaped marks distributed in the vertical direction (i.e., the third mark), and one grid-shaped mark distributed in the horizontal direction.

[0088] It can be seen that the set of engraved marks 12 includes multiple equally spaced parallel grid strips, each with its center perpendicular to a long grid strip. Each grid strip has the same width and spacing. Furthermore, the cross-shaped and the meander-shaped marks share the same center point. Also, the center point of the horizontal long grid strip is on the same horizontal line as the center points of the cross-shaped and meander-shaped marks. By setting the overlay mark 12 in this way, the diversity and complexity of the overlay mark 12 are increased.

[0089] In the foregoing embodiments, the method of setting the overlay mark 12 of the mask 10 was described. Based on the overlay mark 12 of the mask 10, it can be applied to overlay scenarios to measure overlay error and align graphics.

[0090] Figure 4 This is a flowchart illustrating an overlay error measurement method according to an exemplary embodiment, which can be applied to the mask 10 in the aforementioned embodiments. Figure 4 As shown, the method for measuring overlay error includes: Step S41: A first pattern layer and multiple overlay marks 12 corresponding to the first mask are formed on the wafer using the first mask.

[0091] Step S42: At least according to the multiple overprint marks 12 corresponding to the first mask, the overprint error is measured.

[0092] In some embodiments, the overlay error measurement method can be applied to overlay scenarios, and correspondingly, it can be applied to overlay equipment, such as an overlay instrument.

[0093] In step S41, the implementation of the first mask is consistent with the implementation of the mask 10 described above.

[0094] In some embodiments, a first patterned layer can be formed on a wafer using photolithography. Therefore, embodiments for forming a patterned layer on a wafer can be described in detail here with reference to well-established photolithography techniques in the art.

[0095] Referring to the foregoing embodiments, overlay lithography involves multiple layers of patterns. Therefore, the first pattern layer may be the first pattern layer or a pattern layer after the first one.

[0096] Furthermore, if the first graphic layer is the first graphic layer, then in step S42, after the next mask forms a new graphic layer and a new overlay mark 12, the overlay error can be measured based on the overlay marks 12 of the two layers respectively.

[0097] If the first graphic layer is not the first graphic layer, then in step S42, the overlay error is measured based on the multiple overlay marks 12 corresponding to the first mask and the overlay marks 12 based on the previous layer.

[0098] That is, overlay error can be measured based on the overlay mark 12 formed on the wafer by the current mask and the overlay mark 12 formed on the wafer by the previous mask.

[0099] For specific methods of measuring overprinting error, please refer to mature technologies in this field, which will not be described in detail here.

[0100] In the measurement of overlay error, alignment can also be performed based on the overlay marks 12. Therefore, as an optional implementation, the method may further include: comparing the plurality of overlay marks 12 on the second mask with the plurality of overlay marks 12 corresponding to the first mask to obtain alignment reference information, wherein the alignment reference information is used to characterize the positional relationship between the plurality of overlay marks 12 on the second mask and the plurality of overlay marks 12 corresponding to the first mask; and forming a second pattern layer and the plurality of overlay marks 12 corresponding to the second mask on the wafer according to the alignment reference information.

[0101] In some embodiments, the second mask can be the mask 10 that needs to be overlaid after the first mask has formed a pattern. The implementation of the mask 10 is also the same as the foregoing embodiments.

[0102] It is understood that multiple overlay marks 12 on the first mask have been formed on the first pattern layer of the wafer. Before the patterns of the second mask are overlaid, the multiple overlay marks 12 on the second mask can be compared with the multiple overlay marks 12 corresponding to the first mask to obtain alignment reference information, and then alignment can be performed based on the alignment reference information.

[0103] After alignment, a second pattern layer is formed on the wafer using a second mask, and multiple overlay marks 12 corresponding to the second mask are formed.

[0104] As an example, suppose that the multiple overlay marks 12 on the second mask and the multiple overlay marks 12 corresponding to the first mask are regarded as two layers of overlay marks 12, and the pattern of the first mask and the pattern of the second mask are regarded as two layers of pattern.

[0105] During photolithography, the centers of the two patterns are offset by a certain distance in a certain direction. The precise value of the offset distance between the two pattern structures is determined by the positional relationship between the overlay marks 12 corresponding to the two patterns.

[0106] As an example, if a vertical offset error occurs, the horizontal rectangular strips on the two overlay marks 12 will not overlap. Adjusting the wafer position so that the horizontal rectangular strips on the two overlay marks 12 overlap can avoid this offset error.

[0107] As an example, when the two layers of patterns are rotated at a certain angle, the grid strips of the two overlay marks 12 cannot overlap. The position of the wafer is adjusted based on the overlap of the horizontal rectangular strips to achieve precise alignment of the two layers of pattern structure.

[0108] As an example, by comprehensively utilizing the grid strips in different directions on the two layers of overlay marks 12 to adjust the position of the second mask, the alignment position and center offset distance of the two layers of patterns can be determined.

[0109] As an example, the centers of the two guilloché marks coincide, but their sizes are different. Therefore, the smaller guilloché mark is nested inside the larger guilloché mark. During the alignment process, observe the two layers of overprinted marks 12, and then adjust their relative positions to achieve alignment.

[0110] It can be seen that in different scenarios, different alignment methods can be adopted by combining the positional relationship of different indentation marks.

[0111] Then, after alignment, a second mask is used to form the next pattern layer and the corresponding overlay mark 12. In subsequent overlay processes, the above steps are repeated until all pattern layers are overlaid.

[0112] It is understandable that the overlay mark 12 on the mask 10 can be applied in other ways besides the two methods mentioned above, which will not be explained one by one here.

[0113] Figure 5 This is a structural block diagram of an overlay error measuring device 500 according to an exemplary embodiment. The device includes: Forming module 501 is configured to form a first pattern layer and a plurality of overlay marks corresponding to the first mask on a wafer using a first mask.

[0114] The measurement module 502 is configured to measure the overlay error based on at least a plurality of overlay marks corresponding to the first mask.

[0115] Optionally, the device further includes an alignment module configured to: compare a plurality of overlay marks on the second mask with a plurality of corresponding overlay marks on the first mask to obtain alignment reference information, wherein the alignment reference information is used to characterize the positional relationship between the plurality of overlay marks on the second mask and the plurality of corresponding overlay marks on the first mask; and form a second pattern layer and a plurality of corresponding overlay marks on the wafer using the second mask according to the alignment reference information.

[0116] Regarding the apparatus in the above embodiments, the specific manner in which each module performs its operation has been described in detail in the embodiments related to the method, and will not be elaborated upon here.

[0117] Figure 6 This is a block diagram illustrating an overlay apparatus 600 according to an exemplary embodiment. Figure 6 As shown, the overlay device 600 may include a processor 601 and a memory 602. The overlay device 600 may also include one or more of a multimedia component 603, an input / output (I / O) interface 604, and a communication component 605.

[0118] The processor 601 controls the overall operation of the overlay device 600 to complete all or part of the steps in the overlay error measurement method described above. The memory 602 stores various types of data to support the operation of the overlay device 600. This data may include, for example, instructions for any application or method operating on the overlay device 600, and application-related data such as contact data, sent and received messages, images, audio, video, etc. The memory 602 can be implemented by any type of volatile or non-volatile storage device or a combination thereof, such as Static Random Access Memory (SRAM), Electrically Erasable Programmable Read-Only Memory (EEPROM), Erasable Programmable Read-Only Memory (EPROM), Programmable Read-Only Memory (PROM), Read-Only Memory (ROM), magnetic storage, flash memory, magnetic disk, or optical disk. Multimedia component 603 may include a screen and an audio component. The screen may be, for example, a touchscreen, and the audio component is used to output and / or input audio signals. For example, the audio component may include a microphone for receiving external audio signals. The received audio signals may be further stored in memory 602 or transmitted via communication component 605. The audio component also includes at least one speaker for outputting audio signals. I / O interface 604 provides an interface between processor 601 and other interface modules, such as a keyboard, mouse, buttons, etc. These buttons may be virtual or physical buttons. Communication component 605 is used for wired or wireless communication between the overlay device 600 and other devices. Wireless communication may include Wi-Fi, Bluetooth, Near Field Communication (NFC), 2G, 3G, or 4G, or a combination thereof; therefore, the corresponding communication component 605 may include a Wi-Fi module, a Bluetooth module, or an NFC module.

[0119] In an exemplary embodiment, the overlay device 600 may be implemented by one or more application-specific integrated circuits (ASICs), digital signal processors (DSPs), digital signal processing devices (DSPDs), programmable logic devices (PLDs), field-programmable gate arrays (FPGAs), controllers, microcontrollers, microprocessors, or other electronic components to perform the overlay error measurement method described above.

[0120] In another exemplary embodiment, a computer-readable storage medium including program instructions is also provided, which, when executed by a processor, implement the steps of the overlay error measurement method described above. For example, the computer-readable storage medium may be the memory 602 including the program instructions described above, which may be executed by the processor 601 of the overlay device 600 to complete the overlay error measurement method described above.

[0121] In another exemplary embodiment, a computer program product is also provided, which includes a computer program executable by a processor, which, when executed by the processor, implements the steps of the above-described overlay error measurement method.

[0122] The preferred embodiments of this disclosure have been described in detail above with reference to the accompanying drawings. However, this disclosure is not limited to the specific details of the above embodiments. Within the scope of the technical concept of this disclosure, various simple modifications can be made to the technical solutions of this disclosure, and all such simple modifications fall within the protection scope of this disclosure.

[0123] It should also be noted that the various specific technical features described in the above specific embodiments can be combined in any suitable manner without contradiction. In order to avoid unnecessary repetition, this disclosure will not describe the various possible combinations separately.

[0124] Furthermore, various different embodiments of this disclosure can be combined in any way, as long as they do not violate the spirit of this disclosure, they should also be regarded as the content disclosed in this disclosure.

Claims

1. A photomask, characterized in that, include: Masked version body; Multiple overprint marks are disposed on the mask version body, each of the overprint marks including multiple overprint sub-marks, the multiple overprint marks including overprint marks whose center points are located on the same straight line, overprint marks with the same center point, and overprint marks disposed in different directions.

2. The photomask according to claim 1, characterized in that, The distance between each adjacent overprinted mark is less than or equal to a preset distance, and the distance between each adjacent overprinted mark includes the distance in different directions.

3. The photomask according to claim 1, characterized in that, The size of each of the overlay marks is determined based on the resolution of the wafer exposure machine and / or based on a size manufacturing threshold of the mask, the wafer exposure machine being used to perform wafer exposure operations based on the mask.

4. The photomask according to any one of claims 1 to 3, characterized in that, The plurality of overlay marks include overlay marks set in different directions, and the number of overlay marks set in different directions is an even number.

5. The photomask according to claim 1, characterized in that, The plurality of interlocking marks include: a first mark, a second mark, a third mark, and a fourth mark. The center point of the first mark and the center point of the second mark are the same. The center points of the second mark, the third mark, and the fourth mark are located on the same straight line. The third mark and the fourth mark are set in mutually perpendicular directions.

6. The photomask according to claim 5, characterized in that, The first mark is a square-shaped mark, the second mark is a cross-shaped mark, and the number of the first marks is greater than the number of the second marks.

7. The photomask according to claim 5 or 6, characterized in that, The number of the third marks is multiple, each of the third marks has the same shape, each of the third marks is arranged parallel to the direction in which the fourth mark is set, each of the adjacent third marks is equidistant from the direction in which the fourth mark is set, and each of the adjacent third marks has the same size difference. And / or, The fourth mark is one in number, and the shape of the fourth mark is the same as that of the third mark, but the size of the fourth mark is larger than that of the third mark.

8. A method for measuring overlay error, characterized in that, include: A first pattern layer and a plurality of overlay marks corresponding to the first mask are formed on the wafer using a first mask, wherein the first mask is the mask as described in any one of claims 1 to 7; At least based on the multiple overprint marks corresponding to the first mask, the overprint error is measured.

9. The overlay error measurement method according to claim 8, characterized in that, The method for measuring overlay error also includes: Multiple overprint marks on the second mask are compared with multiple overprint marks corresponding to the first mask to obtain alignment reference information. The alignment reference information is used to characterize the positional relationship between the multiple overprint marks on the second mask and the multiple overprint marks corresponding to the first mask. The second mask is the mask as described in any one of claims 1 to 7. Based on the alignment reference information, a second pattern layer and a plurality of overlay marks corresponding to the second mask are formed on the wafer using the second mask.

10. A device for measuring overlay error, characterized in that, include: The forming module is configured to form a first pattern layer and a plurality of overlay marks corresponding to the first mask on a wafer through a first mask, wherein the first mask is the mask as described in any one of claims 1 to 7; The measurement module is configured to measure the overlay error based on at least a plurality of overlay marks corresponding to the first mask.

11. A cutting and engraving device, characterized in that, include: A memory on which computer programs are stored; A processor for executing the computer program in the memory to implement the overlay error measurement method of claim 8 or 9.

Images