Intelligent point inspection instrument

Abstract

The invention belongs to the technical field of industrial automatic detection and instruments, and particularly discloses an intelligent point inspection instrument, which comprises a master control MCU (Microprogrammed Control Unit) electrically connected with a digital quantity input module, a digital quantity output module, an analog quantity input module and an analog quantity output module, the digital quantity input module is used for outputting a switching value signal to a distributed control system (DCS) so as to simulate the on-off state of field equipment; the digital quantity output module is used for detecting the state of a switching value signal output by a DCS (Distributed Control System) and judging whether the output is correct or not; the analog quantity input module is used for outputting an adjustable analog quantity current signal to a distributed control system (DCS) so as to simulate field transmission; and the analog quantity output module is used for detecting an analog quantity current signal output by the DCS and reading a current value of the analog quantity current signal. According to the invention, the bidirectional closed-loop test of the full-channel digital quantity and analog quantity signals of the distributed control system can be realized without interrupting the operation of the system.

Description

Technical Field

[0001] This application belongs to the field of industrial automation testing and instrumentation technology, specifically relating to an intelligent inspection instrument. Background Technology

[0002] In the field of industrial automation, the Distributed Control System (DCS) serves as the core control platform. The accuracy and reliability of its input and output channels are directly related to the stability and safety of the production process. However, existing technologies lack a portable dedicated device that can simultaneously perform bidirectional closed-loop testing of digital and analog signals without interrupting system operation. This results in on-site debugging, regular maintenance, and fault diagnosis often relying on distributed instruments, which are cumbersome and inefficient. Furthermore, it is difficult to comprehensively verify the signal integrity, response accuracy, and anti-interference capabilities of all DCS channels, leading to maintenance blind spots and potential risks.

[0003] Therefore, there is an urgent need for an integrated, high-precision, and electrically isolated multifunctional testing instrument to achieve efficient, reliable, and comprehensive testing of distributed control systems (DCS). Summary of the Invention

[0004] To address the shortcomings of existing technologies, the purpose of this application is to provide an intelligent inspection instrument. This application can achieve bidirectional closed-loop testing of all channels of digital and analog signals of a distributed control system without interrupting system operation, thereby improving the debugging efficiency, maintenance reliability, and fault prevention capabilities of the inspection instrument.

[0005] To achieve the above objectives, this application provides the following technical solution: An intelligent inspection instrument includes: a main control MCU, which is electrically connected to a digital input module, a digital output module, an analog input module, and an analog output module. The digital input module outputs switch signals to a distributed control system (DCS) to simulate the switching state of field equipment. The digital output module detects the status of the switch signals output by the DCS and determines whether the output is correct. The analog input module outputs adjustable analog current signals to the DCS to simulate field transmission. The analog output module detects the analog current signals output by the DCS and reads their current values.

[0006] Optionally, the digital input module includes a wireless LoRa module and an isolation module. The main control MCU drives the LCD screen through a parallel or serial display interface to realize data writing and human-machine interaction. The main control MCU and the wireless LoRa module are connected through a standard TTL level UART serial interface to realize long-distance wireless communication. The main control MCU is connected to the digital input terminals of the distributed control system (DCS) through the isolation module via general-purpose input / output pins to simulate the switching state of field devices.

[0007] Optionally, the wireless LoRa module includes: a wireless LoRa chip; a first mode selection pin of the wireless LoRa chip is connected to a first ground terminal via a jumper; a second mode selection pin is connected to a 3.3V power supply via a first resistor; a serial data input pin of the wireless LoRa chip is connected to a serial port transmit pin of the main control MCU via a signal receive line; a serial data output pin is connected to a serial port receive pin of the main control MCU via a signal transmit line; a status indication / wake-up output pin of the wireless LoRa chip is connected to the cathode of a first light-emitting diode; a first end of a second resistor is connected to a 3.3V power supply; and a second end is connected to the anode of the first light-emitting diode; a first capacitor is connected in parallel between the power supply pin and the ground pin of the wireless LoRa chip.

[0008] Optionally, the isolation module includes: a DC-DC isolation converter chip, a connection interface, a resettable fuse, a first diode, a second capacitor, a third capacitor, a fourth capacitor, a fifth capacitor, and a third resistor. The input pin of the DC-DC isolation converter chip is connected to a 24V power supply via the resettable fuse. The anode of the first diode is connected to the third pin of the connection interface and also to the third ground terminal, while the cathode is connected to the input pin of the DC-DC isolation converter chip. The first pin of the connection interface is connected to the 24V power supply. The positive terminal of the second capacitor is connected to the input pin of the DC-DC isolation converter chip, and the negative terminal is connected to the third ground terminal. The positive voltage output pin of the DC-DC isolation converter chip outputs a 5V isolated power supply, and the isolated output ground pin is connected to the fourth ground terminal. The third, fourth, and fifth capacitors are connected in parallel between the positive voltage output pin of the DC-DC isolation converter chip and the fourth ground terminal. The first end of the third resistor is connected to the fourth ground terminal, and the second end is connected to the fifth ground terminal.

[0009] Optionally, the digital output module includes: a main control chip, which is electrically connected to a storage and reset control unit, a debug programming interface unit, an RTC power backup and status indicator unit, and a clock and reset management unit. The storage and reset control unit is used for non-volatile storage of system parameters and operating data, and for providing reset control in case of power failure. The debug programming interface unit provides a standard hardware debugging and program download interface to support online simulation, firmware updates, and system diagnostics. The RTC power backup and status indicator unit supplies power to the real-time clock to maintain time continuity when the main power supply fails. The clock and reset management unit provides a high-precision clock source to the main control chip and is used for power monitoring and reset.

[0010] Optionally, the storage and reset control unit includes: an EEPROM memory chip, a fifth resistor, a sixth resistor, and a power monitoring and reset chip. The first address pin, second address pin, third address pin, and ground pin of the EEPROM memory chip are connected to a seventh ground terminal; the power pin is connected to a 3.3V power supply; the write protection pin is connected to the first multiplexed pin of the main control chip; the serial clock pin is connected to the second multiplexed pin of the main control chip; and the serial data pin is connected to the third multiplexed pin of the main control chip U3. The first ends of both the fifth and sixth resistors are connected to a 3.3V power supply; the second end of the fifth resistor is connected to the serial data pin of the EEPROM memory chip; and the second end of the sixth resistor is connected to the serial clock pin of the EEPROM memory chip.

[0011] Optionally, the debug programming interface unit includes: a debug interface connector, a seventh resistor, and an eighth resistor, wherein the fourth pin of the debug interface connector is connected to the eighth ground terminal; the first end of the seventh resistor is connected to a 3.3V power supply, and the second end is connected to the third pin of the debug interface connector and simultaneously connected to the first multi-function multiplexed pin of the main control chip; the first end of the eighth resistor is connected to a 3.3V power supply, and the second end is connected to the second pin of the debug interface connector and simultaneously connected to the second multi-function multiplexed pin of the main control chip; the fourth pin of the debug interface connector is connected to the eighth ground terminal.

[0012] Optionally, the RTC power backup and status indication unit includes: a sixth capacitor, a ninth resistor, and a second light-emitting diode, wherein the first end of the sixth capacitor is connected to the backup power input pin of the main control chip and is also connected to a 3.3V power supply, and the second end is connected to the tenth ground terminal; the cathode of the second light-emitting diode is connected to the status indication LED control pin of the main control chip, and the anode is connected to the 3.3V power supply through the ninth resistor.

[0013] Optionally, the clock and reset management unit includes: a crystal oscillator, a seventh capacitor, an eighth capacitor, a tenth resistor R, and a power monitoring and reset chip. The first end of the crystal oscillator is connected to the oscillator output pin of the main control chip, the third end is connected to the oscillator input pin of the main control chip, and the fourth and second ends are simultaneously connected to the eleventh ground terminal. The seventh capacitor is connected in parallel between the oscillator output pin and the eleventh ground terminal of the main control chip. The eighth capacitor is connected in parallel between the oscillator input pin and the eleventh ground terminal of the main control chip. The ground pin of the power monitoring and reset chip is connected to the twelfth ground terminal, the reset output pin is connected to the reset input pin of the main control chip via the tenth resistor, and the power supply pin is connected to a 3.3V power supply.

[0014] Optionally, the digital output module further includes a level conversion and interface protection unit, which includes an RS-232 transceiver chip, a ninth capacitor, a tenth capacitor, an eleventh capacitor, a twelfth capacitor, and a first transient voltage suppression diode array. The ninth capacitor is connected between the first positive terminal connection pin and the first negative terminal connection pin of the RS-232 transceiver chip; the tenth capacitor is connected between the second positive terminal connection pin and the second negative terminal connection pin of the RS-232 transceiver chip; the first terminals of the eleventh and twelfth capacitors are respectively connected to the positive charge pump voltage output pin and the negative charge pump voltage output pin of the RS-232 transceiver chip. The first input / output protection channel of the first transient voltage suppression diode array is connected to the line between the serial data output line of the RS-232 transceiver chip and the external connector, and the second input / output protection channel is connected to the line between the serial data input line of the RS-232 transceiver chip and the external connector. In addition, the TTL level data input pin of the RS-232 transceiver chip is connected to the serial data generation output terminal of the main control chip, the TTL level data output pin is connected to the serial data receiving input terminal of the main control chip, the ground pin is connected to the thirteenth ground terminal, and the power supply pin is connected to the 3.3V power supply.

[0015] Compared with the prior art, the beneficial effects of this application are as follows: This application constructs a portable, high-precision inspection instrument by integrating a bidirectional digital and analog signal processing module. It can realize full-function closed-loop testing and verification of the input and output channels of a distributed control system. Under the condition of no power outage and no shutdown, it can accurately simulate the switching status of field equipment and transmitter current signals, and detect the correctness and accuracy of DCS output signals in real time. This can improve the debugging efficiency, maintenance reliability and fault prevention capability of industrial automation systems, and effectively ensure the long-term stable operation and safe production of process control systems. Attached Figure Description

[0016] Figure 1This is a schematic diagram of the overall structure of an intelligent inspection instrument provided in one embodiment of this application; Figure 2 This is a schematic diagram of the circuit structure of a digital input module provided in another embodiment of this application; Figure 3 This is a schematic diagram of the circuit structure of a wireless LoRa module provided in another embodiment of this application; Figure 4 This is a schematic diagram of the circuit structure of an isolation module provided in another embodiment of this application; Figure 5 This is a schematic diagram of the circuit structure of a digital output module provided in another embodiment of this application; Figure 6 This is a schematic diagram of the circuit structure of a level conversion and interface protection unit provided in another embodiment of this application; Figure 7 This is a schematic diagram of the circuit structure of a transceiver unit provided in another embodiment of this application; Figure 8 This is a schematic diagram of the circuit structure of a voltage regulator and power status indicator unit provided in another embodiment of this application; Figure 9 This is a schematic diagram of the circuit structure of an isolated transceiver unit provided in another embodiment of this application. Detailed Implementation

[0017] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the scope of protection of the present invention.

[0018] It should be noted that all directional indications (such as up, down, left, right, front, back, etc.) in the embodiments of the present invention are only used to explain the relative positional relationship and movement of each component in a certain specific posture (as shown in the figure). If the specific posture changes, the directional indication will also change accordingly.

[0019] In this invention, unless otherwise explicitly specified and limited, the terms "connection," "fixed," etc., should be interpreted broadly. For example, "fixed" can mean a fixed connection, a detachable connection, or an integral part; it can mean a mechanical connection or an electrical connection; it can mean a direct connection or an indirect connection through an intermediate medium; it can mean the internal communication of two components or the interaction between two components, unless otherwise explicitly limited. Those skilled in the art can understand the specific meaning of the above terms in this invention according to the specific circumstances.

[0020] Furthermore, if the embodiments of this invention involve descriptions such as "first" or "second," these descriptions are for descriptive purposes only and should not be construed as indicating or implying their relative importance or implicitly specifying the number of technical features indicated. Therefore, a feature defined with "first" or "second" may explicitly or implicitly include at least one of those features. Additionally, the meaning of "and / or" throughout the text includes three parallel solutions; for example, "A and / or B" includes solution A, solution B, or a solution where both A and B are satisfied simultaneously. Furthermore, the technical solutions of the various embodiments can be combined with each other, but this must be based on the ability of those skilled in the art to implement them. When the combination of technical solutions is contradictory or impossible to implement, it should be considered that such a combination of technical solutions does not exist and is not within the scope of protection claimed by this invention.

[0021] Figure 1 This is a schematic diagram of the overall structure of an intelligent inspection instrument according to one embodiment of this application, as shown below. Figure 1 As shown, the inspection instrument includes: a main control MCU, which is electrically connected to a digital input module, a digital output module, an analog input module, and an analog output module. The digital input module outputs switch signals to the distributed control system (DCS) to simulate the switching state of field equipment. The digital output module detects the status of the switch signals output by the DCS and determines whether the output is correct. The analog input module outputs adjustable analog current signals to the DCS to simulate field transmission. The analog output module detects the analog current signals output by the DCS and reads their current values.

[0022] In this embodiment, the inspection instrument achieves full-function testing and verification of the signal channels of the distributed control system through modular design. The digital input module of the inspection instrument can actively output preset switching signals to the DCS to simulate the switching states of field devices (such as sensors and relays), thereby verifying the correctness of the DCS's response logic to digital inputs. Its digital output module monitors the status of the switching signals output by the DCS in real time, verifying the accuracy and real-time performance of the DCS control commands through internal logic. Simultaneously, the analog input module can generate high-precision, adjustable analog current signals (such as 4-20mA) and output them to the DCS to simulate continuous signals from field transmitters, testing the DCS's acquisition accuracy and linearity of analog inputs. The analog output module accurately measures the analog current signal value output by the DCS, evaluating its output accuracy and stability. Through this closed-loop testing mechanism, the inspection instrument can comprehensively verify the integrity, accuracy, and reliability of DCS input and output channels without stopping the equipment or interrupting the system. This significantly improves the maintenance efficiency of industrial automation systems, reduces debugging risks, and effectively prevents production accidents caused by signal link failures, ultimately ensuring the long-term stable operation of the process control system.

[0023] Figure 2 yes Figure 1 A schematic diagram of the circuit structure of the digital input module, as shown below. Figure 2 As shown, the digital input module includes a wireless LoRa module and an isolation module. The main control MCU drives the LCD screen through a parallel or serial display interface (such as SPI) to realize data writing and human-machine interaction. The main control MCU and the wireless LoRa module are connected through a standard TTL level UART serial interface to realize long-distance wireless communication. The main control MCU is connected to the digital input terminals of the distributed control system (DCS) through the isolation module via general purpose input / output pins (IO control) to simulate the switching state of field devices.

[0024] In another exemplary embodiment, such as Figure 3As shown, the wireless LoRa module includes: a wireless LoRa chip U1 (e.g., WH-L102-L), the first mode selection pin M0 of the wireless LoRa chip U1 is connected to the first ground terminal GND1 via jumper JB1, the second mode selection pin M1 of the wireless LoRa chip U1 is connected to a 3.3V power supply via a first resistor R1, the serial data input pin RXD of the wireless LoRa chip U1 is connected to the serial port transmit pin MCU_TX of the main control MCU via a signal receive line (WH_RX), and the serial data output pin TXD of the wireless LoRa chip U1 is connected to the serial port transmit pin MCU_TX of the main control MCU via a signal receive line (WH_RX). The output line (WH_TX) is connected to the serial port receive pin MCU_RX of the main control MCU. The status indicator / wake-up output pin AUX of the wireless LoRa chip U1 is connected to the cathode of the first light-emitting diode LED1. The first end of the second resistor R2 is connected to the 3.3V power supply, and the second end of the second resistor R2 is connected to the anode of the first light-emitting diode LED1. The power supply pin VCC of the wireless LoRa chip U1 is connected to the 3.3V power supply, and the ground pin GND is connected to the second ground terminal GND2. The first capacitor C1 is connected in parallel between the power supply pin VCC and the ground pin GND of the wireless LoRa chip U1.

[0025] In this embodiment, the module is grounded (GND1) via the first mode selection pin M0 and pulled up to a 3.3V power supply (through resistor R1) via the second mode selection pin M1, configured in "configuration mode" (M1=1, M0=0). In this mode, the module can receive AT commands or parameter configuration frames from the main control MCU via serial port to set LoRa parameters such as communication frequency, spreading factor, and transmit power. The module communicates with the main control MCU via a full-duplex serial port. Specifically, the main control MCU's serial port transmit pin (MCU_TX) is connected to the module's serial data input pin (RXD) to send data to be transmitted or configuration commands to the module; the module's serial data output pin (TXD) is connected to the main control MCU's serial port receive pin (MCU_RX) to send received wireless data or module status information back to the MCU. The module's status indicator / wake-up output pin (AUX) is connected to the cathode of the first light-emitting diode (LED1). The LED's on / off state visually indicates the module's operating status: when the module is ready to receive commands, the AUX output is low, and the first LED1 is lit; when the module is busy (e.g., sending, receiving, or processing data), the AUX output is high, and the first LED1 is off. Additionally, the module's power supply pin VCC is connected to a 3.3V power supply and filtered and regulated by the first capacitor C1. The ground pin GND is connected to the second ground terminal GND2 to complete the circuit.

[0026] In summary, this module enables long-distance, low-power data transmission via LoRa wireless technology, and features hardware status indication and flexible mode configuration capabilities, making it suitable for reliable data interaction between industrial inspection instruments and DCS systems.

[0027] In another exemplary embodiment, such as Figure 4 As shown, the isolation module includes a DC-DC isolation converter chip U2 (e.g., URB2405S-6WR3), a connection interface P1, a resettable fuse F1, a first diode D1, a second capacitor C2, a third capacitor C3, a fourth capacitor C4, a fifth capacitor C5, and a third resistor R3. The ground pin GND of the DC-DC isolation converter chip U2 is connected to the third ground terminal GND3. The input pin VIN is connected to a 24V power supply through the resettable fuse F1. The anode of the first diode D1 is connected to the third pin of the connection interface P1 and simultaneously to the third ground terminal GND3. The cathode of the first diode D1 is connected to the input pin VIN of the DC-DC isolation converter chip U2. The first pin of the connection interface P1 is connected to a 24V power supply. The positive terminal of the second capacitor C2 is connected to the input pin VIN of the DC-DC isolation converter chip U2, and the negative terminal is connected to the third ground terminal GND3. The positive voltage output pin +V of the DC-DC isolation converter chip U2... O Outputs a 5V isolated power supply; the 0V isolated output ground pin of the DC-DC isolated converter chip U2 is connected to the fourth ground terminal GND4, and the third capacitor C3, the fourth capacitor C4, and the fifth capacitor C5 are connected in parallel to the positive voltage output pin +V of the DC-DC isolated converter chip U2. O Between the fourth grounding terminal GND4 and the third resistor R3; the first end of the third resistor R3 is connected to the fourth grounding terminal GND4, and the second end is connected to the fifth grounding terminal GND5.

[0028] In this embodiment, the external 24V power supply is input through the first pin of the connection interface P1, and after overcurrent protection by the self-resetting fuse F1, it is delivered to the input pin VIN of the DC-DC isolation converter chip U2. Simultaneously, the cathode of the first diode D1 is connected to the input pin VIN and the anode is connected to the third ground terminal GND3, forming an input reverse connection protection circuit to prevent damage to the module from reverse polarity of the external 24V power supply. The second capacitor C2 is connected in parallel between the input pin VIN and the third ground terminal GND3 of the DC-DC isolation converter chip U2, and its function is to filter out high-frequency noise and transient interference in the 24V input power supply. Furthermore, the DC-DC isolation converter chip U2 internally uses a high-frequency switch and transformer for energy coupling, converting the 24V input voltage to an isolated 5V output voltage, which is output from the positive voltage output pin +VO. Simultaneously, the isolated output ground pin 0V is connected to the independent fourth ground terminal GND4, achieving electrical isolation between the input ground (GND3) and the output ground (GND4), thereby effectively blocking common-mode noise and ground loop interference. Figure 4 As shown, on the output side of the DC-DC isolation converter chip U2, the third capacitor C3, the fourth capacitor C4, and the fifth capacitor C5 are connected in parallel between the positive voltage output pin +VO and GND4. They respectively serve as high-frequency decoupling, intermediate-frequency filtering, and low-frequency energy storage, jointly suppressing output ripple and providing a stable and clean isolated power supply for subsequent circuits. The third resistor R3 is connected between the output ground GND4 and the fifth ground terminal GND5. By providing a high-resistance path, it achieves weak coupling between the two grounds, balancing the potential difference and suppressing static electricity accumulation, further improving the system's reliability and anti-interference capability in harsh industrial environments.

[0029] In another exemplary embodiment, such as Figure 5 As shown, the digital output module includes a main control chip U3 (e.g., an STM32F103VET / GD32F103VET6). The main control chip U3 is electrically connected to a storage and reset control unit, a debug programming interface unit, an RTC power backup and status indicator unit, and a clock and reset management unit. The storage and reset control unit is used to non-volatilely store system parameters and operating data, and to provide reset control in case of power failure. The debug programming interface unit provides a standard hardware debugging and program download interface to support online simulation, firmware updates, and system diagnostics. The RTC power backup and status indicator unit supplies power to the real-time clock to maintain time continuity when the main power fails. The clock and reset management unit provides a high-precision clock source for the main control chip U3 and is used for power monitoring and reset.

[0030] In another exemplary embodiment, reference continues to... Figure 5The storage and reset control unit includes an EEPROM memory chip U4 (e.g., AT24C128), a fifth resistor R5, a sixth resistor R6, and a power monitoring and reset chip U5 (e.g., MAX809RTR). The first address pin A0, second address pin A1, third address pin A2, and ground pin GND of the EEPROM memory chip U4 are connected to the seventh ground terminal GND7. The power supply pin VCC is connected to a 3.3V power supply. The write protection pin WP is connected to the first multiplexed pin PB8 / TIM4_CH3 / SDIO_D of the main control chip U3. 4. The serial clock pin SCL is connected to the second multiplexed pin PB6 / I2C1_SCL / TIM4_CH1 of the main control chip U3, and the serial data pin SDA is connected to the third multiplexed pin PB7 / I2C1_SDA / FSMC_NADV / TIM4_CH2 of the main control chip U3; the first ends of the fifth resistor R5 and the sixth resistor R6 are both connected to a 3.3V power supply, the second end of the fifth resistor R5 is connected to the serial data pin SDA of the EEPROM memory chip U4, and the second end of the sixth resistor R6 is connected to the serial clock pin SCL of the EEPROM memory chip U4.

[0031] In this embodiment, the EEPROM memory chip U4 serves as the non-volatile storage core of the digital output module, which is connected via I... 2 The C-bus establishes a communication connection with the main control chip U3. Specifically, the serial clock pin SCL of the chip is connected to the PB6 pin of the main control chip U3 (multiplexed as I2C1_SCL), and the serial data pin SDA is connected to the PB7 pin of the main control chip U3 (multiplexed as I2C1_SDA). The main control chip U3 communicates via the standard I-bus. 2 The C protocol performs read and write operations on the EEPROM memory chip U4 to store and retrieve key parameters of the inspection instrument, including but not limited to DCS channel configuration, analog output calibration curves, device serial number, and operation logs. The write protection pin WP of the EEPROM memory chip U4 is connected to the PB8 pin of the main control chip U3. When the write protection pin WP is set high by the main control chip U3, the EEPROM memory chip U4 enters write protection mode to prevent accidental operation or interference from tampering with the stored data. Additionally, all address pins A0 to A2 of the EEPROM memory chip U4 are grounded, setting the device's I / O. 2 The slave address is the default value, and the fifth resistor R5 and the sixth resistor R6 are used as I. 2 The pull-up resistors on the C bus have one end connected to a 3.3V power supply and the other end connected to the SDA and SCL lines respectively. Their purpose is to provide a defined high level for the open-drain output bus, ensuring signal integrity and anti-interference capability during high-speed or long-distance transmission.

[0032] In another exemplary embodiment, reference continues to... Figure 5 The debug programming interface unit includes a debug interface connector J1, a seventh resistor R7, and an eighth resistor R8. The fourth pin of the debug interface connector J1 is connected to the eighth ground terminal GND8. The first end of the seventh resistor R7 is connected to a 3.3V power supply, and the second end is connected to the third pin of the debug interface connector J1 and simultaneously connected to the first multi-function multiplexed pin PA13 / JTMS / SWDIO of the main control chip U3. The first end of the eighth resistor R8 is connected to a 3.3V power supply, and the second end is connected to the second pin of the debug interface connector J1 and simultaneously connected to the second multi-function multiplexed pin PA14 / JTCK / SWCLK of the main control chip U3. The fourth pin of the debug interface connector J1 is connected to the eighth ground terminal GND8.

[0033] In this embodiment, the second pin (SWCLK) of the debug interface connector J1 is pulled up to a 3.3V power supply via the eighth resistor R8 and then connected to the PA14 pin of the main control chip U3. The third pin (SWDIO) is pulled up via the seventh resistor R7 and then connected to the PA13 pin of the main control chip U3. These two signal lines constitute the core channel of the serial debug protocol. When an external debugger (such as ST-Link) is connected to the target board through the debug interface connector J1, the debugger first establishes a common ground with the system via the fourth pin (GND8). Subsequently, the debugger actively initiates a communication sequence, providing a synchronization clock via the SWCLK line, and sending debug commands and address data in bidirectional open-drain mode via the SWDIO line, while receiving the chip's response and status information. In addition, the pull-up resistors R7 and R8 ensure that the SWDIO and SWCLK signals are pulled high during bus idle or chip reset, preventing false triggering caused by floating signals. This ensures the reliability of the debug connection and the stability of communication, enabling developers to implement advanced debugging functions such as online programming, hardware breakpoint setting, register viewing, and real-time tracing of the main control chip U3.

[0034] In another exemplary embodiment, reference continues to... Figure 5 The RTC power backup and status indication unit includes a sixth capacitor C6, a ninth resistor R9, and a second light-emitting diode LED2. The first end of the sixth capacitor C6 is connected to the backup power input pin Vbat of the main control chip U3 and is also connected to a 3.3V power supply, while the second end is connected to the tenth ground terminal GND10. The cathode of the second light-emitting diode LED2 is connected to the status indication LED control pin PC13 / TAMPER-RTC of the main control chip U3, and the anode is connected to a 3.3V power supply through the ninth resistor R9.

[0035] In this embodiment, the unit is connected in parallel with the backup power input pin Vbat of the main control chip U3 and ground via a sixth capacitor C6. Its function is to: during normal main power supply energy storage, when the main power supply fails, utilize the stored energy to power the internal real-time clock (RTC) and backup register of the main control chip U3, maintaining continuous clock operation and preventing the loss of critical data. Simultaneously, the second light-emitting diode LED2 is connected to the 3.3V power supply via a current-limiting resistor R9. Its cathode is controlled by the PC13 pin of the main control chip U3. This pin can be configured as an RTC event output or a general-purpose GPIO. When the PC13 pin outputs a low level, the second light-emitting diode LED2 lights up, visually indicating the system's operation, RTC normal operation, or intrusion detection trigger status. This achieves clock maintenance and visual monitoring of the operating status under power failure conditions, enhancing the reliability and maintainability of the inspection instrument.

[0036] In another exemplary embodiment, reference continues to... Figure 5 The clock and reset management unit includes a crystal oscillator X1, a seventh capacitor C7, an eighth capacitor C8, a tenth resistor R10, and a power monitoring and reset chip U5 (e.g., a MAX809RTR). The first terminal of the crystal oscillator X1 is connected to the oscillator output pin OSC_OUT of the main control chip U3, the third terminal is connected to the oscillator input pin OSC_IN of the main control chip U3, and the fourth and second terminals are simultaneously connected to the eleventh ground terminal GND11. The seventh capacitor C7 is connected in parallel between the oscillator output pin OSC_OUT of the main control chip U3 and the eleventh ground terminal GND11. The eighth capacitor C8 is connected in parallel between the oscillator input pin OSC_IN of the main control chip U3 and the eleventh ground terminal GND11. The ground pin of the power monitoring and reset chip U5 is connected to the twelfth ground terminal GND12, the reset output pin / RST is connected to the reset input pin NRST of the main control chip U3 via the tenth resistor R10, and the power supply pin VCC is connected to a 3.3V power supply.

[0037] In this embodiment, crystal oscillator X1, along with the seventh capacitor C7 and the eighth capacitor C8, are connected to the OSC_OUT and OSC_IN pins of the main control chip U3, forming a Pierce oscillator. This oscillator generates a high-precision clock signal, providing a stable timing source for the core and peripherals of the main control chip U3, ensuring the accuracy of instruction execution, data sampling, and communication synchronization. Simultaneously, the power monitoring and reset chip U5 continuously monitors the 3.3V system power supply. When it detects that the voltage is below a preset threshold (e.g., 2.93V) or a power-on or power-off event occurs, its open-drain reset output pin / RST is immediately pulled to a valid low level. The reset signal is then sent to the reset input pin NRST of the main control chip U3 via the tenth resistor R10 to trigger a hardware reset, thereby forcing a system restart.

[0038] In summary, by setting up the clock and reset management unit, it is possible to effectively suppress program crashes, timing disorders, or data read / write errors caused by power fluctuations and surge interference in the main control chip U3. This helps to ensure the integrity of key parameters in the EEPROM, the continuity of the RTC clock, and the long-term stable operation of the inspection instrument.

[0039] In another exemplary embodiment, such as Figure 6 As shown, the digital output module also includes a level conversion and interface protection unit. This unit includes an RS-232 transceiver chip U6 (e.g., MAX3232ESE), a ninth capacitor C9, a tenth capacitor C10, an eleventh capacitor C11, a twelfth capacitor C12, and a first transient voltage suppression diode array D2. The ninth capacitor C9 is connected between the first positive terminal connection pin C1+ and the first negative terminal connection pin C1- of the RS-232 transceiver chip U6; the tenth capacitor C10 is connected between the second positive terminal connection pin C2+ and the second negative terminal connection pin C2- of the RS-232 transceiver chip U6; the first terminals of the eleventh capacitor C11 and the twelfth capacitor C12 are respectively connected to the positive charge pump voltage output pin V+ and the negative charge pump voltage output pin V- of the RS-232 transceiver chip U6, and their second terminals are simultaneously connected to the fourteenth ground terminal GND14; the first transient voltage suppression diode array... The first input / output protection channel (I / O1) of column D2 (e.g., using PSM712) is connected to the line between the serial data output line (T1OUT) of RS-232 transceiver chip U6 and the external connector, and the second input / output protection channel (I / O2) is connected to the line between the serial data input line (R1IN) of RS-232 transceiver chip U6 and the external connector. In addition, the TTL level data input pin T1IN of RS-232 transceiver chip U6 is connected to the serial data generation output terminal PA9 / USART1_TX of the main control chip U3, and the TTL level data output pin R1OUT of RS-232 transceiver chip U6 is connected to the serial data receiving input terminal PA10 / USART1_RX of the main control chip U3. The ground pin GND of RS-232 transceiver chip U6 is connected to the thirteenth ground terminal GND13, and the power supply pin VCC is connected to a 3.3V power supply.

[0040] In this embodiment, the interface protection unit achieves safe and reliable RS-232 communication through a dual mechanism of integrated level conversion and transient suppression. Specifically, the RS-232 transceiver chip U6 uses its internal charge pump circuit to convert a single 3.3V power supply into a bipolar drive voltage (V+ and V-) conforming to the RS-232 standard with the help of external capacitors C9 and C10. The voltage is then filtered and regulated by capacitors C11 and C12 to drive its transmitter to convert the TTL level signal of the main control chip U3 into an RS-232 level of ±5V or higher and output it from T1OUT. At the same time, the receiver converts the externally input RS-232 level into a TTL level and sends it to R1IN. In addition, the first transient voltage suppression diode array D2 is connected in parallel on the signal paths of T1OUT and R1IN in a bidirectional clamping manner. When a transient overvoltage exceeding its clamping voltage occurs on the signal line, the first transient voltage suppression diode array D2 can conduct within nanoseconds and discharge the dangerous energy to ground, thereby protecting the RS-232 transceiver chip U6 and the main control chip U3 from damage and ensuring the long-term stability of the communication link in harsh electrical environments.

[0041] In another exemplary embodiment, such as Figure 7 As shown, the digital output module also includes a transceiver unit, which includes a transceiver chip U7 (e.g., MAX13487), an eleventh resistor R11, a twelfth resistor R12, a thirteenth resistor R13, a thirteenth capacitor C13, and a second transient voltage suppression diode array D3. The first terminal of the eleventh resistor R11 is connected to both the receive enable pin RE and the transmit enable pin DE of the transceiver chip U7, and the second terminal is connected to a 3.3V power supply. The twelfth resistor R12 and the thirteenth resistor R13 are connected in parallel across the differential output positive terminal A and the differential output negative terminal B of the transceiver chip U7, forming a bus termination matching network. The thirteenth capacitor... The first terminal of C13 is connected to both the power supply pin VCC and the 3.3V power supply of transceiver chip U7, and the second terminal is connected to the fifteenth ground terminal GND15. One bidirectional protection channel of the second transient voltage suppression diode array D3 is connected between the differential output positive terminal A and the seventeenth ground terminal GND17, and the other bidirectional protection channel is connected between the differential output positive terminal B and the sixteenth ground terminal GND16. In addition, the differential bus driver input (DI) of transceiver chip U7 is connected to the UART transmit pin (TX) of master control chip U3, and the receiver output (RO) of transceiver chip U7 is connected to the UART receive pin (RX) of master control chip U3.

[0042] In this embodiment, the main control chip U3 sends TTL-level serial data to the driver input DI of the transceiver chip U7 via its UART transmit pin (TX). At this time, the receive enable pin RE and transmit enable pin DE of the transceiver chip U7 are connected to a high level (3.3V) through the eleventh resistor R11 (pull-up resistor), ensuring that the transceiver chip U7 is always in the transmit enable state. The internal driver of the transceiver chip U7 converts the single-ended TTL signal into a differential signal conforming to the RS-485 standard, outputting it to the bus from the positive terminal A and the negative terminal B of the differential output. The twelfth resistor R12 and the thirteenth resistor R13, connected in parallel between lines A and B, constitute a termination matching network to eliminate signal reflection and ensure signal integrity for long-distance transmission. When a remote device on the bus sends data, the differential signal is input from terminals A and B to the receiver of U7. After internal conversion, a TTL-level signal is output from the receiver output terminal RO and sent to the UART receive pin RX of the main control chip U3. In addition, to enhance the reliability of the interface in industrial environments, the two bidirectional protection channels of the second transient voltage suppression diode array D3 are connected in parallel between line A and ground (GND17) and line B and ground (GND16), respectively. When surges, static electricity or overvoltage transient interference occur on the bus, D3 can clamp the voltage to a safe range within nanoseconds to prevent high voltage surges from damaging chip U7 and subsequent circuits. At the same time, the power supply pin VCC is grounded through the thirteenth capacitor C13 (decoupling capacitor) to filter out power supply noise and ensure stable chip operation.

[0043] In summary, this unit can achieve full-duplex or half-duplex configurable RS-485 communication, has good anti-interference capabilities and bus protection mechanisms, and is suitable for reliable data exchange with DCS systems or other industrial equipment.

[0044] In another exemplary embodiment, such as Figure 8 As shown, the digital output module also includes a voltage regulator and power status indicator unit. This unit includes a linear voltage regulator chip U8 (e.g., LM1117MPX-3.3), a fourteenth capacitor C14, a fifteenth capacitor C15, a sixteenth capacitor C16, a seventeenth capacitor C17, a fourteenth resistor R14, and a third light-emitting diode LED3. The first terminals of the fourteenth capacitor C14 and the fifteenth capacitor C15 are connected to the input pin Vin of the linear voltage regulator chip U8 and simultaneously connected to a 3.3V power supply; their second terminals are simultaneously connected to the eighteenth ground terminal GND18. The first terminals of the sixteenth capacitor C16 and the seventeenth capacitor C17 are connected to the output pin Vout of the linear voltage regulator chip U8 and simultaneously connected to a 3.3V power supply; their second terminals are simultaneously connected to the eighteenth ground terminal GND18. The first terminal of the fourteenth resistor R14 is connected to a 3.3V power supply, and its second terminal is connected to the eighteenth ground terminal GND18 via the third light-emitting diode LED3.

[0045] In this embodiment, the voltage regulation and power status indication unit achieves secondary voltage regulation and intuitive status monitoring through the linear voltage regulator chip U8 and its peripheral circuitry. Specifically, when a higher voltage (e.g., 5V) is input to the input pin Vin of the linear voltage regulator chip U8, the internal error amplifier and adjustment transistor provide feedback control, resulting in a precise and stable 3.3V voltage output at its output Vout. The input filter capacitors (the fourteenth capacitor C14 and the fifteenth capacitor C15) and the output filter capacitors (the sixteenth capacitor C16 and the seventeenth capacitor C17) are used to suppress input noise and output ripple, respectively, ensuring that the subsequent circuitry receives a clean power supply. Simultaneously, the 3.3V voltage at the output terminal drives the third light-emitting diode LED3 to light up through the current-limiting resistor (the fourteenth resistor R14), thus forming a continuously visible optical indicator that visually demonstrates that the regulated power supply has been established and is operating normally.

[0046] In summary, the voltage regulator and power status indicator unit can not only eliminate the interference of power fluctuations on the digital output module and improve the stability and reliability of signal output, but also provide real-time status criteria for on-site debugging and fault diagnosis through visual feedback, thereby enhancing the maintainability of the system.

[0047] In another exemplary embodiment, such as Figure 9 As shown, the digital output module also includes an isolated transceiver unit, which includes an isolated transceiver chip U9 (e.g., TD301M485), an eighteenth capacitor C18, a fifteenth resistor R15, and a sixteenth resistor R16. The first terminal of the eighteenth capacitor C18 is connected to the power supply pin VCC of the isolated transceiver chip U9 and also to a 3.3V power supply; the second terminal is connected to the nineteenth ground terminal GND19. The fifteenth resistor R15 is connected across the positive (A) and negative (B) terminals of the differential bus of the isolated transceiver chip U9. Between; the sixteenth resistor R16 is connected between the negative terminal (B) of the differential bus of the isolated transceiver chip U9 and the isolation ground reference pin RGND, and the isolation ground reference pin RGND of the isolated transceiver chip U9 is connected to the twentieth ground terminal GND20; in addition, the data input pin TXD of the isolated transceiver chip U9 is connected to the data transmission pin PA2 / USART2_TX of the master control chip U3, and the data output pin RXD of the isolated transceiver chip U9 is connected to the data reception pin PA3 / USART2_RX of the master control chip U3.

[0048] In this embodiment, the isolated transceiver unit establishes a highly reliable electrically isolated communication link between the inspection instrument and the external RS-485 bus by employing an isolated transceiver chip U9. Its working principle is described as follows: When the main control chip U3 needs to send data to the remote DCS system, it outputs a TTL-level serial signal through its transmit pin PA2 / USART2_TX, which is sent to the data input pin TXD of the isolated transceiver chip U9. The isolated transceiver chip U9 integrates an isolation barrier, completely electrically isolating the logic side (powered by a 3.3V power supply decoupled via C18, with reference ground GND19) from the bus side (with reference ground RGND, connected to GND20), effectively preventing... The signal is isolated and converted from common-mode noise and ground loop interference up to several kilovolts. After isolation and conversion, the differential driver of the isolated transceiver chip U9 generates a differential signal conforming to the RS-485 standard, which is output to the bus via the A and B line pairs. The fifteenth resistor R15, connected between lines A and B, acts as a termination matching resistor, suppressing signal reflection and ensuring waveform integrity for long-distance transmission. Simultaneously, the sixteenth resistor R16, connected between line B and the isolation ground RGND, provides a defined idle bias voltage for the bus, preventing errors caused by interference. When data is returned from the bus, the differential signal is isolated and converted to a TTL level signal by the receiver of the isolated transceiver chip U9, and sent to the receive pin PA3 / USART2_RX of the main control chip U3 via its data output pin RXD.

[0049] In summary, this isolated transceiver unit enables the inspection instrument to build a stable and interference-resistant multi-node communication network with a remote DCS system or other equipment in complex industrial electromagnetic environments, significantly improving the reliability of data exchange and the safety of long-term operation under harsh conditions such as noise, surges and ground potential differences.

[0050] In another exemplary embodiment, the boot mode selection pin BOOT0 of the main control chip U3 is connected to the sixth ground terminal GND6 through the fourth resistor R4; the digital power input pin VDD_2 of the main control chip U3 is connected to a 3.3V power supply, and the digital power ground pin VSS_2 is connected to the ninth ground terminal GND9.

[0051] In this embodiment, the boot mode selection pin BOOT0 is pulled down to the sixth ground terminal GND6 through the fourth resistor R4, forcing the pin to remain at a low level. This ensures that the main control chip U3 always boots the user application from the main flash memory after power-on reset, avoiding the system memory boot mode (such as ISP programming state) due to pin floating or interference triggering. This ensures that the inspection instrument enters the normal working process as soon as it is powered on. The digital power input pin VDD_2 is directly connected to the 3.3V power supply, providing the required operating voltage for the core, internal logic and some I / O interfaces of the main control chip U3. The corresponding digital power ground pin VSS_2 is connected to the ninth ground terminal GND9, forming a complete low-impedance power supply loop with VDD_2. This not only provides a clean and stable potential reference for the main control chip U3, but also reduces power supply noise and ground bounce interference through multi-point grounding, thereby ensuring the timing accuracy and operational reliability of the main control chip U3 in complex industrial electromagnetic environments.

[0052] Finally, it should be noted that the circuit structures of the analog input module and analog output module in this application are the same as those of the digital input module and digital output module, respectively. Therefore, this application will not elaborate on the circuit structures of the analog input module and analog output module. Furthermore, this design consistency will not affect the performance of the inspection instrument. This is because both types of modules need to perform common functions such as signal isolation, level conversion, anti-interference processing, and communication with the main control unit at the hardware level. The performance differences mainly depend on the selection of specific functional chips and software configuration within the module—for example, the analog module uses a high-precision analog-to-digital converter and data output logic, while the digital module focuses on rapid response and status detection of switching signals. This common circuit structure design not only facilitates the standardization of the hardware platform and reduces R&D and production costs, but also ensures that each functional unit achieves a unified industrial-grade standard in terms of electrical isolation, noise suppression, and communication reliability through modularization. This simplifies system complexity while ensuring that the inspection instrument possesses high precision, high stability, and strong anti-interference capabilities in both analog and digital signal processing.

[0053] The above are merely preferred embodiments of this application and do not limit the patent scope of this application. Any equivalent structural or procedural transformations made using the content of this application's specification and drawings, or direct or indirect applications in other related technical fields, are similarly included within the patent protection scope of this application.

Claims

1. An intelligent inspection instrument, characterized in that, The inspection device includes: The main control MCU is electrically connected to digital input modules, digital output modules, analog input modules, and analog output modules. Digital input modules are used to output switch signals to a distributed control system (DCS) to simulate the switching states of field devices. The digital output module is used to detect the status of the switch signals output by the distributed control system (DCS) and determine whether the output is correct. The analog input module is used to output an adjustable analog current signal to the distributed control system (DCS) to simulate field transmission. The analog output module is used to detect the analog current signal output by the distributed control system (DCS) and read its current value.

2. The inspection instrument according to claim 1, characterized in that, The digital input module includes: Wireless LoRa modules and isolation modules, among which, The main control MCU drives the LCD screen through a parallel or serial display interface to realize data writing and human-computer interaction; The main control MCU and the wireless LoRa module are connected via a standard TTL level UART serial interface to achieve long-distance wireless communication. The main control MCU is connected to the digital input terminals of the distributed control system (DCS) via a general-purpose input / output pin through an isolation module to simulate the switching state of field devices.

3. The inspection instrument according to claim 2, characterized in that, The wireless Lora module includes: The wireless LoRa chip has its first mode selection pin connected to the first ground terminal via a jumper, and its second mode selection pin connected to a 3.3V power supply via a first resistor. The serial data input pin of the wireless LoRa chip is connected to the serial port transmission pin of the main control MCU through a signal receiving line, and the serial data output pin is connected to the serial port receiving pin of the main control MCU through a signal transmitting line. The status indication / wake-up output pin of the wireless LoRa chip is connected to the cathode of the first light-emitting diode. The first end of the second resistor is connected to a 3.3V power supply, and the second end is connected to the anode of the first LED. The first capacitor is connected in parallel between the power supply pin and the ground pin of the wireless LoRa chip.

4. The inspection instrument according to claim 2, characterized in that, The isolation module includes: The DC-DC isolation converter chip, connection interface, resettable fuse, first diode, second capacitor, third capacitor, fourth capacitor, fifth capacitor, and third resistor are included. The input pins of the DC-DC isolation converter chip are connected to a 24V power supply via a resettable fuse. The anode of the first diode is connected to the third pin of the connection interface and the third ground terminal at the same time, while the cathode is connected to the input pin of the DC-DC isolation converter chip. The first pin of the connection interface is connected to a 24V power supply. The positive terminal of the second capacitor is connected to the input pin of the DC-DC isolation converter chip, and the negative terminal is connected to the third ground terminal; The positive voltage output pin of the DC-DC isolation converter chip outputs a 5V isolated power supply, and the isolation output ground pin is connected to the fourth ground terminal. The third, fourth, and fifth capacitors are connected in parallel between the positive voltage output pin and the fourth ground terminal of the DC-DC isolation converter chip. The first end of the third resistor is connected to the fourth grounding terminal, and the second end is connected to the fifth grounding terminal.

5. The inspection instrument according to claim 1, characterized in that, The digital output module includes: The main control chip is electrically connected to a storage and reset control unit, a debug programming interface unit, an RTC power backup and status indication unit, and a clock and reset management unit. The storage and reset control unit is used to store system parameters and operating data in a non-volatile manner, and to provide reset control in case of power failure. The debug programming interface unit provides a standard hardware debugging and program download interface to support online simulation, firmware updates, and system diagnostics. The RTC power backup and status indicator unit is used to power the real-time clock to maintain time continuity in the event of a main power failure. The clock and reset management unit is used to provide a high-precision clock source for the main control chip and for power monitoring and reset.

6. The inspection instrument according to claim 5, characterized in that, The storage and reset control unit includes: EEPROM memory chip, fifth resistor, sixth resistor, power monitoring and reset chip, among which, The first address pin, second address pin, third address pin, and ground pin of the EEPROM memory chip are connected to the seventh ground terminal. The power supply pin is connected to the 3.3V power supply. The write protection pin is connected to the first multiplexed pin of the main control chip. The serial clock pin is connected to the second multiplexed pin of the main control chip U3. The serial data pin is connected to the third multiplexed pin of the main control chip. The first terminals of both the fifth and sixth resistors are connected to a 3.3V power supply. The second terminal of the fifth resistor is connected to the serial data pin of the EEPROM memory chip, and the second terminal of the sixth resistor is connected to the serial clock pin of the EEPROM memory chip.

7. The inspection instrument according to claim 5, characterized in that, The debugging programming interface unit includes: Debug the interface connector, the seventh resistor, and the eighth resistor, among which, The fourth pin of the debug interface connector is connected to the eighth ground terminal; The first end of the seventh resistor is connected to a 3.3V power supply, and the second end is connected to the third pin of the debugging interface connector and simultaneously to the first multi-function multiplexed pin of the main control chip. The first end of the eighth resistor is connected to a 3.3V power supply, and the second end is connected to the second pin of the debugging interface connector and simultaneously to the second multi-function multiplexed pin of the main control chip. The fourth pin of the debug interface connector is connected to the eighth ground terminal.

8. The inspection instrument according to claim 5, characterized in that, The RTC power backup and status indication unit includes: The sixth capacitor, the ninth resistor, and the second light-emitting diode, wherein, The first end of the sixth capacitor is connected to the backup power input pin of the main control chip and also to the 3.3V power supply, while the second end is connected to the tenth ground terminal. The cathode of the second LED is connected to the status indicator LED control pin of the main control chip, and the anode is connected to the 3.3V power supply through the ninth resistor.

9. The inspection instrument according to claim 5, characterized in that, The clock and reset management unit includes: The components include a crystal oscillator, a seventh capacitor, an eighth capacitor, a tenth resistor, and a power monitoring and reset chip. The first end of the crystal oscillator is connected to the oscillator output pin of the main control chip, the third end is connected to the oscillator input pin of the main control chip, and the fourth and second ends are connected to the eleventh ground terminal. The seventh capacitor is connected in parallel between the oscillator output pin of the main control chip and the eleventh ground terminal; The eighth capacitor is connected in parallel between the oscillator input pin and the eleventh ground terminal of the main control chip; The ground pin of the power monitoring reset chip is connected to the twelfth ground terminal, the reset output pin is connected to the reset input pin of the main control chip through the tenth resistor, and the power supply pin is connected to the 3.3V power supply.

10. The inspection instrument according to claim 5, characterized in that, The digital output module also includes: Level conversion and interface protection unit, the unit includes: The RS-232 transceiver chip, the ninth capacitor, the tenth capacitor, the eleventh capacitor, the twelfth capacitor, and the first transient voltage suppression diode array, wherein, The ninth capacitor is connected between the first positive terminal connection pin and the first negative terminal connection pin of the RS-232 transceiver chip; The tenth capacitor is connected across the second positive terminal connection pin and the second negative terminal connection pin of the RS-232 transceiver chip; The first terminals of the eleventh and twelfth capacitors are connected to the positive charge pump voltage output pin and the negative charge pump voltage output pin of the RS-232 transceiver chip, respectively, and their second terminals are connected to the fourteenth ground terminal. The first input / output protection channel of the first transient voltage suppression diode array is connected to the line between the serial data output line of the RS-232 transceiver chip and the external connector, and the second input / output protection channel is connected to the line between the serial data input line of the RS-232 transceiver chip and the external connector. In addition, the TTL level data input pin of the RS-232 transceiver chip is connected to the serial data generation output terminal of the main control chip, the TTL level data output pin is connected to the serial data receiving input terminal of the main control chip, the ground pin is connected to the thirteenth ground terminal, and the power supply pin is connected to the 3.3V power supply.

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