Large-point real-time pulse compression implementation method and device and electronic equipment
By performing butterfly operations, transformations, and complex multiplications on large-number pulse signals, the problem of real-time compression of large-number pulse signals in existing technologies has been solved, achieving efficient pulse compression that is suitable for higher resolution radar systems.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- HWA CREATE CORP
- Filing Date
- 2025-12-26
- Publication Date
- 2026-05-08
AI Technical Summary
Existing technologies cannot effectively achieve real-time pulse compression of large-point-count pulse signals, thus failing to meet the requirements of higher-resolution radar systems.
By acquiring the sampled values of the pulse signal and storing them in the memory, performing the first butterfly operation and target transformation, then performing a complex multiplication operation with the preset matched filter coefficients, and finally performing the target inverse transformation and the second butterfly operation, pulse compression of large-point-number pulse signals is achieved.
It achieves real-time compression of large-number pulse signals, meets the needs of higher resolution radar systems, improves processing efficiency, and saves FPGA storage resources.
Smart Images
Figure CN122001383A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of real-time signal processing technology, and specifically to a method, apparatus, and electronic device for implementing large-point-count real-time pulse compression. Background Technology
[0002] In the field of radar signal processing, pulse compression technology compresses wide pulse signals into narrow pulse signals, which can maintain the effective power and detection capability of wide pulses while maintaining the range resolution of narrow pulse signals. With the development of modern technology, higher requirements have been placed on the ranging accuracy, dynamic range, processing gain and signal-to-noise ratio of radar. Therefore, real-time pulse compression processing technology with a larger number of points is needed.
[0003] In related technologies, a Digital Signal Processor (DSP) is used as the core processing chip. However, for pulse compression of large-point pulse signals, the real-time performance of the DSP is difficult to meet the requirements due to its serial processing characteristics. Furthermore, if the FFT IP core provided by the Field-Programmable Gate Array (FPGA) is used, it only supports a maximum of 64K points of Fast Fourier Transform. Therefore, it is impossible to achieve pulse compression of larger-point pulse signals by directly calling the FFT IP core, which cannot meet the requirements of radar systems with higher detection accuracy. Summary of the Invention
[0004] This application provides a method, apparatus, and electronic device for implementing real-time pulse compression with a large number of pulse points, so as to at least solve the problem that pulse compression of large number of pulse signals is impossible in related technologies.
[0005] This application provides a method for implementing large-point-count real-time pulse compression, including: Acquire the sampled values of the pulse signal and store them sequentially in the first memory; When the number of sampled values in the first memory reaches a preset calculation threshold, a first sampled value is extracted from the first memory; wherein, the first sampled value is the first sampled value obtained stored in the first memory; Perform a first butterfly operation on the newly acquired sampled value and the first sampled value to obtain the data to be transformed; Perform target transformation on the data to be transformed to obtain the corresponding frequency domain data to be processed; Perform complex multiplication on the frequency domain data to be processed and the preset matched filter coefficients to obtain the data to be inversely transformed; Perform the target inverse transform on the data to be inverse transformed to obtain the corresponding time-domain data to be processed; A second butterfly operation is performed on the time-domain data to be processed to obtain the pulse compression data to be output.
[0006] This application also provides a large-point-count real-time pulse compression implementation device, including: The acquisition module is used to acquire the sampled values of the pulse signal and store the sampled values sequentially into the first memory; The extraction module is used to extract a first sampled value from the first memory when the number of sampled values in the first memory reaches a preset calculation threshold; wherein the first sampled value is the first sampled value obtained stored in the first memory; The first calculation module is used to perform a first butterfly operation on the newly acquired sampled value and the first sampled value to obtain the data to be transformed; The transformation module is used to perform target transformation on the data to be transformed to obtain the corresponding frequency domain data to be processed. The second operation module is used to perform complex multiplication operations on the frequency domain data to be processed and the preset matched filter coefficients to obtain the data to be inversely transformed. The inverse transform module is used to perform the target inverse transform on the data to be inverse transformed, so as to obtain the corresponding time-domain data to be processed. The output module is used to perform a second butterfly operation on the time-domain data to be processed, so as to obtain the pulse compressed data to be output.
[0007] This application also provides an electronic device, including: a memory for storing a computer program; and a processor for executing the computer program to implement the steps of any of the above-described large-point real-time pulse compression implementation methods.
[0008] This application also provides a computer-readable storage medium storing a computer program, wherein when the computer program is executed by a processor, it implements the steps of any of the above-described large-point real-time pulse compression implementation methods.
[0009] This application also provides a computer program product, including a computer program that, when executed by a processor, implements the steps of any of the above-described large-point real-time pulse compression implementation methods.
[0010] This application achieves pulse compression of large-number pulse signals by acquiring pulse signal sample values and storing them in a first memory. When the number of sample values reaches a preset calculation threshold, the first sample value is retrieved from the first memory, and a first butterfly operation is performed on it and a newly acquired sample value. The obtained data to be transformed is then subjected to a target transformation to obtain the frequency domain data to be processed. This data is then multiplied by a preset matched filter coefficient to obtain the data to be inversely transformed. The target inverse transformation is then performed, and a second butterfly operation is performed on the obtained time domain data to be processed to obtain the pulse compression data to be output. By performing the first butterfly operation on a large-number pulse signal and then the target transformation, multiplying the result by a preset matched filter coefficient, performing a target inverse transformation on the result, obtaining the time domain data to be processed, and then performing the second butterfly operation, pulse compression of large-number pulse signals is achieved. Attached Figure Description
[0011] To more clearly illustrate the embodiments of this application, the accompanying drawings used in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0012] Figure 1 This is a schematic diagram of the structure of the large-point-count real-time pulse compression implementation system based on the embodiments of this application; Figure 2 A flowchart illustrating the implementation method of large-point-count real-time pulse compression provided in the embodiments of this application; Figure 3 A flowchart illustrating an exemplary frequency domain decimation method provided in an embodiment of this application; Figure 4 A flowchart illustrating an exemplary time-domain decimation method provided in an embodiment of this application; Figure 5 A schematic diagram illustrating the principle of an exemplary large-point FFT butterfly operation provided for embodiments of this application; Figure 6 A schematic diagram illustrating the principle of an exemplary large-point IFFT butterfly operation provided for embodiments of this application; Figure 7 A schematic diagram illustrating an exemplary high-point-count real-time pulse compression implementation method provided in this application embodiment; Figure 8 A schematic diagram of the structure of the large-point-count real-time pulse compression implementation device provided in the embodiments of this application; Figure 9 This is a schematic diagram of the structure of an electronic device provided in an embodiment of this application. Detailed Implementation
[0013] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the protection scope of this application.
[0014] It should be noted that, in the description of this application, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. The terms "first," "second," etc., in this application are used to distinguish similar objects and are not used to describe a specific order or sequence.
[0015] In the field of radar signal processing, pulse compression technology compresses wide pulse signals into narrow pulse signals, maintaining both the effective power and detection capability of wide pulses and the range resolution of narrow pulse signals. This effectively resolves the contradiction between radar range and range resolution, improving radar range resolution without reducing range. With the development of modern technology, higher demands are placed on radar resolution, thus requiring real-time pulse compression processing technology with a larger number of pulse points.
[0016] Previously, digital pulse compression mostly used DSPs as the core processing chip. However, for pulse compression of large-point pulse signals, the real-time performance of DSPs is difficult to meet requirements due to their serial processing nature. Pulse compression implemented using FPGAs involves first performing a Fast Fourier Transform (FFT) on the data, then applying matched filtering to the transform result, and finally performing an Inverse Fast Fourier Transform (IFFT). Since the FFT core provided by the FPGA only supports a maximum of 64K points, current technology cannot directly call IP cores to achieve pulse compression of larger-point pulse signals, thus failing to meet the requirements of higher-resolution radar systems.
[0017] To address the aforementioned technical problems, this application provides a method, apparatus, and electronic device for implementing large-point-count real-time pulse compression. The method includes: acquiring sampled values of a pulse signal and storing the sampled values sequentially in a first memory; when the number of sampled values in the first memory reaches a preset calculation threshold, extracting a first sampled value from the first memory; wherein the first sampled value is the earliest acquired sampled value stored in the first memory; performing a first butterfly operation on the newly acquired sampled value and the first sampled value to obtain data to be transformed; performing a target transformation on the data to be transformed to obtain corresponding frequency domain data to be processed; performing a complex multiplication operation on the frequency domain data to be processed and preset matched filter coefficients to obtain data to be inversely transformed; performing a target inverse transformation on the data to be inversely transformed to obtain corresponding time domain data to be processed; and performing a second butterfly operation on the time domain data to be processed to obtain pulse compression data to be output. The method provided by the above scheme, by acquiring pulse signal sample values and storing them in a first memory, and when the number of sample values in the first memory reaches a preset calculation threshold, extracts the first sample value from the first memory, performs a first butterfly operation on it and a newly acquired sample value to obtain the data to be transformed, performs a target transformation to obtain the frequency domain data to be processed, performs a complex multiplication operation on it and a preset matched filter coefficient to obtain the data to be inversely transformed, performs an inverse target transformation to obtain the time domain data to be processed, and performs a second butterfly operation on the time domain data to be processed to obtain the pulse compression data to be output. By performing the first butterfly operation on a large-point-count pulse signal, followed by a target transformation, a complex multiplication operation with a preset matched filter coefficient, and an inverse target transformation to obtain the time domain data to be processed, and then performing the second butterfly operation, pulse compression of large-point-count pulse signals is achieved. To enable those skilled in the art to better understand the scheme of this application, the following describes the application in further detail with reference to the accompanying drawings and specific embodiments.
[0018] The specific application environment architecture or specific hardware architecture on which the implementation of the large-point real-time pulse compression method depends is described here.
[0019] First, the structure of the system based on large-point-count real-time pulse compression in this application will be described: The method, apparatus, electronic device, and storage medium for large-point-count real-time pulse compression provided in this application are applicable to pulse compression of large-point-count pulse signals, such as... Figure 1 The diagram shows the structure of a large-point-count real-time pulse compression implementation system based on an embodiment of this application. It mainly includes a pulse signal to be compressed, a data acquisition device, and a large-point-count real-time pulse compression implementation device. The data acquisition device is used to acquire sampled values of the pulse signal, and the large-point-count real-time pulse compression implementation device is used to perform pulse compression on the large-point-count pulse signal based on the large-point-count real-time pulse compression implementation method provided in this embodiment.
[0020] This application provides a method for implementing real-time pulse compression with a large number of pulse points, which is used to compress pulse signals with a large number of pulse points. The execution subject of this application is a hardware device or electronic device with an FPGA deployed, including but not limited to boards and modules with integrated FPGAs, and other electronic devices that can be used to implement real-time pulse compression with a large number of pulse points.
[0021] like Figure 2 The diagram shown is a flowchart illustrating a method for implementing large-point-count real-time pulse compression according to an embodiment of this application. The method includes: Step 201: Obtain the sampled values of the pulse signal and store the sampled values in the first memory in sequence.
[0022] Specifically, the sampled value of the pulse signal is the received radar signal, which undergoes analog-to-digital conversion to a digital intermediate frequency signal, and then down-converted to a digital baseband signal. Taking 128K points as an example, a counter counts the real-time received sampled values, and the data corresponding to the first 64K points is stored in the first memory in the order of real-time acquisition. When the number of sampled points is 128K, the pulse signal is identified as a large-point pulse signal.
[0023] Accordingly, by storing large sample values in the first memory, storage resources inside the FPGA are saved.
[0024] Step 202: If the number of sampled values in the first memory reaches a preset calculation threshold, extract the first sampled value from the first memory.
[0025] The first sample value is the earliest sample value stored in the first memory.
[0026] Specifically, the preset calculation threshold can be half of the total number of sampled values. When the counter value reaches 64K+1, data in the first memory is read, and the first sampled value in the first memory is taken as the first sampled value. For example, when the 64K+1th sampled value is received, the earliest stored first sampled value is retrieved from the head of the queue in the first memory; as the first sampled value is removed, the previously stored second sampled value automatically becomes the first sampled value in the current queue. Next, when the 64K+2th sampled value arrives, the sampled value at the head of the queue at this time (i.e., the original second sampled value) is retrieved again, and so on.
[0027] Step 203: Perform a first butterfly operation on the newly acquired sampled value and the first sampled value to obtain the data to be transformed.
[0028] Specifically, the first butterfly operation includes complex number addition, complex number subtraction, and complex number multiplication. Accordingly, by performing a first butterfly operation on the newly acquired sampled value and the first sampled value, the data processing of the 128K pulse signal before it is input to the FFT IP core is realized, dividing it into two data points of 64K each to be transformed, laying the foundation for subsequent input to the FFT IP core.
[0029] Step 204: Perform target transformation on the data to be transformed to obtain the corresponding frequency domain data to be processed.
[0030] Specifically, the target transformation can be a Fast Fourier Transform (FFT), typically performed using an FFT IP core. Currently, the FFT IP core only supports 64K data input. After the first butterfly operation, the sampled data is divided into the first 64K data to be transformed and the last 64K data to be transformed. The first 64K data is input into the FFT IP core sequentially for FFT. After the first 64K data has completed its FFT, the last 64K data is then input into the FFT IP core for FFT, yielding the corresponding frequency domain data to be processed. The frequency domain data to be processed is arranged in even-to-odd index order. , , , , ..., , , , , ..., .
[0031] For example, such as Figure 3 The diagram shown is a flowchart of an exemplary frequency domain decimation method provided in this application embodiment. Taking a total of 128K as an example, the sampled values are divided into a first 64K part and a last 64K part according to the acquisition order. The first 64K data is the first sampled value, and the last 64K data is the newly acquired sampled value. The newly acquired sampled value and the first sampled value are subjected to a first butterfly operation to obtain the data to be transformed.
[0032] Accordingly, when performing pulse compression processing on large-point-count pulse signals, compared to using a DSP for serial processing, the FPGA employs a hardware-level parallel pipeline structure, enabling real-time data processing and meeting the real-time processing requirements of pulse signal compression. Simultaneously, the FFT IP core boasts optimal, stable, and predictable processing performance. Compared to writing a corresponding FFT algorithm based on the requirements of large-point-count pulse signals, preprocessing the large-point-count pulse information using the FPGA—that is, splitting the 128K data into 64K data—and directly calling the mature FFT IP core offers significant advantages in reliability, stability, maintainability, and learning cost.
[0033] Step 205: Perform complex multiplication on the frequency domain data to be processed and the preset matched filter coefficients to obtain the data to be inversely transformed.
[0034] Specifically, an MIG IP core is instantiated and set as the third memory. The preset matched filter coefficients are stored in the third memory in advance via PCIe. The third memory is the external memory of the FPGA. The generation and storage format of the preset matched filter coefficients is even numbers first and odd numbers second, that is, the first 64K is even numbers and the last 64K is odd numbers. The frequency domain data to be processed is arranged in an even-first-odd-second manner and is multiplied by the preset matched filter coefficients.
[0035] Correspondingly, by storing the preset matched filter coefficients in the third memory, the internal storage resources of the FPGA are saved.
[0036] Step 206: Perform target inverse transformation on the data to be inverse transformed to obtain the corresponding time-domain data to be processed.
[0037] Specifically, the target inverse transform can be the inverse fast Fourier transform, which is usually achieved by configuring the FFT IP core, i.e., the IFFT IP core. Currently, the IFFT IP core only supports 64K data input.
[0038] Accordingly, both the FFT IP core and the IFFT IP core are set to Pipelined, Streaming IO mode. In this mode, adjacent pulse echo data can be continuously input into the FPGA's FFT IP core and IFFT IP core without waiting time, which greatly improves the processing speed of the entire pulse compression module for continuously input pulse signals.
[0039] For example, such as Figure 4 The diagram shown is a flowchart of an exemplary time-domain decimation method provided in this application embodiment. The data to be inversely transformed is divided into odd and even parts according to the time-domain decimation method. The even part is first input into the IFFT IP core for inverse fast Fourier transform, and then the odd part is input into the IFFT IP core for inverse fast Fourier transform to obtain the time-domain data to be processed.
[0040] Step 207: Perform a second butterfly operation on the time-domain data to be processed to obtain the pulse compression data to be output.
[0041] Specifically, the second butterfly operation includes complex number addition, complex number subtraction, and complex number multiplication, and outputs the pulse compression data after the second butterfly operation to complete pulse compression.
[0042] Accordingly, by first performing a first butterfly operation on the large-number pulse signal to divide it into a number of points that meet the FPGA hardware requirements, and then inputting it into the FPGA's FFT IP core, the resulting frequency domain data to be processed is multiplied by a preset matched filter coefficient to obtain the data to be inversely transformed. This data is then input into the FPGA's IFFT IP core to obtain the time domain data to be processed. A second butterfly operation is then performed on this time domain data, enabling the compression of large-number pulse signals using the FPGA, thus making it suitable for higher-resolution radar systems. Furthermore, because the FPGA can process data in real-time in parallel, the efficiency of pulse compression is improved compared to the serial processing of a DSP.
[0043] Based on the above embodiments, as an implementable approach, in one embodiment, a first butterfly operation is performed on the newly acquired sampled value and the first sampled value to obtain the data to be transformed, including: Step 2031: Perform a complex addition operation on the newly acquired sampled value and the first sampled value to obtain the first data to be transformed; Step 2032: Perform a complex subtraction operation between the newly acquired sampled value and the first sampled value to obtain the data to be processed; Step 2033: Perform a complex multiplication operation on the data to be processed and the first preset rotation factor to obtain the second data to be transformed; Step 2034: The second data to be transformed is stored in the second storage space of the first memory.
[0044] The first butterfly operation includes complex number addition, complex number subtraction and complex number multiplication. The first memory includes a first storage space and a second storage space. The first storage space is used to store sampled values in sequence. The data to be transformed includes first data to be transformed and second data to be transformed.
[0045] Specifically, the first storage space of the first memory can be the first half of the first memory's storage space, and the second storage space can be the last half of the first memory's storage space. A first preset rotation factor is obtained using the Cordic algorithm. An adder based on the Axis bus performs complex addition and complex subtraction operations on the first 64K data read from the first memory and the last 64K data acquired in real time, respectively. A multiplier and adder based on the Axis bus are used to perform real-time complex multiplication operations on the first preset rotation factor and the data to be processed.
[0046] Specifically, in one embodiment, a target transformation is performed on the first data to be transformed to obtain first frequency domain data to be processed; after all the first data to be transformed has completed the target transformation, the second data to be transformed is extracted from the second storage space of the first memory; the target transformation is performed on the second data to be transformed to obtain the second frequency domain data to be processed.
[0047] The frequency domain data to be processed includes the first frequency domain data to be processed and the second frequency domain data to be processed.
[0048] Specifically, when verifying with Cordic, a first preset rotation factor is generated. For example, according to the order of sampling value acquisition, the first sample value is taken as the first sample value, and the 64K+1th sample value is taken as the newly acquired sample value. The two values are added together to obtain the first data to be transformed. At the same time, the two values are subtracted together to obtain the data to be processed. Then, the data to be processed and the first preset rotation factor are multiplied together to obtain the second data to be transformed.
[0049] Specifically, after obtaining the first data to be transformed, it is input into the FFT IP core in real time for fast Fourier transform to obtain the first frequency domain data to be processed. Before completing the target transformation of all the first data to be transformed, the second data to be transformed is stored in the second storage space of the first memory. After all the first data to be transformed has completed the target transformation, the second data to be transformed is extracted from the second storage space in sequence, and the second data to be transformed is input into the FFT IP core for fast Fourier transform to obtain the second frequency domain data to be processed.
[0050] Accordingly, the first data to be transformed is first input into the FFT IP core for target transformation, and then the second data to be transformed is input into the FFT IP core for target transformation, thus realizing the splitting of large-point data to be transformed into data with a number of points that meet the requirements of FPGA hardware.
[0051] Specifically, in one embodiment, the newly acquired sampled value and the first sampled value are added together using the following formula to obtain the first data to be transformed:
[0052] in, This represents the first data to be transformed. Indicates the sample value number of the pulse signal. This represents the total number of sampled values for the pulse signal. The first sampled value, These are newly acquired sampled values.
[0053] Based on the following formula, a complex multiplication operation is performed on the data to be processed and the first preset rotation factor to obtain the second data to be transformed:
[0054] in, This represents the second data to be transformed. This indicates the data to be processed. Indicates the sample value number of the pulse signal. This represents the total number of sampled values of the pulse signal. This represents the first preset rotation factor.
[0055] For example, when , At that time, , .
[0056] For example, such as Figure 5 The diagram shown illustrates the principle of an exemplary large-point FFT butterfly operation provided in this application embodiment. The acquired sampled data is divided into a first half and a second half based on frequency domain decimation. When the 64K+1th data point, i.e., the 65536th data point, is acquired... and Perform the first butterfly operation, including... and The first data to be transformed is obtained by performing complex number addition. ,Will and First, perform complex number subtraction to obtain the data to be processed. Then, perform a complex multiplication operation on the data to be processed and the first preset rotation factor to obtain the second data to be transformed. .
[0057] Based on the above embodiments, as one implementable method, in one embodiment, a second butterfly operation is performed on the time-domain data to be processed to obtain the pulse compression data to be output, including: Step 2071: Store the first time-domain data to be processed sequentially into the first storage space of the second memory; Step 2072: Perform complex multiplication operations sequentially on the second time-domain data to be processed and the second preset rotation factor to obtain the data to be matched and processed; wherein, the time-domain data to be processed includes the first time-domain data to be processed and the second time-domain data to be processed. Step 2073: Extract the first time-domain data to be processed from the first storage space of the second memory, and perform complex addition operation on the data to be matched and the first time-domain data to be processed to obtain the first pulse compression data to be output. Step 2074: Perform complex subtraction on the data to be matched and the first time-domain data to be processed to obtain the second pulse compression data to be output.
[0058] The pulse compression data to be output includes first pulse compression data and second pulse compression data.
[0059] Specifically, a MIG IP core is instantiated and set as the second memory to count the time-domain data to be processed. The first preset twitch factor and the second preset twitch factor are conjugate. The second preset twitch factor is generated in real time through the Cordic algorithm. Based on the multiplier and adder of the Axis bus, the complex multiplication operation between the twitch factor and the last 64K result in the 128K IFFT is implemented.
[0060] Specifically, the first 64K data points output after inverse Fast Fourier Transform (IFFT) are designated as the first time-domain data to be processed and stored in the first storage space of the second memory. The remaining 64K data points are designated as the second time-domain data to be processed. The 64K+1th time-domain data point, calculated in real-time, is multiplied by a second preset rotation factor to obtain the data to be matched. After obtaining the first data to be matched, the first time-domain data to be processed is extracted from the first storage space and multiplied by a complex number with the first data to be matched to obtain the first pulse compressed data. Simultaneously, the first time-domain data to be processed and the first data to be matched are multiplied by a complex number to obtain the second pulse compressed data. The first time-domain data to be processed and the data to be matched are then matched pairwise in sequence, and complex addition and subtraction operations are performed in the form of a data stream.
[0061] Accordingly, by performing a second butterfly operation on the second time-domain data to be processed and the data to be matched, the two 64K-point pulse compressed data were synthesized into one 128K-point pulse compressed data.
[0062] Specifically, in one embodiment, the second pulse compression data is stored in the second storage space of the second memory; after the first pulse compression data is all output, the second pulse compression data is extracted from the second storage space of the second memory and output.
[0063] The second memory includes a first storage space and a second storage space.
[0064] Specifically, the first storage space of the second memory can be the first half of the second memory's storage space, and the second storage space can be the last half of the second memory's storage space. During the output process, the first pulse compressed data is output first. After all the first pulse compressed data has been output, the second pulse compressed data is extracted from the second storage space and output.
[0065] Correspondingly, by buffering the data through the first, second, and third memories, the storage pressure on the FPGA is reduced, enabling the compression of large-point pulse signals even with limited FPGA storage resources.
[0066] Specifically, in one embodiment, a complex addition operation is performed on the data to be matched and the first time-domain data to be processed based on the following formula to obtain the first pulse compression data to be output:
[0067] in, This indicates the compressed data of the first pulse. Indicates the sample value number of the pulse signal. This represents the total number of sampled values of the pulse signal. This represents the second preset rotation factor.
[0068] Based on the following formula, a complex subtraction operation is performed between the data to be matched and the first time-domain data to be processed to obtain the second pulse compression data to be output, including:
[0069] in, This indicates the compressed data of the second pulse. Indicates the sample value number of the pulse signal. This represents the total number of sampled values of the pulse signal. This represents the second preset rotation factor.
[0070] For example, such as Figure 6 The diagram illustrates the principle of an exemplary large-point IFFT butterfly operation provided in this application embodiment. The data to be inversely transformed is divided into odd and even parts according to the parity of its sequence number. The even part is first input into the IFFT IP core for inverse fast Fourier transform to obtain the first time-domain data to be processed. Then, the odd part is input into the IFFT IP core for inverse fast Fourier transform to obtain the second time-domain data to be processed. First, the second time-domain data to be processed is multiplied by a second preset rotation factor to obtain the data to be matched. Then, the data to be matched and the first time-domain data to be processed are subjected to complex addition and complex subtraction operations. For example, ... and Perform complex number addition and complex number subtraction operations.
[0071] For example, such as Figure 7The diagram shown illustrates the principle of an exemplary large-point-count real-time pulse compression implementation method provided in this application. Taking a total of 128K as an example, firstly, sampled values are acquired and stored sequentially in the first storage space of the first memory. When the 64K+1th sampled value is acquired, the first sampled value is extracted from the first storage space of the first memory. Complex addition and complex subtraction are performed on the first sampled value and the 64K+1th sampled value. The second sampled value and the 64K+2th sampled value are then subjected to complex addition and complex subtraction. The result of the complex addition is the first data to be transformed, which is directly input into the FFT IP core. The result of the complex subtraction is the data to be processed. Complex multiplication is performed on the data to be processed with a first preset rotation factor to obtain the second data to be transformed, which is stored in the second storage space of the first memory. After the first data to be transformed has undergone the target transformation, the second data to be transformed is extracted from the second storage space of the first memory and input into the FFT. In the IP core, target transformation is performed to obtain the frequency domain data to be processed. The frequency domain data to be processed and the preset matched filter coefficients are multiplied by complex to obtain the data to be inversely transformed. The data to be inversely transformed is input into the IFFT IP core to obtain the first time domain data and the second time domain data to be processed. The first time domain data to be processed is first stored in the first storage space of the second memory. The second time domain data to be processed and the second preset rotation factor are multiplied by complex to obtain the data to be matched. Then, the data to be matched and the first time domain data to be processed are subjected to complex addition and complex subtraction to obtain the corresponding first pulse compressed data and second pulse compressed data. The second pulse compressed data is stored in the second storage space of the second memory. The first pulse compressed data is output in real time first. After all the first pulse compressed data is output, the second pulse compressed data is extracted from the second storage space of the second memory and output.
[0072] The method for implementing large-point-count real-time pulse compression provided in this application includes: acquiring sampled values of a pulse signal and storing the sampled values sequentially in a first memory; when the number of sampled values in the first memory reaches a preset calculation threshold, extracting a first sampled value from the first memory; wherein the first sampled value is the earliest acquired sampled value stored in the first memory; performing a first butterfly operation on the newly acquired sampled value and the first sampled value to obtain data to be transformed; performing a target transformation on the data to be transformed to obtain corresponding frequency domain data to be processed; performing a complex multiplication operation on the frequency domain data to be processed and preset matched filter coefficients to obtain data to be inversely transformed; performing a target inverse transformation on the data to be inversely transformed to obtain corresponding time domain data to be processed; and performing a second butterfly operation on the time domain data to be processed to obtain pulse compression data to be output. The method provided by the above scheme acquires pulse signal sample values and stores them in a first memory. When the number of sample values reaches a preset calculation threshold, the first sample value is extracted from the first memory. The first sample value is then processed with the newly acquired sample value to perform a first butterfly operation, resulting in the data to be transformed. The target transformation is then performed to obtain the frequency domain data to be processed. The frequency domain data is then multiplied by a preset matched filter coefficient to obtain the data to be inversely transformed. The target inverse transformation is then performed, and the time domain data to be processed is subjected to a second butterfly operation to obtain the pulse compression data to be output. By performing the first butterfly operation on a large number of pulse signals before performing the target transformation, multiplying the result by a preset matched filter coefficient, performing the target inverse transformation, obtaining the time domain data to be processed, and then performing the second butterfly operation, pulse compression of large number of pulse signals is achieved.
[0073] Furthermore, by storing large-number sampled values in the first memory, internal FPGA storage resources are saved. By performing a first butterfly operation on the newly acquired sampled values and the first sampled values, data processing of the large-number pulse signal before input to the FFT IP core is achieved, dividing the 128K data to be transformed into two 64K data points, laying the foundation for subsequent input to the FFT IP core. When performing pulse compression processing on the large-number pulse signal, compared to using a DSP for serial processing, the FPGA adopts a hardware-level parallel pipeline structure, enabling real-time data processing and meeting the real-time processing requirements of pulse signal compression. Simultaneously, the FFT IP core has optimal, stable, and predictable processing performance. Compared to writing a corresponding FFT algorithm based on the requirements of the large-number pulse signal, preprocessing the large-number pulse information through the FPGA—that is, splitting the 128K data into 64K data—and directly calling the mature FFT IP core, offers significant advantages in reliability, stability, maintainability, and learning cost. By storing the preset matched filter coefficients in the third memory, internal FPGA storage resources are saved. Both the FFT and IFFT IP cores are configured in Pipelined, Streaming IO mode. In this mode, adjacent pulse echo data can be continuously input into the FPGA's FFT and IFFT IP cores without waiting time, greatly improving the processing speed of the entire pulse compression module for continuously input pulse signals. By first performing a first butterfly operation on large-number pulse signals to break them down into points that meet the FPGA hardware requirements, and then inputting them into the FPGA's FFT IP core, the resulting frequency domain data to be processed is multiplied by preset matched filter coefficients to obtain the inverse transform data. This inverse transform data is then input into the FPGA's IFFT IP core to obtain the time domain data to be processed. A second butterfly operation is then performed on this time domain data, enabling the compression of large-number pulse signals through the FPGA, thus making it suitable for higher-resolution radar systems. Simultaneously, because the FPGA can process data in real-time parallel, the pulse compression efficiency is improved compared to the serial processing of the DSP. First, the first data to be transformed is input into the FFT IP core for target transformation. Then, the second data to be transformed is input into the FFT IP core for target transformation, thus splitting the large number of points into a number of points that meet the FPGA hardware requirements. By performing a second butterfly operation on the second time-domain data to be processed and the data to be matched, the two 64K-point pulse compressed data are synthesized into one 128K-point pulse compressed data. By buffering the data through the first, second, and third memories, the storage pressure on the FPGA is reduced, enabling the compression of large-point pulse signals under the limited storage resources of the FPGA.
[0074] Through the above description of the embodiments, those skilled in the art can clearly understand that the methods according to the above embodiments can be implemented by means of software plus necessary general-purpose hardware platforms. Of course, they can also be implemented by hardware, but in many cases the former is a better implementation method.
[0075] The embodiments of this application also provide a large-point-count real-time pulse compression implementation apparatus for executing the large-point-count real-time pulse compression implementation method provided in the above embodiments.
[0076] like Figure 8 The diagram shown is a structural schematic of a large-point-count real-time pulse compression implementation device provided in an embodiment of this application. The large-point-count real-time pulse compression implementation device 80 includes: an acquisition module 801, an extraction module 802, a first calculation module 803, a transformation module 804, a second calculation module 805, an inverse transformation module 806, and an output module 807.
[0077] The system comprises the following modules: an acquisition module for acquiring sampled values of a pulse signal and storing them sequentially in a first memory; an extraction module for extracting a first sampled value from the first memory when the number of sampled values in the first memory reaches a preset calculation threshold, wherein the first sampled value is the earliest acquired sampled value stored in the first memory; a first operation module for performing a first butterfly operation on the newly acquired sampled value and the first sampled value to obtain data to be transformed; a transformation module for performing a target transformation on the data to be transformed to obtain corresponding frequency domain data to be processed; a second operation module for performing a complex multiplication operation on the frequency domain data to be processed and preset matched filter coefficients to obtain data to be inversely transformed; an inverse transformation module for performing a target inverse transformation on the data to be inversely transformed to obtain corresponding time domain data to be processed; and an output module for performing a second butterfly operation on the time domain data to be processed to obtain pulse compression data to be output.
[0078] For a description of the features in the embodiment of the large-point-count real-time pulse compression implementation device, please refer to the relevant description of the embodiment of the large-point-count real-time pulse compression implementation method, which will not be repeated here.
[0079] Embodiments of this application also provide an electronic device, such as... Figure 9 The diagram shown is a schematic diagram of the structure of an electronic device provided in an embodiment of this application, including a processor 10 and a memory 20. The memory 20 stores a computer program, and the processor 10 is configured to run the computer program to execute the steps in any of the above embodiments of the large-point-count real-time pulse compression implementation method.
[0080] Embodiments of this application also provide a computer-readable storage medium storing a computer program, wherein the computer program is configured to execute the steps in any of the above embodiments of the large-point-count real-time pulse compression implementation method.
[0081] In one exemplary embodiment, the aforementioned computer-readable storage medium may include, but is not limited to, various media capable of storing computer programs, such as a USB flash drive, read-only memory (ROM), random access memory (RAM), portable hard disk, magnetic disk, or optical disk.
[0082] The embodiments of this application also provide a computer program product, which includes a computer program that, when executed by a processor, implements the steps in any of the above embodiments of the large-point real-time pulse compression implementation method.
[0083] Embodiments of this application also provide another computer program product, including a non-volatile computer-readable storage medium storing a computer program, which, when executed by a processor, implements the steps in any of the above embodiments of the large-point real-time pulse compression implementation method.
[0084] Those skilled in the art will further recognize that the units and algorithm steps of the various examples described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, computer software, or a combination of both. To clearly illustrate the interchangeability of hardware and software, the components and steps of the various examples have been generally described in terms of functionality in the foregoing description. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.
[0085] The foregoing has provided a detailed description of a method, apparatus, and electronic device for implementing large-point-count real-time pulse compression. Specific examples have been used to illustrate the principles and implementation methods of this application. The descriptions of the embodiments above are only intended to aid in understanding the method and core ideas of this application. It should be noted that those skilled in the art can make various improvements and modifications to this application without departing from its principles, and these improvements and modifications also fall within the protection scope of the claims of this application.
Claims
1. A method for implementing real-time pulse compression with a large number of pulse points, characterized in that, The method includes: Acquire sampled values of the pulse signal and store the sampled values sequentially into the first memory; When the number of sampled values in the first memory reaches a preset calculation threshold, a first sampled value is extracted from the first memory; wherein, the first sampled value is the first sampled value obtained stored in the first memory; Perform a first butterfly operation on the newly acquired sampled value and the first sampled value to obtain the data to be transformed; The target transformation is performed on the data to be transformed to obtain the corresponding frequency domain data to be processed; The frequency domain data to be processed and the preset matched filter coefficients are multiplied by a complex multiplication operation to obtain the data to be inversely transformed; Perform the target inverse transform on the data to be inversely transformed to obtain the corresponding time-domain data to be processed; A second butterfly operation is performed on the time-domain data to be processed to obtain the pulse compression data to be output.
2. The method for implementing large-point-count real-time pulse compression according to claim 1, characterized in that, The step of performing a first butterfly operation on the newly acquired sampled value and the first sampled value to obtain the data to be transformed includes: The newly acquired sampled value is added to the first sampled value to obtain the first data to be transformed; Perform a complex subtraction operation between the newly acquired sample value and the first sample value to obtain the data to be processed; Perform a complex multiplication operation on the data to be processed and the first preset rotation factor to obtain the second data to be transformed; The second data to be transformed is stored in the second storage space of the first memory; The first butterfly operation includes complex number addition, complex number subtraction, and complex multiplication. The first memory includes a first storage space and a second storage space. The first storage space is used to store the sampled values in sequence. The data to be transformed includes first data to be transformed and second data to be transformed.
3. The method for implementing large-point-count real-time pulse compression according to claim 2, characterized in that, The step of performing target transformation on the data to be transformed to obtain the corresponding frequency domain data to be processed includes: The first data to be transformed is subjected to target transformation to obtain the first frequency domain data to be processed. After all the first data to be transformed has completed the target transformation, the second data to be transformed is extracted from the second storage space of the first memory. The second data to be transformed is subjected to target transformation to obtain the second frequency domain data to be processed; The frequency domain data to be processed includes the first frequency domain data to be processed and the second frequency domain data to be processed.
4. The method for implementing large-point-count real-time pulse compression according to claim 2, characterized in that, The step of performing a complex addition operation between the newly acquired sampled value and the first sampled value to obtain the first data to be transformed includes: Based on the following formula, a complex addition operation is performed between the newly acquired sample value and the first sample value to obtain the first data to be transformed: in, This represents the first data to be transformed. This indicates the sample value number of the pulse signal. This represents the total number of sampled values of the pulse signal; The step of performing a complex multiplication operation on the data to be processed and the first preset rotation factor to obtain the second data to be transformed includes: Based on the following formula, a complex multiplication operation is performed on the data to be processed and the first preset rotation factor to obtain the second data to be transformed: in, This represents the second data to be transformed. This refers to the data to be processed. This indicates the sample value number of the pulse signal. This represents the total number of sampled values of the pulse signal. This represents the first preset rotation factor.
5. The method for implementing large-point-count real-time pulse compression according to claim 1, characterized in that, The step of performing a second butterfly operation on the time-domain data to be processed to obtain the pulse compressed data to be output includes: The first time-domain data to be processed is stored sequentially into the first storage space of the second memory; The second time-domain data to be processed and the second preset rotation factor are subjected to complex multiplication operations in sequence to obtain the data to be matched and processed; wherein, the time-domain data to be processed includes the first time-domain data to be processed and the second time-domain data to be processed. Extract the first time-domain data to be processed from the first storage space of the second memory, and perform a complex addition operation on the data to be matched and the first time-domain data to be processed to obtain the first pulse compression data to be output. Perform a complex subtraction operation on the data to be matched and the first time-domain data to be processed to obtain the second pulse compressed data to be output; The pulse compression data to be output includes the first pulse compression data and the second pulse compression data.
6. The method for implementing large-point-count real-time pulse compression according to claim 5, characterized in that, After performing a complex subtraction operation on the data to be matched and the first time-domain data to be processed to obtain the second pulse compressed data to be output, the method further includes: The second pulse compressed data is stored in the second storage space of the second memory; After all the first pulse compressed data is output, the second pulse compressed data is extracted from the second storage space of the second memory and output. The second memory includes the first storage space and the second storage space.
7. The method for implementing large-point-count real-time pulse compression according to claim 6, characterized in that, The step of performing a complex addition operation on the data to be matched and the first time-domain data to be processed to obtain the first pulse compressed data to be output includes: Based on the following formula, a complex addition operation is performed on the data to be matched and the first time-domain data to be processed to obtain the first pulse compression data to be output: in, This indicates the compressed data of the first pulse. This indicates the sample value number of the pulse signal. This represents the total number of sampled values of the pulse signal. Indicates the second preset rotation factor; The step of performing a complex subtraction operation between the data to be matched and the first time-domain data to be processed to obtain the second pulse compressed data to be output includes: Based on the following formula, a complex subtraction operation is performed between the data to be matched and the first time-domain data to be processed to obtain the second pulse compression data to be output, including: in, This indicates the compressed data of the second pulse. This indicates the sample value number of the pulse signal. This represents the total number of sampled values of the pulse signal. This represents the second preset rotation factor.
8. A device for implementing large-point real-time pulse compression, characterized in that, include: An acquisition module is used to acquire sampled values of a pulse signal and store the sampled values sequentially into a first memory; An extraction module is used to extract a first sampled value from the first memory when the number of sampled values in the first memory reaches a preset calculation threshold; wherein the first sampled value is the earliest sampled value stored in the first memory; The first calculation module is used to perform a first butterfly operation on the newly acquired sampled value and the first sampled value to obtain the data to be transformed; The transformation module is used to perform target transformation on the data to be transformed to obtain the corresponding frequency domain data to be processed. The second calculation module is used to perform complex multiplication on the frequency domain data to be processed and the preset matched filter coefficients to obtain the data to be inversely transformed. The inverse transformation module is used to perform a target inverse transformation on the data to be inversely transformed to obtain the corresponding time-domain data to be processed. The output module is used to perform a second butterfly operation on the time-domain data to be processed to obtain pulse compressed data to be output.
9. An electronic device, characterized in that, include: Memory, used to store computer programs; A processor, configured to implement the steps of the large-point-count real-time pulse compression implementation method as described in any one of claims 1 to 7 when executing the computer program.
10. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores a computer program, wherein when the computer program is executed by a processor, it implements the steps of the large-point-count real-time pulse compression implementation method as described in any one of claims 1 to 7.